FT260 HID class USB to UART/I 2 C Master

FT260 HID class USB to UART/I 2 C Master
FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
Future Technology Devices
International Ltd.
FT260
(HID-class USB to UART/I2C
Bridge IC)
FT260 is a HID-class USB to I2C/UART interface
Device Controller with the following advanced
features:

Single chip USB to UART/I2C bridge with
standard Human Interface Device (HID) class
support

USB2.0 compliant Full Speed device with entire
USB protocol handled on the chip.

Support
2
USB HID
corresponding
to
the
interfaces, I2C and UART
Interfaces, each
on-chip
physical

Pin configuration of enabling HID interface for
variety of application

HID over I2C specification support

Configurable I2C Master Interface controller
conforming to I2C v2.1 and v3.0 specification.

Support 4 speed modes defined in I2C-bus
Specification, standard mode (SM), fast mode
(FM), Fast mode plus (FM+), and High Speed
mode (HS)

Robust FTDI UART controller with hardware and
software flow control

Data transfer rate from 1.2 Kbuad to 12 Mbaud
(RS422, RS485, RS232) at TTL levels

Configurable GPIOs can be easily controlled by
software applications under HID class via the
USB bus

Fully integrated oscillator PLL with no external
crystal required

On-chip eFUSE for USB Vendor ID (VID),
Product ID (PID), and other vendor specific
parameters.

Unique USB serial number generation engine
and programming path to external EEPROM.

Integrated 5V-3.3V-1.8V level converter for
USB I/O.

+5V USB VBUS detection engine

USB Power Configurations; supports bus powered, self-powered and bus-powered with
power switching.

USB2.0 Low operating and suspend current;
24mA (active-typ) and 385µA (suspend-typ).

True 3.3V CMOS drive output and TTL input.
(operates down to 1V8 with external pull-ups)

Multiple I/O operating voltage level +3.3V,
+2.5V, +1.8V

pin output drive strength; 4 mA(min) and 16
mA(max)

Integrated power-on-reset circuit.

USB Battery Charger Detection.

UHCI / OHCI / EHCI / XHCI host controller
compatible.

Extended operating temperature range; -40 to
85⁰C.

Available in compact Pb-free 28 Pin WQFN
packages (RoHS compliant).
N either the whole nor any part of the information c ontained in, or the product desc ribed in this manual, may be adapted or re produced
in any material or electronic form without the prior written cons ent of the copyright holder. This product and its documen tation are
s upplied on an as-is basis and no warranty as to their s uitability for any partic ular purpose is either made or implied. Future T ec hnology
D evices International L td will not accept any claim for damages hows oever aris ing as a res ult of us e or fa ilure of this produc t. Y our
s tatutory rights are not affec ted. T his produc t or any variant of it is not intended for use in any medical appliance, device or sys tem in
whic h the failure of the produc t might reasonably be expec ted to res ult in personal injury. T his doc ument provides preliminary
information that may be s ubjec t to c hange without notice. N o freedom to us e patents or other intellec tual property rights is implied by
the public ation of this doc ument. Future T ec hnology D evices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park , Glasgow
G41 1HH U nited Kingdom. Sc otland Registered C ompany N umber: SC136640
Copyright © 2016 Future Technology Devices International Limited
1
FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
1
Typical Applications

HID class Device controller

USB to RS232/RS422/RS485 Converters

USB to HID-over-I2C Bridge


USB to I2C master controller
Interfacing MCU/PLD/FPGA based designs to
USB

USB Instrumentation
1.1 Driver Support
The USB Human Interface Device (HID) class is natively supported by most operation systems. A custom
driver is not required to be installed for the FT260.

Windows 10 32, 64-bit

Windows 8.1 32, 64-bit

Windows 8 32, 64-bit

Windows 7 32, 64-bit

Windows Vista and Vista 64-bit

Windows XP and XP 64-bit

Windows CE 4.2, 5.0, 5.2, 6.0

Windows Server 2008, 2003, 2000

Windows Embedded Operating Systems

Mac OS X

Linux

Android
1.2 Part Numbers
Part Number
Package
FT260Q-x
28 Pin WQFN
Note: Packing codes for x is:
- R: Taped and Reel, 2,500pcs per reel
- T: Tray packing, 490pcs per tray
For example: FT260Q-R is 2,500pcs taped and reel packing
Copyright © 2016 Future Technology Devices International Limited
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
1.3 USB Compliant
The FT260 is fully compliant with the USB 2.0 specification and has been given the USB-IF Test-ID (TID)
40001720.
.
Copyright © 2016 Future Technology Devices International Limited
3
FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
2
FT260 Block Diagram
Figure 2.1 FT260 Block Diagram
For a description of each function please refer to Function Description.
Copyright © 2016 Future Technology Devices International Limited
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
Table of Contents
1
Typical Applications .................................................... 2
1.1
Driver Support ........................................................................ 2
1.2
Part Numbers ......................................................................... 2
1.3
USB Compliant ........................................................................ 3
2
FT260 Block Diagram................................................... 4
3
Device Pin Out and Signal Description .......................... 7
3.1
WQFN-28 Package Pin Out ...................................................... 7
3.2
Pin Description ....................................................................... 8
4
Function Description ................................................. 11
4.1
Key Features..........................................................................11
4.2
Functional Block Descriptions .................................................12
5
FT260 Configuration and Bus Interfaces..................... 16
5.1
Device Interface Configuration ...............................................16
5.2
I2C Bus Interface ...................................................................17
5.2.1
I2 C Pin Def inition .................................................................................... 17
5.2.2
I2 C Bus Protocol ..................................................................................... 17
5.2.3
I2 C Slave Address ................................................................................... 19
5.2.4
I2 C Timing ............................................................................................. 19
5.3
UART Interface ......................................................................21
5.3.1
UART Pin Definition ................................................................................. 23
5.3.2
UART Bus Protocol .................................................................................. 23
5.3.3
UART Flow Control .................................................................................. 25
5.3.4
UART Timing.......................................................................................... 25
5.4
6
GPIOs....................................................................................26
Devices Characteristics and Ratings ........................... 27
6.1
Absolute Maximum Ratings ....................................................27
6.2
ESD and Latch-up Specifications .............................................27
6.3
DC Characteristics..................................................................28
6.4
USB Characteristics ................................................................32
7
FT260 Power Configurations ...................................... 33
7.1
USB Bus Powered Configuration ............................................33
7.2
Self Powered Configuration with 5V Source Input ...................34
7.3
Self Powered Configuration with 3.3V Source In .....................35
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
7.4
Bus Powered Configuration with +1.8V/+2.5V I/O Voltage .....36
7.5
Configuration for System Pins ................................................37
7.6
Power for Programming eFUSE ...............................................38
8
Application Examples ................................................ 39
8.1
USB HID-over-I2C..................................................................39
8.2
USB to RS232 Converter .........................................................40
8.3
USB to RS485 Converter .........................................................41
8.4
USB to RS422 Converter .........................................................42
9
User Configuration .................................................... 43
9.1
9.1.1
9.2
Programming the embedded eFUSE over USB .........................43
Default Values ....................................................................................... 43
Programming the external EEPROM over USB..........................46
9.2.1
Supported EEPROM Spec ......................................................................... 46
9.2.2
Default Values ....................................................................................... 47
10 Package Parameters.................................................. 50
10.1
WQFN-28 Package Mechanical Dimensions ...........................50
10.2
WQFN-28 Package Markings ................................................51
10.3
Solder Reflow Profile ...........................................................52
11 Contact Information .................................................. 53
Appendix A – References ................................................. 54
Document References ....................................................................54
Acronyms and Abbreviations ..........................................................55
Appendix B - List of Figures and Tables ............................ 56
List of Figures................................................................................56
List of Tables .................................................................................56
Appendix C - Revision History .......................................... 58
Copyright © 2016 Future Technology Devices International Limited
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
3
Device Pin Out and Signal Description
3.1 WQFN-28 Package Pin Out
Figure 3.1 Pin Configuration WQFN-28 (top-down view)
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
3.2 Pin Description
Pin Name
FT260
Pin No.
(Function)
1
DEBUGGER
I/O
2
STEST_RSTN
I
3
RESETN
I
4
DCNF0
I
Device Interface Configuration Selection bit-0 for the HID
interface selection. Refer to Section 5.1
5
DCNF1
I
Device Interface Configuration Selection bit-1 for the HID
interface selection. Refer to Section 5.1
Type
Description
Debugging pin.
Should be reserved and tied to high
C hip reset input for test mode. Active low.
Should be reserved and tied to high.
C hip reset input. Active low.
Can be tied to high if external reset function is not
required.
+3.3V/2.5V/1.8V supply voltage.
6
VCCIO
P **
This is the supply voltage for all the I/O ports. This pin
shall be connected to VOUT3V3(pin 22) when I/O ports
are working at 3.3V
DIO0, Digital Input/Output Pin 0.
7
DIO0
I/O
( TX_AC TIVE /
O
TX_LED /
O
GPIOA
)
I/O
This pin can be configured as one of the following three
functions via embedded eFUSE or external EEPROM.
TX_ACTIVE is set as the default function to indicate the
UART transmitting is active.
TX_LED is set as the LED driving source when data is
transmitted on UART TX port.
GPIOA, General Purpose I/O. GPIOA is another optional
function.
8
9
DIO1
I/O
( GPIOB /
I/O
RTSN
O
)
DIO2
I/O
( GPIOE /
I/O
C TSN
)
I
DIO1, Digital Input/Output Pin 1.
GPIOB, General Purpose I/O. is set as the default
function.
RTSN, Request To Send Handshake, can be enabled via a
USB command for the UART interface.
DIO2, Digital Input/Output Pin 2.
GPIOE, General Purpose I/O. is set as the default function.
CTSN, C lear To Send Handshake, can be enabled via a
USB command for the UART interface.
DIO3, Digital Input/Output Pin 3.
10
11
DIO3
I/O
( RXD /
I
GPIOC )
I/O
DIO4
I/O
( TXD /
O
RXD, Receive Asynchronous Data Input, is set as default
function when the UART interface is selected via {DC NF1,
DC NF0}.
GPIOC, General Purpose I/O, is set as the default function
when UART interface is not configured.
DIO4, Digital Input/Output Pin 4.
TXD, Transmit Asynchronous Data Output, is set as
default when the UART interface is selected via {DC NF1,
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
FT260
Pin No.
Pin Name
Type
(Function)
GPIOD )
I/O
Description
DC NF0}.
GPIOD, General Purpose I/O, is set as default when the
UART interface is not configured.
DIO5, Digital Input/Output Pin 5.
12
DIO5
I/O
( SC L /
I/O
GPIO0 )
I/O
DIO6
I/O
( SDA /
I/O
SC L, Serial clock for I2C bus with open drain output, is set
as the default function
GPIO0, General Purpose I/O. GPIO0 is another optional
function and can be enabled via a USB command.
DIO6, Digital Input/Output Pin 6.
13
GPIO1 )
I/O
SDA, Serial data for I2C mode with open drain output, is
set as the default function.
GPIO1, General Purpose I/O. GPIO1 is another optional
function and can be enabled via a USB command.
DIO7, Digital Input/Output Pin 7.
This pin can be configured as one of the following three
functions via embedded eFUSE or external EEPROM.
14
DIO7
I/O
( SUSPOUT_N /
O
PWREN_N /
O
GPIO2
)
I/O
SUSPOUT_N is set as the default function as the indicator
when entering the USB suspending state. _N means
active low. This indicator can also be configured as active
high via EEPROM and symbolled as SUSPOUT.
PWREN_N is as the power enable indicator when the
FT260 is USB enumerated. Active low.
GPIO2, General Purpose I/O. GPIO2 is another optional
function and can be enabled.
DIO8, Digital Input/Output Pin 8.
15
16
DIO8
I/O
( INTRIN /
I
WAKEUP /
I
GPIO3 )
I/O
DIO9
I/O
( GPIOF /
I/O
DTRN )
17
O
DIO10
I/O
( GPIO4 /
I/O
DC D
I
)
INTRIN is the default function as the external interrupt
input source
WAKEUP functions as the USB remote wakeup input
source.
GPIO1, General Purpose I/O. GPIO1 is another optional
function and can be enabled via a USB command.
DIO9, Digital Input/Output Pin 9.
GPIOF, General Purpose I/O. is set as the default function.
DTRN, Data Terminal Ready, can be enabled via a USB
command for the UART interface.
DIO10, Digital Input/Output Pin 10.
GPIO4, General Purpose I/O, is set as the default function.
DCD, Data Carrier Detection, can be enabled via a USB
command for the UART interface.
DIO11, Digital Input/Output Pin 11.
18
DIO11
I/O
GPIO5, General Purpose I/O, is set as the default function.
( GPIO5/
I/O
RI, Ring Indicator, can be enabled via a USB command for
the UART interface. RI may be used as an alternative to
WAKEUP for waking up the USB host. WAKEUP feature
accompanied with RI can be enabled via the parameter
defined in an external EEPROM.
RI
)
I
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
Pin Name
FT260
Pin No.
(Function)
19
GND
P
20
DM
AI/O
USB peripheral bidirectional DM line.
21
DP
AI/O
USB peripheral bidirectional DP line.
Type
Description
Ground
+3.3V voltage Out
22
VOUT3V3
P **
23
VCCIN
P **
24
AGND
P
May be used to power VCCIO. When VCCIN is supplied
with 3.3V, this pin is a power input pin and should be
connected to pin 23.
+5.0V(or 3.3V) supply voltage In
Power source-in to embedded regulator.
Analog Ground
+3.8V supply voltage In
25
FSOURCE
AP
26
VBUS_DET
I
Power source for programming embedded eFUSE. It
should be kept floating or 0V when not in programming
mode
VBUS detection input. It is a +5.0V tolerant pin
DIO12, Digital Input/Output Pin 12.
27
DIO12
I/O
( BC D_DET/
O
RX_LED/
O
PWREN_N/
O
GPIOG
)
I/O
This pin can be configured as one of the following three
functions via embedded eFUSE or external EEPROM.
BCD_DET is the default function as the battery charger
detection indicator output when the device is connected to
a dedicated battery charger port. Polarity can be defined.
RX_LED is as the LED driving source when data is
received on UART RX port.
PWREN_N is as the power enable indicator when FT260 is
USB enumerated. Low active.
GPIOG, General Purpose I/O, is another optional function.
28
DIO13
I/O
GPIOH/
I/O
DSRN
I
DIO13, Digital Input/Output Pin 13.
GPIOH, General Purpose I/O, is set as the default function
DSRN, Data Set Ready, can be enabled via USB command
for UART interface.
Table 3.1 FT260 Pin Description
**If VCCIN is supplied with 3.3V power input, then VOUT3V3 and VCCIO must also be driven with this
3.3V power source. For details refer to Section 7.3.
Copyright © 2016 Future Technology Devices International Limited
10
FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
4
Function Description
The FT260 is a USB device which supports I²C and UART communication through standard USB HID class
interfaces. The USB HID class is natively supported by most operating systems. A custom driver is not
required to be installed for the FT260.
4.1 Key Features
Highly Functional Integration. FT260 is highly integrated, with a USB2.0 compliant full-speed
transceiver, oscillator PLL as the source of the operating clock, LDO regulator for full chip operating
power source, eFUSE for basic customization and automatic scanning mechanism of EEPROM for
advanced customization. It also includes Power-On-Reset (POR) and VBUS detection input with 5Vtolerance. These embedded functions simplify external circuit design and reduce external component
count.
HID class USB to I2C/UART Bridge. FT260 provides the bridge function between standard a USB HID
class driver and an I2C slave device and/or UART device. The standard USB HID class driver is natively
supported by most operating systems meaning the FT260, does not need a customized driver to be
installed. The USB HID class exchanges data between a host and a device by HID reports, which are the
actual data blobs follow HID format, and the application developers have to communicate with the FT260
via the HID reports. Please refer to Application Notes for detail formats. In order to help the developers,
FTDI also provides a Windows DLL with easy-to-use API for FT260 application development.
There are 2 USB interfaces corresponding to HID class in the FT260. One is for the I2C bus and the other
is for the UART bus. These two interfaces can exist concurrently and can be selected independently
according to the application. For each interface, there exists one Interrupt IN pipe and Interrupt OUT pipe
with a max packet size equal to 64 bytes. With the fastest polling frequency, one time in 1 ms, the
Interrupt pipes can operate with maximum data throughput up to 64kB/sec. Users can also utilize the
HID class commands through the Control pipe to configure the setting and to control the functions in the
FT260. Digital function pins can be programmed as GPIO and can be controlled by HID class commands
through Endpoint 0.
The I2C bus can run at common I2C bus speeds, standard mode (SM), fast mode (FM), Fast mode plus
(FM+), and High Speed mode (HS). A higher bit rate on the I2C bus is also configurable up to 3Mbit/s.
Clock stretching is supported to conform to v2.1 and v3.0 of the I2C specification. The default
configuration is for standard mode speed (SM). All the configurable settings can be changed over USB
before the I2C bus starts any transferring.
The robust FTDI UART bus is embedded in the FT260. The baud rate can be supported from 1200 baud to
12M baud. RTSN/CTSN, DSRN/DTRN and XON/XOFF handshaking options are also supported and can be
enabled by associated APIs defined in the DLL for the FT260. Data can be received from the RX pin and
delivered to the HID driver via the Interrupt IN pipe. Data can also be delivered from the USB host
through the Interrupt OUT pipe and transmitted on to the TX pin.
An remote wake up function is also supported. If the operating system supports remote wake up and
allows external hardware to wake it, the FT260 can be resumed by the pin DIO8 which is set by default
as WAKEUP triggering a resume signal on USB bus to wake up USB host. DIO11 can also be a remote
wake up source when the pin function is set as RI and the parameter, RI as Wake-Up; defined in external
EEPROM is enabled.
HID over I2C Bridge Human Interface Device (HID) is one of the most popular USB devices. It was a
protocol developed to simplify the process of connecting accessories such as mouse, keyboard and
touchpad to the PC. HID was originally developed to run over USB or Bluetooth. Fo r Windows 8, Microsoft
created a new device type called “HID over I2C”, which allows the device to communicate HID protocol
over an Inter-Integrated Circuit (I²C) bus. The new “HID over I2C” devices are only supported natively by
Microsoft Windows 8 or above.
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
The FT260 provides a bridge which connects a “HID-over-I²C” device via an I²C bus, helps to translate
USB HID requests from a PC to the device, and makes it work as a normal USB HID class device. With
the FT260, an I2C slave function compliant to HID-over-I2C protocol can directly communicate to USB
HID class driver through the USB connection.
Configurable Settings for Customization. An electrical poly-fuse (eFUSE) is embedded in the FT260.
This embedded eFUSE provides the configurable settings of the Vendor Specific Parameters for basic
customization. These Vendor Specific Parameters are the settings about USB, I/O and HID-over-I2C.
Users can utilize this embedded eFUSE to achieve basic customization.
For advanced settings, the FT260 also reserves the programming interface of an external EEPROM via an
I2C interface to record the Vendor Specific Parameters. The FT260 will automatically scan for the
presence of an EEPROM. (See Supported EEPROM Spec for suitable devices). When the FT260 is powered
up, these Vendor Specific Parameters will be automatically loaded and the FT260 will operate with the
parameter setting. When both eFUSE and EEPROM exist at the same time, the Vendor Specific
Parameters in the EEPROM will dominate. Both eFUSE and EEPROM can be programmed using the FTDI
utility software called FT_PROG, which can be downloaded from the FTDI Utilities page on the FTDI
website
(http://www.ftdichip.com/Support/Utilities.htm#FT_Prog).
Configurable Digital I/Os. There are 14 digital pins in the FT260 that can be configured for different
purposes, such as UART/I2C bus signals, General Purpose Input/Output (GPIO), LED indicator for data
transfer over UART, a USB suspend indicator output, remote wake up input, an interrupt input or power
enable indicator. Functions for each pin will be determined during Chip Configuration, with parameters
from the eFUSE or EEPROM, or via USB commands.
The signal drive strength of these Digital I/Os can be configured via the FT_Prog utility for different
design needs.
Power management. The operating clock for the FT260 can be set as 48MHz, 24MHz, 12MHz. Higher
operating frequencies allow higher data throughput. And, lower operating frequencies allow lower power
consumption. IDLE mode is also supported and can be enabled via the parameters in eFUSE or EEPROM.
The system operating clock will be switched to 30 kHz when no data is transferred between USB and
I2C/UART bus for a period of 5 seconds. Any UART RX signalling will trigger the whole chip exiting from
the IDLE mode to normal operating status.
USB suspend/resume and remote wakeup are fully supported. The FT260 will be set to a power saving
status and the clock to most of the digital circuits will be stopped when the device is suspended.
Source Power and Power Consumption. The FT260 is capable of operating with a voltage supply of
+3.3V or +5.0V with a nominal operational mode current of 24mA, a nominal idle mode current of 5.6mA
and a nominal USB suspend mode current of 405µA. This allows greater margin for peripheral designs to
meet the USB suspend mode current limit of 2.5mA. An integrated level converter within the FT260
allows the device to interface with logic running at +1.8V, 2.5V or +3.3V. (Note: External pull-ups are
recommended for IO <3V3).
4.2 Functional Block Descriptions
The following paragraphs detail each function within the FT260. Please refer to the block diagram shown
in Figure 2.1 .
Internal Oscillator. The Internal Oscillator cell generates a 48MHz reference clock. With internal
trimming mechanisms and an adaptive algorithm, this oscillator provides a stable clock source to the USB
DPLL block for generating a recovered clock to Clock Synthesizer block for functional operating.
Clock Synthesizer. The Clock Synthesizer takes the 48MHz clock from the Internal Oscillator and
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
generates 48MHz, 24MHz and 12MHz as reference clocks. The user can select one of these reference
clocks as the system operating clock through software over USB. The system operating clock will be the
clock source for embedded functions to generate the required interface clock. Higher frequencies should
be chosen for higher data throughput demand and lower frequencies for lower power operation. Users
can choose the system operating frequency based on the application.
USB Transceiver. The USB Transceiver cell provides the USB 1.1 / USB 2.0 full-speed physical interface.
Output drivers provide +3.3V level slew rate control , while a differential input and two single ended
input receivers provide data in, Single -Ended-0 (SE0) and USB reset detection conditions respectfully. A
1.5kΩ pull up resistor on USBDP is incorporated.
USB DPLL. The DPLL cell locks on to the incoming NRZI USB data and generates recovered clock an d
data signals for the Serial Interface Engine (SIE) block.
Serial Interface Engine (SIE). The Serial Interface Engine (SIE) block performs the parallel to serial
and serial to parallel conversion of the USB data. In accordance with the USB 2.0 specification, it
performs bit stuffing/un-stuffing and CRC5/CRC16 gene ration. It also checks the CRC on the USB data
stream.
USB HID Protocol Engine. The USB HID Protocol Engine manages the standard commands from the
device control pipe when enumerating. It also handles the Human Interface Device (HID) class
commands between the standard HID host driver and the device with I2C or/and UART functions. With
the Device Interface Configuration pins, DCNF0 and DCNF1, it can easily connect HID functions via UART
or I2C interfaces to a PC host driver. Additionally, it can simultaneously support 2 HID functions via UART
and I2C interfaces. This Protocol Engine also includes an IN and OUT Buffer management memory unit
which handles the data between USB endpoints and function interfaces such as UART and I2C.
The USB HID Protocol Engine includes:

Endpoint-0 for a control pipe with max packet size 64 Bytes

2 endpoints for interrupt-in pipe with max packet size equal to 64 Bytes

2 endpoints for interrupt-out pipe with max packet size up to 64 Bytes

Multiple interfaces configuration support

HID class-specific request parsing and transporting to I 2C/UART bus interface

command Suspend detection and power management

Remote wake-up support

Fully compatible to USB2.0 specification requirement in full speed mode
OUT Buffer. Data sent from the USB host controller to the FT260 via the USB data OUT endpoint is
stored in the OUT buffer. Data is removed from the OUT buffer to function interfaces under the control of
the USB HID protocol engines. The endpoint buffer size is 64 bytes as the maximum packet size defined
for full speed transferring. For the interrupt pipe, the buffer is double buffered for increased throughput.
IN Buffer. Data from the function interfaces is stored in the IN buffer. The USB host controller removes
data from the IN buffer by sending a USB request for data from the device data IN endpoint. The
endpoint buffer size is 64 bytes as the maximum packet size defined for full speed transferring. For the
interrupt pipe, the buffer is double buffered for increased throughput.
UART Controller. When the data and control bus are configured in UART mode, the interface
implements a standard asynchronous serial UART port with flow control. The UART performs
asynchronous 7/8 bit Parallel to Serial and Serial to Parallel conversion of the data on the RS232 (RS422
and RS485) interface. Control signals supported by the UART include RTS, CTS, DTR, DSR, DCD and RI.
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The UART provides a transmitter enable control signal (TX_ACTIVE) on the pin DIO0 to assist with
interfacing to RS485 transceivers. The UART can support baud rates from 1.2 Kbaud to 12 Mbaud.
UART in the FT260 functions include:

Full RS232 support

7 or 8 data bits, an optional parity bit and 1 or 2 stop bits support

Baud rate from 1.2 Kbaud to 12 Mbaud support

Baud rate accuracy within +-1.5%

Optional hardware flow control via RTS / CTS and DTR / DSR

Optional software flow control via XON / XOFF characters
I2C Master Controller. I2C (Inter Integrated Circuit) is a multi-master serial bus invented by Philips. I2C
uses two bi-directional open-drain wires called serial data (SDA) and serial clock (SCL). Common I2C bus
speeds are the standard mode (SM) with bit rate up to 100 Kbit/s, fast mode (FM) with the bit rate up to
400 Kbit/s, Fast mode plus (FM+) with the bit rate up to 1 Mbit/s, and High Speed mode (HS) with the bit
rate up to 3.4 Mbit/s. Refer to the I2C specification for more information on the protocol.
The FT260 device can operates as I2C master, and the major functions include:

Fully compatible to v2.1 and v3 specification

7-bit address support

Support 4 speed configurations defined in I2C-bus specification

Support bit rate up to 3Mbit/s

Clock stretching support
GPIOs. The FT260 contains 14 digital function pins. Each pin can be set as I 2C/UART related function or
GPIO (General Purpose Input/Output). Some GPIO functions are implemented in the FT260 for various
applications like TX_ACTIVE, TX_LED, RX_LED for UART; SUSPOUT_N, WAKEUP for USB; PWREN and
BCD_DET indicator for power management. GPIO functions can also be directly controlled by applications
over USB via the Control pipe. The drive strength, slew rate control and pull high/low resistors can be
configured in the Vendor Specific Parameters defined in embedded eFUSE or external EEPROM by
FT_PROG.
GPIO functions for each pin in the FT260 include:

DIO0
(pin
7 @ QFN28) can be configured as TX_ACTIVE, TX_LED, GPIOA

DIO1
(pin
8 @ QFN28) will be set as GPIOB function by default

DIO2
(pin
9 @ QFN28) will be set as GPIOE function by default

DIO3 (pin 10 @ QFN28) will be set as GPIOC function by default when the UART interface in not
enabled

DIO4 (pin 11 @ QFN28) will be set as GPIOD function by default when the UART interface in not
enabled

DIO5
(pin 12 @ QFN28) can be set as GPIO0 function when the I2C interface and external
EEPROM are not supported

DIO6
(pin 13 @ QFN28) can be set as GPIO1 function when the I2C interface and external
EEPROM are not supported

DIO7
(pin 14 @ QFN28) can be configured as SUSPOUT_N, SUSPOUT, PWREN_N, GPIO2
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
DIO8
(pin 15 @ QFN28) can be configured as WAKEUP, GPIO3

DIO9
(pin 16 @ QFN28) will be set as GPIOF function by default

DIO10 (pin 17 @ QFN28) will be set as GPIO4 function by default

DIO11 (pin 18 @ QFN28) will be set as GPIO5 function by default

DIO12 (pin 27 @ QFN28) can be configured as BCD_DET, RX_LED, PWREN_N and GPIOG

DIO13 (pin 28 @ QFN28) will be set as GPIOH function by default
eFUSE Controller + Internal eFUSE. The internal eFUSE (electrical poly fuse) provides storage for the
Vendor Specific Parameters. These Vendor specific Parameters are for the purpose of cost-effective
customization. When FT260 is powered up, all the parameters will be automatically loaded into and taken
effective before operation. The embedded eFUSE can be programmed over USB with an external voltage
requirement on the pin FSOURCE with 3.8V power source. These parameters can be programmed using
the FTDI utility software called FT_PROG, which can be downloaded from FTDI Utilities on the FTDI
website (http://www.ftdichip.com/Support/Utilities.htm#FT_Prog).
Vendor Specific Parameters in eFUSE include:

USB Vendor ID (VID), Product ID (PID), power type selection

DIO0, DIO7, DIO12 function selection

Digital pins driving strength selection (4mA, 8mA, 12mA, 16mA)

HID-over-I2C Slave Address

HID-over-I2C Interrupt type

HID-over-I2C SET_/GET_IDLE, SET_/GET_PROTOCOL, SET_POWER enable control
For further details refer to section 9.1.
5V-3.3V-1.8V LDO regulator. The LDO will regulate out 2 reference voltages for use within the FT260.
The +3.3V LDO regulator generates the +3.3V reference voltage for driving the USB transceiver cell
output buffers. It requires an external decoupling capacitor to be attached to the VOUT3V3 regulator
output pin. Another +1.8V LDO regulator generates the +1.8V reference voltage for driving the internal
core of the IC.
POR RESET Generator. POR is the integrated Power on Reset Generator Cell providing a reliable poweron reset to the device internal circuitry at power up. The re is also a RESETN input pin allow ing an
external device to reset the FT260. RESETN can be tied to VCCIO (+3.3v) if not being used.
Embedded BCD Detection. Supports Battery Charger Detection. When the pin DIO12 is set as
BCD_DET function, it will be active if the device is connected to a dedicated charger instead of a standard
USB Host.
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5
FT260 Configuration and Bus Interfaces
5.1 Device Interface Configuration
The FT260 has 2 HID interfaces and can be selected by {DCNF1, DCNF0}. The first HID Interface is for
the bridge function from USB HID driver to I2C bus interface. And, the second HID Interface is for the
bridge function from USB HID driver to UART bus interface. The following table shows the USB interfaces
corresponding to the chip configuration mode.
DCNF1
DCNF0
0
0
HID Interfaces
Both interfaces for I 2C and UART are enabled. Interfaces will be created as :
- Interface-0 is set as the interface for I 2C to send and receive data via I 2C connection
- Interface-1 is set as the interface for UART to send and receive data via UART connection
- DIO3 and DIO4 are set as RXD and TXD for UART by default
0
1
Only the interface for I 2C is enabled. The interface will be created as :
- Interface-0 is set as the interface for I 2C to send and receive data via an I 2C connection
- DIO3 and DIO4 are set as GPIO functions by default.
1
0
Only the interface for UART is enabled. The interface will be created as :
- Interface-0 is set as the interface for UART to send and receive data via a UART connection
- DIO3 and DIO4 are set as RXD and TXD for UART by default
1
1
Both Interfaces for I 2C and UART are enabled. Interfaces will be created as :
- Interface-0 is set as the interface for I 2C to send and receive data via an I 2C connection
- Interface-1 is set as the interface for UART to send and receive data via a UART connection
- DIO3 and DIO4 are set as RXD and TXD for UART by default
Table 5.1 FT260 USB Device Interface Configuration
Note that the default functions for the pins, GPIOC and GPIOD, will be determined by Device Interface
Configuration. When the interface for UART is enabled, the pin DIO3 is assigned as RXD for UART and
DIO4 is assigned as TXD for UART.
DIO5 and DIO6 are default designed as SCL and SDA for the I2C bus. It means that the I2C master
controller is enabled by default no matter if the interface for I2C is enabled or not. Users can set the DIO5
and DIO6 as the GPIO functions via USB commands if the interface for the I2C is disabled and
connectivity to the external I2C devices is not required.
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5.2 I2C Bus Interface
I2C (Inter Integrated Circuit) is a multi-master serial bus invented by Philips. I 2C uses two bi-directional
open-drain wires called serial data (SDA) and serial clock (SCL). Common I²C bus speeds are standard
mode (SM) with a bit rate up to 100 Kbit/s, fast mode (FM) with a bit rate up to 400 Kbit/s, Fast mode
plus (FM+) with a bit rate up to 1 Mbit/s, and High Speed mode (HS) with the bit rate up to 3.4 Mbit/s.
An I2C bus node can operate either as a master or a slave:

Master node
– issues the clock and addresses slaves

Slave node
– receives the clock line and address.
The FT260 operates as an I2C master and is capable of being set to the speed modes defined in the I2C
bus specification. Besides the speed mode defined in the I2C standard specification, the I2C controller of
the FT260 can support flexible SCL frequencies defined by the following function
𝑺𝑪𝑳 𝑭𝒓𝒆𝒒 =
𝐎𝐩𝐞𝐫𝐚𝐭𝐢𝐧𝐠 𝐂𝐥𝐨𝐜𝐤 𝐅𝐫𝐞𝐪𝐮𝐞𝐧𝐜𝐲
𝐌∗ ( 𝐍+𝟏 )
𝑴 = 𝟔 𝒐𝒓 𝟖; 𝑵 = 𝟏, 𝟐, 𝟑, … … , 𝟏𝟐𝟕
When the target frequency is below 100 KHz or higher than 1MHz, M will be equal to 8; otherwise, M will
be equal to 6. For example, to generate a 3MHz frequency on SCL, M will be selected as 8. With the
operating clock frequency equal to 48MHz, the user can set N as 1. The SCL frequency of the I2C master
mode for the FT260 can be set via USB commands. Details can be referenced in the FT260 Application
Notes.
5.2.1 I2C Pin Definition
The I2C function in the FT260 is an I2C master device. It is enabled by default when the FT260 is powered
up and the operating speed on the I2C bus is designed as 60 KHz for connectivity to most of the external
I2C slave devices. The I2C pins of the FT260 are

Clock – SCL

Data
(DIO5, pin 12 @ QFN28), as clock output with open-drain design
– SDA (DIO6, pin 13 @ QFN28), command/address/data transfer between master and
slave with open-drain design
5.2.2 I2C Bus Protocol
There are four potential modes of operation for a given bus device, although most devices only use a
single role (Master or Slave) and its two modes (Transmit and Receive):

Master transmit – sending data to a slave

Master receive – receiving data from a slave

Slave transmit – sending data to a master

Slave receive
– receiving data from the master
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The following figure shows the basic I2C bus protocol
Figure 5.1 I2C Bus Protocol
The master is initially in master transmit mode by sending a start bit followed by the 7 -bit address of the
slave it wishes to communicate with, which is finally followed by a single bit representing whether it
wishes to write(0) to or read(1) from the slave.
If the slave exists on the bus then it will respond with an ACK bit (active low for acknowledged) for that
address. The master then continues in either transmit or receive mode (according to the read/write bit it
sent), and the slave continues in its complementary mode (receive or transmit, respectively).
The address and the data bytes are sent most significa nt bit first. The start bit is indicated by a high-tolow transition of SDA with SCL high; the stop bit is indicated by a low -to-high transition of SDA with SCL
high.
If the master wishes to write to the slave then it repeatedly sends a byte with the slave sending an ACK
bit. (In this situation, the master is in master transmit mode and the slave is in slave receive mode.)
If the master wish to read from the slave then it repeat edly receives a byte from the slave, the master
sends an ACK bit after every byte but the last one. (In this situation, the master is in master receive
mode and the slave is in slave transmit mode.). The master then ends transmission with a stop bit, or it
may send another START bit if it wishes to retain control of the bus for another transfer (a "combined
message").
I²C defines three basic types of message, each of which begins with a START and ends with a STOP:

Single message where a master writes data to a slave;

Single message where a master reads data from a slave;

Combined messages, where a master issues at least two reads and/or writes to one or more
slaves
In a combined message, each read or write begins with a START and the slave address. After the first
START, these are also called repeated START bits; repeated START bits are not preceded by STOP bits,
which is how slaves know the next transfer is part of the same message.
Users can refer to the I2C specification for more information on the protocol.
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5.2.3 I2C Slave Address
The FT260 is configured as a USB to I²C master bridge and is able to issue any value of 7-bits slave
address. Users can issue I2C commands towards an I2C slave device to read or write data via the
applications defined in USB host side. For details, refer to the FT260 Application Notes.
When the FT260 is powered up, the I2C master controller will start to scan the external I 2C device. The
scanning address range is from 50h to 57h for the types of EEPROM. For further details refer to section
9.2.
5.2.4 I2C Timing
Figure 5.2 I2C Bus Timing
Parameter
Min(ns)
Typ(ns)
Max(ns)
Description
T0@12MHz
83.333
T0 is the period when operating clock=12MHz
T0@24MHz
41.666
T0 is the period when operating clock=24MHz
T0@48MHz
20.833
T0 is the period when operating clock=48MHz
T1@SM/HM
16*T0
8*(1+N)*T0
SCK Period when I 2C as master with standard speed
mode(SM) and HS speed mode
T1@FM/HM
12*T0
6*(1+N)*T0
SCK Period when I 2C as master with FM, FM+ speed
mode
T2
8*T0
4*(1+N)*T0
SCK high pulse width when I 2C as master with
standard speed mode(SM) and HS speed mode
T2
4*T0
2*(1+N)*T0
SCK high pulse width when I 2C as master with FM,
FM+ speed mode
T3
2*(1+N)*T0
SDA output setup time to SCL rising edge when I 2C as
master
T4
2*(1+N)*T0
SDA output hold time to SCL falling edge when I 2C as
master
T5
>=0
input setup time requirement from SDA to SCL rising
edge when I 2C as master
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T6
>=0
input hold time requirement from SDA to SC L falling
edge when I 2C as master
T7
2*(1+N)*T0
Start bit setup time to SC L falling edge
T8
4*(1+N)*T0
Start bit hold time to SC L falling edge
T9
2*(1+N)*T0
Stop bit setup time to SC L rising edge
T10
2*(1+N)*T0
Stop bit hold time to SC L rising edge
T11
4*(1+N)*T0
Bus free time between Start and Stop bit
Table 5.2 I2C Timing for VCCIO=3.3V
*Note that N can be ranged from 1 to 255
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5.3 UART Interface
A universal asynchronous receiver/transmitter (UART) is a computer hardware device that translates data
between parallel and serial forms. UARTs are commonly used in conjunction with communication
standards such as TIA (formerly EIA) RS-232, RS-422 or RS-485.
The UART can support baud rates from 1.2 Kbaud to 12 Mbaud defined by the following function.
𝐁𝐚𝐮𝐝 𝐑𝐚𝐭𝐞 =
𝑶𝒑𝒆𝒓𝒂𝒕𝒊𝒏𝒈 𝑪𝒍𝒐𝒄𝒌 𝑭𝒓𝒆𝒒𝒖𝒆𝒏𝒄𝒚
𝑩𝒂𝒖𝒅 𝑫𝒊𝒗𝒊𝒔𝒐𝒓
The baud divisor is used to divide the operating clock frequency to the desired baud rate. It can take any
value between 4 and 40000 with the added option of adding a fractional component in the order of
1/8ths.
Example: To generate an 115200 baud rate in the FT260, the operating clock frequency to the UART
controller equals to 48MHz. The baud divisor can be calculated as shown in the below equation.
𝐁𝐚𝐮𝐝 𝐃𝐢𝐯𝐢𝐬𝐨𝐫 =
𝟒𝟖𝑴𝑯𝒛
𝟏𝟏𝟓𝟐𝟎𝟎𝑯𝒛
= 𝟒𝟏𝟔. 𝟔𝟔𝟕
Due to the fractional component is the order of 1/8ths, the baud divisor must be selected as 416.625. It
is obvious that the difference of baud divisors will produce a percentage error. A comparison of standard
baud rates and the divisor values can be seen in Table 5.3 below. This shows the baud rate required,
followed by the divisor value needed to achieve this if the UART is running off a 48MHz clock. Then it lists
the actual baud rate achieved and finally the percentage error this produces.
Target
Ideal
Actual
Actual
Baud
Baud Rate
Baud Divisor
Baud Divisor
Baud Rate
Error Rate
12,000,000
4
4
12,000,000
0.00%±0.25%*Note
9,600,000
5
5
9,600,000
0.00%±0.25%
8,000,000
6
6
8,000,000
0.00%±0.25%
6,000,000
8
8
6,000,000
0.00%±0.25%
3,000,000
16
16
3,000,000
0.00%±0.25%
2,000,000
24
24
2,000,000
0.00%±0.25%
1,500,000
32
32
1,500,000
0.00%±0.25%
1,000,000
48
48
1,000,000
0.00%±0.25%
921,600
52.083
52
923,076.9231
0.16%±0.25%
460,800
104.16
104.125
460,984.3938
0.04%±0.25%
230,400
208. 3
208.250
230,492.1969
0.04%±0.25%
115,200
416. 6
416.625
115,211.5212
0.01%±0.25%
57,600
833. 3
833.250
57,605.7606
0.01%±0.25%
38,400
1,250
1250
38,400
0.00%±0.25%
19,200
2,500
2500
19,200
0.00%±0.25%
9,600
5,000
5000
9,600
0.00%±0.25%
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4,800
10,000
10000
4,800
0.00%±0.25%
2,400
20,000
20000
2,400
0.00%±0.25%
1,200
40,000
40000
1,200
0.00%±0.25%
Table 5.3 Baud Rate Comparison
*Note that the baud error rate with ±0.25% is from the internal oscpll.
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5.3.1 UART Pin Definition
The UART function in the FT260 can be configured as UART-only or I2C plus UART mode by DCNF0 and
DCNF1 pins. The mode selection is as shown in the Table 5.2.
The pins of the FT260 will be mapped accordingly. The UART pins are

Receive Data (RXD)
– DIO3
(pin-10 @ QFN28)
– DIO4
(pin-11 @ QFN28)
– DIO0
(pin-7
serial data input.

Transmit Data (TXD)
serial data output.

Transmit Active signal (TX_ACTIVE)
@ QFN28)
active high when data transmission is in progress. Asserted one clock cycle before start bit and
de-asserted with final stop bit.

Request To Send Signal (RTSN)
– DIO1
(pin-8
@ QFN28)
active low handshaking bit. When low it indicates that the UART can start receiving Rx Data.

Clear To Send Signal (CTSN)
– DIO2 (pin-9 @ QFN28)
active low handshaking bit. When this bit is ‘1’, the UART should stop sending TX Data.

Data Terminal Ready (DTRN)
– DIO9
(pin-16 @ QFN28)
active low and when ‘0’, indicates that the UART can be connected and receive RX Data.

Data Set Ready (DSRN)
– DIO13 (pin-28 @ QFN28)
active low indicating an active connection. When this bit is ‘1’, the UART should not send TX Data.

Data Carrier Detect (DCD)
– DIO10 (pin-17 @ QFN28)
asserted when a connection has been established with external device.

Ring Indicator (RI)
– DIO11 (pin-18 @ QFN28)
asserted when requested to wake up.
5.3.2 UART Bus Protocol
Data transferring uses NRZ (Non-Return to Zero) data format consisting of 1 start bit, 7 or 8 data bits, an
optional parity bit, and one or two stop bits.

Data Bits - 7 data bits or 8 data bits.

Parity Bit - No parity.
- Odd parity. This means that the parity bit is set to either ‘1’ or ‘0’ so that an odd
number of 1’s are sent.
- Even parity. This means that the parity bit is set to either ‘1’ or ‘0’ so that an even
number of 1’s are sent.
- High parity. This simply means that the parity bit is always High.
- Low parity. This simply means that the parity bit is always Low.

Stop Bits - one bit or two bits.
When transmitting the data bits, the least significant bit is transmitted first. UART transmitting and
receive waveforms are illustrated in the below figures.
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Figure 5.3 UART RX Waveform consist of 8 data bits, 1 optional parity bit and 1 stop bit
Figure 5.4 UART TX Waveform consist of 7 data bits, no parity bit and 1 stop bit
Figure 5.5 UART TX Waveform consist of 7 data bits, 1 optional parity bit and 1 stop bit
Figure 5.6 UART TX Waveform consisting 7 data bits, 1 optional parity bit and 2 stop bits
Figure 5.7 UART TX Waveform consisting 8 data bits, 1 optional parity bit and 2 stop bits
TX_ACTIVE is default function of the pin DIO0 as the transmitting indicator for UART; this output may be
used in RS485 designs to control the transmitting of the line driver.
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5.3.3 UART Flow Control
The UART interface needs to implement proper flow control to prevent data from being lost by the
external device. This will be done using either hardware or software flow control. The FT260 UART
supports the modes listed below.

OFF, and switch UART pins to GPIO

RTS_CTS mode (hardware flow control)

DTR_DSR mode (hardware flow control)

XON_XOFF (software flow control)

No flow control mode
RTS/CTS Hardware Flow Control
When RTS / CTS flow control is used, the CTS input indicate to the FT260 that the data communications
equipment (DCE) is ready to receive data. If it is active (low), then the FT260 is free to transmit data on
the TX data line, otherwise it has to hold the data until CTS goes low. The RTS output is used to indicate
that The FT260 is capable of receiving data (active low). Thus, it should be set inactive by the FT260
when both the UART receive register and receive holding register are full.
DTR/DSR Hardware Flow Control
These signals are provided to give information about the status of each UART. When this mode is enabled
and the DTS input is high, the FT260 UART should not send any data on the TX line. DTR will be enabled
on reset and a register bit will allow the IO Bus to alter the state at any time .
Software Flow Control
When software flow control is enabled the XON character and XOFF character are used to stop and start
the flow of data. The XON character tells the downstream device to start sending data. The XOFF
character tells the downstream device to stop sending data. Typical defaults for XON is `11’ and for XOFF
is `13’.
5.3.4 UART Timing
Figure 5.8 UART Timing
Parameter
T0@48MHz
T1
Min(ns)
-2500ppm
4*T0
Typ(ns)
Max(ns)
Description
20.833
+2500ppm
T0 is the period when operating clock=48MHz
40000*T0
Baud clock period of txd
Table 5.4 UART Timing
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5.4 GPIOs
Most of the digital I/O pins of the FT260 have a GPIO function as an alternative function. For example,
pin 10 can be RXD or GPIOC, and RXD is the main function of pin 10. Usually, if the main function of a
pin is switched off, the pin will be switched to a GPIO pin. Therefore, if UART is turned off, all UART pins
will become GPIO pins. The FT260 has 3 pins which have more than 2 functions. They are GPIO 2(pin
14), GPIOA (pin 7), and GPIOG (pin 27). The working function of these 3 pins can be configured by
eFUSE, EEPROM, or via USB commands. Please refer to the eFUSE and EEPROM sections for more details.
The FT260 has two sets of GPIO pins: GPIO0~5 and GPIOA~H. After the pins are configured as GPIO,
users can set or get the direction and pin status via the USB control pipe, i.e. HID SET_REPO RT and
GET_REPORT requests. The FT260 also provides an interrupt input source on GPIO3/Interrupt (pin
15). If the interrupt is triggered, the FT260 will generate an interrupt report with report ID 0xB1 via the
interrupt IN pipe from the UART interface. The FT260 interrupt provides 4 trigger types: rising edge,
falling edge, level-high, and level-low. By default, it is configured as level-high for 30ms. Note, that GPIO
and interrupt are two different functions, which means if interrupt is the working function of pin 15, users
cannot set and get GPIO3 status. Switching pin 15 to be either GPIO or interrupt and trigger settings can
be done via EEPROM or USB commands.
The FT260 has flexible settings for suspend behaviour of all digital I/O pins. During suspend, these pins
can perform pushing high, pushing low, tristate, or no -change. No-change means to keep the original
function and value during suspend. The suspend behaviour can be configured in an external EEPROM.
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6
Devices Characteristics and Ratings
6.1 Absolute Maximum Ratings
The absolute maximum ratings for the FT260 devices are as follows. These are in accordance with the
Absolute Maximum Rating System (IEC 60134). Exceeding these may cause permanent damage to the
device.
Parameter
Value
Unit
Storage Temperature
-65°C to 150°C
Degrees C
Conditions
168 Hours
Floor Life (Out of Bag) At Factory Ambient
(30°C / 60% Relative Humidity)
(IPC /JEDEC JSTD-033A MSL
Level 3
C ompliant)*
Ambient Operating Temperature (Power
Applied)
-40°C to 85°C
Degrees C
MTTF FT260
TBD
Hours
VC C IN Supply Voltage
-0.3 to +5.5
V
VC C IO IO Voltage
-0.3 to +4.0
V
FSOURC E Supply Voltage
3.8±0.4
V
DC Input Voltage – USBDP and USBDM
-0.5 to +3.63
V
DC Input Voltage – High Impedance
Bi-directional (powered from VC C IO)
-0.3 to
+(VC CIO+0.5V)
V
DC Output Voltage
3.3±0.15
V
DC Output C urrent – Outputs
100 **
mA
Hours
VOUT3V3
Table 6.1 Absolute Maximum Ratings
* If devices are stored out of the packaging beyond this time limit the devices should be baked before
use. The devices should be ramped up to a temperature of +125°C and baked for up to 17 hours.
** This DC output current on VOUT3V3 is also the power supply source for FT260 operation. If it must be
the source for other components in the system, it can only supply 75mA or less.
6.2 ESD and Latch-up Specifications
Description
Specification
Human Body Mode (HBM)
> ± 2kV
Machine mode (MM)
> ± 200V
Charged Device Mode (CDM)
> ± 500V
Latch-up
> ± 200mA
Table 6.2 ESD and Latch-Up Specifications
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6.3 DC Characteristics
DC Characteristics (Ambient Temperature = -40°C to +85°C)
Parameter
VC C 1
VC C 2
I normal
Description
Minimum
Typical
Maximum
Units
Conditions
4.5
5
5.5
V
VC C IN is supplied
with 5V
2.97
3.3
3.63V
V
VC C IN is supplied
with 3.3V
2.97
3.3
3.63
V
VC C IO is supplied
with 3.3V
2.25
2.5
2.75
V
VC C IO is supplied
with 2.5V
1.62
1.8
1.98
V
VC C IO is supplied
with 1.8V
9.6*
mA
Normal Operation at
12MHz
14.5*
mA
Normal Operation at
24MHz
VC CIN Operating Supply
Voltage
VC CIO Operating Supply
Voltage
Operating Supply
C urrent
23.6*
I idle
Idle Supply C urrent
4.17
I susp
Suspend Supply C urrent
356
mA
Normal Operation at
48MHz
mA
IDLE Operation at
30KHz
μA
USB Suspend
VC C IN must be
greater than 3V3
otherwise VOUT3V3
is an input which
must be driven with
3.3V
3V3
3.3v regulator output
2.97
3.3
3.63
V
V FSOURCE
eFUSE Blowing Supply
Voltage
3.4
3.8
4.2
V
Table 6.3 Operating Voltage and Current
* The current measurement is with the regular data transferring speed between USB and I2C/UART
interface. All the pins are with 4mA driving strength and without heavy loading.
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Parameter
Description
Minimum
Typical
Maximum
Units
Conditions
2.97
VC C IO
VC C IO
V
2.97
VC C IO
VC C IO
V
I/O Drive strength*
= 8mA
2.97
VC C IO
VC C IO
V
I/O Drive strength*
= 12mA
2.97
VC C IO
VC C IO
V
I/O Drive strength*
= 16mA
Ioh = +/-2mA
V oh
Output Voltage High
I/O Drive strength*
= 4mA
Iol = +/-2mA
V ol
Output Voltage Low
0
0.4
V
0
0.4
V
I/O Drive strength*
= 8mA
0
0.4
V
I/O Drive strength*
= 12mA
0
0.4
V
I/O Drive strength*
= 16mA
0.8
V
LVTTL
V
LVTTL
LVTTL
I/O Drive strength*
= 4mA
V il
Input low Switching
Threshold
V ih
Input High Switching
Threshold
Vt
Switching Threshold
1.49
V
V t-
Schmitt trigger negative
going threshold voltage
1.15
V
V t+
Schmitt trigger positive
going threshold voltage
1.64
V
R pu
Input pull-up resistance
40
75
190
KΩ
Vin = 0
R pd
Input pull-down
resistance
40
75
190
KΩ
Vin =VC C IO
I in
Input Leakage C urrent
-10
+/-1
10
μA
Vin = 0
I oz
Tri-state output leakage
current
-10
+/-1
10
μA
Vin = 5.5V or 0
2.0
Table 6.4 I/O Pin Characteristics VCCIO = +3.3V (except USB PHY pins)
* The I/O drive strength and slow slew-rate are configurable in eFUSE or external EEPROM
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Parameter
Description
Minimum
Typical
Maximum
Units
Conditions
2.25
VC C IO
VC C IO
V
I/O Drive strength*
= 4mA
2.25
VC C IO
VC C IO
V
I/O Drive strength*
= 8mA
2.25
VC C IO
VC C IO
V
I/O Drive strength*
= 12mA
2.25
VC C IO
VC C IO
V
I/O Drive strength*
= 16mA
0
0.4
V
0
0.4
V
I/O Drive strength*
= 8mA
0
0.4
V
I/O Drive strength*
= 12mA
0
0.4
V
I/O Drive strength*
= 16mA
0.8
V
LVTTL
V
LVTTL
LVTTL
Ioh = +/-2mA
V oh
Output Voltage High
Iol = +/-2mA
V ol
Output Voltage Low
I/O Drive strength*
= 4mA
V il
Input low Switching
Threshold
V ih
Input High Switching
Threshold
Vt
Switching Threshold
1.1
V
V t-
Schmitt trigger negative
going threshold voltage
0.8
V
V t+
Schmitt trigger positive
going threshold voltage
1.2
V
R pu
Input pull-up resistance
40
75
190
KΩ
Vin = 0
R pd
Input pull-down
resistance
40
75
190
KΩ
Vin =VC C IO
I in
Input Leakage C urrent
-10
+/-1
10
μA
Vin = 0
I oz
Tri-state output leakage
current
-10
+/-1
10
μA
Vin = 5.5V or 0
1.7
Table 6.5 I/O Pin Characteristics VCCIO = +2.5V (except USB PHY pins)
* The I/O drive strength and slow slew-rate are configurable in eFUSE or external EEPROM
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Parameter
Description
Minimum
Typical
Maximum
Units
Conditions
1.62
VC C IO
VC C IO
V
I/O Drive strength*
= 4mA
1.62
VC C IO
VC C IO
V
I/O Drive strength*
= 8mA
1.62
VC C IO
VC C IO
V
I/O Drive strength*
= 12mA
1.62
VC C IO
VC C IO
V
I/O Drive strength*
= 16mA
0
0.4
V
0
0.4
V
I/O Drive strength*
= 8mA
0
0.4
V
I/O Drive strength*
= 12mA
0
0.4
V
I/O Drive strength*
= 16mA
0.63
V
LVTTL
V
LVTTL
LVTTL
Ioh = +/-2mA
V oh
Output Voltage High
Iol = +/-2mA
V ol
Output Voltage Low
I/O Drive strength*
= 4mA
V il
Input low Switching
Threshold
V ih
Input High Switching
Threshold
Vt
Switching Threshold
0.77
V
V t-
Schmitt trigger negative
going threshold voltage
0.557
V
V t+
Schmitt trigger positive
going threshold voltage
0.893
V
R pu
Input pull-up resistance
40
75
190
KΩ
Vin = 0
R pd
Input pull-down
resistance
40
75
190
KΩ
Vin =VC C IO
I in
Input Leakage C urrent
-10
+/-1
10
μA
Vin = 0
I oz
Tri-state output leakage
current
-10
+/-1
10
μA
Vin = 5.5V or 0
1.17
Table 6.6 I/O Pin Characteristics VCCIO = +1.8V (except USB PHY pins)
* The I/O drive strength and slow slew-rate are configurable in eFUSE or external EEPROM
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6.4 USB Characteristics
Parameter
Description
Minimum
Typical
Maximum
Units
Conditions
DC C haracteristics
UR o
Output impedance
3.5
7
14
Ω
UR pu
Internal Pull Up
resistance
0.976
1.24
1.574
Ω
UV OH
High level Output on DP
and DM
2.8
UV OL
Low level Output on DP
and DM
V
0.3
V
AC C haracteristics
UTrise
Rise Time on DP/DM
4
10
20
ns
UTfall
Fall Time on DP/DM
4
10
20
ns
UV cr
C ross point
1.3
2.0
V
UV th
Single-ended receiver
threshold
0.8
2.0
V
Table 6.7 USB I/O Pin (DP, DM) Characteristics
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
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7
FT260 Power Configurations
Section 7.1 to section 7.4 illustrates possible USB power configurations for the FT260. Section 7.5 shows
the configuration for system pins about DCNF0, DCNF1, XRESETN and other system pins. Section 7.6
shows the power for programming eFUSE.
7.1 USB Bus Powered Configuration
Figure 7.1 Bus Powered Configuration
Figure 7.1 illustrates the FT260 in a typical USB2.0 bus powered design configuration. A USB bus
powered device gets its power from the USB bus. Basic rules for USB bus powered devices are as follows
i)
ii)
iii)
iv)
v)
On plug-in to USB, the device should draw no more current than 100mA.
In USB Suspend mode the device should draw no more than 2.5mA.
A bus powered, high power USB device (one that draws more than 100mA) can use the
SUSPOUT_N function on the pin DIO7 as a power disable function and use it to keep the
current below 2.5mA on USB suspend.
A device that consumes more than 100mA cannot be plugged into a USB bus powered hub.
No device can draw more than 500mA from the USB bus.
The VCCIN pin is the power source for the FT260 and can directly connect to VBUS. When the I/O voltage
level is as +3.3V, users can directly connect VOUT3V3 to VCCIO without an external regulator. The
VBUS_DET pin is a 5V-tolerant input pin and can directly connect to VBUS without an on-board voltage
divider circuit. The power descriptors in the embedded eFUSE of the FT260 or in the external EEPROM
should be programmed to match the current drawn by the device.
A ferrite bead is connected in series with the USB power supply to reduce EMI noise from the FT260 and
associated circuitry being radiated down the USB cable to the USB host. The value of the Ferrite Bead
depends on the total current drawn by the application. A suitable range of Ferrite Beads is available from
Steward (www.steward.com), for example Laird Technologies Part # MI0805K400R-10.
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7.2 Self Powered Configuration with 5V Source Input
Figure 7.2 Self Powered Configuration with 5V Source Input
Figure 7.2 illustrates the FT260 in a typical USB2.0 self-powered configuration. A USB self-powered
device gets its power from its own power supply, 5V, and does not draw current from the USB bus. The
basic rules for USB self-powered devices are as follows –
i)
ii)
iii)
A self-powered device should not force current down the USB bus when the USB host or hub
controller is powered down.
A self-powered device can use as much current as it needs during normal operation and USB
suspend as it has its own power supply.
A self-powered device can be used with any USB host, a bus powered USB hub or a selfpowered USB hub.
VCCIN is the power source for the FT260 and will source power from its own power supply. When the I/O
voltage level is +3.3V, users can directly connect VOUT3V3 to VCCIO without an external regulator. The
power descriptors in the embedded eFUSE of the FT260 or in the external EEPROM should be
programmed as self-powered.
In order to comply with the first requirement above, the USB bus power (USB connector pin 1) is used to
control the VBUS_DET pin of the FT260 device. VBUS_DET is a 5V-tolerant input pin and can directly
connect to VBUS without an on-board voltage divider circuit. When the USB host or hub is powered up a n
internal 1.5kΩ resistor on DP is pulled up to +3.3V, thus identifying the device to the USB host or hub.
When the USB host or hub is powered off, the VBUS_DET pin will be low and the FT260 is held in a
suspend state. In this state the internal 1.5kΩ resistor is not pulled up to any power supply (hub or host
is powered down), so no current flows down DP via the 1.5kΩ pull-up resistor. Failure to do this may
cause some USB host or hub controllers to power up erratically.
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7.3 Self Powered Configuration with 3.3V Source In
Figure 7.3 Self Powered Configuration with 3.3V Source Input
Figure 7.3 illustrates the FT260 in a typical USB self-powered configuration similar to Figure 7.2. The
difference here is that the self-power source is 3.3V. If using 3.3V as the power source in, remember to
connect it to VOUT3V3 to supply an operating voltage for USB signalling in the FT260.
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7.4 Bus Powered Configuration with +1.8V/+2.5V I/O Voltage
Figure 7.4 Bus Powered Configuration with +1.8V/+2.5V I/O voltage Level
Figure 7.4 illustrates the FT260 in a typical USB bus-powered configuration similar to Figure 7.1. The
difference here is that the I/O pin voltage source is 2.5V or 1.8V, not 3.3V. An external regulator can
source the power from VBUS and regulate out the required I/O voltage level. Then, VCCIO can connect to
the output of the regulator to achieve I/O voltage level operating at +1.8V or +2.5V. VCCIN should be
connected to VBUS to supply the power source for FT260 operation.
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7.5 Configuration for System Pins
Figure 7.5 Recommended FT260 Configuration of System Pins
The pins, DCNF0 and DCNF1, will determine one of 3 configurations for the FT260 as defined in Section
5.1. These 2 pins have internal pull-down resistors; these 2 pins can be left floating for logic-0. If logic-1
is applied for DCNF0 and/or DCNF1, a 10K Ohm resistor should be connected to VCCIO as shown in
Figure7.5.
The pin RESETN is the external reset source for the FT260. There is also a power-on-reset (POR) design
in the FT260. If there is no requirement for an external reset, RESETN can be left floating or weakly tied
to logic-high. If an external reset is required in the design, the related circuit in Figure 7.5 can be used
for reference.
The DEBUGGER pin is reserved for debugging purposes and should be tied to VCCIO, the I/O power
domain for the FT260. The pin, STEST_RESETN, is also a reserved pin and should be tied to logic-high.
Note that the GND pin located at pin-29 in Figure 7.5 is the paddle in the bottom side of the QFN28
package. It should be tied together with the GND for FT260.
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7.6 Power for Programming eFUSE
Figure 7.6 FSOURCE for eFUSE
When the FT260 is in normal operation without programming the eFUSE, the FSOURCE pin can be left
floating. If the programming mechanism is required in the system, a power source with 3.8V should be
applied. Figure 7.6 shows the related components for FSOURCE.
The programmer module, UMFTPD3A, which is developed by FTDI, can supply the power source for
FSOURCE. With the programming utility FT_PROG, it can control the programming procedure and timing
to the embedded eFUSE in the FT260. Users can easily set the vendor specifying parameters which are
defined in eFUSE for customizing the FT260.
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
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8
Application Examples
The following diagrams show the possible applications of the FT260. The illustrations have omitted the
electrical design for the power domain plan. For power details refer to Section 7.
8.1 USB HID-over-I2C
Figure 8.1 Application Example 1: HID over I2C
In Figure 8.1, a HID-over-I2C device can easily connect to USB by integrating the FT260 into the system.
With an on-board EEPROM for customization, the FT260 can connect to both EEPROM and a HID class
device with I2C slave interface simultaneously. DIO8 can be set as INTRIN, an interrupt input source from
a HID class device for the requirement of the HID-over-I2C specification. With 1K Ohm pull up resistors
on SCL and SDA, the I2C bus can run at HS mode.
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8.2 USB to RS232 Converter
Figure 8.2 Application Example 2: USB to RS232 Converter
An example of using the FT260 as a USB to RS232 converter is illustrated in Figure 8.2. In this
application, a TTL to RS232 Level Converter IC is used on the serial UART interface of the FT260 to
convert the TTL levels of the FT260 to RS232 levels. This level shift can be done using the popular “213”
series of TTL to RS232 level converte rs. These “213” devices typically have 4 transmitters and 5 receivers
in a 28-LD SSOP package and feature an in-built voltage level converter to convert the +5V (nominal)
VCC to the +/- 9 volts required by RS232.
The Shut Down control (SHDN) signal of the converter device is the suspend control. The pin DIO7 of the
FT260 can be set to function as SUSPOUT_N with active-low output and can be the control source to the
converter IC. Note that the power source for the converter IC in Figure 8.2 is not supplied from the
VOUT3V3 of the FT260 since the current consumption of this kind of converter is high. The supply current
of VOUT3V3 is limited. Details can be referred to Table 6.1.
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8.3 USB to RS485 Converter
Figure 8.3 Application Example 3: USB to RS485 Converter
An example of using the FT260 as a USB to RS485 converter is shown in Figure 8.3. In this application, a
TTL to RS485 level converter IC is used on the serial UART interface of the FT260 to convert the TTL
levels of the FT260 to RS485 levels.
The converter device requires separate enable signals on both the transmitter and receiver. With RS485,
the transmitter is only enabled when a character is being transmitted from the UART. Setting DIO0 as
TX_ACTIVE is provided for exactly the same purpose and wired to the transmitter enable (DE) of
converter device. The pin DIO12 of FT260 can be configured as PWREN_N and wired to the receiver
enable (RE) of the converter device. With these configurations of the pins, the FT260 can be used as the
USB to RS485 converter.
RS485 is a multi-drop network; so many devices can communicate with each other over a two wire cable
interface. The RS485 cable requires to be terminated at each end of the cable. A link (which provides the
120Ω termination) allows the cable to be terminated if the converter device is physically positioned at
either end of the cable.
In this example, the data transmitted by the FT260 is also present on the receive path of the converter
device. This is a common feature of RS485 and requires the application software to remove the
transmitted data from the received data stream. With the FT260, it is possible to do this entirely in
hardware by modifying the example shown in Figure 8.3 by logically OR-ing the FT260 TX_ACTIVE and
the receiver output (RO) of converter device then connecting the output of the OR gate to the RXD of
FT260.
Note that the TX_ACTIVE is activated 1 bit ahead the start bit. TX_ACTIVE is de -activated at the same
time as the stop bit. This is not configurable.
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8.4 USB to RS422 Converter
Figure 8.4 Application Example 4 : USB to RS422 Converter
An example of using the FT260 as a USB to RS422 converter is shown in Figure 8.4. In this application,
two TTL to RS422 Level Converter ICs are used on the serial UART interface of the FT260 to convert the
TTL levels of the FT260 to RS422 levels.
There are many suitable level converter devices available. In Figure 8.4, the converter devices have an
enable control (EN) to activate the data lines. Setting DIO7 as SUSPOUT_N allows the FT260 to disable
the level converters when the system is in suspend. SUSPENDOUT_N is an active-low signal. The DIO0
and DIO12 of the FT260 can be configured as TX_LED and RX_LED. The FT260 can toggle LEDs with
these signals when the UART interface is transmitting and receiving data.
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9
User Configuration
The FT260 provides two storage paths for customization. One is eFUSE which is embedded in the FT260;
another is the executable path to an external EEPROM. Parameters are defined for the customization and
are categorized into several groups. The groups are USB-related, GPIO function selection, pin feature
settings, UART settings and HID-over-I2C.
Embedded eFUSE provides a cost-effective customization. Without external devices, the FT260 can have
customised VID/PID for USB, driving strength for digital pins, GPIO A, GPIOG, GPIO2 configurations and
HID-over-I2C basic settings.
For customization demand, an EEPROM is required in the application. With this external EEPROM, more
parameters are defined for customization. In this storage area, parameters in eFUSE are all included.
USB string descriptor, pins status when USB suspending, and detailed pin configurations are included in
EERPOM. Details can refer to Section 9.2.2.
There is already a default value for each parameter in the design of the FT260. When the parameters in
eFUSE are programmed and enabled, the parameters in eFUSE will be loaded when the FT260 is powered
up or reset.
Both eFUSE and EEPROM for the FT260 can be programmed over USB. This method is the same as for
the MTP on other FTDI devices such as the FT-X series. Please note that in order to program eFUSE, the
FT260 requires an additional programming voltage (3.8V) on its FSOURCE pin. The programming board,
UMFTPD3A, supplies an easy connection bridge between the FT260 and a USB host for supplying the
power source, for timing control of eFUSE, a nd for communicating with the programming utility FT_Prog.
Further details may be found in the UMFTPD3A datasheet.
The FT_Prog utility is provided free -of-charge from the FTDI website, and can be found at the link below.
The user guide is also available at this link.
http://www.ftdichip.com/Support/Utilities.htm#FT_Prog
9.1 Programming the embedded eFUSE over USB
The eFUSE in the FT260 can be programmed over USB. This method is the same as for the MTP on other
FTDI devices such as the FT-X series. Note that in order to program eFUSE, the FT260 requires an
additional programming voltage (3.8V) on FSOURCE (pin-25 @ QFN28). The programming board,
UMFTPD3A, can supply an easy connection bridge between the FT260 and a USB host for supplying the
power source to FSOURCE and for communicating with the programming utility FT_Prog.
9.1.1 Default Values
The parameters defined in eFUSE are shown in Table 9.1. Default values are defined in the hardware
design of the FT260. If the parameters defined in eFUSE are enabled, the settings in eFUSE will replace
the default value.
Parameter
Default Value
Notes
USB Vendor ID (VID)
0403h
USB Vendor ID. Defined in the USB device descriptor. The
format is 16-bit hex coded and default is set as FTDI VID.
USB Product ID (PID)
6030h
USB Product ID. Defined in the USB device descriptor The
format is 16-bit hex coded and default is set as 6030h for
FT260.
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Parameter
Default Value
Notes
Power Source
Bus Powered
Define whether the power source is from the USB bus or a local
source.
Max Bus Power C urrent
100mA
The max power that will be drawn from VBUS when using bus
power. Range from 0~500mA. If the power source is defined as
self-powered, it must be set as 0mA.
Remote Wake Up
Enable
Define if the FT260 supports remote wake up or not.
The GPIO2 pin can be set as one of the alternative functions:
- GPIO2
GPIO2 Function
SUSPOUT_N
- PWREN# (low active), device ready indicator
- TX_LED, UART TX transferring indicator
- SUSPOUT_N, USB suspend low-active indicator.
The GPIOA pin can be set as one of the alternative functions:
GPIOA Function
TX_AC TIVE
- GPIOA
- TX_LED, UART TX transferring indicator
- TX_ACTIVE
The GPIOG pin can be set as one of the alternative functions:
- GPIOG
GPIOG Function
BC D_DET
- PWREN# (low active), device ready indicator
- RX_LED, UART RX receiving indicator
- BC D_DET, Battery Charger Detection indicator
UART Drive Strength
4mA
Adjustable drive strength for UART related pins TXD/RXD,
CTS/RTS, DTR/DSR, TX_ACTIVE. Drive strength can be set as
4mA, 8mA, 12mA and 16mA
GPIO Drive Strength
4mA
Adjustable drive strength for GPIO related pins GPIO0, GPIO1,
GPIO2, GPIO3, GPIO4, and GPIO5. Drive strength can be set as
4mA, 8mA, 12mA and 16mA
BC D_DET Function Disable?
No
BC D_DET Drive Strength
4mA
Adjustable drive strength for BCD_DET pin. Drive strength can
be set as 4mA, 8mA, 12mA and 16mA
BC D_DET Polarity
Active-high
Set the polarity on BCD_DET pin for indicating battery charge
detected. Default is set as active-high.
Power Saving Mode
Enable
If power saving mode is enable and the FT260 is idle for 5
seconds, it will switch the system clock to 30KHz for saving
power.
HID over I²C address
0h
The I²C slave address of the target HID-over-I²C device. The
address 0h means no HID-over-I²C device connected.
HID over I²C Descriptor
Address
0h
The start address of the descriptor of the target HID -over-I²C
device.
HID over I²C Interrupt
Rising Edge
Define the interrupt trigger type of the target HID-over-I²C
device. It can be: rising edge, falling edge, level-high, levellow.
Battery Charger Detection
BC D_DET pin.
function
can
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Parameter
Default Value
HID over I²C Option
Supported
Notes
According to Microsoft HID over I²C Protocol Specification, the
following requests are optional:
-
GET_IDLE/SET_IDLE supported or not?
GET_PROTOCOL/SET_PROTOCOL
supported
SET_POWER supported or not?
or
not?
Table 9.1 Parameters defined in internal eFUSE for FT260
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9.2 Programming the external EEPROM over USB
The external EEPROM can be programmed over USB, which is supported by FT_ PROG as most FTDI chips
do.
The FT_Prog utility is provided free -of-charge from the FTDI website, and can be found at the link below.
The user guide is also available at this link.
http://www.ftdichip.com/Support/Utilities.htm#FT_Prog
Please note that a user needs to specify the data address type as one-byte or two-byte when
programming the external EEPROM.
9.2.1 Supported EEPROM Spec
The FT260 supports an external EEPROM with I²C interface, slave address 0x50~0x57, and data size
larger than 256 bytes. When the FT260 powers on, it will scan the I²C bus and try to find if an external
EEPROM is present. If it is present, it will check the content and load the configuration data from the
EEPROM into the FT260. Note that loading data from an external EEPROM is the last step of power-on,
and it will overwrite the configuration data from eFUSE.
There are two different types of EEPROM. One has one -byte data address; the other one has two -byte
data address. Usually, the first one has a data size smaller than 256 bytes, and the second one has a
data size more than 256 bytes. It is not possible for the FT260 to automatically identify the EEPROM type,
therefore, FT_prog will require the user’s input to specify the type of the external EEPROM.
In summary, the supported external EEPROM has:



I²C interface with slave address 0x50~0x57
256 bytes at least
One-byte data address or two-byte data address
The protocol of one-byte data address EEPROM
Write:
ACK
ACK
8 bit
data addr
8 bit data
STOP
8 bit
data addr
ACK
ACK
write
Start
7 bit slave
address
Read:
STOP
8 bit data
ACK
ACK
7 bit slave
address
read
SR
ACK
write
Start
7 bit slave
address
Figure 9.1 Protocol Format for EEPROM with One Byte Data Address
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The protocol of two-byte data address EEPROM
Write:
STOP
7 bit slave
address
ACK
8 bit data
SR
2nd 8 bit
data addr
ACK
1st 8 bit
data addr
ACK
ACK
write
Start
7 bit slave
address
Read:
STOP
8 bit data
ACK
ACK
read
2nd 8 bit
data addr
ACK
1st 8 bit
data addr
ACK
ACK
write
Start
7 bit slave
address
Figure 9.2 Protocol Format for EEPROM with Two Bytes Data Address
Table9.2 shows the list of the external EEPROMs that are tested with the FT260.
Manufacturer
Part Number
Type
Atmel
AT24C S04-SSHM-TC T-ND 512 x 8
One-byte data address
Atmel
AT24C 08D-PUM-ND 1K x 8
One-byte data address
Atmel
AT24C S16-SSHM-TC T-ND 2K x 8
One-byte data address
Atmel
AT24C M01 (1M bit)
Two-byte data address
On Semiconductor
C AT24C 04WI-G-ND 512 x 8
One-byte data address
On Semiconductor
C AT24C 08WI-GT3C T-ND 1k x 8
One-byte data address
On Semiconductor
C AT24C 08WI-GT3C T-ND 2k x 8
One-byte data address
On Semiconductor
C AT24C 512
Two-byte data address
Microchip
24AA08-I/SN-ND 1k x 8
One-byte data address
Microchip
24AA16-I/SN-ND 2k x 8
One-byte data address
Table 9.2 Tested EEPROM List for FT260
9.2.2 Default Values
The parameters defined in the EEPROM are shown in Table9.3. Default values are defined in the FT260. If
an EEPROM exists in the application, the priority of the EEPROM is higher than default values.
Parameter
Default Value
Notes
Device Type
FT260
Read-Only. Indicate the Chip is FT260.
USB Vendor ID (VID)
0403h
USB Vendor ID. Defined in the USB device descriptor. The
format is 16-bit hex coded and default is set as FTDI VID.
USB Product ID (PID)
6030h
USB Product ID. Defined in the USB device descriptor The
format is 16-bit hex coded and default is set as 6030h for
FT260.
USB Version
0200h
Read-only. Returns the USB 2.0 device descriptor to the host.
Note: FT260 is a Full-speed USB2.0 device.
Power Source
Bus Powered
Define whether the power source is from the USB bus or a local
source.
Max Bus Power C urrent
100mA
The max power that will be drawn from VBUS when using bus
power. Range from 0~500mA. If the power source is defined as
self-powered, it must be set as 0mA.
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Parameter
Default Value
Notes
Remote Wake Up
Enable
Manufacturer Name
FTDI
Describing the manufacturer. A string descriptor defined in USB
device descriptors
Product Description
FT260
Describing the product. A string descriptor defined in USB
device descriptors
Serial Number Enabled?
No
Serial Number
None
Suspend Out Polarity
Active-low
Define if the FT260 supports remote wake up or not.
Enable the string descriptor for serial number or not.
A unique serial number is generated and programmed into the
EEPROM. Refer to the Utility FT_Prog for details.
Set the polarity on GPIO2 pin for indicating suspend out.
Default is set as active-low.
UART RI can be the source to remote wakeup the USB host
when this remote wake up is allowed.
RI as Wake-Up
Disable
- Disable (default)
- Enable
Specify the criteria for RI to trigger a remote wake-up.
RI Wake-Up C onfig
Falling Edge
- Falling Edge(default), RI from Logic-High to Low
- Rising Edge, RI from Logic-Low to High
The GPIO2 pin can be set as one of the alternative functions:
- GPIO2
GPIO2 Function
SUSPOUT_N
- PWREN# (low active), device ready indicator
- TX_LED, UART TX transferring indicator
- SUSPOUT_N/SUSPOUT, USB suspend indicator
The GPIOA pin can be set as one of the alternative functions:
GPIOA Function
TX_AC TIVE
- GPIOA
- TX_LED, UART TX transferring indicator
- TX_ACTIVE
The GPIOG pin can be set as one of the alternative functions:
- GPIOG
GPIOG Function
BC D_DET
- PWREN# (low active), device ready indicator
- RX_LED, UART RX receiving indicator
- BC D_DET, Battery Charger Detection indicator
UART Drive Strength
4mA
UART Slew Rate Enable?
Disable
GPIO Drive Strength
4mA
Adjustable drive strength for UART related pins TXD/RXD,
C TS/RTS, DTR/DSR, TX_ACTIVE. Drive strength can be set as
4mA, 8mA, 12mA and 16mA
Set the slew rate control for UART related pins TXD/RXD,
C TS/RTS, DTR/DSR, TX_ACTIVE. Default is disabled
Adjustable drive strength for GPIO related pins GPIO0, GPIO1,
GPIO2, GPIO3, GPIO4, and GPIO5. Drive strength can be set as
4mA, 8mA, 12mA and 16mA
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Parameter
Default Value
Notes
GPIO Weak Pullup/Pulldown
Disable
Enable the weak pullup / pulldown resistor on the pins GPIO0,
GPIO1, GPIO2, GPIO3, GPIO4, and GPIO5. Default is disabled
(without any pull).
GPIO Slew Rate Enable?
Disable
Set the slew rate control for GPIO related pins GPIO0, GPIO1,
GPIO2, GPIO3, GPIO4, and GPIO5. Default is disabled
BC D_DET Function Disable?
No
BC D_DET Drive Strength
4mA
Adjustable drive strength for BCD_DET pin. Drive strength can
be set as 4mA, 8mA, 12mA and 16mA
BC D_DET Polarity
Active-high
Set the polarity on BCD_DET pin for indicating battery charge
detected. Default is set as active-high.
Interrupt Trigger
Level-high
Define the interrupt trigger type when GPIO3 is set as
INTR/WAKEUP function. The possible settings are: rising edge,
falling edge, level-high, level-low.
Trigger Level Setting
30ms
Interrupt level width select. When the interrupt is set to level
trigger and it exceeds the specified level width, the interrupt
signal will be generated. The level width can be set as 1ms,
5ms and 30ms.
Power Saving Mode
Enable
If power saving mode is enable and the FT260 is idle for 5
seconds, it will switch the system clock to 30KHz for saving
power.
Battery C harger Detection function can be disabled on
BC D_DET pin.
During suspend , each digital I/O pin of the FT260 can be set
as
- No change, keep the original pin function
Pin Status During Suspend
No change
- tristate
- push low when suspend
- push high when suspend
HID over I²C address
0h
The I²C slave address of the target HID-over-I²C device. The
address 0h means no HID-over-I²C device connected.
HID over I²C Descriptor
Address
0h
The start address of the descriptor of the target HID -over-I²C
device.
HID over I²C Interrupt
Rising Edge
HID over I²C Option
Not supported
HID over I²C Subclass
No Subclass
HID over I²C Protocol
None
Define the interrupt trigger type of the target HID-over-I²C
device. It can be: rising edge, falling edge, level-high, levellow.
According to Microsoft HID over I²C Protocol Specification, the
following requests are optional:
-
GET_IDLE/ SET_IDLE supported or not
GET_PROTOCOL/ SET_PROTOCOL supported or not
SET_POWER supported or not
The HID subclass description. It can be:
-
No Subclass
Boot Interface Subclass
The HID protocol code description. It can be:
-
None
Keyboard
Mouse
Table 9.3 Parameters defined in external EEPROM for FT260
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10 Package Parameters
The FT260 is available in a WQFN-28 package. The solder reflow profile for WQFN-28 is described in
Section 10.3.
10.1 WQFN-28 Package Mechanical Dimensions
Figure 10.1 WQFN-28 Package Dimensions
The FT260 is supplied in a RoHS compliant leadless WQFN-28 package. The package is lead (Pb) free,
and uses a ‘green’ compound. The package is fully compliant with European Union directive 2002/95/EC.
This package is nominally 5.00mm x 5.00mm. The solder pads are on a 0.5mm pitch. The above
mechanical drawing shows the WQFN-28 package. All dimensions are in millimetres.
The centre pad on the base of the FT260H is internally connected to GND and the PCB should not have
signal tracking on the top layer under this area. Connect to GND.
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10.2 WQFN-28 Package Markings
21
1
FTDI
Line 1 – FTDI Logo
XXXXXXXX
FT260Q
Line 2 – Wafer Lot Number
Line 3 – FTDI Part Number
YYWW-B
8
Line 4 – Date Code, Revision
14
Figure 10.2 WQFN-28 Package Markings
The date code format is YYWW where WW = 2 digit week number, YY = 2 digit year number. This is
followed by the revision number.
The code XXXXXXXX is the manufacturing LOT code
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10.3 Solder Reflow Profile
The FT260 is supplied in a Pb free WQFN-28 package. The recommended solder reflow profile is shown in
Figure 10.3.
Temperature, T (Degrees C)
tp
Tp
Critical Zone: when
T is in the range
TL to Tp
Ramp Up
TL
tL
TS Max
Ramp
Down
TS Min
tS
Preheat
25
T = 25º C to TP
Time, t (seconds)
Figure 10.3 FT260 Solder Reflow Profile
The recommended values for the solder reflow profile are detailed in Table 10.1. Values are shown for
both a completely Pb free solder process (i.e. the FT260 is used with Pb free solder), and for a non-Pb
free solder process (i.e. the FT260 is used with non-Pb free solder).
Profile Feature
Pb Free Solder Process
Non-Pb Free Solder Process
Average Ramp Up Rate (T s to Tp)
3°C / second Max.
3°C / Second Max.
- Temperature Min (T s Min.)
150°C
100°C
- Temperature Max (T s Max.)
200°C
150°C
- Time (ts Min to ts Max)
60 to 120 seconds
60 to 120 seconds
217°C
183°C
60 to 150 seconds
60 to 150 seconds
260°C
240°C
20 to 40 seconds
20 to 40 seconds
Ramp Down Rate
6°C / second Max.
6°C / second Max.
Time for T= 25°C to Peak Temperature, T p
8 minutes Max.
6 minutes Max.
Preheat
Time Maintained Above Critical Temperature
T L:
- Temperature (T L)
- Time (tL)
Peak Temperature (T p)
Time within 5°C of actual Peak Temperature
(tp)
Table 10.1 Reflow Profile Parameter Values
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11 Contact Information
Head Office – Glasgow, UK
Branch Office – Tigard, Oregon, USA
Future Technology Devices International Limited
Unit 1, 2 Seaward Place, Centurion Business Park
Glasgow G41 1HH
United Kingdom
Tel: +44 (0) 141 429 2777
Fax: +44 (0) 141 429 2758
Future Technology Devices International Limited (USA)
7130 SW Fir Loop
Tigard, OR 97223-8160
USA
Tel: +1 (503) 547 0988
Fax: +1 (503) 547 0987
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
sales1@ftdichip.com
support1@ftdichip.com
admin1@ftdichip.com
us.sales@ftdichip.com
us.support@ftdichip.com
us.admin@ftdichip.com
Branch Office – Taipei, Taiwan
Branch Office – Shanghai, China
Future Technology Devices International Limited (Taiwan)
2F, No. 516, Sec. 1, NeiHu Road
Taipei 114
Taiwan , R.O.C.
Tel: +886 (0) 2 8791 3570
Fax: +886 (0) 2 8791 3576
Future Technology Devices International Limited (China)
Room 1103, No. 666 West Huaihai Road,
Shanghai, 200052
C hina
Tel: +86 21 62351596
Fax: +86 21 62351595
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
E-mail (Sales)
E-mail (Support)
E-mail (General Enquiries)
tw.sales1@ftdichip.com
tw.support1@ftdichip.com
tw.admin1@ftdichip.com
cn.sales@ftdichip.com
cn.support@ftdichip.com
cn.admin@ftdichip.com
Web Site
http://ftdichip.com
Distributor and Sales Representatives
Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales
representative(s) in your country.
System and equipment manufac turers and des igners are res pons ible to ens ure that their sys tems , and any Future Tec hnology D evices
I nternational Ltd (FTDI ) devic es incorporated in their s ystems , meet all applicable safety, regulatory and s ystem-level performanc e
requirements . All application- related information in this doc ument (including applic ation desc riptions , s ugges ted FTDI devices and other
materials ) is provided for reference only. While FTDI has taken c are to ass ure it is acc urate, this information is s ubject to c us tomer
c onfirmation, and FTDI disclaims all liability for sys tem designs and for any applic ations assis tanc e provided by FTDI . Us e o f FTDI
devic es in life s upport and/or safety applications is entirely at the us er’s risk, and the us er agrees to defend, indemnify and hold
harmless FTDI from any and all damages , claims , s uits or expens e resulting from s uch use. T his doc ument is s ubject to change without
notice. N o freedom to use patents or other intellectual property rights is implied by the publication of this doc ument. N either the whole
nor any part of the information c ontained in, or the product desc ribed in this document, may be adapted or reproduced in any material
or elec tronic form without the prior written c onsent of the c opyright holder. Future Tec hnology D evices I nternational L td, U nit 1 , 2
Seaward P lac e, C enturion Business P ark, G lasgow G 4 1 1HH, U nited Kingdom. Sc otland Registered Company N umber: SC136640
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Appendix A – References
Document References
Application Notes
AN_394 User Guide for FT260
AN_395 User Guide for LibFT260
AN_124 User Guide for FTDI FT_Prog Utility
AN_184 FTDI Device Input Output Pin States
AN_175 Battery Charger Detection Over USB with FT-X Devices
Technical Notes
TN_100 USB Vendor ID/Product ID Guidelines
TN_111 What is UART
Datasheets
DS_UMFT260EV
UMFTPD2A Program Module Datasheet
FT_PROG Utility
http://www.ftdichip.com/Support/Utilities.htm#FT_Prog
Related Document or Specification
http://i2c2p.twibright.com/spec/i2c.pdf
https://msdn.microsoft.com/en-us/library/windows/hardware/dn642101(v=vs.85).aspx
https://msdn.microsoft.com/en-US/library/jj131705(v=vs.85).aspx
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Acronyms and Abbreviations
Terms
Description
API
Application Programming Interface
CTS
Clear To Send
DCD
Direct Carrier Detect
DLL
Dynamic Link Library
DSR
Data Set Ready
DTR
Data Terminal Ready
EEPROM
GPIO
Electrically Erasable Programmable Read Only Memory
General Purpose Input Output
HID
Human Interface Device
I2C
Inter-Integrated Circuit
LDO
Low Drop Out regulator
LED
Light-emitting diode
POR
Power-On-Reset
RTS
Request To Send
SIE
Serial Interface Engine
SSOP
USB
UART
Shrink Small Outline Package
Universal Serial Bus
Universal Asynchronous Receiver/Transmitter
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Appendix B - List of Figures and Tables
List of Figures
Figure 2.1 FT260 Block Diagram ............................................................................................................. 4
Figure 3.1 Pin Configuration W QFN-28 (top-down view).......................................................................... 7
Figure 5.1 I2C Bus Protocol................................................................................................................... 18
Figure 5.2 I2C Bus Timing ..................................................................................................................... 19
Figure 5.3 UART RX Waveform consist of 8 data bits, 1 optional parity bit and 1 stop bit....................... 24
Figure 5.4 UART TX Waveform consist of 7 data bits, no parity bit and 1 stop bit .................................. 24
Figure 5.5 UART TX Waveform consist of 7 data bits, 1 optional parity bit and 1 stop bit ....................... 24
Figure 5.6 UART TX Waveform consisting 7 data bits, 1 optional parity bit and 2 stop bits ..................... 24
Figure 5.7 UART TX Waveform consisting 8 data bits, 1 optional parity bit and 2 stop bits ..................... 24
Figure 7.1 Bus Powered Configuration .................................................................................................. 33
Figure 7.2 Self Powered Configuration with 5V Source Input ................................................................. 34
Figure 7.3 Self Powered Configuration with 3.3V Source Input .............................................................. 35
Figure 7.4 Bus Powered Configuration with +1.8V/+2.5V I/O voltage Level........................................... 36
Figure 7.5 Recommended FT260 Configuration of System Pins .............................................................. 37
Figure 7.6 FSOURCE for eFUSE ............................................................................................................. 38
Figure 8.1 Application Example 1: HID over I2C .................................................................................... 39
Figure 8.2 Application Example 2: USB to RS232 Converter .................................................................. 40
Figure 8.3 Application Example 3: USB to RS485 Converter .................................................................. 41
Figure 8.4 Application Example 4 : USB to RS422 Converter ................................................................. 42
Figure 9.1 Protocol Format for EEPROM with One Byte Data Address ..................................................... 46
Figure 9.2 Protocol Format for EEPROM with Two Bytes Data Address ................................................... 47
Figure 10.1 WQFN-28 Package Dimensions ........................................................................................... 50
Figure 10.2 WQFN-28 Package Markings ............................................................................................... 51
Figure 10.3 FT260 Solder Reflow Profile ................................................................................................ 52
List of Tables
Table 3.1 FT260 Pin Description............................................................................................................ 10
Table 5.1 FT260 USB Device Interface Configuration............................................................................. 16
Table 5.2 I2C Timing for VCCIO=3.3V ................................................................................................... 20
Table 6.1 Absolute Maximum Ratings ................................................................................................... 27
Table 6.2 ESD and Latch-Up Specifications ........................................................................................... 27
Table 6.3 Operating Voltage and Current .............................................................................................. 28
Table 6.4 I/O Pin Characteristics VCCIO = +3.3V (except USB PHY pins) .............................................. 29
Table 6.5 I/O Pin Characteristics VCCIO = +2.5V (except USB PHY pins) .............................................. 30
Table 6.6 I/O Pin Characteristics VCCIO = +1.8V (except USB PHY pins) .............................................. 31
Table 6.7 USB I/O Pin (DP, DM) Characteristics .................................................................................... 32
Copyright © 2016 Future Technology Devices International Limited
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FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
Table 9.1 Parameters defined in internal eFUSE for FT260 .................................................................... 45
Table 9.2 Tested EEPROM List for FT260 ............................................................................................... 47
Table 9.3 Parameters defined in external EEPROM for FT260................................................................. 49
Table 10.1 Reflow Profile Parameter Values .......................................................................................... 52
Copyright © 2016 Future Technology Devices International Limited
57
FT260 HID-CLASS USB TO UART/I2C BRIDGE IC
Version 1.0
D oc ument N o.: FT _001272 C learance N o.: FT D I#484
Appendix C - Revision History
Document Title:
FT260 HID-class USB to UART/I2C Bridge IC
Document Reference No.:
FT_001272
Clearance No.:
FTDI#484
Product Page:
http://www.ftdichip.com/Products/ICs/FT260.html
Document Feedback:
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Revision
Changes
Date
Version 1.0
Initial Release
2016-02-23
Copyright © 2016 Future Technology Devices International Limited
58
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