datasheet for MM74HC4066 by Fairchild Semiconductors

datasheet for MM74HC4066 by Fairchild Semiconductors
MM74HC4066
Quad Analog Switch
Features
General Description
■ Typical switch enable time: 15ns
The MM74HC4066 devices are digitally controlled
analog switches utilizing advanced silicon-gate CMOS
technology. These switches have low “ON” resistance
and low “OFF” leakages. They are bidirectional switches,
thus any analog input may be used as an output and
visa-versa. Also the MM74HC4066 switches contain
linearization circuitry which lowers the “ON” resistance
and increases switch linearity. The MM74HC4066
devices allow control of up to 12V (peak) analog signals
with digital control signals of the same range. Each
switch has its own control input which disables each
switch when LOW. All analog inputs and outputs and
digital inputs are protected from electrostatic damage by
diodes to VCC and ground.
■ Wide analog input voltage range: 0V–12V
■ Low “ON” resistance: 30 typ. (MM74HC4066)
■ Low quiescent current: 80µA maximum (74HC)
■ Matched switch characteristics
■ Individual switch controls
Ordering Information
Order Number
MM74HC4066M
MM74HC4066SJ
MM74HC4066MTC
MM74HC4066N
Package
Number
Package Description
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC14
N14A
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
MM74HC4066 — Quad Analog Switch
February 2008
MM74HC4066 — Quad Analog Switch
Connection Diagram
Truth Table
Input
Switch
CTL
I/O–O/I
L
“OFF”
H
“ON”
Top View
Schematic Diagram
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VCC
Supply Voltage
VIN
DC Control Input Voltage
Rating
–0.5 to +15V
–1.5 to VCC+1.5V
VOUT
DC Switch I/O Voltage
IIK, IOK
Clamp Diode Current
±20mA
IOUT
DC Output Current, per pin
±25mA
ICC
DC VCC or GND Current, per pin
±50mA
TSTG
PD
VEE–0.5 to VCC+0.5V
Storage Temperature Range
–65°C to +150°C
Power Dissipation
Note 2
600mW
S.O. Package only
TL
500mW
Lead Temperature (Soldering 10 seconds)
260°C
Notes:
1. Unless otherwise specified all voltages are referenced to ground.
2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC
VIN, VOUT
TA
t r, t f
Parameter
Min.
Max.
Units
Supply Voltage
2
12
V
DC Input or Output Voltage
0
VCC
V
–40
+85
°C
Operating Temperature Range
Input Rise or Fall Times
VCC = 2.0V
1000
ns
VCC = 4.5V
500
ns
VCC = 6.0V
400
ns
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
3
MM74HC4066 — Quad Analog Switch
Absolute Maximum Ratings(1)
TA = 25°C
Parameter
VCC (V)
VIH
Minimum HIGH
Level Input Voltage
2.0
1.5
1.5
1.5
4.5
3.15
3.15
3.15
RON
Maximum LOW
Level Input Voltage
Maximum “ON”
Resistance(4)
9.0
6.3
5.3
6.3
8.4
8.4
8.4
2.0
0.5
0.5
0.5
4.5
1.35
1.35
1.35
9.0
2.7
2.7
2.7
12.0
3.6
3.6
3.6
4.5
9.0
2.0
4.5
Maximum “ON”
Resistance
Matching
VCTL = VIH, IS = 2.0mA,
VIS = VCC to GND
(Figure 1)
100
170
200
220
50
85
105
110
30
70
85
90
VCTL = VIH, IS = 2.0mA,
VIS = VCC or GND
(Figure 1)
120
180
215
240
50
80
100
120
Maximum Control
Input Current
IIZ
Maximum Switch
“OFF” Leakage
Current
Maximum Switch
“ON” Leakage
Current
Maximum
Quiescent Supply
Current
V
Ω
35
60
75
80
20
40
60
70
10
15
20
20
5
10
15
15
5
10
15
15
±0.1
±1.0
±1.0
µA
±60
±600
±600
nA
4.5
9.0
VCTL = VIH,
VIS = VCC to GND
VIN = VCC or GND,
VCC = 2–6V
6.0
9.0
6.0
9.0
12.0
ICC
V
9.0
12.0
IIZ
Units
12.0
12.0
IIN
Guaranteed Limits
12.0
12.0
RON
Typ.
TA = –55°C
to 125°C
Symbol
VIL
Conditions
TA = –40°C
to 85°C
6.0
9.0
VOS = VCC or GND,
VIS = GND or VCC,
VCTL = VIL (Figure 3)
10
VIS = VCC to GND,
VCTL = VIH,
VOS = OPEN (Figure 2)
VIN = VCC or GND,
IOUT = 0µA
12.0
Ω
15
±80
±800
±800
20
±100
±1000
±1000
10
±40
±150
±150
15
±50
±200
±200
20
±60
±300
±300
2.0
20
40
4.0
40
80
8.0
80
160
nA
µA
Notes:
3. For a power supply of 5V ±10% the worst case on resistance (RON) occurs for HC at 4.5V. Thus the 4.5V values
should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively.
(The VIH value at 5.5V is 3.85V.) The worst case leakage current occurs for CMOS at the higher voltage and so the
5.5V values should be used.
4. At supply voltages (VCC–GND) approaching 2V the analog switch on resistance becomes extremely non-linear.
Therefore it is recommended that these devices be used to transmit digital only when using these supply voltages.
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
4
MM74HC4066 — Quad Analog Switch
DC Electrical Characteristics(3)
TA = 25°C
Symbol
Parameter
tPHL, tPLH Maximum Propagation
Delay Switch In to Out
VCC (V)
Conditions
50
30
75
4.5V
5
10
13
15
9.0V
4
8
10
12
Minimum Frequency
Response (Figure 7)
20 log (VO/VI) = –3dB
Crosstalk Between
any Two Switches
(Figure 8)
Peak Control to Switch
Feedthrough Noise
(Figure 9)
Switch OFF Signal
Feedthrough
Isolation (Figure 10)
THD
Total Harmonic
Distortion (Figure 11)
Units
ns
3
7
11
13
30
100
125
150
4.5V
12
20
25
30
9.0V
6
12
15
18
2.0V
RL = 1kΩ
5
10
13
15
60
168
210
252
4.5V
25
36
45
54
9.0V
20
32
40
48
15
30
38
45
2.0V
RL = 1kΩ
12.0V
fMAX
Guaranteed Limits
25
12.0V
tPHZ, tPLZ Maximum Switch Turn
“OFF” Delay
TA = –55°C
to 125°C
2.0V
12.0V
tPZL, tPZH Maximum Switch Turn
“ON” Delay
Typ.
TA = –40°C
to 85°C
4.5V
9.0V
4.5V
9.0V
4.5V
9.0V
4.5V
9.0V
4.5V
9.0V
RL = 600Ω,
VIS = 2 VPP at
(VCC/2)(5)(6)
40
ns
ns
MHz
100
RL = 600Ω,
F = 1MHz(6)(7)
–52
dB
–50
RL = 600Ω, F = 1MHz,
CL = 50pF
250
RL = 600Ω, F = 1MHz,
V(CT)VIL(6)(7)
–44
RL = 10kΩ, CL = 50pF,
F = 1kHz, VIS = 4 VPP,
VIS = 8 VPP
100
mV
–42
dB
.013
%
.008
CIN
Maximum Control
Input Capacitance
5
CIN
Maximum Switch
Input Capacitance
20
pF
CIN
Maximum Feedthrough
Capacitance
0.5
pF
CPD
Power Dissipation
Capacitance
15
pF
VCTL = GND
10
10
10
pF
Notes:
5. Adjust 0dBm for F = 1kHz (Null RL/RON Attenuation).
6. VIS is centered at VCC/2.
7. Adjust input for 0dBm.
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
5
MM74HC4066 — Quad Analog Switch
AC Electrical Characteristics
VCC = 2.0V–6.0V VEE = 0V–12V, CL = 50pF (unless otherwise specified)
Figure 2. “ON” Channel Leakage Current
Figure 1. “ON” Resistance
Figure 3. “OFF” Channel Leakage Current
Figure 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output
Figure 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
6
MM74HC4066 — Quad Analog Switch
AC Test Circuits and Switching Time Waveforms
MM74HC4066 — Quad Analog Switch
Figure 6. tPZH, tPHZ Propagation Delay Time Control to Signal Output
Figure 7. Frequency Response
Figure 8. Crosstalk: Control Input to Signal Output
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
7
MM74HC4066 — Quad Analog Switch
Figure 9. Crosstalk Between Any Two Switches
Figure 10. Switch OFF Signal Feedthrough Isolation
Figure 11. Sinewave Distortion
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
8
Typical “ON” Response
Typical Crosstalk Between
Any Two Switches
Typical Frequency Response
Special Considerations
In certain applications the external load-resistor current
may include both VCC and signal line components. To
avoid drawing VCC current when switch current flows into
the analog switch input pins, the voltage drop across the
switch must not exceed 0.6V (calculated from the ON
resistance).
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
9
MM74HC4066 — Quad Analog Switch
Typical Performance Characteristics
8.75
8.50
0.65
A
7.62
14
8
B
5.60
4.00
3.80
6.00
PIN ONE
INDICATOR
1
1.70
7
0.51
0.35
1.27
0.25
1.27
LAND PATTERN RECOMMENDATION
C B A
M
(0.33)
1.75 MAX
1.50
1.25
SEE DETAIL A
0.25
0.10
C
0.25
0.19
0.10 C
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AB, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
GAGE PLANE
FLASH OR BURRS.
D) LANDPATTERN STANDARD:
SOIC127P600X145-14M
0.36
E) DRAWING CONFORMS TO ASME Y14.5M-1994
F) DRAWING FILE NAME: M14AREV13
0.50 X 45°
0.25
R0.10
R0.10
8°
0°
0.90
0.50
(1.04)
SEATING PLANE
DETAIL A
SCALE: 20:1
Figure 12. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
10
MM74HC4066 — Quad Analog Switch
Physical Dimensions
MM74HC4066 — Quad Analog Switch
Physical Dimensions (Continued)
Figure 13. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
11
MM74HC4066 — Quad Analog Switch
Physical Dimensions (Continued)
0.65
0.43 TYP
1.65
6.10
0.45
12.00° TOP
& BOTTOM
R0.09 min
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 1982
E. LANDPATTERN STANDARD: SOP65P640X110-14M
F. DRAWING FILE NAME: MTC14REV6
R0.09min
1.00
Figure 14. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
12
MM74HC4066 — Quad Analog Switch
Physical Dimensions (Continued)
19.56
18.80
14
8
6.60
6.09
1
7
(1.74)
8.12
7.62
1.77
1.14
3.56
3.30
0.35
0.20
5.33 MAX
0.38 MIN
3.81
3.17
0.58
0.35
8.82
2.54
NOTES: UNLESS OTHERWISE SPECIFIED
THIS PACKAGE CONFORMS TO
A) JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
DIMENSIONS ARE EXCLUSIVE OF BURRS,
C) MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5-1994
E) DRAWING FILE NAME: MKT-N14AREV7
Figure 15. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
13
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
the design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I33
©1984 Fairchild Semiconductor Corporation
MM74HC4066 Rev. 1.5.0
www.fairchildsemi.com
14
MM74HC4066 — Quad Analog Switch
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
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