ISPnano IOMOD Connector Modules 1-10 V1

ISPnano IOMOD Connector Modules 1-10 V1
IO-MOD
Connector Modules
for the
ISPnano Programmer Range
(ISPnano-S3, ISPnano-S4-ATE and ISPnano-MUX)
Hardware User Manual
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
Contents
Copyright Information .......................................................................................................... vi
Equinox Warranty Information ........................................................................................... vii
Electromagnetic Compatibility (EMC) Compliance ............................................................ ix
Technical Support.................................................................................................................. x
Product Documentation and Software ................................................................................ xi
Overview ............................................................................................................................ xi
Documentation and software for the ISPnano programmer .............................................. xiii
Device algorithm - Application notes................................................................................. xiii
Programmer related - Application notes ...........................................................................xiv
1.0 Overview ........................................................................................................................... 1
2.0 IO Connector Module Overview ...................................................................................... 2
2.1 Overview ....................................................................................................................... 2
2.2 Programmer compatibility ............................................................................................. 5
3.0 Inserting an ‘I/O Connector Module’ .............................................................................. 8
3.1 ISPnano Series IV programmer .................................................................................... 8
3.2 ISPnano-MUX Multiplexed programmers...................................................................... 9
4.0 ISPnano Series III programmer ..................................................................................... 10
4.1 Overview ..................................................................................................................... 10
4.2 Assembling the IO-MOD module to the programmer .................................................. 11
4.3 Picture of IOMOD-INT Interface Module ..................................................................... 12
4.4 Example of using the IO-MOD5 module ..................................................................... 13
Appendix 1 – IOMOD1 Module ............................................................................................ 14
1.0 Overview ..................................................................................................................... 14
1.1 Module main features ................................................................................................. 14
Appendix 2 – IOMOD2 Module ............................................................................................ 15
1.0 Overview ..................................................................................................................... 15
1.1 Module main features ................................................................................................. 15
Warning: ........................................................................................................................... 15
1.2 Principle of operation .................................................................................................. 16
1.3 Relay signal routing .................................................................................................... 17
1.4 IOMOD2 module overview diagram ............................................................................ 17
1.5 Connecting the DUT to the ‘I/O Connector Module’ .................................................... 18
1.6 Connecting external ICT / ATE equipment to the ‘I/O Connector Module’ .................. 19
1.7 DUT routed to External ATE System (default) ............................................................ 21
1.8 DUT routed to External ATE System – Pin routing ..................................................... 22
1.9 DUT routed to internal programmer (RELAYs ON) ..................................................... 23
1.10 DIP switch - pull-up resistor configuration ................................................................. 24
Appendix 3 – IOMOD3 Module ............................................................................................ 25
1.0 Overview ..................................................................................................................... 25
1.1 Module main features ................................................................................................. 25
1.2 Principle of operation .................................................................................................. 26
1.3 Hardware layout.......................................................................................................... 26
1.5 Quick Connect - Power Connections .......................................................................... 27
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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J3 Quick Connect - Power Connections ...................................................................... 27
1.6 Quick Connect - Programming signals........................................................................ 27
J6 Quick Connect - Programming Signals ................................................................... 28
1.4 Configuration jumpers ................................................................................................. 29
1.4.1 Configuration Jumper J2 .................................................................................... 29
1.4.2 Configuration Jumper J7 .................................................................................... 29
Appendix 4 – IOMOD4 Module ............................................................................................ 30
1.0 Overview ..................................................................................................................... 30
1.1 Module main features ................................................................................................. 30
1.2 Principle of operation .................................................................................................. 31
1.3 Hardware layout .......................................................................................................... 31
1.4 Clock Buffer 10-way IDC connector ............................................................................ 32
1.5 Quick Connect - Power Connections .......................................................................... 33
J3 Quick Connect - Power Connections ...................................................................... 33
1.6 Quick Connect - Programming signals........................................................................ 33
J6 Quick Connect - Programming Signals ................................................................... 34
1.7 Configuration jumpers ................................................................................................. 34
1.7.1 Configuration Jumper J2 .................................................................................... 34
1.7.2 Configuration Jumper J7 .................................................................................... 34
Appendix 5 – IOMOD5 Module ............................................................................................ 36
1.0 Overview ..................................................................................................................... 36
1.1 Module main features ................................................................................................. 36
1.2 Principle of operation .................................................................................................. 37
1.3 Hardware layout .......................................................................................................... 37
1.4 Quick Connect - Power Connections .......................................................................... 38
J6 Quick Connect - Power Connections ...................................................................... 38
1.5 Quick Connect - Programming signals........................................................................ 38
J6 Quick Connect - Programming Signals ................................................................... 39
1.6 Configuration jumpers ................................................................................................. 39
1.6.1 Configuration Jumper J2 .................................................................................... 39
1.6.2 Configuration Jumper J7 .................................................................................... 40
Appendix 6 – IOMOD6 Module ............................................................................................ 42
1.0 Overview ..................................................................................................................... 42
1.1 Module main features ................................................................................................. 42
1.2 Programmer compatibility ........................................................................................... 42
1.3 Typical application / use .............................................................................................. 43
1.4 Principle of operation .................................................................................................. 43
1.5 Hardware layout .......................................................................................................... 43
1.6 IOMOD6 Header Pin-outs ........................................................................................... 44
1.7 ISP Cable considerations ............................................................................................ 44
1.8 Quick Connect Connections........................................................................................ 45
J5 Quick Connect - Power Connectors........................................................................ 45
Appendix 7 – IOMOD7 Module ............................................................................................ 46
1.0 Overview ..................................................................................................................... 46
1.1 Module main features ................................................................................................. 46
1.2 Programmer compatibility ........................................................................................... 46
1.3 Typical application / use .............................................................................................. 46
1.4 Principle of operation .................................................................................................. 47
1.5 Hardware layout .......................................................................................................... 47
1.6 IOMOD6 Header Pinouts ............................................................................................ 48
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
1.7 ISP Cable considerations............................................................................................ 48
1.8 Quick Connect Connections ....................................................................................... 49
J5 Quick Connect - Power Connectors ....................................................................... 49
Appendix 8 – IOMOD8 Module ............................................................................................ 50
1.0 Overview ..................................................................................................................... 50
1.1 Module main features ................................................................................................. 50
1.2 Principle of operation .................................................................................................. 51
1.3 Hardware layout.......................................................................................................... 51
1.4 Quick Connect Connections (Power signals) .............................................................. 51
1.5 10-way ARM 0.05" Header (J3) .................................................................................. 52
Appendix 9 – IOMOD9 Module ............................................................................................ 53
1.0 Overview ..................................................................................................................... 53
1.1 Module main features ................................................................................................. 53
1.2 Principle of operation .................................................................................................. 54
1.3 Hardware layout.......................................................................................................... 54
1.4 Quick Connect Connections (Power signals) .............................................................. 54
1.5 20-way ARM 0.1" IDC Header (J3) ............................................................................. 55
Appendix 10 – IOMOD10F - Sigma Calibration Module (Fixed frequency) ..................... 56
1.0 Overview ..................................................................................................................... 56
1.1 Module main features ................................................................................................. 56
1.2 Principle of operation .................................................................................................. 57
1.3 Fitting the IOMOD10 module to the programmer ........................................................ 57
1.4 Powering the IOMOD10 module ................................................................................. 58
1.5 Hardware layout.......................................................................................................... 60
1.6 IOMOD10 module connector overview ....................................................................... 61
1.7 Configuration jumpers ................................................................................................. 62
1.7.1 Configuration Jumper LK1 - Enable Calibration Output...................................... 62
1.7.2 Configuration Jumper LK2 - Calibration Clock Output Pin Select ....................... 62
1.7.3 Configuration Jumper LK3 - TVCC ON - Status LED ......................................... 63
1.8 Connecting to a Target Board via the SPI interface .................................................... 64
1.9 Connecting to a Target Board via the UART interface ................................................ 65
Appendix 11 - ISP Cable considerations ........................................................................... 66
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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Copyright Information
Information in this document is subject to change without notice and does not represent a
commitment on the part of the manufacturer. The software described in this document is furnished
under license agreement or nondisclosure agreement and may be used or copied only in accordance
with the terms of the agreement.
It is against the law to copy the software on any medium except as specifically allowed in the license
or nondisclosure agreement.
The purchaser may make one copy of the software for backup purposes. No part of this manual may
be reproduced or transmitted in any form or by any means, electronic, mechanical, including
photocopying, recording, or information retrieval systems, for any purpose other than for the
purchaser’s personal use, without written permission.
© 2000 - 2014 Copyright Equinox Technologies UK Limited. All rights reserved.
AtmelTM and AVRTM are trademarks of the Atmel Corporation
Microsoft, MS-DOS, WindowsTM, Windows 95TM, Windows 98TM, Windows XPTM and Windows NT4TM
are registered trademarks of the Microsoft Corporation
IBM, PC and PS/2 are registered trademarks of International Business Machines Corporation
Intel, MCS 51, ASM-51 and PL/M-51 are registered trademarks of the Intel Corporation
Every effort was made to ensure accuracy in this manual and to give appropriate credit to persons,
companies and trademarks referenced herein.
Equinox guarantees that its products will be free from defects of material and workmanship under
normal use and service, and these products will perform to current specifications in accordance with,
and subject to, the Company’s standard warranty which is detailed in Equinox’s Purchase Order
Acknowledgment.
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
Equinox Warranty Information
This product is guaranteed by Equinox Technologies UK Limited for a period of 24 months (2 years)
after the date of purchase against defects due to faulty workmanship or materials. The guarantee
covers both parts and labour. This is a ‘Return to manufacturer’ warranty. The customer is
responsible for all shipping + customs clearance costs for returning the programmer to Equinox and
for Equinox returning the programmer back to the customer. Service under the guarantee is only
provided upon presentation of reasonable evidence that the date of the claim is within the guarantee
period (e.g. completed registration/guarantee card or a purchase receipt).
The guarantee is not valid if the defect is due to accidental damage, misuse or neglect and in the
case of alterations or repair carried out by unauthorised persons. A number of exceptions to the
warranty are listed in the ‘Exceptions to warranty’ section below. Service (during and after
guarantee period) is available in all countries where the product is distributed by Equinox
Technologies UK Limited.
Exceptions to warranty
Over-voltage damage
This warranty does not cover damage to the programmer due to voltages beyond the specified
voltage limits being applied to the ‘DC Power Input’ (CON1) or any of the ISP Headers. The user must
ensure that sufficient care is taken to avoid over-voltage and static conditions on any of the ‘ISP
Header’ I/O pins.
Over-current damage
This warranty does not cover damage to the programmer due to excessive current being drawn from
the programmer power supply. The user must ensure that there is sufficient over-current protection
within the test fixture to protect against short circuit loads.
Short-circuit damage
This warranty does not cover damage to the programmer due to short-circuit loads being placed
across programmer I/O lines.
Programmer ‘Line Driver Circuitry’ damage.
The programmer features ‘Line Driver Circuitry’ which interfaces to the Target system (DUT). This
circuitry is protected via ESD protection diodes. If these diodes become damaged during operation of
the programmer then it is likely that the programmer driver circuitry is also damaged. This warranty
does not cover damage to the programmer ‘Line Driver Circuitry’.
Warning!
Any damage caused to the programmer by Electrostatic Discharge (ESD) through inadequate
earthing is not covered under the warranty of the product.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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Disclaimer
Whilst every effort has been made to ensure that programming algorithms are correct at the time of
their release, it is always possible that programming problems may be encountered, especially when
new devices and their associated algorithms are initially released. It is Equinox’s Company Policy to
endeavour to rectify any programming issues as quickly as possible after a validated fault report is
received.
It is recommended that high-volume users always validate that a sample of a devices has been
programmed correctly, before programming a large batch. Equinox Technologies UK Ltd. can not be
held responsible for any third party claims which arise out of the use of this programmer including
‘consequential loss’ and ‘loss of profit’.
Equinox Technologies UK Ltd. cannot be held responsible for any programming problems which are
‘out of our control’. This type of problem is usually listed in the ‘Errata Sheet’ for the particular device
being programmed and is available from the silicon vendor.
Information contained in this manual is for guidance purposes only and is subject to change. E&OE.
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
Electromagnetic Compatibility (EMC)
Compliance
The ‘ISPnano Programming Module’ is a CE Approved Product. It is designed for use in an ESD
controlled environment i.e. development or production. This means, therefore, that the user must
ensure that there is no possibility of damage from electrostatic discharge (ESD). Since the devices
and equipment to which this product is likely to be connected may well themselves be susceptible to
ESD, this should not pose any difficulty.
For example, if you are handling microcontrollers and EEPROMS etc. then you will already be used to
appropriate precautions, such as the use of anti-static mats, wrist straps and so on. You should treat
your ‘ISPnano Programming Module’ with the same care as you would these types of devices.
Always ensure that you are not carrying a static charge yourself before handling the product. Wearing
an earthed anti-static wrist strap is recommended.
Equinox has taken great care in designing this product to be compliant with the European EMC
directive. When using the equipment be sure to follow the instructions provided. Although RF
emissions are within prescribed limits, care should be taken if you are using the product near to
sensitive apparatus. If you experience any difficulty please refer to Equinox Technical Support.
ESD Points to remember
•
Work in a static-free environment.
•
Wear an earthed wrist strap when handling either the programmer and/or
any programmable device.
•
Ensure that the PC, programmer and Target system are connected to the
same EARTH (0V) potential.
•
Do NOT plug the ISP cable of the programmer into a Target System when
the Target power is ON.
•
Ensure than any residual charge stored in capacitors on the Target System
has been discharged BEFORE connecting or disconnecting the
programmer.
Warning!
Any damage caused to the programmer by Electrostatic Discharge (ESD) through inadequate
earthing is not covered under the warranty of the product.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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Technical Support
It is often the case that users experience problems when installing or using a product for the first time.
If you have a technical support problem, please consult the following list for help:
► User Manual
► Application Notes
► On-line help
Press <F1> for help at any time when running EQTools or ISP-PRO.
The help system is context-sensitive. Simply press <F1> on any error message and the
possible causes of the error should be listed. This help system is updated on a regular
basis. Please see software update details for information on keeping up-to-date with
software revisions.
► Internet Web Site
The support / download page for the ‘ISPnano programmer range’ can be found at:
http://www.equinox-tech.com/products/details.asp?ID=1440&displ=tl
► E-mail
Please e-mail any technical support questions about this product to:
support@equinox-tech.com
► Fax
Please fax any technical support questions about this product to: +44 (0) 1942 844181
Equinox will try our best to answer your questions about this product as quickly as
possible. However, we cannot promise an immediate reply. Please consult our web site for new
software updates as the problem that you are enquiring about may have already been fixed in a new
version.
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
Product Documentation and Software
Overview
This manual provides an overview of the contents of the ‘ISPnano Programming Range’ plus
associated hardware and software. References may be made to other hardware and software
products which are not covered in detail in this manual.
Please refer to the table below for a list of sources of documentation and/or browse to
http://www.equinox-tech.com/products/details.asp?ID=1440&displ=tl
Software:
EQTools Script Builder – Manual
This software is used to create and upload ‘Programming Projects’ to
the programmer.
The following sources of documentation are available for this
software:
•
Installation and Getting Started Guide
•
Help file
ASCII Text Communications Protocol – Application Note
This protocol can be used to control the programmer from an
external controller via RS-232.
The following sources of documentation are available for this
protocol:
•
Application Note – AN110
ISP Pro – Manual
This software is used to control the programmer in a production
environment. It is not supplied as standard with this programmer.
The following sources of documentation are available for this
software:
•
Installation and User Manual
•
Help File
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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Upload Wizard - Standalone Project Upload Utility
This software utility is used to upload Programming Projects to any
Equinox programmer. These projects can then be used in
Standalone Mode, i.e. without a PC.
•
Please follow the on-screen instructions within the Upload Wizard
utility itself.
•
Application Note – AN117
Labview – Remote Application Control – Application Note
This upgrade allows a production facility to control a single
programmer from a ‘Labview for Windows’ application. The
Application note describes how to control the programmer using a
custom Labview (from National Instruments) application.
The following sources of documentation are available for this
software:
•
Application Note – AN109
Remote Application Control – Application Note
Describes how to control the programmer using a custom Remote
Application written in e.g. Visual Basic, C++, C Builder, Delphi etc.
The following sources of documentation are available for this
software:
•
Application Note – AN109
ConsoleEDS Pro – Application note
This software utility allows any Equinox programmer to be controlled
via simple Command Line instructions from a Command Window
within Windows.
The following sources of documentation are available for this
software:
•
Application Note - AN111
JTAG In-System (ISP) Upgrade – Application Note
This license upgrade enables the programmer to support high-speed
In-System Programming (ISP) of the Atmel ATmega microcontroller
family using the JTAG algorithm. Support is offered for both single
and multiple JTAG devices in a JTAG Chain.
The following sources of documentation are available for this
software:
•
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Application Note – AN105
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
Documentation and software for the ISPnano programmer
In line with our policy of continuous improvement, the software and associated documentation for this
product are updated on a regular basis. You can download the latest software, firmware, User
Manuals and application notes for the ISPnano programmer from the following page on the Equinox
website:
http://www.equinox-tech.com/products/details.asp?ID=1440&displ=tl
You may be asked to register / log in to download some of these files.
Device algorithm - Application notes
The table below lists the Application Notes available for helping to create ‘Programming Projects’
for different device families.
Application Device Family
Note
Programming
Interface
AN100
Atmel - AT89Sxxxx FLASH microcontrollers
SPI
AN101
Atmel - AVR FLASH microcontrollers via the SPI Interface
SPI
AN105
Atmel - AVR FLASH microcontrollers via the JTAG Interface
JTAG
AN118
Generic I2C 24xxx Serial EEPROM memories
I2C
AN122
Atmel - AT91SAM7 ARM7 FLASH microcontrollers
JTAG
AN127
Atmel – XMEGA AVR FLASH microcontrollers via the 2-wire PDI
interface
PDI
AN128
NXP – LPCxxx ARM7 FLASH microcontrollers
JTAG
AN130
Zensys – ZWxxx – Z-WAVE Series
SPI
AN132
Atmel ATtiny AVR microcontrollers via the TPI interface
TPI
AN133
Atmel AT45D Serial DataFlash programming
SPI
AN134
Austriamicrosystems – magnetic encoder programming
AMS 1-wire
SPI
I2C
AN135
Xilinx Spartan FPGA – external Serial DataFLASH programming
method
SPI
These application notes can be found in PDF format on the CD-ROM which was supplied with the
programmer. You can also find the very latest versions on the “ISPnano Download Page” on the
Equinox website.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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Programmer related - Application notes
The table below lists the Application Notes available for the ISPnano programmer range which
describe the USB driver installation, the different control methods available, firmware update
procedure and ‘AVR Oscillator Calibration’ procedure.
Application Description
Note
AN109
Remote Application Control of Equinox ISP Programmers using ISP-PRO Utility
AN110
ASCII Text Control (ATC) Protocol for Remote Control of Equinox Programmers
AN111
ConsoleEDS Protocol for Remote Control of Equinox Programmers
AN112
Firmware Update instructions for Equinox ISP Programmers
AN114
Accurate on-chip Oscillator Calibration for Atmel AVR microcontrollers
AN121
Equinox EQTools – Release Notes
AN123
Controlling an Equinox ISP Programmer from a Remote System via the Remote 4-wire
TTL Port
AN126
USB Driver Installation instructions for PPM4-MK1 and ISPnano programmers
These application notes can be found in PDF format on the CD-ROM which was supplied with the
programmer. You can also find the very latest versions on the “ISPnano Download Page” on the
Equinox website.
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
1.0 Overview
This manual describes the family of ‘IO-MOD - I/O Connector Modules’ which are available for use
with the Equinox ‘ISPnano’ family of production ISP device programmers. Each module is designed
to suit different signal connection type, routing or signal buffering requirements.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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2.0 IO Connector Module Overview
2.1 Overview
A range of different ‘I/O Connector Modules’ are available which are designed to suit different signal
routing requirements. The table below shows the range of ‘I/O Connector Module’ which are
currently available….
Module
name
IO-MOD1
IO-MOD2
IO-MOD3
2
Module
description
I/O
Connector
Module 1
I/O
Connector
Module2
I/O
Connector
Module 3
Module
Picture
Overview of module signal routing
•
Only TVCC, TVPP, EXT-VCC power signals
signals + RESET are switched (isolated)
through relays.
•
All other signals are routed via analogue
switches from the
programmer to the DUT.
•
Programming interfaces supported: All
•
All programming and power signals are
routed through relays.
•
The DUT is routed to the ‘ATE Port’ by
default and only routed to the programmer
when a programming operation is in
progress.
•
Programming interfaces supported: All
•
Supports direction connection of a remote
‘Serial Clock Buffer’ module which buffers
the serial clock signal at the target end of the
ISP cabling.
•
Can be used to buffer the clock for XMEGA
PDI, ATtiny TPI, AT45D SPI and AVR / ARM
JTAG devices.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
IO-MOD4
IO-MOD5
IO-MOD6
IO-MOD7
I/O
Connector
Module 4
I/O
Connector
Module5
I/O
Connector
Module6
I/O
Connector
Module7
•
Supports direction connection of a remote
‘Serial Clock Buffer’ module which buffers
the serial clock signal at the target end of the
ISP cabling.
•
Can be used to buffer the clock for XMEGA
PDI, ATtiny TPI, AT45D SPI and AVR / ARM
JTAG devices.
•
Supports direct connection of a remote
‘Serial Clock Buffer’ module which buffers
the serial clock signal at the target end of the
ISP cabling.
•
Can be used to buffer the clock for XMEGA
PDI, ATtiny TPI, AT45D SPI and AVR / ARM
JTAG devices.
•
Only TVCC, TVPP, E-VCC power signals +
RESET are switched (isolated) through
relays.
•
Programmer compatibility: Series IV + MUX
•
Atmel 6-pin IDC SPI programming header
•
Atmel 10-way IDC AVR JTAG programming
header
•
Equinox 10-way IDC generic programming
header
•
Only the RESET, TVCC, TVPP and EXTVCC signals are switched (isolated) through
relays.
•
Quick-connect connectors for GROUND and
POWER signals
•
Programmer compatibility: ISPnano Series 3
•
Atmel 6-pin IDC SPI programming header
•
Atmel 10-way IDC AVR JTAG programming
header
•
Equinox 10-way IDC generic programming
header
•
Quick-connect connectors for GROUND and
POWER signals
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
3
IO-MOD8
IO-MOD9
IO-MOD10F
IO-MODINT
4
I/O
Connector
Module 8
I/O
Connector
Module 9
I/O
Connector
Module 10F
I/O
Connector
Module
•
ARM Cortex miniature 10-way 0.05" JTAG /
SWD programming / debug header
•
Programmer compatibility: ISPnano Series
IV, ISPnano-MUX
•
The RESET, TVCC, TVPP and EXT-VCC
signals are switched (isolated) through
relays.
•
Quick-connect connectors for GROUND and
POWER signals
•
ARM standard 20-way 0.1" JTAG / SWD
programming / debug header
•
Programmer compatibility: ISPnano Series
IV, ISPnano-MUX
•
The RESET, TVCC, TVPP and EXT-VCC
signals are switched (isolated) through
relays.
•
Quick-connect connectors for GROUND and
POWER signals
•
Z-Wave 500 series - Oscillator Calibration
module
•
Programmer compatibility: ISPnano Series IV
•
Quick-connect connectors for SPI / UART
programming signals
•
Quick-connect connectors for GROUND and
POWER signals
•
This is a specially designed ‘Interface
module’ which allows any ‘IO-MOD’ module
to connect to an ‘ISPnano Series III’
programmer.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
2.2 Programmer compatibility
The table below details which IO-MOD module is compatible with which programmer…
Series
III
Series
III
ATE
Series
IV
ATE
MUX2
MUX4
MUX8
I/O
Connector
Module 1
No
No
Yes
Yes
IO-MOD2
I/O
Connector
Module2
No
No
Yes
Yes
IO-MOD3
I/O
Connector
Module 3
Yes
(See
note 1)
No
Yes
No
IO-MOD4
I/O
Connector
Module 4
Yes
(See
note 1)
No
Yes
No
Module
name
Module
description
IO-MOD1
Module
Picture
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
5
6
IO-MOD5
I/O
Connector
Module5
No
No
Yes
Yes
IO-MOD6
I/O
Connector
Module6
No
No
Yes
Yes
IO-MOD7
I/O
Connector
Module7
Yes
(See
note 1)
No
Yes
No
IO-MOD8
I/O
Connector
Module5
No
No
Yes
Yes
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
IO-MOD9
I/O
Connector
Module 9
No
No
Yes
Yes
IO-MOD10F
I/O
Connector
Module 10
No
No
Yes
No
IO-MODINT
I/O
Connector
Module
Yes
No
No
No
Note 1
The use of any IO-MOD module with the ‘ISPnano Series 3’ programmer requires the use of the
mating IO-MODINT interface module.
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15– 13/06/14
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3.0 Inserting an ‘I/O Connector Module’
3.1 ISPnano Series IV programmer
The ‘ISPnano Series IV’ programmer is capable of accepting a single ‘IO-MOD’ connector module.
The illustration below shows how to insert an ‘IO-MOD’ module into the programmer.
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3.2 ISPnano-MUX Multiplexed programmers
The ‘ISPnano-MUX’ range of programmer are capable of accepting 2, 4 or 4 x ‘IO-MOD’ connector
modules depending on the programmer model
The illustration below shows how to insert an ‘IO-MOD’ module into an ISPnano MUX2, MUX4 or
MUX8 programmer.
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4.0 ISPnano Series III programmer
4.1 Overview
It is now possible to use certain ‘IO-MOD’ connector modules with the ‘ISPnano Series III’
programmer. This requires the ‘IOMOD-INT’ interface module to be attached to the programmer. The
chosen ‘IO-MOD’ connector module can then be plugged into the ‘IOMOD-INT’ interface module.
The pictura below shows how an ‘IO-MOD’ connector module can be interfaced to the programmer.
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
4.2 Assembling the IO-MOD module to the programmer
The illustration below shows how the ‘IOMOD-INT’ module is fixed to the ‘ISPnano Series III’ main
programmer body. The chosen ‘IOMOD-INT’ module is the plugged into the ‘IOMOD-INT’ module.
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The picture below demonstrates how the ‘IOMOD-INT’ module fits to the programmer…
4.3 Picture of IOMOD-INT Interface Module
The picture below shows the IOMODINT Interface Module.
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4.4 Example of using the IO-MOD5 module
The picture below demonstrates how to use the ‘IO-MOD5’ module with the ‘ISPnano Series III’
programmer. The remote ‘Serial Clock Buffer Module’ is connected to the ‘IO-MOD5’ module via a
10-way ISP cable.
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Appendix 1 – IOMOD1 Module
1.0 Overview
The ‘IOMOD1’ module is designed to allow any ISPnano programmer to interface to a Target system
(DUT). The module features the standard ISPnano 16-way IDC 'Target ISP Port' connector plus a
wire-wrap version of the same port. All power signals are switched via relays making this IMOD
module suitable for use on the ISPnano Series 4 ATE and ISPnano-MUX programmers only.
1.1 Module main features
The main features of the ‘IOMOD1’ module are as follows….
• Standard ISPnano 16-way IDC 'Target ISP Port' connector (not switched via relays)
• Wire-wrap version of ISPnano 16-way IDC 'Target ISP Port' connector (not switched via
relays)
• User-configurable pull-up resistors for I2C and Atmel XMEGA PDI / ATtiny TPI programming
algorithms
• 'Target Power' status LED (TVCC signal)
• Relay isolation of all power signals (TVCC, TVPP and EXT-VCC supplies)
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Appendix 2 – IOMOD2 Module
1.0 Overview
The ‘IOMOD2’ module is designed to allow an ISPnano programmer to automatically switch the
signals from a Device Under Test (DUT) between the programmer and an external ATE or ICT (InCircuit Test) system.
1.1 Module main features
The main features of the ‘IOMOD2’ module are as follows….
• Supports routing of external ATE or ICT or measurement equipment to a Target System / DUT
(Device Under Test) under programmer control
• The programmer electronics are only connected to the programmer when the programmer is
in ‘programming mode’.
• Relay isolation of all programming signals
• Relay isolation of all power signals (TVCC, TVPP and EXT-VCC supplies)
• All signals connected to the ‘ATE Connector’ are routed to the ‘Target Connector’ by default
when the relays are OFF.
• The programmer electronics are routed to the ‘Target Connector’ when the relays are ON.
Warning:
The 'relay isolation' is only designed to isolate 'low voltage signals' (<50V DC). It is not designed
and must not be used for isolation of mains 110 / 230 - 240 V AC signals.
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1.2 Principle of operation
The ‘IOMOD2’ module is designed to operate as follows:
1. During functional test (default configuration)
• All signals on the ‘ATE Connector’ are routed to the ‘Target Connector’
• This allows an external ‘ATE System’ or ‘In-Circuit Test (ICT)’ system to be routed to the
Target System or Device under Test (DUT)
2. During device programming
• The programmer isolates the signals connected to the ‘ATE Connector’
• The internal ‘programmer electronics’ are now routed to the Target System or Device under
Test (DUT)
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1.3 Relay signal routing
The signal routing depends on whether the relays on the IOMOD2 module are energised (ON) or deenergised (OFF) – see table below.
Relay
position
Relays
ON
Indicator
Signal routing
OFF
(default)
OFF
‘Target Connector’ signals are routed to the ‘ATE Connector’
ON
ON
‘Target Connector ’ signals are routed to the ‘Internal Programmer
Power and I/O Driver Circuitry’
Please note:
The relays are automatically controlled by the programmer. When the programmer performs any
'programming action', it will automatically energise the relays thereby disconnecting the 'ATE
Connector' signals and routing the 'programmer electronics' to the Target System (DUT).
1.4 IOMOD2 module overview diagram
The diagram below shows the relevant components of the ‘IOMOD2’ module.
Picture
Annotation
number
Description
1
DIP-Switch
Configures pull-up resistors for I2C, PDI and TPI
2
Target Connector
Connect to Target System (DUT)
Target System signals and power connections
3
ATE Connector
Connect to external ATE or ICT
External ATE / ICT signals and power connections
4
Relay Power indicator
Illuminates when the relay coils are energised
5
Relays
These relays route the Target System signals
between the external ATE / ICT or the programmer
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1.5 Connecting the DUT to the ‘I/O Connector Module’
The Target Board (DUT) which is to be programmed must be connected to the 'TARGET
CONNECTOR' on the IOMOD2 connector module. See picture below.....
The 'Target Connector' is a 16-way 0.1" pitch IDC connector. The illustration below shows where pin
1 of the connector is located.....
Instructions:
• Connect the ‘Target System’ (UUT) to the 16-way ‘Target Connector’ port.
The programmer is only connected to the Target System (DUT) when the relays are energised when
the programmer is in 'programming mode'.
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1.6 Connecting external ICT / ATE equipment to the ‘I/O
Connector Module’
It is possible to connect external ATE / ICT / measurement equipment to the ISPnano programmer
by using the 'ATE Connector' on the IOMOD2 module. See picture below.....
The 'ATE Connector' is a 16-way 0.1" pitch IDC connector. The illustration below shows where pin 1
of the connector is located.....
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When the programmer is idle (not in programming mode), then any signals connected to the 'ATE
Connector' on the IOMOD2 module are routed to the Target system (DUT). The programmer
electronics is completely out of circuit at this point so the programmer does not load the Target
System (DUT) in any way.
Instructions:
• Connect the external ‘ATE System’ or ICT equipment or measurement equipment to the ‘ATE
Connector’ port of the IOMOD2 module
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IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
1.7 DUT routed to External ATE System (default)
When the programmer is powered up but not running a ‘Programming Project’, the relay coils are
not energised so the ‘Target System (UUT)’ connections are routed via the ‘Target ISP Port’,
through the relays to the ‘ATE Port’ where they then connect to the ‘External ATE / ICT System’.
The signal direction depends on the particular signal I/O line, GROUND or power line being routed.
The path of a single signal or passive power / GROUND line is shown in the schematic below.
Please note:
• When the relays are not energised, the programmer electronics are completely isolated from
both the ‘Target System’ and the ‘External ATE System’.
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1.8 DUT routed to External ATE System – Pin routing
By default the RELAYs are OFF and the ‘ATE Port’ signals are routed to the ‘Target Connector’
pins as detailed in the table below.
Target ISP
Port
Pin Number
ATE Port
Pin
Number
Programmer
Pin name
Notes
1+2
1+2
TARGET_VCC
Target VCC
This pin should be connected to the
Target System Vcc.
3+4
3+4
EXT_VCC
Target External VCC
No connection required as EXT-VCC is
being used to control the RELAY coils.
5+6
5+6
PROG_GND
Signal Ground Connection (1)
0V to which the programmer JTAG, SPI,
I2C, PDI, TPI signal lines are referenced
to.
7a
7b
7c
7a
7b
7c
•
•
•
I2C SCL
PDI_CLK
TPI_CLK
•
•
•
I2C SCL clock signal
XMEGA PDI CLOCK Signal
ATtiny TPI CLOCK Signal
8a
8b
8c
8a
8b
8c
•
•
I2C_SDA
XMEGA_PDI_DAT
A
ATTINY_TPI_DATA
•
•
•
I2C SDA data signal
XMEGA PDI DATA Signal
ATtiny TPI DATA Signal
•
9
N/C
OP6
Spare Output (used for PDI / TPI)
10
N/C
Programmer I/O5
Not available
11
11
Programmer I/O4
•
•
SPI – SCK2
JTAG – TMS
12
12
Programmer I/O3
•
•
SPI – SCK
JTAG – TCK
13
13
Programmer I/O2
•
•
•
SPI – MISO
JTAG – TDO
UART - RXD
14
14
Programmer I/O1
•
•
•
SPI – MOSI
JTAG – TDI
UART - TXD
15
15
PROG_VPP
Vpp Voltage
16
16
PROG_RESET
Target RESET control pin
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1.9 DUT routed to internal programmer (RELAYs ON)
When the relay coils are energised, the ‘Target System (DUT)’ connections are routed to the
‘Internal Programmer’. The ‘External ATE / ICT System’ is at this point completely disconnected
(out of circuit). This allows the programmer to power up and program the ‘Target Device’ without any
problems related to the external system loading the power or programmer signal lines.
The path of a single signal or passive power / GROUND line is shown in the schematic below.
Please note:
• When the relays are in this state, the ‘External ATE System’ is completely isolated from both
the ‘Target System’ and the ‘Internal Programmer electronics’.
• All ‘Target System’ I/O signals, power and GROUND are now routed to the internal
‘Programmer Driver / Power Circuitry’.
• The relays are automatically energised (switched ON) by the programmer when a
programming operation is started.
• It is also possible to control the relay switching from an external system if required.
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1.10 DIP switch - pull-up resistor configuration
The IOMOD2 module features a 4-way 'DIP switch' which is used to configure pull-up resistors on
certain 'programmer signal lines'. These pull-up resistors are required for the I2C and Atmel XMEGA
PDI / ATtiny TPI programming algorithms only.
Algorithm
DIP Switch
position
I2C
1+2 = ON
3+4 = OFF
XMEGA PDI
ATtiny TPI
1+2 = OFF
DIP Switch illustration
3+4 = ON
All other
algorithms
1+2 = OFF
3+4 = OFF
Please note:
For all other algorithms, the 'DIP switches' should be all set to the 'OFF' position (i.e. no pull-ups
connected).
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Appendix 3 – IOMOD3 Module
1.0 Overview
The ‘IOMOD3’ module is designed to allow a remote 'Clock Buffer Module' to be connected to an
'ISPnano Series III' programmer. The module features a 10-way 'Clock Buffer' IDC connector
which is used to directly connect to a remote 'Clock Buffer Module' via any length of 10-way ribbon
cable.
1.1 Module main features
The main features of the ‘IOMOD3’ module are as follows….
• Supports direct connection of a remote 'Clock Buffer Module' via a 10-way IDC plug
• Supports buffering of SPI, JTAG, XMEGA PDI and ATtiny TPI 'Serial Clock' signals
• The remote 'Clock Buffer Module' can be connected via any suitable length of ribbon cable
to the 10-way IDC plug.
• User configurable clock signal routing - a simple jumper selection allows either the 'SPI SCK', 'JTAG - TCK' or 'XMEGA PDI CLK' serial clock signal to be routed from the
programmer to the 'Buffered clock input' on the remote 'Clock Buffer Module'.
• Quick-connect connector for connecting programmer I/O pins 1..4 and RESET
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
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1.2 Principle of operation
The ‘IOMOD3’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect a remote 'Clock Buffer Module' via the 10-way IDC plug labelled 'Clock Buffer'
• Manually connect any power and GROUND signals required between the programmer and the
DUT
• Set the 'Configuration jumpers' to select the correct 'Serial clock source' to match the
target programming interface ie. SPI, JTAG, PDI / TPI
1.3 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD3’ module.
Picture
26
Annotation
number
Description
1
10-way Header
2
Configuration jumper
3
TVCC LED Indicator
4
Quick connect connector (J5) for programmer
POWER signals
5
Quick connect connector (J6)
for programmer I/O signals
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1.5 Quick Connect - Power Connections
The 'Quick connect - POWER signals' connector (J6) is designed to allow separate wires to be
connected between the programmer and the Target System (DUT). The illustration below shows the
pin-out of this connector.
J3
Power Signal Connectors
(Quick connect)
J3 Quick Connect - Power Connections
Pin No
Connector
1
TVCC
2
GND
3
TVCC
4
VPP
5
EXT-VCC
6
GND
Description
1.6 Quick Connect - Programming signals
The 'Quick connect - Programming Signals' connectors are designed to allow separate wires to be
connected between the programmer and the Target System (DUT). The illustration below shows the
pin-out of this connector.
J6
Programming Signal
Connectors
(Quick connect)
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J6 Quick Connect - Programming Signals
Pin No
28
Connector
1
I/O 3
2
GND
3
I/O 4
4
GND
5
RESET
6
GND
Description
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
1.4 Configuration jumpers
The ‘IOMOD3’ module features 2 x 'Configuration jumpers' which are used to configure the module
for a selected target programming interface.
1.4.1 Configuration Jumper J2
'Configuration Jumper J2' is used to configure which 'Serial Clock' source is routed to the 10-way
'Clock Buffer' IDC connector from the programmer.
The table below illustrates the settings of 'Configuration Jumper J2'.
Jumper
position
Function
selection
Explanation of routing
Supported programming
interfaces
1-2
JTAG / SPI
Clock
Routes the JTAG - TCK / SPI - SCK
clock signal to the 'Clock Buffer'
IDC connector
•
•
JTAG - AVR, ARM etc
SPI - AVR, AT45D Serial
DataFLASH
2-3
PDI / TPI
Clock
Routes the XMEGA PDI CLK /
ATtiny TPI CLK clock signal to the
'Clock Buffer' IDC connector
•
•
XMEGA PDI
ATtiny TPI
1.4.2 Configuration Jumper J7
'Configuration Jumper J7' is used to configure the connector board for use with Atmel XMEGA PDI
or ATtiny TPI target devices. The jumper connects the programmer UART TRANSMIT and RECEIVE
pins together via a 470 ohm resistor to allow bi-direction communications on a single pin. mmer.
The table below illustrates the settings of 'Configuration Jumper J7'.
Jumper
position
Function
selection
Explanation of function
Supported programming
interfaces
1-2
Programmer
UART
TRANSMIT
and RECEIVE
Shorted
together
Routes the JTAG - TCK / SPI - SCK
clock signal to the 'Clock Buffer'
IDC connector
•
•
XMEGA PDI
ATtiny TPI
NOT
FITTED
None
Use this selection for all devices
except XMEGA PDI and ATtiny TPI
•
Suitable for use with all
devices except for
XMEGA PDI and ATtiny
TPI
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Appendix 4 – IOMOD4 Module
1.0 Overview
The ‘IOMOD4’ module is designed to allow a remote 'Clock Buffer Module' to be connected to an
'ISPnano Series III' or 'ISPnano Series IV' programmer. The module features a 10-way 'Clock
Buffer' IDC connector which is used to directly connect to a remote 'Clock Buffer Module' via any
length of 10-way ribbon cable.
1.1 Module main features
The main features of the ‘IOMOD4’ module are as follows….
• Supports direct connection of a remote 'Clock Buffer Module' via a 10-way IDC plug
• Supports buffering of SPI, JTAG, XMEGA PDI and ATtiny TPI 'Serial Clock' signals
• The remote 'Clock Buffer Module' can be connected via any suitable length of ribbon cable
to the 10-way IDC plug.
• User configurable clock signal routing - a simple jumper selection allows either the 'SPI - SCK',
'JTAG - TCK' or 'XMEGA PDI CLK' serial clock signal to be routed from the programmer to
the 'Buffered clock input' on the remote 'Clock Buffer Module'.
• Quick-connect connector for connecting programmer I/O pins 1..4 and RESET
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
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1.2 Principle of operation
The ‘IOMOD4’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect a remote 'Clock Buffer Module' via the 10-way IDC plug labelled 'Clock Buffer'
• Manually connect any power and GROUND signals required between the programmer and the
DUT
• Set the 'Configuration jumpers' to select the correct 'Serial clock source' to match the
target programming interface ie. SPI, JTAG, PDI / TPI
1.3 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD4’ module.
Picture
Annotation
number
Description
1
TVCC LED Indicator
2
Quick connect connector (J3)
for programmer POWER signals
3
Quick connect connector (J6) for programmer
I/O programming signals
4
Configuration jumper (J7)
5
Configuration jumper (J8)
6
Remote 'Clock Buffer' connector (J4)
7
Configuration jumper (J2)
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1.4 Clock Buffer 10-way IDC connector
The 'Remote Clock Buffer Module' connects to the IOMOD4 module via a 10-way IDC cable which
plugs into the 'Clock Buffer' connector (J4) on the IOMOD4 module.
J4
The pin-out of the 'Clock Buffer' connector (J4) is detailed in the table below.....
10way
IDC
pin #
1
Signal name
Target / Programmer VCC
supply
Target / Programmer Signal
GROUND
TVCC
2, 4,
6,8,10 GND
3
5
9
32
Signal description
CLOCK_BUFF_ENABLE Clock Buffer ENABLE signal
PROG_PDI_CLK
PROG_PDI_DATA
XMEGA PDI / ATtiny TPI
Clock signal from the
programmer (not buffered)
XMEGA PDI Bi-directional
DATA signal
Direction
Pin name on
from
target device
programmer
Passive
VCC / VDD
Passive
GND
Output
No connect
Output
XMEGA RESET
Passive
PDI_DATA
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1.5 Quick Connect - Power Connections
The 'Quick connect - POWER signals' connector (J6) is designed to allow separate wires to be
connected between the programmer and the Target System (DUT). The illustration below shows the
pin-out of this connector.
J3
Power Signal Connectors
(Quick connect)
J3 Quick Connect - Power Connections
Pin No
Connector
1
TVCC
2
GND
3
TVCC
4
VPP
5
EXT-VCC
6
GND
Description
1.6 Quick Connect - Programming signals
The 'Quick connect - Programming Signals' connectors are designed to allow separate wires to be
connected between the programmer and the Target System (DUT). The illustration below shows the
pin-out of this connector.
J6
Programming Signal
Connectors
(Quick connect)
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J6 Quick Connect - Programming Signals
Pin No
Connector
1
I/O 4
2
I/O 3
3
I/O 2
4
I/O 1
5
RESET
6
GND
Description
1.7 Configuration jumpers
The ‘IOMOD5’ module features 2 x 'Configuration jumpers' which are used to configure the module
for a selected target programming interface.
1.7.1 Configuration Jumper J2
'Configuration Jumper J2' is used to configure which 'Serial Clock' source is routed to the 10-way
'Clock Buffer' IDC connector from the programmer.
The table below illustrates the settings of 'Configuration Jumper J2'.
Jumper
position
Function
selection
Explanation of routing
Supported programming
interfaces
1-2
JTAG / SPI
Clock
Routes the JTAG - TCK / SPI - SCK
clock signal to the 'Clock Buffer'
IDC connector
•
•
JTAG - AVR, ARM etc
SPI - AVR, AT45D Serial
DataFLASH
2-3
PDI / TPI
Clock
Routes the XMEGA PDI CLK /
ATtiny TPI CLK clock signal to the
'Clock Buffer' IDC connector
•
•
XMEGA PDI
ATtiny TPI
1.7.2 Configuration Jumper J7
'Configuration Jumper J7' is used to configure the connector board for use with Atmel XMEGA PDI
or ATtiny TPI target devices. The jumper connects the programmer UART TRANSMIT and RECEIVE
pins together via a 470 ohm resistor to allow bi-direction communications on a single pin. mmer.
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The table below illustrates the settings of 'Configuration Jumper J7'.
Jumper
position
Function
selection
Explanation of function
Supported programming
interfaces
1-2
Programmer
UART
TRANSMIT
and RECEIVE
Shorted
together
Routes the JTAG - TCK / SPI - SCK
clock signal to the 'Clock Buffer'
IDC connector
•
•
XMEGA PDI
ATtiny TPI
NOT
FITTED
None
Use this selection for all devices
except XMEGA PDI and ATtiny TPI
•
Suitable for use with all
devices except for
XMEGA PDI and ATtiny
TPI
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Appendix 5 – IOMOD5 Module
1.0 Overview
The ‘IOMOD5’ module is designed to allow a remote 'Clock Buffer Module' to be connected to an
'ISPnano Series 4' or 'ISPnano-MUX' programmer. The module features a 10-way 'Clock Buffer' IDC
connector which is used to directly connect to a remote 'Clock Buffer Module' via any length of 10way ribbon cable.
1.1 Module main features
The main features of the ‘IOMOD5’ module are as follows….
• Supports direct connection of a remote 'Clock Buffer Module' via a 10-way IDC plug
• Supports buffering of SPI, JTAG, XMEGA PDI and ATtiny TPI 'Serial Clock' signals
• The remote 'Clock Buffer Module' can be connected via any suitable length of ribbon cable
to the 10-way IDC plug.
• User configurable clock signal routing - a simple jumper selection allows either the 'SPI - SCK',
'JTAG - TCK' or 'XMEGA PDI CLK' serial clock signal to be routed from the programmer to
the 'Buffered clock input' on the remote 'Clock Buffer Module'.
• Power signals TVCC, TVPP, EVCC are switched via relays
• Quick-connect connector for connecting programmer I/O pins 1..4 and RESET
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
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1.2 Principle of operation
The ‘IOMOD5’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect a remote 'Clock Buffer Module' via the 10-way IDC plug labelled 'Clock Buffer'
• Manually connect any power and GROUND signals required between the programmer and the
DUT
• Set the 'Configuration jumpers' to select the correct 'Serial clock source' to match the target
programming interface ie. SPI, JTAG, PDI / TPI
1.3 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD5’ module.
Picture
Annotation
number
Description
1
Quick connect connector (J6)
for programmer I/O signals
2
Quick connect connector (J5) for programmer
POWER signals
3
TVCC LED Indicator
4
Relays
(for switching TVCC, TVPP, E-VCC)
5
Remote 'Clock Buffer' connector
6
Configuration jumper
7
Configuration jumper
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1.4 Quick Connect - Power Connections
The 'Quick connect - POWER signals' connector (J6) is designed to allow separate wires to be
connected between the programmer and the Target System (DUT). The illustration below shows the
pin-out of this connector.
J5
Power Signal Connectors
(Quick connect)
J6 Quick Connect - Power Connections
Pin No
Connector
1
TVCC
2
GND
3
TVCC
4
GND
5
E-VCC
6
GND
Description
1.5 Quick Connect - Programming signals
The 'Quick connect - Programming Signals' connectors are designed to allow separate wires to be
connected between the programmer and the Target System (DUT). The illustration below shows the
pin-out of this connector.
J6
38
Programming Signal
Connectors
(Quick connect)
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
J6 Quick Connect - Programming Signals
Pin No
Connector
1
I/O 4
2
I/O 3
3
I/O 2
4
I/O 1
5
RESET
6
GND
Description
1.6 Configuration jumpers
The ‘IOMOD5’ module features 2 x 'Configuration jumpers' which are used to configure the module
for a selected target programming interface.
1.6.1 Configuration Jumper J2
'Configuration Jumper J2' is used to configure which 'Serial Clock' source is routed to the 10-way
'Clock Buffer' IDC connector from the programmer.
The table below illustrates the settings of 'Configuration Jumper J2'.
Jumper
position
Function
selection
Explanation of routing
Supported programming
interfaces
1-2
JTAG / SPI
Clock
Routes the JTAG - TCK / SPI - SCK
clock signal to the 'Clock Buffer'
IDC connector
•
•
JTAG - AVR, ARM etc
SPI - AVR, AT45D Serial
DataFLASH
2-3
PDI / TPI
Clock
Routes the XMEGA PDI CLK /
ATtiny TPI CLK clock signal to the
'Clock Buffer' IDC connector
•
•
XMEGA PDI
ATtiny TPI
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1.6.2 Configuration Jumper J7
'Configuration Jumper J7' is used to configure the connector board for use with Atmel XMEGA PDI
or ATtiny TPI target devices. The jumper connects the programmer UART TRANSMIT and RECEIVE
pins together via a 470 ohm resistor to allow bi-direction communications on a single pin. mmer.
The table below illustrates the settings of 'Configuration Jumper J7'.
Jumper
position
Function
selection
Explanation of function
Supported programming
interfaces
1-2
Programmer
UART
TRANSMIT
and RECEIVE
Shorted
together
Routes the JTAG - TCK / SPI - SCK
clock signal to the 'Clock Buffer'
IDC connector
•
•
XMEGA PDI
ATtiny TPI
NOT
FITTED
None
Use this selection for all devices
except XMEGA PDI and ATtiny TPI
•
Suitable for use with all
devices except for
XMEGA PDI and ATtiny
TPI
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41
Appendix 6 – IOMOD6 Module
1.0 Overview
The ‘IOMOD6’ module is designed to allow simple interfacing to any 'Target boards' or 'PCBAs'
which feature standard ISP connectors from Atmel, Equinox or Sigma Designs. This module features
the standard Atmel AVR 6-way SPI and 10-way JTAG IDC connectors making it ideal for quick and
simple interfacing to most AVR based 'Target boards' .
1.1 Module main features
The main features of the ‘IOMOD6’ module are as follows….
• Standard Atmel AVR 6-way 0.1" IDC SPI (ISP) connector
• Standard Atmel AVR 10-way 0.1" IDC JTAG connector
• Standard Equinox Generic 10-way 0.1" SPI / UART IDC connector
• Power signals TVCC, TVPP, EVCC are switched via relays
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
• ESD and over-voltage protection on programmer I/O pins IO1...IO4
1.2 Programmer compatibility
The ‘IOMOD6’ module is compatible with the following programmers….
• ISPnano Series IV ATE
• ISPnano-MUX 2 / 4 / 8
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1.3 Typical application / use
The ‘IOMOD6’ module is typical used to….
• Connect a programmer to an Atmel AVR 'Target Board' which features the Atmel 6-way IDC
connector
• Connect a programmer to an Atmel AVR 'Target Board' which features the Atmel 10-way IDC
JTAG connector (same connector as used on the Atmel JTAG ICE MK2 / 3 / 4)
• Connect a programmer to any Sigma Designs (Zensys) ZW100 / 200 / 300 'Target Board'
which features the Equinox 10-way 0.1" IDC SPI connector
1.4 Principle of operation
The ‘IOMOD6’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect a suitable 6-way or 10-way 'IDC cable' to the relevant 'IDC Header' on the module
• Manually connect any power and GROUND signals required between the programmer and the
DUT to the 'Quick Connect' connector block.
1.5 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD5’ module.
Picture
Annotation
number
Description
1
Atmel 6-way SPI Header (J6)
2
Quick connect connector (J5)
for programmer I/O signals
3
TVCC LED Indicator
4
Relays
(for switching TVCC, TVPP, E-VCC)
5
Equinox 10-way Header (J3)
6
Atmel 10-way JTAG Header (J2)
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1.6 IOMOD6 Header Pin-outs
10-way Equinox Header (J3)
10-way Atmel JTAG Header (J2)
6-way Atmel SPI Header (ISP)
(J6)
1.7 ISP Cable considerations
The programmer is supplied with a single 10-way ISP Cable as standard. This cable is terminated
with a 10-way IDC 0.1” female polarised plug at each end. The cable is wired as a so-called ‘straighthrough’ cable with pin 1-1, 2-2 etc. The polarised ISP Header ensures that the ISP Cable cannot be
plugged in the wrong way around by mistake. If you are planning to design such a header onto your
Target System, it is strongly recommended that a similar polarised header is used. This will help to
prevent accidental damage to both the programmer and the Target System.
Pin 1 of the ISP cable can be determined by looking for a small arrow on the plastic part of the ISP
female plug. If the cable has a RED stripe on one cable, this usually also indicates pin 1.
If you are using the programmer in a production environment and constantly plugging / unplugging the
ISP cable into/from the Target System, you may find that the cable eventually fails. Spare ISP cables
can be ordered from Equinox in this eventuality.
44
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
1.8 Quick Connect Connections
The 'Quick connect' connectors are designed to allow separate wires to be connected between the
programmer and the Target System (DUT). The illustration below shows the pin-out of this connector.
J5
Power Connectors
(Quick connect)
J5 Quick Connect - Power Connectors
Pin No
Connector
1
TVCC
2
GND
3
TVCC
4
VPP
5
E-VCC
6
GND
Description
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Appendix 7 – IOMOD7 Module
1.0 Overview
The ‘IOMOD7’ module is designed to allow simple interfacing to any 'Target boards' or 'PCBAs'
which feature standard ISP connectors from Atmel, Equinox or Sigma Designs. This module features
the standard Atmel AVR 6-way SPI and 10-way JTAG IDC connectors making it ideal for quick and
simple interfacing to most AVR based 'Target boards' .
1.1 Module main features
The main features of the ‘IOMOD7’ module are as follows….
• Standard Atmel AVR 6-way 0.1" IDC SPI (ISP) connector
• Standard Atmel AVR 10-way 0.1" IDC JTAG connector
• Standard Equinox Generic 10-way 0.1" SPI / UART IDC connector
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
• ESD and over-voltage protection on programmer I/O pins IO1...IO4
1.2 Programmer compatibility
The ‘IOMOD7’ module is compatible with the following programmers….
• ISPnano Series III
1.3 Typical application / use
The ‘IOMOD7’ module is typical used to….
• Connect a programmer to an Atmel AVR 'Target Board' which features the Atmel 6-way IDC
connector
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•
•
Connect a programmer to an Atmel AVR 'Target Board' which features the Atmel 10-way IDC
JTAG connector (same connector as used on the Atmel JTAG ICE MK2 / 3 / 4)
Connect a programmer to any Sigma Designs (Zensys) ZW100 / 200 / 300 'Target Board'
which features the Equinox 10-way 0.1" IDC SPI connector
1.4 Principle of operation
The ‘IOMOD7’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect a suitable 6-way or 10-way 'IDC cable' to the relevant 'IDC Header' on the module
• Manually connect any power and GROUND signals required between the programmer and the
DUT to the 'Quick Connect' connector block.
1.5 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD7’ module.
Picture
Annotation
number
Description
1
Quick connect connector (J5)
for programmer I/O signals
2
Configuration jumper (J7)
3
TVCC LED Indicator
4
Equinox 10-way Header (J3)
5
Atmel 10-way JTAG Header (J2)
6
Atmel 6-way SPI Header (J6)
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1.6 IOMOD6 Header Pinouts
10-way Equinox Header (J3)
10-way Atmel JTAG Header (J2)
6-way Atmel SPI Header (ISP)
(J6)
1.7 ISP Cable considerations
The programmer is supplied with a single 10-way ISP Cable as standard. This cable is terminated
with a 10-way IDC 0.1” female polarised plug at each end. The cable is wired as a so-called ‘straighthrough’ cable with pin 1-1, 2-2 etc. The polarised ISP Header ensures that the ISP Cable cannot be
plugged in the wrong way around by mistake. If you are planning to design such a header onto your
Target System, it is strongly recommended that a similar polarised header is used. This will help to
prevent accidental damage to both the programmer and the Target System.
Pin 1 of the ISP cable can be determined by looking for a small arrow on the plastic part of the ISP
female plug. If the cable has a RED stripe on one cable, this usually also indicates pin 1.
If you are using the programmer in a production environment and constantly plugging / unplugging the
ISP cable into/from the Target System, you may find that the cable eventually fails. Spare ISP cables
can be ordered from Equinox in this eventuality.
48
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1.8 Quick Connect Connections
The 'Quick connect' connectors are designed to allow separate wires to be connected between the
programmer and the Target System (DUT). The illustration below shows the pin-out of this connector.
J5
Power Connectors
(Quick connect)
J5 Quick Connect - Power Connectors
Pin No
Connector
1
TVCC
2
GND
3
TVCC
4
VPP
5
E-VCC
6
GND
Description
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Appendix 8 – IOMOD8 Module
1.0 Overview
The ‘IOMOD8’ module is designed to allow any ARM Target System with a 10-way 0.05" connector to
be interfaced to an ISPnano programmer. The module also features a Quick Connect connector
allowing all the power signals to be connected to the programmer.
1.1 Module main features
The main features of the ‘IOMOD8’ module are as follows….
• Features 10-way 0.05" ARM connector
• Configuration jumper J2 to select either 'SWD' or 'JTAG' interface
• Power signals TVCC, TVPP, EVCC are switched via relays
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
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1.2 Principle of operation
The ‘IOMOD8’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect an ARM Target System (DUT) to the 10-way connector
• Set the configuration jumper J2 to select either 'SWD' or 'JTAG' interface
• Manually connect any power and GROUND signals required between the programmer and the
DUT
1.3 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD8’ module.
Picture
Annotation
number
Description
1
SWD / JTAG Configuration jumper (J2)
2
Quick connect connector (J5) for programmer
POWER signals
3
TVCC Power Status - LED Indicator
4
Relays
(for switching TVCC, TVPP, E-VCC)
5
10-way ARM 0.05" Header (J3)
1.4 Quick Connect Connections (Power signals)
The 'Quick connect' connectors are designed to allow separate wires to be connected between the
programmer and the Target System (DUT). The illustration below shows the pin-out of this connector.
J5
Power Connectors
(Quick connect)
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1.5 10-way ARM 0.05" Header (J3)
The
JTAG
J3
10-way ARM 0.05" Header
SWD
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Appendix 9 – IOMOD9 Module
1.0 Overview
The ‘IOMOD9’ module is designed to interface an ISPnano programmer to any ARM Target System
(DUT) which features the generic ARM 20-way IDC connector.
1.1 Module main features
The main features of the ‘IOMOD9’ module are as follows….
• Features 20-way 0.1" generic ARM debug header / connector
• Configuration jumper J2 to select either 'SWD' or 'JTAG' interface
• Power signals TVCC, TVPP, EVCC are switched via relays
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
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1.2 Principle of operation
The ‘IOMOD9’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect an ARM Target System (DUT) to the 20-way connector
• Set the configuration jumper J2 to select either 'SWD' or 'JTAG' interface
• Manually connect any power and GROUND signals required between the programmer and the
DUT
1.3 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD9’ module.
Picture
Annotation
number
Description
1
SWD / JTAG - configuration jumper (J2)
2
Quick connect connector (J5) for programmer
POWER signals
3
TVCC Power Status - LED Indicator
4
Relays
(for switching TVCC, TVPP, E-VCC)
5
20-way ARM 0.1" IDC Header (J3)
1.4 Quick Connect Connections (Power signals)
The 'Quick connect' connectors are designed to allow separate wires to be connected between the
programmer and the Target System (DUT). The illustration below shows the pin-out of this connector.
J5
54
Power Connectors
(Quick connect)
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
1.5 20-way ARM 0.1" IDC Header (J3)
The
JTAG
J3
10-way ARM 0.05" Header
SWD
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Appendix 10 – IOMOD10F - Sigma Calibration
Module (Fixed frequency)
1.0 Overview
The ‘IOMOD10’ module has been specially designed to support 'XTAL calibration' of Sigma
Designs Z-Wave 500 series ICs and modules. The module generates a very accurate 'Calibration
frequency' which can be switched to the target Z-Wave device under programmer control.
1.1 Module main features
The main features of the ‘IOMOD10’ module are as follows….
• Generates a very accurate 'Calibration frequency' for use during the 'XTAL calibration'
process of a Sigma Z-Wave 500 series device
• The 'Calibration frequency' can be switched to the target device under programmer control
• Quick-connect connector for connecting programmer I/O pins 1..4 (SPI or UART pins) and
RESET
• Quick-connect connector for connecting power signals TVCC, TVPP, E-VCC
• 10-way IDC connector (Equinox pin-out) to allow direct connection to any Z-Wave evaluation
board
• 'Target Power' LED - illuminates when the programmer switches the TVCC supply on
• The 'Calibration frequency' can be output on either the programmer MOSI or MISO pin
(jumper selectable)
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1.2 Principle of operation
The ‘IOMOD10’ module is designed to operate as follows:
• Plug the module into the programmer
• Connect the 'Z-Wave Target System (DUT)' to either the 'Quick connect' connector (via
wires) or to the 10-way IDC connector via a 10-way ribbon cable.
• Manually connect any power and GROUND signals required between the programmer and the
Target Board (DUT)
• Set the 'Calibration Clock Output Pin Select' (LK2) configuration jumpers to select which pin
the 'Calibration frequency' is output on.
1.3 Fitting the IOMOD10 module to the programmer
The ‘IOMOD10’ module fits onto the 'ISPnano Series 4 ATE' programmer as shown in the picture
below.....
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57
1.4 Powering the IOMOD10 module
A programming / calibration system using the 'ISPnano Series 4 ATE' and the 'IOMOD10 Oscillator Calibration Module', requires TWO independent power supplies. One power supply is for
the ISPanno programmer and the other power supply is for the IOMOD10 module.
The IOMOD10 connector module must be powered by an external 3.3V DC power supply. The
external supply is required because the 'OXCO - Oscillator Module' on the IOMOD10 module takes
around 600mA at 3.3V and must have a accurate current-limited supply.
The illustration below shows the two independent power supply connections.........
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The illustration below shows how to connect an external power supply to the IOMOD10 module via a
2.1 mm centre positive jack socket.
Please note:
A suitable 3.3V DC regulated @ 1A power supply for use with this module is available from Equinox.
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1.5 Hardware layout
The table below shows the relevant hardware items on the ‘IOMOD10’ module.
Picture
Annotation
number
Description
1
TVCC Target Power Status
2
Enable Calibration Output (Manual)
3
Programming Calibration Signals
(Equinox 10-way 0.1" IDC Connector)
Calibration Clock Output Pin Select
4
60
5
Programming Calibration Signals
(Quick connect)
6
DC Power Input
(2-way Molex or 2.5mm Jack Socket)
7
Power Connectors
(Quick connect)
8
TVCC Status LED Enable
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1.6 IOMOD10 module connector overview
The connectors on the IOMOD10 module are detailed in the table below.
SPI Interface pin-out
J5
Equinox Standard
10-way Box Header
J6
Programming Calibration
Signals
(Quick connect)
J8
Power Connectors
(Quick connect)
UART interface pin-out
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1.7 Configuration jumpers
The ‘IOMOD10’ module features 2 x 'Configuration jumpers' which are used to configure the
module for the programming application.
1.7.1 Configuration Jumper LK1 - Enable Calibration Output
The jumper link LK1 is used to manually force the 'Calibration frequency' to be output from the
module. This bypasses the programmer control and can be used to manually test the output
frequency of the module.
Please refer to the table below which shows the settings for this jumper link.
Jumper
position
Selected function
Not fitted
Calibration frequency output is controlled by the
programmer (via OP5 pin)
Fitted
Calibration frequency is permanently output (only use
this settings for test purposes)
1.7.2 Configuration Jumper LK2 - Calibration Clock Output Pin Select
The LK2 jumper link is used to select which pin the 'Calibration frequency' will be output on.
Please refer to the table below which shows the settings for this jumper link.
Jumper
position
Jumper setting
Calibration frequency
output pin
1-2
MISO / RXD
2-3
MOSI / TXD (default setting)
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1.7.3 Configuration Jumper LK3 - TVCC ON - Status LED
The jumper link LK3 enables the 'TVCC Status LED' . When the programmer switches on the target
power supply (TVCC), the 'TVCC ON' LED will switch on.
Please refer to the table below which shows the settings for this jumper link.
Jumper
position
Selected function
Not fitted
TVCC LED will be permanently off
Fitted
TVCC LED will be switch on when the programmer
TVCC supply is enabled
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1.8 Connecting to a Target Board via the SPI interface
The illustration below shows how to connect the IOMOD10 module to a Target Board (DUT) via the
SPI interface.
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1.9 Connecting to a Target Board via the UART interface
The illustration below shows how to connect the IOMOD10 module to a Target Board (DUT) via the
UART interface.
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65
Appendix 11 - ISP Cable considerations
The programmer is supplied with a single 10-way ISP Cable as standard. This cable is terminated
with a 10-way IDC 0.1” female polarised plug at each end. The cable is wired as a so-called ‘straighthrough’ cable with pin 1-1, 2-2 etc. The polarised ISP Header ensures that the ISP Cable cannot be
plugged in the wrong way around by mistake. If you are planning to design such a header onto your
Target System, it is strongly recommended that a similar polarised header is used. This will help to
prevent accidental damage to both the programmer and the Target System.
Pin 1 of the ISP cable can be determined by looking for a small arrow on the plastic part of the ISP
female plug. If the cable has a RED stripe on one cable, this usually also indicates pin 1.
If you are using the programmer in a production environment and constantly plugging / unplugging the
ISP cable into/from the Target System, you may find that the cable eventually fails. Spare ISP cables
can be ordered from Equinox in this eventuality.
66
IO-MOD Connector Modules for ISPnano Programmers - User Manual - V1.15 – 13/06/2014
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