315-2AG12
VIPA System 300S CPU
CPU | 315-2AG12 | Manual
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA GmbH
Ohmstr. 4
91074 Herzogenaurach
Telephone: +49 9132 744-0
Fax: +49 9132 744-1864
email: info@vipa.com
Internet: www.vipa.com
315-2AG12_000_CPU 315SB/DPM,1,GB - © 2014
VIPA System 300S CPU
Table of contents
Table of contents
1
General......................................................................................
1.1 Copyright © VIPA GmbH ...................................................
1.2 About this manual..............................................................
1.3 Safety information..............................................................
2
Basics....................................................................................... 9
2.1 Safety information for users............................................... 9
2.2 Operating structure of a CPU............................................. 9
2.2.1 General........................................................................... 9
2.2.2 Applications .................................................................. 10
2.2.3 Operands...................................................................... 10
2.3 CPU 315-2AG12.............................................................. 11
2.4 General data.................................................................... 13
3
Assembly and installation guidelines..................................
3.1 Installation dimensions.....................................................
3.2 Assembly standard bus....................................................
3.3 Cabling.............................................................................
3.4 Installation guidelines.......................................................
16
16
17
18
21
4
Hardware description............................................................
4.1 Properties.........................................................................
4.2 Structure...........................................................................
4.2.1 General.........................................................................
4.2.2 Interfaces......................................................................
4.2.3 Memory management...................................................
4.2.4 Storage media slot .......................................................
4.2.5 Battery backup for clock and RAM................................
4.2.6 Operating mode switch.................................................
4.2.7 LEDs.............................................................................
4.3 Technical data..................................................................
24
24
25
25
25
27
27
27
28
28
30
5
Deployment CPU 315-2AG12................................................
5.1 Assembly..........................................................................
5.2 Start-up behavior..............................................................
5.3 Addressing.......................................................................
5.3.1 Overview.......................................................................
5.3.2 Addressing Backplane bus I/O devices.........................
5.4 Hardware configuration - CPU.........................................
5.5 Hardware configuration - I/O modules.............................
5.6 Hardware configuration - Ethernet PG/OP channel.........
5.7 Hardware configuration - Communication........................
5.8 Setting standard CPU parameters...................................
5.8.1 Parametrization via Siemens CPU................................
5.8.2 Parameters CPU...........................................................
5.8.3 Parameters for DP........................................................
5.8.4 Parameters for MPI/DP ................................................
5.9 Setting VIPA specific CPU parameters............................
5.9.1 Proceeding....................................................................
5.9.2 VIPA specific parameters..............................................
5.10 Project transfer...............................................................
37
37
37
38
38
38
39
40
41
43
43
43
43
46
46
47
47
49
52
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5
5
6
7
3
Table of contents
VIPA System 300S CPU
5.10.1 Transfer via MPI/PROFIBUS......................................
5.10.2 Transfer via Ethernet...................................................
5.10.3 Transfer via MMC........................................................
5.11 Access to the internal Web page...................................
5.12 Operating modes............................................................
5.12.1 Overview.....................................................................
5.12.2 Function security.........................................................
5.13 Overall reset...................................................................
5.14 Firmware update............................................................
5.15 Reset to factory setting..................................................
5.16 Slot for storage media....................................................
5.17 Memory extension with MCC.........................................
5.18 Extended know-how protection......................................
5.19 MMC-Cmd - Auto commands.........................................
5.20 VIPA specific diagnostic entries.....................................
5.21 Control and monitoring of variables with test functions..
4
52
54
55
56
58
58
60
60
62
64
65
66
67
68
70
86
6
Deployment PtP communication.......................................... 88
6.1 Fast introduction............................................................... 88
6.2 Principle of the data transfer............................................ 89
6.3 Deployment of RS485 interface for PtP .......................... 89
6.4 Parametrization................................................................ 92
6.4.1 FC/SFC 216 - SER_CFG.............................................. 92
6.5 Communication................................................................ 95
6.5.1 Overview....................................................................... 95
6.5.2 FC/SFC 217 - SER_SND.............................................. 96
6.5.3 FC/SFC 218 - SER_RCV............................................ 101
6.6 Protocols and procedures ............................................. 103
6.7 Modbus - Function codes .............................................. 107
6.8 Modbus - Example communication................................ 112
7
Deployment PROFIBUS communication...........................
7.1 Overview........................................................................
7.2 Fast introduction.............................................................
7.3 Hardware configuration - CPU.......................................
7.4 Deployment as PROFIBUS DP master..........................
7.5 Deployment as PROFIBUS DP slave............................
7.6 PROFIBUS installation guidelines..................................
7.7 Commissioning and Start-up behavior...........................
115
115
115
116
117
118
120
123
8
WinPLC7...............................................................................
8.1 System conception.........................................................
8.2 Installation......................................................................
8.3 Example project engineering..........................................
8.3.1 Job definition...............................................................
8.3.2 Project engineering.....................................................
8.3.3 Test the PLC program in the Simulator.......................
8.3.4 Transfer PLC program to CPU and its execution........
125
125
125
127
127
127
133
134
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
General
Copyright © VIPA GmbH
1
General
1.1 Copyright © VIPA GmbH
All Rights Reserved
This document contains proprietary information of VIPA and is not to
be disclosed or used except in accordance with applicable agreements.
This material is protected by the copyright laws. It may not be reproduced, distributed, or altered in any fashion by any entity (either
internal or external to VIPA), except in accordance with applicable
agreements, contracts or licensing, without the express written consent of VIPA and the business management owner of the material.
For permission to reproduce or distribute, please contact: VIPA,
Gesellschaft für Visualisierung und Prozessautomatisierung mbH
Ohmstraße 4, D-91074 Herzogenaurach, Germany
Tel.: +49 9132 744 -0
Fax.: +49 9132 744-1864
EMail: info@vipa.de
http://www.vipa.com
Every effort has been made to ensure that the information
contained in this document was complete and accurate at
the time of publishing. Nevertheless, the authors retain the
right to modify the information.
This customer document describes all the hardware units
and functions known at the present time. Descriptions may
be included for units which are not present at the customer
site. The exact scope of delivery is described in the
respective purchase contract.
CE Conformity Declaration
Hereby, VIPA GmbH declares that the products and systems are in
compliance with the essential requirements and other relevant provisions. Conformity is indicated by the CE marking affixed to the
product.
Conformity Information
For more information regarding CE marking and Declaration of Conformity (DoC), please contact your local VIPA customer service
organization.
HB140 | CPU | 315-2AG12 | GB | 14-40
5
General
VIPA System 300S CPU
About this manual
Trademarks
VIPA, SLIO, System 100V, System 200V, System 300V, System
300S, System 400V, System 500S and Commander Compact are
registered trademarks of VIPA Gesellschaft für Visualisierung und
Prozessautomatisierung mbH.
SPEED7 is a registered trademark of profichip GmbH.
SIMATIC, STEP, SINEC, TIA Portal, S7-300 and S7-400 are registered trademarks of Siemens AG.
Microsoft and Windows are registered trademarks of Microsoft Inc.,
USA.
Portable Document Format (PDF) and Postscript are registered trademarks of Adobe Systems, Inc.
All other trademarks, logos and service or product marks specified
herein are owned by their respective companies.
Information product
support
Contact your local VIPA Customer Service Organization representative if you wish to report errors or questions regarding the contents of
this document. If you are unable to locate a customer service centre,
contact VIPA as follows:
VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany
Telefax: +49 9132 744-1204
EMail: documentation@vipa.de
Technical support
Contact your local VIPA Customer Service Organization representative if you encounter problems with the product or have questions
regarding the product. If you are unable to locate a customer service
centre, contact VIPA as follows:
VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany
Tel.: +49 9132 744-1150 (Hotline)
EMail: support@vipa.de
1.2 About this manual
Objective and contents
Product
315SB/DPM
This manual describes the SPEED7 CPU 315-2AG12 of the CPU
from VIPA. It contains a description of the construction, project implementation and usage.
Order number
315-2AG12
as of state:
CPU-HW
CPU-FW
DPM-FW
02
V3.6.0
V3.3.0
Target audience
The manual is targeted at users who have a background in automation technology.
Structure of the manual
The manual consists of chapters. Every chapter provides a self-contained description of a specific topic.
6
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
General
Safety information
Guide to the document
The following guides are available in the manual:
n An overall table of contents at the beginning of the manual
n References with page numbers
Availability
The manual is available in:
n printed form, on paper
n in electronic form as PDF-file (Adobe Acrobat Reader)
Icons Headings
Important passages in the text are highlighted by following icons and
headings:
DANGER!
Immediate or likely danger. Personal injury is possible.
CAUTION!
Damages to property is likely if these warnings are not
heeded.
Supplementary information and useful tips.
1.3 Safety information
Applications conforming with specifications
The system is constructed and produced for:
n communication and process control
n industrial applications
n operation within the environmental conditions specified in the
technical data
n installation into a cubicle
DANGER!
This device is not certified for applications in
– in explosive environments (EX-zone)
Documentation
The manual must be available to all personnel in the
n
n
n
n
project design department
installation department
commissioning
operation
HB140 | CPU | 315-2AG12 | GB | 14-40
7
General
VIPA System 300S CPU
Safety information
CAUTION!
The following conditions must be met before using or
commissioning the components described in this
manual:
– Hardware modifications to the process control system
should only be carried out when the system has been
disconnected from power!
– Installation and hardware modifications only by properly trained personnel.
– The national rules and regulations of the respective
country must be satisfied (installation, safety, EMC ...)
Disposal
8
National rules and regulations apply to the disposal of the unit!
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VIPA System 300S CPU
Basics
Operating structure of a CPU > General
2
Basics
2.1 Safety information for users
Handling of electrostatic sensitive modules
VIPA modules make use of highly integrated components in MOSTechnology. These components are extremely sensitive to over-voltages that can occur during electrostatic discharges. The following
symbol is attached to modules that can be destroyed by electrostatic
discharges.
The Symbol is located on the module, the module rack or on packing
material and it indicates the presence of electrostatic sensitive equipment. It is possible that electrostatic sensitive equipment is destroyed
by energies and voltages that are far less than the human threshold
of perception. These voltages can occur where persons do not discharge themselves before handling electrostatic sensitive modules
and they can damage components thereby, causing the module to
become inoperable or unusable. Modules that have been damaged
by electrostatic discharges can fail after a temperature change,
mechanical shock or changes in the electrical load. Only the consequent implementation of protection devices and meticulous attention
to the applicable rules and regulations for handling the respective
equipment can prevent failures of electrostatic sensitive modules.
Shipping of modules
Modules must be shipped in the original packing material.
Measurements and
alterations on electrostatic sensitive modules
When you are conducting measurements on electrostatic sensitive
modules you should take the following precautions:
n Floating instruments must be discharged before use.
n Instruments must be grounded.
Modifying electrostatic sensitive modules you should only use soldering irons with grounded tips.
CAUTION!
Personnel and instruments should be grounded when
working on electrostatic sensitive modules.
2.2 Operating structure of a CPU
2.2.1 General
The CPU contains a standard processor with internal program
memory. In combination with the integrated SPEED7 technology the
unit provides a powerful solution for process automation applications
within the System 300S family. A CPU supports the following modes
of operation:
n
n
n
n
cyclic operation
timer processing
alarm controlled operation
priority based processing
HB140 | CPU | 315-2AG12 | GB | 14-40
9
Basics
VIPA System 300S CPU
Operating structure of a CPU > Operands
Cyclic processing
Cyclicprocessing represents the major portion of all the processes
that are executed in the CPU. Identical sequences of operations are
repeated in a never-ending cycle.
Timer processing
Where a process requires control signals at constant intervals you
can initiate certain operations based upon a timer, e.g. not critical
monitoring functions at one-second intervals.
Alarm controlled processing
If a process signal requires a quick response you would allocate this
signal to an alarm controlled procedure. An alarm can activate a
procedure in your program.
Priority based processing
The above processes are handled by the CPU in accordance with
their priority. Since a timer or an alarm event requires a quick reaction, the CPU will interrupt the cyclic processing when these high-priority events occur to react to the event. Cyclic processing will resume,
once the reaction has been processed. This means that cyclic processing has the lowest priority.
2.2.2 Applications
The program that is present in every CPU is divided as follows:
n System routine
n User application
System routine
The system routine organizes all those functions and procedures of
the CPU that are not related to a specific control application.
User application
This consists of all the functions that are required for the processing
of a specific control application. The operating modules provide the
interfaces to the system routines.
2.2.3 Operands
The following series of operands is available for programming the
CPU:
n
n
n
n
Process image and
periphery
The user application can quickly access the process image of the
inputs and outputs PIO/PII. You may manipulate the following types
of data:
n
n
n
n
10
Process image and periphery
Bit memory
Timers and counters
Data blocks
individual Bits
Bytes
Words
Double words
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Basics
CPU 315-2AG12
You may also gain direct access to peripheral modules via the bus
from user application. The following types of data are available:
n Bytes
n Words
n Blocks
Bit Memory
The bit memory is an area of memory that is accessible by means of
certain operations. Bit memory is intended to store frequently used
working data.
You may access the following types of data:
n
n
n
n
Timers and counters
individual Bits
Bytes
Words
Double words
In your program you may load cells of the timer with a value between
10ms and 9990s. As soon as the user application executes a startoperation, the value of this timer is decremented by the interval that
you have specified until it reaches zero.
You may load counter cells with an initial value (max. 999) and increment or decrement these when required.
Data Blocks
A data block contains constants or variables in the form of bytes,
words or double words. You may always access the current data
block by means of operands.
You may access the following types of data:
n
n
n
n
individual Bits
Bytes
Words
Double words
2.3 CPU 315-2AG12
Overview
The CPU 315-2AG12 bases upon the SPEED7 technology. This supports the CPU at programming and communication by means of coprocessors that causes a power improvement for highest needs.
n The CPU is programmed in STEPÒfrom Siemens. For this you
may use the SIMATIC Manager or TIA Portal from Siemens. Here
the instruction set of the S7-400 from Siemens is used.
n Modules and CPUs of the System 300S from VIPA and Siemens
may be used at the bus as a mixed configuration.
n The user application is stored in the battery buffered RAM or on
an additionally pluggable MMC storage module.
n The CPU is configured as CPU 318-2 (6ES7 318-2AJ00-0AB0/
V3.0) from Siemens.
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11
Basics
VIPA System 300S CPU
CPU 315-2AG12
Access
Please always use the CPU 318-2 (6ES7
318-2AJ00-0AB0/V3.0) from Siemens of the hardware
catalog to project this CPU from VIPA. For the project
engineering, a thorough knowledge of the Siemens
SIMATIC Manager and the hardware configurator is
required!
Memory
The CPU has an integrated memory. Information about the capacity
of the memory may be found at the front of the CPU. The memory is
divided into the following parts:
n
n
n
n
12
Load memory 2Mbyte
Code memory (50% of the work memory)
Data memory (50% of the work memory)
Work memory 1Mbyte
– There is the possibility to extend the work memory to its maximum printed capacity 2Mbyte by means of a MCC memory
extension card.
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Basics
General data
Integrated PROFIBUS
DP master/slave respectively PtP functionality
The CPU has a PROFIBUS/PtP interface with a fix pinout. After an
overall reset the interface is deactivated. By appropriate configuration, the following functions for this interface may be enabled:
n PROFIBUS DP master operation: Configuration via PROFIBUS
sub module with ‘Operation mode’ Master in the hardware configuration.
n PROFIBUS DP slave operation: Configuration via PROFIBUS sub
module with ‘Operation mode’ Slave in the hardware configuration.
n PtP functionality: Configuration as virtual PROFIBUS master
system by including the VIPA SPEEDBUS.GSD.
Integrated Ethernet PG/
OP channel
The CPU has an Ethernet interface for PG/OP communication. After
assigning IP address parameters with your configuration tool, via the
"PLC" functions you may directly access the Ethernet PG/OP channel
and program res. remote control your CPU. You may also access the
CPU with a visualization software via these connections.
Operation Security
n Wiring by means of spring pressure connections (CageClamps) at
the front connector
n Core cross-section 0.08...2.5mm2
n Total isolation of the wiring at module change
n Potential separation of all modules to the backplane bus
Dimensions/ Weight
Dimensions of the basic enclosure:
n 1tier width: (WxHxD) in mm: 40x125x120
Integrated power supply
The CPU comes with an integrated power supply. The power supply
is to be supplied with DC 24V. By means of the supply voltage, the
internal electronic is supplied as well as the connected modules via
backplane bus. The power supply is protected against inverse polarity
and overcurrent.
2.4 General data
Conformity and approval
Conformity
CE
2006/95/EG
Low-voltage directive
2004/108/EG
EMC directive
UL 508
Approval for USA and Canada
Approval
UL
HB140 | CPU | 315-2AG12 | GB | 14-40
13
Basics
VIPA System 300S CPU
General data
Conformity and approval
others
RoHS
2011/65/EU
Product is lead-free; Restriction of the use of
certain hazardous substances in electrical and
electronic equipment
Protection of persons and device protection
Type of protection
-
IP20
to the field bus
-
electrically isolated
to the process level
-
electrically isolated
Electrical isolation
Insulation resistance
-
Insulation voltage to reference earth
Inputs / outputs
-
AC / DC 50V, test voltage AC 500V
Protective measures
-
against short circuit
Environmental conditions to EN 61131-2
Climatic
Storage / transport
EN 60068-2-14
-25…+70°C
Horizontal installation
EN 61131-2
0…+60°C
Vertical installation
EN 61131-2
0…+60°C
Air humidity
EN 60068-2-30
RH1
Operation
(without condensation, rel. humidity 10…95%)
Pollution
EN 61131-2
Degree of pollution 2
Oscillation
EN 60068-2-6
1g, 9Hz ... 150Hz
Shock
EN 60068-2-27
15g, 11ms
Mounting place
-
In the control cabinet
Mounting position
-
Horizontal and vertical
Mechanical
Mounting conditions
14
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VIPA System 300S CPU
Basics
General data
EMC
Standard
Comment
Emitted interference
EN 61000-6-4
Class A (Industrial area)
Noise immunity
EN 61000-6-2
Industrial area
zone B
EN 61000-4-2
ESD
8kV at air discharge (degree of severity 3),
4kV at contact discharge (degree of severity
2)
EN 61000-4-3
HF field immunity (casing)
80MHz … 1000MHz, 10V/m, 80% AM (1kHz)
1.4GHz ... 2.0GHz, 3V/m, 80% AM (1kHz)
2GHz ... 2.7GHz, 1V/m, 80% AM (1kHz)
EN 61000-4-6
HF conducted
150kHz … 80MHz, 10V, 80% AM (1kHz)
EN 61000-4-4
Burst, degree of severity 3
EN 61000-4-5
Surge, installation class 3 *
*) Due to the high-energetic single pulses with Surge an appropriate external protective circuit with lightning protection elements like conductors
for lightning and overvoltage is necessary.
HB140 | CPU | 315-2AG12 | GB | 14-40
15
Assembly and installation guidelines
VIPA System 300S CPU
Installation dimensions
3
Assembly and installation guidelines
3.1 Installation dimensions
Dimensions Basic
enclosure
1tier width (WxHxD) in mm: 40 x 125 x 120
Dimensions
Installation dimensions
16
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VIPA System 300S CPU
Assembly and installation guidelines
Assembly standard bus
3.2 Assembly standard bus
General
Profile rail
The single modules are directly installed on a profile rail and connected via the backplane bus connector. Before installing the modules you have to clip the backplane bus connector to the module from
the backside. The backplane bus connector is delivered together with
the peripheral modules.
Order number
A
B
C
390-1AB60
160
140
10
390-1AE80
482
466
8.3
390-1AF30
530
500
15
390-1AJ30
830
800
15
390-9BC00*
2000
Drillings only left
15
*) Unit pack: 10 pieces
Measures in mm
Bus connector
For the communication between the modules the System 300S uses
a backplane bus connector. Backplane bus connectors are included
in the delivering of the peripheral modules and are clipped at the
module from the backside before installing it to the profile rail.
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17
Assembly and installation guidelines
VIPA System 300S CPU
Cabling
Assembly possibilities
Please regard the allowed environment temperatures:
n horizontal assembly: from 0 to 60°C
n vertical assembly: from 0 to 40°C
n lying assembly: from 0 to 40°C
Approach
1.
Bolt the profile rail with the background (screw size: M6), so that
you still have minimum 65mm space above and 40mm below
the profile rail.
2.
If the background is a grounded metal or device plate, please
look for a low-impedance connection between profile rail and
background.
3.
Connect the profile rail with the protected earth conductor. For
this purpose there is a bolt with M6-thread.
4.
The minimum cross-section of the cable to the protected earth
conductor has to be 10mm2.
5.
Stick the power supply to the profile rail and pull it to the left side
to the grounding bolt of the profile rail.
6.
Fix the power supply by screwing.
7.
Take a backplane bus connector and click it at the CPU from the
backside like shown in the picture.
8.
Stick the CPU to the profile rail right from the power supply and
pull it to the power supply.
9.
Click the CPU downwards and bolt it like shown.
10. Repeat this procedure with the peripheral modules, by clicking a
backplane bus connector, stick the module right from the modules you've already fixed, click it downwards and connect it with
the backplane bus connector of the last module and bolt it.
3.3 Cabling
CAUTION!
– The power supplies must be released before installation and repair tasks, i.e. before handling with the
power supply or with the cabling you must disconnect
current/voltage (pull plug, at fixed connection switch off
the concerning fuse)!
– Installation and modifications only by properly trained
personnel!
18
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VIPA System 300S CPU
Assembly and installation guidelines
Cabling
CageClamp technology
(green)
For the cabling of power supply of a CPU, a green plug with CageClamp technology is deployed. The connection clamp is realized as
plug that may be clipped off carefully if it is still cabled.
Here wires with a cross-section of 0.08mm2 to 2.5mm2 may be connected. You can use flexible wires without end case as well as stiff
wires.
1 Test point for 2mm test tip
2 Locking (orange) for screwdriver
3 Round opening for wires
The picture on the left side shows the cabling step by step from top
view.
Front connectors of the
in-/output modules
1.
For cabling you push the locking vertical to the inside with a
suiting screwdriver and hold the screwdriver in this position.
2.
Insert the de-isolated wire into the round opening. You may use
wires with a cross-section from 0.08mm2 to 2.5mm2
3.
By removing the screwdriver the wire is connected safely with
the plug connector via a spring.
In the following the cabling of the two variants are shown.
HB140 | CPU | 315-2AG12 | GB | 14-40
19
Assembly and installation guidelines
VIPA System 300S CPU
Cabling
20pole screw connection 392-1AJ00
1.
Open the front flap of your I/O module.
2.
Bring the front connector in cabling position.
For this you plug the front connector on the module until it locks.
In this position the front connector juts out of the module and
has no contact yet.
3.
De-isolate your wires. If needed, use core end cases.
4.
Thread the included cable binder into the front connector.
5.
If you want to lead out your cables from the bottom of the
module, start with the cabling from bottom to top, res. from top
to bottom, if the cables should be led out at the top.
6.
Bolt also the connection screws of not cabled screw clamps.
7.
Fix the cable binder for the cable bundle.
8.
Push the release key at the front connector on the upper side of
the module and at the same time push the front connector into
the module until it locks.
9.
Now the front connector is electrically connected with your
module.
10. Close the front flap.
11. Fill out the labeling strip to mark the single channels and push
the strip into the front flap.
20
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VIPA System 300S CPU
Assembly and installation guidelines
Installation guidelines
40pole screw connection 392-1AM00
1.
Open the front flap of your I/O module.
2.
Bring the front connector in cabling position.
For this you plug the front connector on the module until it locks.
In this position the front connector juts out of the module and
has no contact yet.
3.
De-isolate your wires. If needed, use core end cases.
4.
If you want to lead out your cables from the bottom of the
module, start with the cabling from bottom to top, res. from top
to bottom, if the cables should be led out at the top.
5.
Bolt also the connection screws of not cabled screw clamps.
6.
Put the included cable binder around the cable bundle and the
front connector.
7.
Fix the cable binder for the cable bundle.
8.
Bolt the fixing screw of the front connector.
9.
Now the front connector is electrically connected with your
module.
10. Close the front flap.
11. Fill out the labeling strip to mark the single channels and push
the strip into the front flap.
3.4 Installation guidelines
General
The installation guidelines contain information about the interference
free deployment of a PLC system. There is the description of the
ways, interference may occur in your PLC, how you can make sure
the electromagnetic compatibility (EMC), and how you manage the
isolation.
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21
Assembly and installation guidelines
VIPA System 300S CPU
Installation guidelines
What does EMC mean?
Electromagnetic compatibility (EMC) means the ability of an electrical
device, to function error free in an electromagnetic environment
without being interfered respectively without interfering the environment.
The components of VIPA are developed for the deployment in industrial environments and meets high demands on the EMC. Nevertheless you should project an EMC planning before installing the components and take conceivable interference causes into account.
Possible interference
causes
Electromagnetic interferences may interfere your control via different
ways:
n
n
n
n
n
Electromagnetic fields (RF coupling)
Magnetic fields with power frequency
Bus system
Power supply
Protected earth conductor
Depending on the spreading medium (lead bound or lead free) and
the distance to the interference cause, interferences to your control
occur by means of different coupling mechanisms.
There are:
n
n
n
n
Basic rules for EMC
galvanic coupling
capacitive coupling
inductive coupling
radiant coupling
In the most times it is enough to take care of some elementary rules
to guarantee the EMC. Please regard the following basic rules when
installing your PLC.
n Take care of a correct area-wide grounding of the inactive metal
parts when installing your components.
– Install a central connection between the ground and the protected earth conductor system.
– Connect all inactive metal extensive and impedance-low.
– Please try not to use aluminium parts. Aluminium is easily oxidizing and is therefore less suitable for grounding.
n When cabling, take care of the correct line routing.
– Organize your cabling in line groups (high voltage, current
supply, signal and data lines).
– Always lay your high voltage lines and signal respectively data
lines in separate channels or bundles.
– Route the signal and data lines as near as possible beside
ground areas (e.g. suspension bars, metal rails, tin cabinet).
n Proof the correct fixing of the lead isolation.
– Data lines must be laid isolated.
– Analog lines must be laid isolated. When transmitting signals
with small amplitudes the one sided laying of the isolation may
be favourable.
– Lay the line isolation extensively on an isolation/protected
earth conductor rail directly after the cabinet entry and fix the
isolation with cable clamps.
– Make sure that the isolation/protected earth conductor rail is
connected impedance-low with the cabinet.
– Use metallic or metallised plug cases for isolated data lines.
22
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Assembly and installation guidelines
Installation guidelines
n In special use cases you should appoint special EMC actions.
– Consider to wire all inductivities with erase links.
– Please consider luminescent lamps can influence signal lines.
n Create a homogeneous reference potential and ground all electrical operating supplies when possible.
– Please take care for the targeted employment of the grounding
actions. The grounding of the PLC serves for protection and
functionality activity.
– Connect installation parts and cabinets with your PLC in star
topology with the isolation/protected earth conductor system.
So you avoid ground loops.
– If there are potential differences between installation parts and
cabinets, lay sufficiently dimensioned potential compensation
lines.
Isolation of conductors
Electrical, magnetically and electromagnetic interference fields are
weakened by means of an isolation, one talks of absorption. Via the
isolation rail, that is connected conductive with the rack, interference
currents are shunt via cable isolation to the ground. Here you have to
make sure, that the connection to the protected earth conductor is
impedance-low, because otherwise the interference currents may
appear as interference cause.
When isolating cables you have to regard the following:
n If possible, use only cables with isolation tangle.
n The hiding power of the isolation should be higher than 80%.
n Normally you should always lay the isolation of cables on both
sides. Only by means of the both-sided connection of the isolation
you achieve high quality interference suppression in the higher
frequency area. Only as exception you may also lay the isolation
one-sided. Then you only achieve the absorption of the lower frequencies. A one-sided isolation connection may be convenient, if:
– the conduction of a potential compensating line is not possible.
– analog signals (some mV respectively µA) are transferred.
– foil isolations (static isolations) are used.
n With data lines always use metallic or metallised plugs for serial
couplings. Fix the isolation of the data line at the plug rack. Do not
lay the isolation on the PIN 1 of the plug bar!
n At stationary operation it is convenient to strip the insulated cable
interruption free and lay it on the isolation/protected earth conductor line.
n To fix the isolation tangles use cable clamps out of metal. The
clamps must clasp the isolation extensively and have well contact.
n Lay the isolation on an isolation rail directly after the entry of the
cable in the cabinet. Lead the isolation further on to your PLC and
don't lay it on there again!
CAUTION!
Please regard at installation!
At potential differences between the grounding points,
there may be a compensation current via the isolation connected at both sides.
Remedy: Potential compensation line
HB140 | CPU | 315-2AG12 | GB | 14-40
23
Hardware description
VIPA System 300S CPU
Properties
4
Hardware description
4.1 Properties
CPU 315-2AG12
n
n
n
n
n
n
n
n
n
n
n
n
n
n
n
SPEED7 technology integrated
1Mbyte work memory integrated (512kbyte code, 512kbyte data)
Memory expandable to max. 2Mbyte (1Mbyte code, 1MByte data)
Load memory 2Mbyte
PROFIBUS DP master integrated (DP-V0, DP-V1)
MPI interface
MCC slot for external memory cards and memory extension (lockable)
Status LEDs for operating state and diagnosis
Real-time clock battery buffered
Ethernet PG/OP interface integrated
RS485 interface configurable for PROFIBUS DP master respectively
I/O address area digital/analog 8191byte
512 timer
512 counter
8192 flag byte
Ordering data
Type
Order number
Description
315SB/DPM
315-2AG12
MPI interface, card slot, real time clock, Ethernet
interface for PG/OP, PROFIBUS DP master
24
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Hardware description
Structure > Interfaces
4.2 Structure
4.2.1 General
CPU 315-2AG12
1
2
3
4
5
6
7
8
LEDs of the integrated PROFIBUS DP master
Storage media slot (lockable)
LEDs of the CPU part
Operating mode switch CPU
Slot for DC 24V power supply
Twisted pair interface for Ethernet PG/OP channel
MPI interface
PROFIBUS DP/PtP interface
Components 5 - 8 are under the front flap!
4.2.2 Interfaces
HB140 | CPU | 315-2AG12 | GB | 14-40
25
Hardware description
VIPA System 300S CPU
Structure > Interfaces
Power supply X1
The CPU has an integrated power supply:
n The power supply has to be provided with DC 24V. For this serves
the double DC 24V slot, that is underneath the flap.
n Via the power supply not only the internal electronic is provided
with voltage, but by means of the backplane bus also the connected modules.
n The power supply is protected against polarity inversion and overcurrent.
n The internal electronic is galvanically connected with the supply
voltage.
MPI interface X2
9pin SubD jack:
n The MPI interface serves for the connection between programming unit and CPU.
n By means of this the project engineering and programming happens.
n MPI serves for communication between several CPUs or between
HMIs and CPU.
n Standard setting is MPI Address 2.
Ethernet PG/OP channel
X4
8pin RJ45 jack:
PROFIBUS/PtP interface
with configurable functionality X3
9pin SubD jack:
n The RJ45 jack serves the interface to the Ethernet PG/OP
channel.
n This interface allows you to program res. remote control your
CPU, to access the internal web site or to connect a visualization.
n Configurable connections are not possible.
n For online access to the CPU via Ethernet PG/OP channel valid
IP address parameters have to be assigned to this.
The CPU has a PROFIBUS/PtP interface with a fix pinout. After an
overall reset the interface is deactivated. By appropriate configuration, the following functions for this interface may be enabled:
n PROFIBUS DP master operation
– Configuration via PROFIBUS sub module X2 (DP) with
‘Operation mode’ master in the hardware configuration.
n PROFIBUS DP slave operation
– Configuration via PROFIBUS sub module X2 (DP) with
‘Operation mode’ slave in the hardware configuration.
n PtP functionality
– Using the PtP functionality the RS485 interface is allowed to
connect via serial point-to-point connection to different source
res. target systems.
– Here the following protocols are supported: ASCII, STX/ETX,
3964R, USS and Modbus-Master (ASCII, RTU).
– The activation of the PtP functionality happens by embedding
the SPEEDBUS.GSD from VIPA in the hardware catalog. After
the installation the CPU may be configured in a PROFIBUS
master system and here the interface may be switched to PtP
communication.
26
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Hardware description
Structure > Battery backup for clock and RAM
4.2.3 Memory management
Memory
The CPU has an integrated memory. Information about the capacity
of the memory may be found at the front of the CPU. The memory is
divided into the following parts:
n
n
n
n
Load memory 2Mbyte
Code memory (50% of the work memory)
Data memory (50% of the work memory)
Work memory 1Mbyte
– There is the possibility to extend the work memory to its maximum printed capacity 2Mbyte by means of a MCC memory
extension card.
4.2.4 Storage media slot
n As external storage medium for applications and firmware you
may use a MMC storage module (Multimedia card).
n The VIPA storage media are pre-formatted with the PC format
FAT16 and can be accessed via a card reader.
n After PowerON respectively an overall reset the CPU checks, if
there is a storage medium with data valid for the CPU.
n Push the memory card into the slot until it snaps in leaded by a
spring mechanism. This ensures contacting.
n By sliding down the sliding mechanism, a just installed memory
card can be protected against drop out.
n To remove, slide the sliding mechanism up again and push the
storage media against the spring pressure until it is unlocked with
a click.
CAUTION!
If the media was already unlocked by the spring mechanism, with shifting the sliding mechanism, a just installed
memory card can jump out of the slot!
4.2.5 Battery backup for clock and RAM
A rechargeable battery is installed on every CPU 31xS to safeguard
the contents of the RAM when power is removed. This battery is also
used to buffer the internal clock. The rechargeable battery is maintained by a charging circuit that receives its power from the internal
power supply and that maintain the clock and RAM for a max. period
of 30 days.
HB140 | CPU | 315-2AG12 | GB | 14-40
27
Hardware description
VIPA System 300S CPU
Structure > LEDs
CAUTION!
Please connect the CPU at least for 24 hours to the power
supply, so that the internal accumulator/battery is loaded
accordingly.
After a power reset and with an empty battery the CPU
starts with a BAT error and executes an overall reset. The
loading procedure is not influenced by the BAT error.
The BAT error can be deleted again, if once during power
cycle the time between switching on and off the power
supply is at least 30sec. and the battery is fully loaded.
Otherwise with a short power cycle the BAT error still
exists and an overall reset is executed.
4.2.6 Operating mode switch
n With the operating mode switch you may switch the CPU between
STOP and RUN.
n During the transition from STOP to RUN the operating mode
START-UP is driven by the CPU.
n Placing the switch to MRES (Memory Reset), you request an
overall reset with following load from MMC, if a project there
exists.
4.2.7 LEDs
LEDs CPU
RN
As soon as the CPU is supplied with 5V, the green PW-LED (Power)
is on.
ST
SF
FC
MC
(RUN) (STOP) (SFAIL) (FRCE)
(MMC)
green
yellow
yellow
yellow
red
Meaning
Boot-up after PowerON
●
BB*
●
●
●
* Blinking with 10Hz: Firmware is loaded.
●
●
●
●
●
Initialization: Phase 1
●
●
●
●
○
Initialization: Phase 2
●
●
●
○
○
Initialization: Phase 3
○
●
●
○
○
Initialization: Phase 4
○
●
X
X
X
CPU is in STOP state.
BB
○
X
X
X
CPU is in start-up state, the RUN LED blinks
during operating OB100 at least for 3s.
●
○
○
X
X
CPU is in state RUN without error.
Operation
28
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Hardware description
Structure > LEDs
RN
ST
SF
FC
MC
(RUN) (STOP) (SFAIL) (FRCE)
Meaning
(MMC)
X
X
●
X
X
There is a system fault. More information may
be found in the diagnostics buffer of the CPU.
X
X
X
●
X
Variables are forced.
X
X
X
X
●
Access to the memory card.
X
BB*
○
○
○
* Blinking with 10Hz: Configuration is loaded.
Overall reset
○
BB
X
X
X
Overall reset is requested.
○
BB*
X
X
X
* Blinking with 5Hz: Overall reset is executed.
Factory reset
●
●
○
○
○
Factory reset is executed.
○
●
●
●
●
Factory reset finished without error.
Firmware update
○
●
BB
BB
●
The alternate blinking indicates that there is new
firmware on the memory card.
○
○
BB
BB
●
The alternate blinking indicates that a firmware
update is executed.
○
●
●
●
●
Firmware update finished without error.
○
BB*
BB*
BB*
BB*
* Blinking with 10Hz: Error during Firmware
update.
on: ● | off: ○ | blinking (2Hz): BB | not relevant: X
LEDs Ethernet PG/OP channel L/A, S
The green L/A-LED (Link/Activity) indicates the physical connection of the Ethernet PG/OP
channel to Ethernet. Irregular flashing of the L/A-LED indicates communication of the Ethernet
PG/OP channel via Ethernet.
If the green S-LED (Speed) is on, the Ethernet PG/OP has a communication speed of 100MBit/s
otherwise 10MBit/s.
LEDs PROFIBUS/PtP
interface X3
Dependent on the mode of operation the LEDs show information
about the state of operation of the PROFIBUS part according to the
following pattern:
Master operation
RN
ER
DE
IF
(RUN)
(ERR)
green
red
green
red
○
○
○
○
HB140 | CPU | 315-2AG12 | GB | 14-40
Meaning
Master has no project, this means the interface is
deactivated respectively PtP is active.
29
Hardware description
VIPA System 300S CPU
Technical data
RN
ER
DE
IF
Meaning
(RUN)
(ERR)
●
○
○
○
Master has bus parameters and is in RUN without
slaves.
●
○
BB
○
Master is in "clear" state (safety state). The inputs of
the slaves may be read. The outputs are disabled.
●
○
●
○
Master is in "operate" state, this means data exchange
between master and slaves. The outputs may be
accessed.
●
●
●
○
CPU is in RUN, at least 1 slave is missing.
●
●
BB
○
CPU is in STOP, at least 1 slave is missing.
○
○
○
●
Initialization error at faulty parametrization.
○
●
○
●
Waiting state for start command from CPU.
on: ● | off: ○ | blinking (2Hz): BB
Slave operation
RN
ER
DE
IF
(RUN)
(ERR)
green
Meaning
red
green
red
○
○
○
○
Slave has no project respectively PtP is active.
BB
○
○
○
Slave is without master.
BB*
○
BB*
○
* Alternate flashing at configuration faults.
●
○
●
○
Slave exchanges data between master.
on: ● | off: ○ | blinking (2Hz): BB
4.3 Technical data
Order no.
315-2AG12
Type
CPU 315SB/DPM
SPEED-Bus
-
Technical data power supply
Power supply (rated value)
DC 24 V
Power supply (permitted range)
DC 20.4...28.8 V
Reverse polarity protection
ü
Current consumption (no-load operation)
200 mA
Current consumption (rated value)
1A
Inrush current
5A
30
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Hardware description
Technical data
Order no.
315-2AG12
I²t
0.5 A²s
Max. current drain at backplane bus
2.5 A
Power loss
6W
Load and working memory
Load memory, integrated
2 MB
Load memory, maximum
2 MB
Work memory, integrated
1 MB
Work memory, maximal
2 MB
Memory divided in 50% program / 50% data
ü
Memory card slot
MMC-Card with max. 1 GB
Hardware configuration
Racks, max.
4
Modules per rack, max.
8 in multiple-, 32 in a single-rack configuration
Number of integrated DP master
1
Number of DP master via CP
4
Operable function modules
8
Operable communication modules PtP
8
Operable communication modules LAN
8
Command processing times
Bit instructions, min.
0.01 µs
Word instruction, min.
0.01 µs
Double integer arithmetic, min.
0.01 µs
Floating-point arithmetic, min.
0.06 µs
Timers/Counters and their retentive characteristics
Number of S7 counters
512
S7 counter remanence
adjustable 0 up to 512
S7 counter remanence adjustable
C0 .. C7
Number of S7 times
512
S7 times remanence
adjustable 0 up to 512
S7 times remanence adjustable
not retentive
Data range and retentive characteristic
Number of flags
8192 Byte
Bit memories retentive characteristic adjustable adjustable 0 up to 8192
Bit memories retentive characteristic preset
MB0 .. MB15
Number of data blocks
4095
HB140 | CPU | 315-2AG12 | GB | 14-40
31
Hardware description
VIPA System 300S CPU
Technical data
Order no.
315-2AG12
Max. data blocks size
64 KB
Number range DBs
1 ... 4095
Max. local data size per execution level
510 Byte
Max. local data size per block
510 Byte
Blocks
Number of OBs
24
Maximum OB size
64 KB
Total number DBs, FBs, FCs
-
Number of FBs
2048
Maximum FB size
64 KB
Number range FBs
0 ... 2047
Number of FCs
2048
Maximum FC size
64 KB
Number range FCs
0 ... 2047
Maximum nesting depth per priority class
8
Maximum nesting depth additional within an
error OB
4
Time
Real-time clock buffered
ü
Clock buffered period (min.)
6w
Type of buffering
Vanadium Rechargeable Lithium Battery
Load time for 50% buffering period
20 h
Load time for 100% buffering period
48 h
Accuracy (max. deviation per day)
10 s
Number of operating hours counter
8
Clock synchronization
ü
Synchronization via MPI
Master/Slave
Synchronization via Ethernet (NTP)
no
Address areas (I/O)
Input I/O address area
8192 Byte
Output I/O address area
8192 Byte
Process image adjustable
ü
Input process image preset
256 Byte
Output process image preset
256 Byte
Input process image maximal
2048 Byte
Output process image maximal
2048 Byte
32
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Hardware description
Technical data
Order no.
315-2AG12
Digital inputs
65536
Digital outputs
65536
Digital inputs central
1024
Digital outputs central
1024
Integrated digital inputs
-
Integrated digital outputs
-
Analog inputs
4096
Analog outputs
4096
Analog inputs, central
256
Analog outputs, central
256
Integrated analog inputs
-
Integrated analog outputs
-
Communication functions
PG/OP channel
ü
Global data communication
ü
Number of GD circuits, max.
8
Size of GD packets, max.
54 Byte
S7 basic communication
ü
S7 basic communication, user data per job
76 Byte
S7 communication
ü
S7 communication as server
ü
S7 communication as client
-
S7 communication, user data per job
160 Byte
Number of connections, max.
32
Functionality Sub-D interfaces
Type
X2
Type of interface
RS485
Connector
Sub-D, 9-pin, female
Electrically isolated
ü
MPI
ü
MP²I (MPI/RS232)
-
DP master
-
DP slave
-
Point-to-point interface
-
Type
X3
HB140 | CPU | 315-2AG12 | GB | 14-40
33
Hardware description
VIPA System 300S CPU
Technical data
Order no.
315-2AG12
Type of interface
RS485
Connector
Sub-D, 9-pin, female
Electrically isolated
ü
MPI
-
MP²I (MPI/RS232)
-
DP master
yes
DP slave
yes
Point-to-point interface
ü
Functionality MPI
Number of connections, max.
32
PG/OP channel
ü
Routing
ü
Global data communication
ü
S7 basic communication
ü
S7 communication
ü
S7 communication as server
ü
S7 communication as client
-
Transmission speed, min.
19.2 kbit/s
Transmission speed, max.
12 Mbit/s
Functionality PROFIBUS master
PG/OP channel
ü
Routing
ü
S7 basic communication
ü
S7 communication
ü
S7 communication as server
ü
S7 communication as client
-
Activation/deactivation of DP slaves
ü
Direct data exchange (slave-to-slave communication)
-
DPV1
ü
Transmission speed, min.
9.6 kbit/s
Transmission speed, max.
12 Mbit/s
Number of DP slaves, max.
124
Address range inputs, max.
8 KB
Address range outputs, max.
8 KB
User data inputs per slave, max.
244 Byte
34
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Hardware description
Technical data
Order no.
315-2AG12
User data outputs per slave, max.
244 Byte
Functionality PROFIBUS slave
PG/OP channel
ü
Routing
ü
S7 communication
ü
S7 communication as server
ü
S7 communication as client
-
Direct data exchange (slave-to-slave communication)
-
DPV1
ü
Transmission speed, min.
9.6 kbit/s
Transmission speed, max.
12 Mbit/s
Automatic detection of transmission speed
-
Transfer memory inputs, max.
244 Byte
Transfer memory outputs, max.
244 Byte
Address areas, max.
32
User data per address area, max.
32 Byte
Point-to-point communication
PtP communication
ü
Interface isolated
ü
RS232 interface
-
RS422 interface
-
RS485 interface
ü
Connector
Sub-D, 9-pin, female
Transmission speed, min.
150 bit/s
Transmission speed, max.
115.5 kbit/s
Cable length, max.
500 m
Point-to-point protocol
ASCII protocol
ü
STX/ETX protocol
ü
3964(R) protocol
ü
RK512 protocol
-
USS master protocol
ü
Modbus master protocol
ü
Modbus slave protocol
-
Special protocols
-
HB140 | CPU | 315-2AG12 | GB | 14-40
35
Hardware description
VIPA System 300S CPU
Technical data
Order no.
315-2AG12
Functionality RJ45 interfaces
Type
X4
Type of interface
Ethernet 10/100 MBit
Connector
RJ45
Electrically isolated
ü
PG/OP channel
ü
Number of connections, max.
4
Productive connections
-
Housing
Material
PPE
Mounting
Rail System 300
Mechanical data
Dimensions (WxHxD)
40 mm x 125 mm x 120 mm
Weight
290 g
Environmental conditions
Operating temperature
0 °C to 60 °C
Storage temperature
-25 °C to 70 °C
Certifications
UL508 certification
36
yes
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Start-up behavior
5
Deployment CPU 315-2AG12
5.1 Assembly
Information about assembly and cabling: Ä Chapter 3
‘Assembly and installation guidelines’ on page 16
5.2 Start-up behavior
Turn on power supply
After the power supply has been switched on, the CPU changes to
the operating mode the operating mode lever shows.
Default boot procedure,
as delivered
When the CPU is delivered it has been reset. After a STOP®RUN
transition the CPU switches to RUN without program.
Boot procedure with
valid configuration in
the CPU
The CPU switches to RUN with the program stored in the battery buffered RAM.
Boot procedure with
empty battery
n The accumulator/battery is automatically loaded via the integrated
power supply and guarantees a buffer for max. 30 days. If this
time is exceeded, the battery may be totally discharged. This
means that the battery buffered RAM is deleted.
n In this state, the CPU executes an overall reset. If a MMC is
plugged, program code and data blocks are transferred from the
MMC into the work memory of the CPU. If no MMC is plugged, the
CPU transfers permanent stored "protected" blocks into the work
memory if available.
n Depending on the position of the operating mode switch, the CPU
switches to RUN, if OB81 exists, res. remains in STOP. This
event is stored in the diagnostic buffer as: "Start overall reset
automatically (unbuffered PowerON)".
CAUTION!
After a power reset and with an empty battery the CPU
starts with a BAT error and executes an overall reset. The
BAT error can be deleted again, if once during power cycle
the time between switching on and off the power supply is
at least 30sec. and the battery is fully loaded. Otherwise
with a short power cycle the BAT error still exists and an
overall reset is executed.
HB140 | CPU | 315-2AG12 | GB | 14-40
37
Deployment CPU 315-2AG12
VIPA System 300S CPU
Addressing > Addressing Backplane bus I/O devices
5.3 Addressing
5.3.1 Overview
To provide specific addressing of the installed peripheral modules,
certain addresses must be allocated in the CPU. At the start-up of the
CPU, this assigns automatically peripheral addresses for digital in-/
output modules starting with 0 and ascending depending on the slot
location.
If no hardware project engineering is available, the CPU stores at the
addressing analog modules to even addresses starting with 256.
5.3.2 Addressing Backplane bus I/O devices
The CPU 315-2AG12 provides an I/O area (address 0 ... 8191) and a
process image of the In- and Outputs (each address 0 ... 255). The
process image stores the signal states of the lower address (0 ... 255)
additionally in a separate memory area.
The process image this divided into two parts:
n process image to the inputs (PII)
n process image to the outputs (PIQ)
The process image is updated automatically when a cycle has been
completed.
Max. number of pluggable modules
Maximally 8 modules per row may be configured by the CPU
315-2AG12.
For the project engineering of more than 8 modules you may use line
interface connections. For this you set in the hardware configurator
the module IM 360 from the hardware catalog to slot 3 of your 1. profile rail. Now you may extend your system with up to 3 profile rails by
starting each with an IM 361 from Siemens at slot 3. Considering the
max total current with the CPU 315-2AG12 from VIPA up to 32 modules may be arranged in a row. Here the installation of the line connections IM 360/361 from Siemens is not required.
Define addresses by
hardware configuration
38
You may access the modules with read res. write accesses to the
peripheral bytes or the process image.To define addresses a hardware configuration may be used. For this, click on the properties of
the according module and set the wanted address.
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Hardware configuration - CPU
Automatic addressing
If you do not like to use a hardware configuration, an automatic
addressing comes into force. At the automatic address allocation
DIOs occupy depending on the slot location always 4byte and AIOs,
FMs, CPs always 16byte at the bus. Depending on the slot location
the start address from where on the according module is stored in the
address range is calculated with the following formulas:
n DIOs: Start address = 4×(slot -1)
n AIOs, FMs, CPs: Start address = 16×(slot -1)+256
Example for automatic
address allocation
The following sample shows the functionality of the automatic
address allocation:
5.4 Hardware configuration - CPU
Precondition
The configuration of the CPU takes place at the Siemens ‘hardware
configurator’ . The hardware configurator is part of the Siemens
SIMATIC Manager. It serves for project engineering. The modules,
which may be configured here are listed in the hardware catalog. If
necessary you have to update the hardware catalog with ‘Options
è Update Catalog’.
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39
Deployment CPU 315-2AG12
VIPA System 300S CPU
Hardware configuration - I/O modules
For project engineering a thorough knowledge of the Siemens
SIMATIC Manager and the Siemens hardware configurator is
required.
Please consider that this SPEED7-CPU has 4 ACCUs.
After an arithmetic operation (+I, -I, *I, /I, +D, -D, *D, /D,
MOD, +R, -R, *R, /R) the content of ACCU 3 and ACCU 4
is loaded into ACCU 3 and 2. This may cause conflicts in
applications that presume an unmodified ACCU 2.
For more information may be found in the manual "VIPA
Operation list SPEED7" at "Differences between SPEED7
and 300V programming".
Proceeding
In the Siemens SIMATIC Manager the following steps should be executed:
1.
Start the Siemens hardware configurator with a new project.
2.
Insert a profile rail from the hardware catalog.
3.
Place at ‘Slot’ -Number 2 the CPU 318-2 (6ES7
318-2AJ00-0AB0/V3.0).
4.
The integrated PROFIBUS DP master (jack X3) is to be configured and connected via the sub module ‘X2 DP’ .
5.5 Hardware configuration - I/O modules
Hardware configuration
of the modules
After the hardware configuration place the System 300 modules in the
plugged sequence starting with slot 4.
Parametrization
For parametrization double-click during the project engineering at the
slot overview on the module you want to parameterize. In the
appearing dialog window you may set the wanted parameters. By
using the SFCs 55, 56 and 57 you may alter and transfer parameters
for wanted modules during runtime. For this you have to store the
module specific parameters in so called "record sets". More detailed
information about the structure of the record sets is to find in the
according module description.
40
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VIPA System 300S CPU
Deployment CPU 315-2AG12
Hardware configuration - Ethernet PG/OP channel
Bus extension with IM
360 and IM 361
For the project engineering of more than 8 modules you may use line
interface connections. For this you set in the hardware configurator
the module IM 360 from the hardware catalog to slot 3 of your 1. profile rail. Now you may extend your system with up to 3 profile rails by
starting each with an IM 361 from Siemens at slot 3. Considering the
max. total current with the VIPA SPEED7 CPUs up to 32 modules
may be arranged in a row. Here the installation of the line connections IM 360/361 from Siemens is not required.
5.6 Hardware configuration - Ethernet PG/OP channel
Overview
The CPU 315-2AG12 has an integrated Ethernet PG/OP channel.
This channel allows you to program and remote control your CPU.
The PG/OP channel also gives you access to the internal web page
that contains information about firmware version, connected I/O
devices, current cycle times etc. With the first start-up respectively
after an overall reset the Ethernet PG/OP channel does not have any
IP address. For online access to the CPU via Ethernet PG/OP
channel valid IP address parameters have to be assigned to this by
means of the Siemens SIMATIC Manager. This is called "initialization".
Assembly and commissioning
1.
Install your System 300S with your CPU.
2.
Wire the system by connecting cables for voltage supply and
signals.
3.
Connect the Ethernet jack of the Ethernet PG/OP channel to
Ethernet
4.
Switch on the power supply.
ð After a short boot time the CP is ready for communication.
He possibly has no IP address data and requires an initialization.
"Initialization" via PLC
functions
The initialization via PLC functions takes place with the following proceeding:
Determine the current Ethernet (MAC) address of your Ethernet
PG/OP channel. This always may be found as 1. address under
the front flap of the CPU on a sticker on the left side.
HB140 | CPU | 315-2AG12 | GB | 14-40
41
Deployment CPU 315-2AG12
VIPA System 300S CPU
Hardware configuration - Ethernet PG/OP channel
Assign IP address
parameters
You get valid IP address parameters from your system administrator.
The assignment of the IP address data happens online in the Siemens SIMATIC Manager starting with version V 5.3 & SP3 with the
following proceeding:
1.
Start the Siemens SIMATIC Manager and set via ‘Options
è Set PG/PC interface’the access path to ‘TCP/IP -> Network
card ....’ .
2.
Open with ‘PLC è Edit Ethernet Node n’ the dialog window with
the same name.
3.
To get the stations and their MAC address, use the [Browse]
button or type in the MAC Address. The Mac address may be
found at the 1. label beneath the front flap of the CPU.
4.
Choose if necessary the known MAC address of the list of found
stations.
5.
Either type in the IP configuration like IP address, subnet mask
and gateway.
6.
Confirm with [Assign IP configuration].
ð Direct after the assignment the Ethernet PG/OP channel
may be reached online by these address data. The value
remains as long as it is reassigned, it is overwritten by a
hardware configuration or an factory reset is executed.
Take IP address parameters in project
42
1.
Open the Siemens hardware configurator und configure the Siemens CPU 318-2 (318-2AJ00-0AB00 V3.0).
2.
Configure the modules at the standard bus.
3.
For the Ethernet PG/OP channel you have to configure a Siemens CP 343-1 (SIMATIC 300 \ CP 300 \ Industrial Ethernet
\CP 343-1 \ 6GK7 343-1EX11 0XE0) always below the really
plugged modules.
4.
Open the property window via double-click on the CP
343-1EX11 and enter for the CP at ‘Properties’ the IP address
data, which you have assigned before.
5.
Assign the CP to a ‘Subnet’ . Without assignment the IP address
data are not used!
6.
Transfer your project.
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Setting standard CPU parameters > Parameters CPU
5.7 Hardware configuration - Communication
The hardware configuration of PROFIBUS and PtP is described at the
following pages:
n PROFIBUS-DP
– Master operation: Ä Chapter 7.4 ‘Deployment as PROFIBUS
DP master’ on page 117
– Slave operation: Ä Chapter 7.5 ‘Deployment as PROFIBUS
DP slave’ on page 118
n PtP
– PtP: Ä Chapter 6.3 ‘Deployment of RS485 interface for PtP ’
on page 89
5.8 Setting standard CPU parameters
5.8.1 Parametrization via Siemens CPU
Parametrization via Siemens CPU 318-2AJ00
Since the CPU is to be configured as Siemens CPU 318-2 (CPU
318-2AJ00 V3.0) in the Siemens hardware configurator, the standard
parameters of the VIPA CPU may be set with "Object properties" of
the CPU 318-2 during hardware configuration. Via a double-click on
the CPU 318-2 the parameter window of the CPU may be accessed.
Using the registers you get access to every standard parameter of the
CPU.
5.8.2 Parameters CPU
Supported parameters
The CPU does not evaluate each parameter, which may be set at the
hardware configuration. The following parameters are supported by
the CPU at this time:
General
n Short description: The short description of the Siemens CPU
318-2AJ00 is CPU 318-2.
n Order No. / Firmware: Order number and firmware are identical to
the details in the "hardware catalog" window.
n Name: The Name field provides the short description of the CPU.
If you change the name the new name appears in the Siemens
SIMATIC Manager.
n Plant designation: Here is the possibility to specify a plant designation for the CPU. This plant designation identifies parts of the
plant according to their function. Its structure is hierarchic
according to IEC 1346-1.
n Comment: In this field information about the module may be
entered.
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Deployment CPU 315-2AG12
VIPA System 300S CPU
Setting standard CPU parameters > Parameters CPU
Startup
n Startup when expected/actual configuration differs: If the
checkbox for ‘Startup when expected/actual configuration differ’ is
deselected and at least one module is not located at its configured
slot or if another type of module is inserted there instead, then the
CPU does not switch to RUN mode and remains in STOP mode. If
the checkbox for ‘Startup when expected/actual configuration
differ’ is selected, then the CPU starts even if there are modules
not located in their configured slots of if another type of module is
inserted there instead, such as during an initial system start-up.
n Monitoring time for ready message by modules [100ms]: This
operation specifies the maximum time for the ready message of
every configured module after PowerON. Here connected PROFIBUS DP slaves are also considered until they are parameterized. If the modules do not send a ready message to the CPU by
the time the monitoring time has expired, the actual configuration
becomes unequal to the preset configuration. Monitoring time for
ready message by modules [100ms]
n Transfer of parameters to modules [100ms]: The maximum time
for the transfer of parameters to parametrizable modules. If not
every module has been assigned parameters by the time this
monitoring time has expired; the actual configuration becomes
unequal to the preset configuration.
Cycle/Clock memory
n Update OB1 process image cyclically: This parameter is not relevant.
n Scan cycle monitoring time: Here the scan cycle monitoring time
in milliseconds may be set. If the scan cycle time exceeds the
scan cycle monitoring time, the CPU enters the STOP mode.
Possible reasons for exceeding the time are:
– Communication processes
– a series of interrupt events
– an error in the CPU program
n Minimum scan cycle time
– Is the processing time in the main program, inclusive the
update of the process image shorter than the specified Minimum scan cycle time, the CPU waits for the expiration of the
Minimum scan cycle time, before a new cycle is started.
– By specifying a Minimum scan cycle time cycle times, which
vary very much and also influence the PLC reaction time, can
be compensated.
– The Minimum scan cycle time is configured in ms.
– The default entry "0" disables the Minimum scan cycle time.
n Scan cycle load from Communication: This parameter is not relevant.
n Size of the process image input/output area: Here the size of the
process image max. 2048 for the input/output periphery may be
fixed.
n OB85 call up at I/O access error: The preset reaction of the CPU
may be changed to an I/O access error that occurs during the
update of the process image by the system. The VIPA CPU is
preset such that OB 85 is not called if an I/O access error occurs
and no entry is made in the diagnostic buffer either.
n Clock memory: Activate the check box if you want to use clock
memory and enter the number of the memory byte.
44
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VIPA System 300S CPU
Deployment CPU 315-2AG12
Setting standard CPU parameters > Parameters CPU
The selected memory byte cannot be used for temporary
data storage.
Retentive Memory
n Number of Memory bytes from MB0: Enter the number of retentive
memory bytes from memory byte 0 onwards.
n Number of S7 Timers from T0: Enter the number of retentive S7
timers from T0 onwards. Each S7 timer occupies 2bytes.
n Number of S7 Counters from C0: Enter the number of retentive S7
counter from C0 onwards.
n Areas: This parameter is not supported.
Interrupts
n Priority: Here the priorities are displayed, according to which the
hardware interrupt OBs are processed (hardware interrupt, timedelay interrupt, async. error interrupts).
Time-of-day interrupts
n Priority: Here the priorities may be specified according to which
the time-of-day interrupt is processed. With priority "0" the corresponding OB is deactivated.
n Active: Activate the check box of the time-of-day interrupt OBs if
these are to be automatically started on complete restart.
n Execution: Select how often the interrupts are to be triggered.
Intervals ranging from every minute to yearly are available. The
intervals apply to the settings made for start date and time.
n Start date/time: Enter date and time of the first execution of the
time-of-day interrupt.
n Process image partition: This parameter is not supported.
Cyclic interrupts
n Priority: Here the priorities may be specified according to which
the corresponding cyclic interrupt is processed. With priority "0"
the corresponding interrupt is deactivated.
n Execution: Enter the time intervals in ms, in which the watchdog
interrupt OBs should be processed. The start time for the clock is
when the operating mode switch is moved from STOP to RUN.
n Phase offset: Enter the delay time in ms for current execution for
the watch dog interrupt. This should be performed if several
watchdog interrupts are enabled. Phase offset allows to distribute
processing time for watchdog interrupts across the cycle.
n Process image partition: This parameter is not supported.
Diagnostics/Clock
n Report cause of STOP: Activate this parameter, if the CPU should
report the cause of STOP to PG respectively OP on transition to
STOP.
n Number of messages in the diagnostics buffer: Here the number
of diagnostics are displayed, which may be stored in the diagnostics buffer (circular buffer).
n Synchronization type: Here you specify whether clock should synchronize other clocks or not.
– as slave: The clock is synchronized by another clock.
– as master: The clock synchronizes other clocks as master.
– none: There is no synchronization
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45
Deployment CPU 315-2AG12
VIPA System 300S CPU
Setting standard CPU parameters > Parameters for MPI/DP
n Time interval: Time intervals within which the synchronization is to
be carried out.
n Correction factor: Lose or gain in the clock time may be compensated within a 24 hour period by means of the correction factor in
ms. If the clock is 1s slow after 24 hours, you have to specify a
correction factor of "+1000" ms.
Protection
n Level of protection: Here 1 of 3 protection levels may be set to
protect the CPU from unauthorized access.
– Protection level 1 (default setting):
No password adjustable, no restrictions
– Protection level 2 with password:
Authorized users: read and write access
Unauthorized user: read access only
– Protection level 3:
Authorized users: read and write access
Unauthorized user: no read and write access
5.8.3 Parameters for DP
The properties dialog of the PROFIBUS part is opened via a double
click to the sub module DP.
General
n Short description: Here the short description "DP" for PROFIBUS
DP is specified.
n Order no.: Nothing is shown here.
n Name: Here "DP" is shown. If you change the name, the new
name appears in the Siemens SIMATIC Manager.
n Interface: The PROFIBUS address is shown here.
n Properties: With this button the properties of the PROFIBUS DP
interface may be preset.
n Comment: You can enter the purpose of the PROFIBUS interface.
Address
n Diagnostics: A diagnostics address for PROFIBUS DP is to be
preset here. In the case of an error the CPU is informed via this
address.
n Operating mode: Here the operating mode of the PROFIBUS part
may be preset. More may be found at chapter "Deployment PROFIBUS Communication".
n Configuration: Within the operating mode "DP-Slave" you may
configure your slave system. More may be found at chapter
"Deployment PROFIBUS communication".
n Clock: These parameters are not supported.
5.8.4 Parameters for MPI/DP
The properties dialog of the MPI interface is opened via a double click
to the sub module MPI/DP.
46
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Deployment CPU 315-2AG12
Setting VIPA specific CPU parameters > Proceeding
General
n Short description: Here the short description "MPI/DP" for the MPI
interface is specified.
n Order no.: Nothing is shown here.
n Name: At Name "MPI/DP" for the MPI interface is shown. If you
change the name, the new name appears in the Siemens
SIMATIC Manager.
n Type: Please regard only the type "MPI" is supported by the VIPA
CPU.
n Interface: Here the MPI address is shown.
n Properties: With this button the properties of the MPI interface
may be preset.
n Comment: You can enter the purpose of the MPI interface.
Address
n Diagnostics: A diagnostics address for the MPI interface is to be
preset here. In the case of an error the CPU is informed via this
address.
n Operating mode, Configuration, Clock: These parameters are not
supported.
5.9 Setting VIPA specific CPU parameters
5.9.1 Proceeding
Overview
Except of the VIPA specific CPU parameters the CPU parametrization takes place in the parameter dialog of the CPU from Siemens.
With installing of the SPEEDBUS.GSD the VIPA specific parameters
may be set during hardware configuration. Here the following parameters may be accessed:
n Function RS485 X3 (PtP, Synchronization between DP master
and CPU)
n Token Watch
n Number remanence flag, timer, counter
n Priority OB 28, OB 29, OB 33, OB 34
n Execution OB 33, OB 34
n Phase offset OB 33, OB 34
Requirements
Since the VIPA specific CPU parameters may be set, the installation
of the SPEEDBUS.GSD from VIPA in the hardware catalog is necessary. The CPU may be configured in a PROFIBUS master system
and the appropriate parameters may be set after installation.
HB140 | CPU | 315-2AG12 | GB | 14-40
47
Deployment CPU 315-2AG12
VIPA System 300S CPU
Setting VIPA specific CPU parameters > Proceeding
Installation of the
SPEEDBUS.GSD
The GSD (Geräte-Stamm-Datei) is online available in the following
language versions. Further language versions are available on
inquires:
Name
Language
SPEEDBUS.GSD
german (default)
SPEEDBUS.GSG
german
SPEEDBUS.GSE
english
The GSD files may be found at www.vipa.com at the "Service" part.
The integration of the SPEEDBUS.GSD takes place with the following
proceeding:
1.
Browse to www.vipa.com
2.
Click to ‘Service è Download è GSD- and EDS-Files
è Profibus’
3.
Download the file Cx000023_Vxxx.
4.
Extract the file to your work directory. The SPEEDBUS.GSD is
stored in the directory VIPA_System_300S.
5.
Start the hardware configurator from Siemens.
6.
Close every project.
7.
Select ‘Options è Install new GSD-file’.
8.
Navigate to the directory VIPA_System_300S and select
SPEEDBUS.GSD an.
ð The SPEED7 CPUs and modules of the System 300S from
VIPA may now be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O /
VIPA_SPEEDBUS.
48
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VIPA System 300S CPU
Deployment CPU 315-2AG12
Setting VIPA specific CPU parameters > VIPA specific parameters
Hardware configuration
The embedding of the CPU 315-2AG12 happens by means of a virtual PROFIBUS master system with the following approach:
1.
Perform a hardware configuration for the CPU. Ä Chapter 5.4
‘Hardware configuration - CPU’ on page 39
2.
Configure always as last module a Siemens DP master CP
342-5 (342-5DA02 V5.0). Connect and parametrize it at operation mode "DP-Master".
3.
Connect the slave system "VIPA_SPEEDbus". After installing
the SPEEDBUS.GSD this may be found in the hardware catalog
at Profibus-DP / Additional field devices / I/O / VIPA /
VIPA_SPEEDBUS.
4.
For the slave system set the PROFIBUS address 100.
5.
Configure at slot 0 the VIPA CPU 315-2AG12 of the hardware
catalog from VIPA_SPEEDbus.
6.
By double clicking the placed CPU 315-2AG12 the properties
dialog of the CPU may be opened.
The hardware configuration, which is shown here, is only
required, if you want to customize the VIPA specific
parameters.
5.9.2 VIPA specific parameters
The following parameters may be accessed by means of the properties dialog of the VIPA CPU.
5.9.2.1
Function RS485 X3
Using this parameter the RS485 interface may be switched to PtP
communication (point to point) respectively the synchronization
between DP master system and CPU may be set:
Deactivated
Deactivates the RS485 interface.
PtP
With this operating mode the
PROFIBUS DP master is deactivated and the RS485 interface
acts as an interface for serial
point-to-point communication.
Here data may be exchanged
between two stations by means
of protocols.
PROFIBUS DP async
PROFIBUS DP master operation
asynchronous to CPU cycle The
RS485 interface is preset at
default to PROFIBUS DP async.
Here CPU cycle and cycles of
every VIPA PROFIBUS DP
master run independently.
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49
Deployment CPU 315-2AG12
VIPA System 300S CPU
Setting VIPA specific CPU parameters > VIPA specific parameters
PROFIBUS DP syncIn
The CPU is waiting for DP
master input data.
PROFIBUS DP syncOut
The DP master system is waiting
for CPU output data.
PROFIBUS DP syncInOut
CPU and DP master system are
waiting on each other and form
thereby a cycle.
Default: PROFIBUS DP async
5.9.2.1.1 Synchronization between master system and CPU
Overview
Normally the cycles of CPU and DP master run independently. The
cycle time of the CPU is the time needed for one OB1 cycle and for
reading respectively writing the inputs respectively outputs. The cycle
time of a DP master depends among others on the number of connected slaves and the baud rate, thus every plugged DP master has
its own cycle time. Due to the asynchronism of CPU and DP master
the whole system gets relatively high response times. The synchronization behavior between every VIPA PROFIBUS DP master and the
CPU may be configured by means of a hardware configuration as
shown above. The different modes for the synchronization are in the
following described.
PROFIBUS DP
SyncInOut
In PROFIBUS DP SyncInOut mode CPU and DP master system are
waiting on each other and form thereby a cycle. Here the whole cycle
is the sum of the longest DP master cycle and CPU cycle. By this
synchronization mode you receive global consistent in-/ output data,
since within the total cycle the same input and output data are handled successively by CPU and DP master system. If necessary the
time of the Watchdog of the bus parameters should be increased at
this mode.
PROFIBUS DP SyncOut
In this operating mode the cycle time of the VIPA DP master system
depends on the CPU cycle time. After CPU start-up the DP master
gets synchronized. As soon as their cycle is passed they wait for the
next synchronization impulse with output data of the CPU. So the
response time of your system can be improved because output data
were directly transmitted to the DP master system. If necessary the
time of the Watchdog of the bus parameters should be increased at
this mode.
50
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VIPA System 300S CPU
Deployment CPU 315-2AG12
Setting VIPA specific CPU parameters > VIPA specific parameters
PROFIBUS-DP SyncIn
5.9.2.2
In the operating mode PROFIBUS DP SyncIn the CPU cycle is
synchronized to the cycle of the VIPA PROFIBUS DP master system.
Here the CPU cycle depends on the VIPA DP master with the longest
cycle time. If the CPU gets into RUN it is synchronized with each
PROFIBUS DP master. As soon as the CPU cycle is passed, it waits
for the next synchronization impulse with input data of the DP master
system. If necessary the Scan Cycle Monitoring Time of the CPU
should be increased.
Token Watch
By presetting the PROFIBUS bus parameters within the hardware
configuration a token time for the PROFIBUS results. The token time
defines the duration until the token reaches the DP master again. Per
default this time is supervised. Due to this monitoring disturbances on
the bus can affect a reboot of the DP master. Here with the parameter
Token Watch the monitoring of the token time can be switched off
respectively on. Default: On
5.9.2.3
Number remanence flag
Here the number of flag bytes may be set. With 0 the value Retentive
memory > Number of memory bytes starting with MB0 set at the
parameters of the Siemens CPU is used. Otherwise the adjusted
value (1 ... 8192) is used. Default: 0
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51
Deployment CPU 315-2AG12
VIPA System 300S CPU
Project transfer > Transfer via MPI/PROFIBUS
5.9.2.4
Phase offset and execution of OB 33 and OB 34
The CPU offers additional cyclic interrupts, which interrupt the cyclic
processing in certain distances. Point of start of the time interval is
the change of operating mode from STOP to RUN. To avoid that the
cyclic interrupts of different cyclic interrupt OBs receive a start
request at the same time and so a time out may occur, there is the
possibility to set a phase offset respectively a time of execution.
n The phase offset (0 ... 60000ms) serves for distribution processing
times for cyclic interrupts across the cycle. Default: 0
n The time intervals, in which the cyclic interrupt OB should be processed may be entered with execution (1 ... 60000ms). Default:
OB 33: 500ms, OB 34: 200ms
5.9.2.5
Priority of OB 28, OB 29, OB 33 and OB 34
The priority fixes the order of interrupts of the corresponding interrupt
OB. Here the following priorities are supported: 0 (Interrupt-OB is
deactivated), 2, 3, 4, 9, 12, 16, 17, 24. Default: 24
5.10
Project transfer
There are the following possibilities for project transfer into the CPU:
Overview
n Transfer via MPI/PROFIBUS
n Transfer via Ethernet
n Transfer via MMC
5.10.1
Transfer via MPI/PROFIBUS
General
For transfer via MPI/PROFIBUS there is the following interface:
n X2: MPI interface
n X3: PROFIBUS interface
Net structure
The structure of a MPI net is electrically identical with the structure of
a PROFIBUS net. This means the same rules are valid and you use
the same components for the build-up. The single participants are
connected with each other via bus interface plugs and PROFIBUS
cables. Please consider with the CPU 315-2AG12 that the total extension of the MPI net does not exceed 50m. Per default the MPI net
runs with 187.5kbaud. VIPA CPUs are delivered with MPI address 2.
MPI programming cable
The MPI programming cables are available at VIPA in different variants. The cables provide a RS232 res. USB plug for the PC and a
bus enabled RS485 plug for the CPU. Due to the RS485 connection
you may plug the MPI programming cables directly to an already
plugged plug on the RS485 jack. Every bus participant identifies itself
at the bus with an unique address, in the course of the address 0 is
reserved for programming devices.
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Deployment CPU 315-2AG12
Project transfer > Transfer via MPI/PROFIBUS
Terminating resistor
A cable has to be terminated with its surge impedance. For this you
switch on the terminating resistor at the first and the last participant of
a network or a segment. Please make sure that the participants with
the activated terminating resistors are always power supplied. Otherwise it may cause interferences on the bus.
Approach transfer via
MPI interface
1.
Connect your PC to the MPI jack of your CPU via a MPI programming cable.
2.
Load your project in the SIMATIC Manager from Siemens.
3.
Choose in the menu ‘Options è Set PG/PC interface’.
4.
Select in the according list the "PC Adapter (MPI)"; if appropriate
you have to add it first, then click on [Properties].
5.
Set in the register MPI the transfer parameters of your MPI net
and type a valid address.
6.
Switch to the register Local connection.
7.
Set the COM port of the PCs and the transfer rate 38400Baud
for the MPI programming cable from VIPA.
8.
Via ‘PLC è Load to module’ via MPI to the CPU and save it on
a MMC via ‘PLC è Copy RAM to ROM’ if one is plugged.
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Deployment CPU 315-2AG12
VIPA System 300S CPU
Project transfer > Transfer via Ethernet
Proceeding Transfer via
PROFIBUS interface
1.
Connect your PC to the PB-DP jack X3 of your CPU via a MPI
programming cable.
2.
Load your project in the Siemens SIMATIC Manager.
3.
Choose in the menu ‘Options è Set PG/PC interface’.
4.
Select in the according list the "PC Adapter (PROFIBUS)"; if
appropriate you have to add it first, then click at [Properties].
5.
Set in the register PROFIBUS the transfer parameters of your
PROFIBUS net and enter a valid PROFIBUS address. The
PROFIBUS address must be assigned to the DP master by a
project before.
6.
Switch to the register Local connection.
7.
Set the COM port of the PCs and the transfer rate 38400baud
for the MPI programming cable from VIPA.
8.
Transfer your project via ‘PLC è Load to module’ via PROFIBUS to the CPU and save it with ‘PLC è Copy RAM to ROM’
on a memory card if one is plugged.
Transfer via PROFIBUS is available by DP master, if projected as master and assigned with a PROFIBUS address
before.
Within selecting the slave mode you have additionally to
select the option "Test, commissioning, routing".
5.10.2
Transfer via Ethernet
For transfer via Ethernet the CPU has the following interface:
n X4: Ethernet PG/OP channel
Initialization
So that you may access the Ethernet PG/OP channel you have to
assign IP address parameters by means of the "initialization".
Ä ‘Assign IP address parameters’ on page 42
Transfer
1.
For the transfer, connect, if not already done, the appropriate
Ethernet port to your Ethernet.
2.
Open your project with the Siemens SIMATIC Manager.
3.
Set via ‘Options è Set PG/PC Interface’ the access path to
"TCP/IP ® Network card .... ".
4.
Click to ‘PLC è Download’ Download ® the dialog "Select
target module" is opened. Select your target module and enter
the IP address parameters of the Ethernet PG/OP channel for
connection. Provided that no new hardware configuration is
transferred to the CPU, the entered Ethernet connection is permanently stored in the project as transfer channel.
5.
With [OK] the transfer is started.
54
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Project transfer > Transfer via MMC
System dependent you get a message that the projected
system differs from target system. This message may be
accepted by [OK].
® Your project is transferred and may be executed in the
CPU after transfer.
5.10.3
Transfer via MMC
The MMC (Memory Card) serves as external transfer and storage
medium. There may be stored several projects and sub-directories on
a MMC storage module. Please regard that your current project is
stored in the root directory and has one of the following file names:
n S7PROG.WLD
n AUTOLOAD.WLD
With ‘File è Memory Card File è New’ in the Siemens SIMATIC
Manager a new wld file may be created. After the creation copy the
blocks from the project blocks folder and the System data into the wld
file.
Transfer MMC ® CPU
The transfer of the application program from the MMC into the CPU
takes place depending on the file name after an overall reset or PowerON.
n S7PROG.WLDis read from the MMC after overall reset.
n AUTOLOAD.WLD is read after PowerON from the MMC.
The blinking of the MC LED of the CPU marks the active transfer.
Please regard that your user memory serves for enough space, otherwise your user program is not completely loaded and the SF LED
gets on.
Transfer CPU ® MMC
When the MMC has been installed, the write command stores the
content of the battery buffered RAM as S7PROG.WLD on the MMC.
The write command is controlled by means of the block area of the
Siemens SIMATIC Manager ‘PLC è Copy RAM to ROM’. During the
write process the MC LED of the CPU is blinking. When the LED
expires the write process is finished.
If this project is to be loaded automatically from the MMC with PowerON, you have to rename this on the MMC to AUTOLOAD.WLD.
Transfer control
After a MMC access, an ID is written into the diagnostic buffer of the
CPU. To monitor the diagnosis entries, you select ‘PLC
è Module Information’ in the Siemens SIMATIC Manager. Via the
register "Diagnostic Buffer" you reach the diagnosis window.
Information about the event IDs Ä Chapter 5.20 ‘VIPA specific diagnostic entries’ on page 70.
HB140 | CPU | 315-2AG12 | GB | 14-40
55
Deployment CPU 315-2AG12
VIPA System 300S CPU
Access to the internal Web page
5.11
Access to the internal Web page
Access to the web page
The Ethernet PG/OP channel provides a web page that you may
access via an Internet browser by its IP address. The web page contains information about firmware versions, current cycle times etc.
The current content of the web page is stored on MMC by means of
the MMC-Cmd WEBPAGE. Ä Chapter 5.19 ‘MMC-Cmd - Auto commands’ on page 68
Requirements
A PG/OP channel connection should be established between PC with
Internet browser and CPU 315-2AG12. This may be tested by Ping to
the IP address of the PG/OP channel.
Web page
The access takes place via the IP address of the Ethernet PG/OP
channel. The web page only serves for information output. The monitored values are not alterable.
CPU with Ethernet-PG/OP
Slot 100
VIPA 315-2AG12 V.... Px000078.pkg,
SERIALNUMBER 17601
SUPPORTDATA :
Order no., firmware vers.,
package, serial no.
Information for support
PRODUCT V3420, HARDWARE V0111, 5679G-V10,
HX000026.100,Bx000227 V6420, Ax000086 V1200,
Ax000056 V0000, fx000007.wld V1120,
Memorysizes (Bytes): LoadMem : 2097152, WorkMemCode : 524288, WorkMemData : 524288
Information about memory configuration, load memory, work
memory (code/data)
OnBoardEthernet : MacAddress : 0020D50144C1, IPAddress : 172.20.120.62, SubnetMask : 255.255.255.0,
Gateway : 172.20.120.62
Ethernet PG/OP: Addresses
Cpu state : Run
CPU state
FunctionRS485 X2/COM1: MPI
Operating mode RS485
FunctionRS485 X3/COM2: DPM-async
n MPI: MPI operation
n DPM: DP master operation
or
PtP: point to point operation
Cycletime [microseconds] : min=0 cur=770 ave=750
max=878
CPU cycle time:
min = minimal
cur = current
max = maximal
56
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Access to the internal Web page
Slot 100
MCC-Trial-Time: 70:23
Remaining time in hh:mm for
deactivation of the expansion
memory if MCC is removed.
ArmLoad [percent] : cur=67, max=70
Information for support
PowerCycleHxRetries : 29, 0, 0, 0, 0
Slot 201
CPU component:
DP master
VIPA 342-1DA70 V3.3.0 Px000062.pkg
Name, firmware-version,
package
SUPPORTDATA :
Information for support
PRODUCT V3300, BB000218 V5300, AB000068 V4170,
ModuleType CB2C0010
Cycletime [microseconds] : min=65535000 cur=0 ave=0
max=0 cnt=0
CPU cycle time:
min = minimal
cur = current
max = maximal
Standard Bus
Standard Bus
Modules at the standard bus
BaudRate Read Mode1, BaudRate Write Mode1
Information for support
Line 1: ModuleType 94F9:IM36x
IM interface if exists
Rack 0 /Slot 4
Rack no. / slot
ModuleType:9FC3: Digital Input 32
Type of module
Baseaddress Input 0
Configured base address
if exists firmware no. and
package
Rack 0 /Slot 5 ...
Rack no. / slot
...
Line 2: ModuleType A4FE:IM36x
IM interface if exists
Rack 1 /Slot 4
ModuleType:9FC3: Digital Input 32
Type of module
Baseaddress Input 0
Configured base address
if exists firmware no. and
package
Rack 1 /Slot 5 ...
HB140 | CPU | 315-2AG12 | GB | 14-40
Rack no. / slot
57
Deployment CPU 315-2AG12
VIPA System 300S CPU
Operating modes > Overview
5.12
5.12.1
Operating modes
Overview
The CPU can be in one of 4 operating modes:
n
n
n
n
Operating mode STOP
Operating mode START-UP
Operating mode RUN
Operating mode HALT
Certain conditions in the operating modes START-UP and RUN
require a specific reaction from the system program. In this case the
application interface is often provided by a call to an organization
block that was included specifically for this event.
Operating mode STOP
n The application program is not processed.
n If there has been a processing before, the values of counters,
timers, flags and the process image are retained during the transition to the STOP mode.
n Outputs are inhibited, i.e. all digital outputs are disabled.
n RUN-LED off
n STOP-LED on
Operating mode
START-UP
n During the transition from STOP to RUN a call is issued to the
start-up organization block OB 100. The processing time for this
OB is not monitored. The START-UP OB may issue calls to other
blocks.
n All digital outputs are disabled during the START-UP, i.e. outputs
are inhibited.
n RUN-LED
blinks as soon as the OB 100 is operated and for at least 3s, even
if the start-up time is shorter or the CPU gets to STOP due to an
error. This indicates the start-up.
n STOP-LED off
When the CPU has completed the START-UP OB, it assumes the
operating mode RUN.
Operating mode RUN
n The application program in OB 1 is processed in a cycle. Under
the control of alarms other program sections can be included in
the cycle.
n All timers and counters being started by the program are active
and the process image is updated with every cycle.
n The BASP-signal (outputs inhibited) is deactivated, i.e. all digital
outputs are enabled.
n RUN-LED on
n STOP-LED off
Operating mode HOLD
The CPU offers up to 3 breakpoints to be defined for program diagnosis. Setting and deletion of breakpoints happens in your programming environment. As soon as a breakpoint is reached, you may
process your program step by step.
Precondition
For the usage of breakpoints, the following preconditions have to be
fulfilled:
58
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Operating modes > Overview
n Testing in single step mode is possible with STL. If necessary
switch the view via ‘View è STL’ to STL.
n The block must be opened online and must not be protected.
Approach for working
with breakpoints
1.
Activate ‘View è Breakpoint Bar’.
2.
Set the cursor to the command line where you want to insert a
breakpoint.
3.
Set the breakpoint with ‘Debug è Set Breakpoint’.
ð The according command line is marked with a circle.
4.
To activate the breakpoint click on ‘Debug
è Breakpoints Active’.
ð The circle is changed to a filled circle.
5.
Bring your CPU into RUN.
ð When the program reaches the breakpoint, your CPU
switches to the state HOLD, the breakpoint is marked with
an arrow and the register contents are monitored.
Behavior in operating
state HOLD
6.
Now you may execute the program code step by step via
‘Debug è Execute Next Statement’ or run the program until the
next breakpoint via ‘Debug è Resume’.
7.
Delete (all) breakpoints with the option ‘Debug
è Delete All Breakpoints’.
n
n
n
n
n
n
The RUN-LED blinks and the STOP-LED is on.
The execution of the code is stopped. No level is further executed.
All times are frozen.
The real-time clock runs is just running.
The outputs were disabled (BASP is activated).
Configured CP connections remain exist.
The usage of breakpoints is always possible. Switching to
the operating mode test operation is not necessary.
With more than 2 breakpoints, a single step execution is
not possible.
HB140 | CPU | 315-2AG12 | GB | 14-40
59
Deployment CPU 315-2AG12
VIPA System 300S CPU
Overall reset
5.12.2
Function security
The CPUs include security mechanisms like a Watchdog (100ms)
and a parametrizable cycle time surveillance (parametrizable min.
1ms) that stop res. execute a RESET at the CPU in case of an error
and set it into a defined STOP state. The VIPA CPUs are developed
function secure and have the following system properties:
Event
concerns
Effect
RUN ® STOP
general
BASP (Befehls-Ausgabe-Sperre, i.e. command output lock) is set.
central digital outputs
The outputs are disabled.
central analog outputs
The outputs are disabled.
n Voltage outputs issue 0V
n Current outputs 0...20mA issue 0mA
n Current outputs 4...20mA issue 4mA
If configured also substitute values may be
issued.
STOP ® RUN res.
PowerON
RUN
decentral outputs
Same behavior as the central digital/analog
outputs.
decentral inputs
The inputs are cyclically be read by the
decentralized station and the recent values
are put at disposal.
general
First the PII is deleted, then OB 100 is
called. After the execution of the OB, the
BASP is reset and the cycle starts with:
Delete PIO ® Read PII ® OB 1.
decentral inputs
The inputs are once be read by the decentralized station and the recent values are
put at disposal.
general
The program execution happens cyclically
and can therefore be foreseen: Read PII ®
OB 1 ® Write PIO.
PII: Process image inputs, PIO: Process image outputs
5.13
Overall reset
Overview
During the overall reset the entire user memory is erased. Data
located in the memory card is not affected. You have 2 options to initiate an overall reset:
n initiate the overall reset by means of the operating mode switch
n initiate the overall reset by means of the Siemens SIMATIC Manager
You should always issue an overall reset to your CPU
before loading an application program into your CPU to
ensure that all blocks have been cleared from the CPU.
60
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Overall reset
Overall reset by means
of the operating mode
switch
Precondition
The operating mode of the CPU is to be switched to STOP. For
this switch the operating mode switch of the CPU to "STOP".
ð The STOP-LED is on.
Overall reset
1.
Switch the operating mode switch to MRES position for about 3
seconds.
ð The STOP-LED changes from blinking to permanently on.
2.
Place the operating mode switch in the position STOP and
switch it to MRES and quickly back to STOP within a period of
less than 3 seconds.
ð The STOP-LED blinks (overall reset procedure).
3.
The overall reset has been completed when the STOP-LED is
on permanently.
ð The STOP-LED is on. The following figure illustrates the
above procedure:
Overall reset by means
of the Siemens SIMATIC
Manager
n Precondition The operating mode of the CPU is to be switched to
STOP. You may place the CPU in STOP by the menu command
‘PLC è Operating mode’.
n Overall reset: You may request the overall reset by means of the
menu command ‘PLC è Clean/Reset’. In the dialog window you
may place your CPU in STOP state and start the overall reset if
this has not been done as yet. The STOP-LED blinks during the
overall reset procedure. When the STOP-LED is on permanently
the overall reset procedure has been completed.
Automatic reload
If there is a project S7PROG.WLD on the MMC, the CPU attempts to
reload this project from MMC.
® The MC LED is on. When the reload has been completed the LED
expires. The operating mode of the CPU will be STOP respectively
RUN, depending on the position of the operating mode switch.
HB140 | CPU | 315-2AG12 | GB | 14-40
61
Deployment CPU 315-2AG12
VIPA System 300S CPU
Firmware update
Reset to factory setting
5.14
The Reset to factory setting deletes completely the internal RAM of
the CPU and resets this to delivery state. Please regard that the MPI
address is also set back to default 2! Ä Chapter 5.15 ‘Reset to factory
setting’ on page 64
Firmware update
Overview
n There is the opportunity to execute a firmware update for the CPU
and its components via MMC. For this an accordingly prepared
MMC must be in the CPU during the startup.
n So a firmware files can be recognized and assigned with startup,
a pkg file name is reserved for each updateable component an
hardware release, which begins with "px" and differs in a number
with six digits. The pkg file name of every updateable component
may be found at a label right down the front flap of the module.
n After PowerON and CPU STOP the CPU checks if there is a *.pkg
file on the MMC. If this firmware version is different to the existing
firmware version, this is indicated by blinking of the LEDs and the
firmware may be installed by an update request.
Latest firmware at
www.vipa.com
The latest firmware versions are to be found in the service area at
www.vipa.com. For example the following files are necessary for the
firmware update of the CPU 315-2AG12 and its components with
hardware release 1:
n 315-2AG12, Hardware release 1: Px000078.pkg
n PROFIBUS-DP master: Px000062.pkg
CAUTION!
When installing a new firmware you have to be extremely
careful. Under certain circumstances you may destroy the
CPU, for example if the voltage supply is interrupted
during transfer or if the firmware file is defective. In this
case, please call the VIPA-Hotline!
Please regard that the version of the update firmware has
to be different from the existing firmware otherwise no
update is executed.
62
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Firmware update
Display the Firmware
version of the SPEED7
system via Web Site
The CPU has an integrated website that monitors information about
firmware version of the SPEED7 components. The Ethernet PG/OP
channel provides the access to this web site. The CPU has an integrated website that monitors information about firmware version of
the SPEED7 components. The Ethernet PG/OP channel provides the
access to this web site. ‘PLC è Assign Ethernet Address’. After that
you may access the PG/OP channel with a web browser via the IP
address of the project engineering. Ä Chapter 5.11 ‘Access to the
internal Web page’ on page 56
Load firmware and
transfer it to MMC
n Go to www.vipa.com
n Click on ‘Service è Download è Firmware’.
n Navigate via ‘System 300S è CPU’ to your CPU and download
the zip file to your PC.
n Extract the zip file and copy the extracted pkg files to your MMC.
CAUTION!
With a firmware update an overall reset is automatically
executed. If your program is only available in the load
memory of the CPU it is deleted! Save your program
before executing a firmware update! After the firmware
update you should execute a "Set back to factory settings". Ä Chapter 5.15 ‘Reset to factory setting’
on page 64
Transfer firmware from
MMC into CPU
1.
Switch the operating mode switch of your CPU in position
STOP. Turn off the voltage supply. Plug the MMC with the firmware files into the CPU. Please take care of the correct plug-in
direction of the MMC. Turn on the voltage supply.
2.
After a short boot-up time, the alternate blinking of the LEDs SF
and FC shows that at least a more current firmware file was
found on the MMC.
3.
You start the transfer of the firmware as soon as you tip the
operating mode switch downwards to MRES within 10s.
4.
During the update process, the LEDs SF and FC are alternately
blinking and MC LED is on. This may last several minutes.
5.
The update is successful finished when the LEDs PW, ST, SF,
FC and MC are on. If they are blinking fast, an error occurred.
HB140 | CPU | 315-2AG12 | GB | 14-40
63
Deployment CPU 315-2AG12
VIPA System 300S CPU
Reset to factory setting
6.
Turn Power OFF and ON. Now it is checked by the CPU,
whether further current firmware versions are available at the
MMC. If so, again the LEDs SF and FC flash after a short startup period. Continue with point 3.
ð If the LEDs do not flash, the firmware update is ready. Now a
factory reset should be executed (see next page). After that
the CPU is ready for duty.
5.15
Reset to factory setting
Proceeding
With the following proceeding the internal RAM of the CPU is completely deleted and the CPU is reset to delivery state.
Please note that here also the IP address of the Ethernet PG/OP
channel is set to 0.0.0.0 and the MPI address is reset to the address
2!
A reset to factory setting may also be executed by the MMC-Cmd
FACTORY_ RESET. Ä Chapter 5.19 ‘MMC-Cmd - Auto commands’
on page 68
64
1.
Switch the CPU to STOP.
2.
Push the operating mode switch down to position MRES for 30s.
Here the STOP-LED flashes. After a few seconds the stop LED
changes to static light. Now the STOP LED changes between
static light and flashing. Starting here count the static light
states.
3.
After the 6. static light release the operating mode switch and tip
it downwards to MRES. Now the RUN LED lights up once. This
means that the RAM was deleted completely.
4.
For the confirmation of the resetting procedure the LEDs PW,
ST, SF, FC and MC get ON. If not, the factory reset has failed
and only an overall reset was executed. In this case you can
repeat the procedure. A factory reset can only be executed if the
stop LED has static light for exactly 6 times.
5.
The end of factory reset is shown by static light of the LEDs PW,
ST, SF, FC and MC. Switch the power supply off and on.
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
Slot for storage media
The proceeding is shown in the following Illustration:
After the firmware update you always should execute a
Reset to factory setting.
5.16
Slot for storage media
Overview
At the front of the CPU there is a slot for storage media. As external
storage medium for applications and firmware you may use a multimedia card (MMC). You can cause the CPU to load a project automatically respectively to execute a command file by means of predefined file names.
Accessing the storage
medium
To the following times an access takes place on a storage medium:
n After overall reset
– The CPU checks if there is a project S7PROG.WLD. If exists
the project is automatically loaded.
– The CPU checks if there is a project PROTECT.WLD with protected blocks. If exists the project is automatically loaded.
These blocks are stored in the CPU until the CPU is reset to
factory setting or an empty PROTECT.WLD is loaded
– The CPU checks if a MCC memory extension card is put. If
exists the memory extension is enabled, otherwise a memory
expansion, which was activated before, is de-activated.
n After PowerON
– The CPU checks if there is a project AUTOLOAD.WLD. If
exists an overall reset is established and the project is automatically loaded.
– The CPU checks if there is a command file with
VIPA_CMD.MMC. If exists the command file is loaded and the
containing instructions are executed.
– After PowerON and CPU STOP the CPU checks if there is a
*.pkg file (firmware file). If exists this is indicated by blinking of
the LEDs and the firmware may be installed by an update
request.
n Once in STOP
– If a storage medium is put, which contains a command file
VIPA_CMD.MMC, the command file is loaded and the containing instructions are executed.
HB140 | CPU | 315-2AG12 | GB | 14-40
65
Deployment CPU 315-2AG12
VIPA System 300S CPU
Memory extension with MCC
5.17
Memory extension with MCC
Overview
There is the possibility to extend the work memory of the CPU. For
this, a MCC memory extension card is available from VIPA. The MCC
is a specially prepared MMC (Multimedia Card). By plugging the MCC
into the MCC slot and then an overall reset the according memory
expansion is released. There may only one memory expansion be
activated at one time. On the MCC there is the file memory.key. This
file may not be altered or deleted. You may use the MCC also as
"normal" MMC for storing your project.
Proceeding
To extend the memory, plug the MCC into the card slot at the CPU
labelled with "MCC" and execute an overall reset.
If the memory expansion on the MCC exceeds the maximum extendible memory range of the CPU, the maximum possible memory of the
CPU is automatically used. You may determine the recent memory
extension via the integrated web page or with the Siemens SIMATIC
Manager at Module Information - "Memory".
CAUTION!
Please regard that the MCC must remain plugged when
you’ve executed the memory expansion at the CPU. Otherwise the CPU switches to STOP after 72 hours. The
MCC cannot be exchanged with a MCC of the same
memory configuration.
Behavior
When the MCC memory configuration has been taken over you may
find the diagnostic entry 0xE400 in the diagnostic buffer of the CPU.
After pulling the MCC the entry 0xE401 appears in the diagnostic
buffer, the SF LED is on and after 72 hours the CPU switches to
STOP. A reboot is only possible after plugging-in the MCC again or
after an overall reset.
The remaining time after pulling the MCC is always been shown with
the parameter MCC-Trial-Time on the web page.
After re-plugging the MCC, the SF LED extinguishes and 0xE400 is
entered into the diagnostic buffer. You may reset the memory configuration of your CPU to the initial status at any time by executing an
overall reset without MCC.
66
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VIPA System 300S CPU
Deployment CPU 315-2AG12
Extended know-how protection
5.18
Extended know-how protection
Overview
Besides the "standard" Know-how protection the SPEED7-CPUs from
VIPA provide an "extended" know-how protection that serves a
secure block protection for accesses of 3. persons.
Standard protection
The standard protection from Siemens transfers also protected blocks
to the PG but their content is not displayed. But with according manipulation the Know-how protection is not guaranteed.
Extended protection
The "extended" know-how protection developed by VIPA offers the
opportunity to store blocks permanently in the CPU. At the "extended"
protection you transfer the protected blocks into a WLD-file named
protect.wld. By plugging the MMC and following overall reset, the
blocks in the protect.wld are permanently stored in the CPU. You may
protect OBs, FBs and FCs. When back-reading the protected blocks
into the PG, exclusively the block header are loaded. The block code
that is to be protected remains in the CPU and cannot be read.
Protect blocks with protect.wld
Create a new wld-file in your project engineering tool with ‘File
è Memory Card file è New’ and rename it to "protect.wld". Transfer
the according blocks into the file by dragging them with the mouse
from the project to the file window of protect.wld.
Transfer protect.wld to
CPU with overall reset
Transfer the file protect.wld to a MMC storage module, plug the MMC
into the CPU and execute an overall reset with the following
approach:
The overall reset stores the blocks in protect.wld permanently in the
CPU protected from accesses of 3. persons.
HB140 | CPU | 315-2AG12 | GB | 14-40
67
Deployment CPU 315-2AG12
VIPA System 300S CPU
MMC-Cmd - Auto commands
Protection behavior
Protected blocks are overwritten by a new protect.wld. Using a PG 3.
persons may access protected blocks but only the block header is
transferred to the PG. The block code that is to be protected remains
in the CPU and cannot be read.
Change respectively
delete protected blocks
Protected blocks in the RAM of the CPU may be substituted at any
time by blocks with the same name. This change remains up to next
overall reset. Protected blocks may permanently be overwritten only if
these are deleted at the protect.wld before. By transferring an empty
protect.wld from the MMC you may delete all protected blocks in the
CPU.
Usage of protected
blocks
Due to the fact that reading of a "protected" block from the CPU monitors no symbol labels it is convenient to provide the "block covers" for
the end user. For this, create a project out of all protected blocks.
Delete all networks in the blocks so that these only contain the variable definitions in the according symbolism.
5.19
MMC-Cmd - Auto commands
Overview
A command file at a MMC is automatically executed under the following conditions:
n CPU is in STOP and MMC is stuck
n After each PowerON
Command file
The command file is a text file, which consists of a command
sequence to be stored as vipa_cmd.mmc in the root directory of the
MMC. The file has to be started by CMD_START as 1. command, followed by the desired commands (no other text) and must be finished
by CMD_END as last command.
Text after the last command CMD_END e.g. comments is permissible, because this is ignored. As soon as the command file is recognized and executed each action is stored at the MMC in the log file
logfile.txt. In addition for each executed command a diagnostics entry
may be found in the diagnostics buffer.
Commands
Please regard the command sequence is to be started with
CMD_START and ended with CMD_END.
Command
Description
Diagnostics entry
CMD_START
In the first line CMD_START is to be located.
0xE801
There is a diagnostic entry if CMD_START is
missing
0xE8FE
WAIT1SECOND
Waits about 1 second.
0xE803
WEBPAGE
The current web page of the CPU is stored at
the MMC as" webpage.htm".
0xE804
LOAD_PROJECT
The function "Overall reset and reload from
0xE805
MMC" is executed. The wld file located after the
command is loaded else "s7prog.wld" is loaded.
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HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
MMC-Cmd - Auto commands
Command
Description
SAVE_PROJECT
The recent project (blocks and hardware config- 0xE806
uration) is stored as "s7prog.wld" at the MMC.If
the file just exists it is renamed to "s7prog.old".
If your CPU is password protected so you have
to add this as parameter. Otherwise there is no
project written. Example: SAVE_PROJECT
password
FACTORY_RESET
Executes "factory reset".
0xE807
DIAGBUF
The current diagnostics buffer of the CPU is
stored as "diagbuff.txt" at the MMC.
0xE80B
SET_NETWORK
IP parameters for Ethernet PG/OP channel may 0xE80E
be set by means of this command. The IP
parameters are to be given in the order IP
address, subnet mask and gateway in the
format x.x.x.x each separated by a comma.
Enter the IP address if there is no gateway
used.
CMD_END
In the last line CMD_END is to be located.
Examples
Diagnostics entry
0xE802
The structure of a command file is shown in the following. The corresponding diagnostics entry is put in parenthesizes.
Example 1
CMD_START
Marks the start of the command sequence (0xE801)
LOAD_PROJECT proj.wld
Execute an overall reset and load "proj.wld" (0xE805)
WAIT1SECOND
Wait ca. 1s (0xE803)
WEBPAGE
Store web page as "webpage.htm" (0xE804)
DIAGBUF
Store diagnostics buffer of the CPU as "diagbuff.txt"
(0xE80B)
CMD_END
Marks the end of the command sequence (0xE802)
... arbitrary text ...
Text after the command CMD_END is not evaluated.
Example 2
CMD_START
Marks the start of the command sequence (0xE801)
LOAD_PROJECT proj2.wld
Execute an overall reset and load "proj2.wld" (0xE805)
WAIT1SECOND
Wait ca. 1s (0xE803)
WAIT1SECOND
Wait ca. 1s (0xE803)
SET_NETWORK
172.16.129.210,255.255.224.0
,172.16.129.210
IP parameter(0xE80E)
WAIT1SECOND
Wait ca. 1s (0xE803)
WAIT1SECOND
Wait ca. 1s (0xE803)
WEBPAGE
Store web page as "webpage.htm" (0xE804)
DIAGBUF
Store diagnostics buffer of the CPU as "diagbuff.txt"
(0xE80B)
HB140 | CPU | 315-2AG12 | GB | 14-40
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Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
CMD_END
Marks the end of the command sequence (0xE802)
... arbitrary text ...
Text after the command CMD_END is not evaluated.
The parameters IP address, subnet mask and gateway
may be received from the system administrator.
Enter the IP address if there is no gateway used.
5.20
VIPA specific diagnostic entries
Entries in the diagnostic buffer
You may read the diagnostic buffer of the CPU via the Siemens
SIMATIC Manager. Besides of the standard entries in the diagnostic
buffer, the VIPA CPUs support some additional specific entries in
form of event-IDs.
The current content of the diagnostics buffer is stored at the memory
card by means of the CMD DIAGBUF.
Every register of the module information is supported by
the VIPA CPUs. More information may be found at the
online help of the Siemens SIMATIC Manager.
Monitoring the diagnostic entries
70
To monitor the diagnostic entries you choose the option ‘PLC
è Module Information’ in the Siemens SIMATIC Manager. Via the
register "Diagnostic Buffer" you reach the diagnostic window:
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
The diagnosis is independent from the operating mode of the CPU.
You may store a max. of 100 diagnostic entries in the CPU. The following page shows an overview of the VIPA specific Event-IDs.
Overview of the Event-IDs
Event-ID
0x115C
Description
Vendor-specific interrupt (OB 57) at EtherCAT
OB: OB number (57)
ZInfo1: Logical address of the slave, which has released the interrupt
ZInfo2: Interrupt type
ZInfo3: Reserved
0xE003
Error on accessing the periphery
ZInfo1: Periphery address
ZInfo2: Slot
0xE004
Multiple parametrization of a periphery address
ZInfo1: Periphery address
ZInfo2: Slot
0xE005
Internal error - Please contact the VIPA Hotline!
0xE006
Internal error - Please contact the VIPA Hotline!
0xE007
Configured in-/output bytes do not fit into periphery area
0xE008
Internal error - Please contact the VIPA Hotline!
0xE009
Error on accessing the standard backplane bus
0xE010
There is a undefined module at the backplane bus
ZInfo2: Slot
ZInfo3: Type ID
0xE011
Master project engineering at slave CPU not possible or wrong slave
configuration
0xE012
Error at parametrization
0xE013
Error at shift register access to standard bus digital modules
0xE014
Error at Check_Sys
0xE015
Error at access to the master
ZInfo2: Slot of the master (32=page frame master)
0xE016
Maximum block size at master transfer exceeded
ZInfo1: Periphery address
ZInfo2: Slot
0xE017
Error at access to integrated slave
0xE018
Error at mapping of the master periphery
0xE019
Error at standard back plane bus system recognition
0xE01A
Error at recognition of the operating mode (8 / 9 bit)
HB140 | CPU | 315-2AG12 | GB | 14-40
71
Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xE01B
Error - Maximum number of plug-in modules exceeded
0xE020
Error - Interrupt information is not defined
0xE030
Error of the standard bus
0xE033
Internal error - Please contact the VIPA Hotline!
0xE0B0
SPEED7 is not stoppable
(Probably undefined BCD value at timer)
0xE0C0
Not enough space in work memory for storing code block (block size
exceeded)
0xE0CB
Error at SSL access
ZInfo1: 4=SSL wrong, 5=SubSSL wrong, 6=Index wrong
ZInfo2: SSL-ID
ZInfo3: Index
0xE0CC
Communication error MPI / Serial
ZInfo1: Code
1: Wrong priority
2: Buffer overflow
3: Frame format error
4: Wrong SSL request (SSL-ID not valid)
5: Wrong SSL request (SSL-SubID not valid)
6: Wrong SSL request (SSL-Index not valid)
7: Wrong value
8: Wrong RetVal
9: Wrong SAP
10: Wrong connection type
11: Wrong sequence number
12: Faulty block number in the telegram
13: Faulty block type in the telegram
14: Inactive function
15: Wrong size in the telegram
20: Error writing to memory card
90: Faulty buffer size
98: Unknown error
99: Internal error
72
0xE0CD
Error at DP-V1 job management
0xE0CE
Error: Timeout at sending of the i-slave diagnostics
0xE0CF
Timeout at loading of a new HW configuration (timeout: 39 seconds)
0xE100
Memory card access error
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xE101
Memory card error file system
0xE102
Memory card error FAT
0xE104
Memory card error at saving
0xE200
Memory card writing finished (Copy Ram2Rom)
0xE210
Memory card reading finished (reload after overall reset)
0xE21E
Memory card reading: Error at reload (after overall reset), file "Protect.wld"
too big
0xE21F
Memory card reading: Error at reload (after overall reset), file read error, out
of memory
0xE300
Internal flash writing finished (Copy Ram2Rom)
0xE310
Internal flash writing finished (reload after battery failure)
0xE311
Internal flash fx0000yy.wld file too big, load failure
0xE400
Memory card with the option memory expansion was plugged
0xE401
Memory card with the option memory expansion was removed
0xE402
The PROFIBUS DP master functionality is disabled. The interface acts further as MPI interface
0xE403
The PROFIBUS DP slave functionality is disabled. The interface acts further
as MPI interface
0xE500
Memory management: Deleted block without corresponding entry in Block
List
ZInfo2: BlockType
ZInfo3: BlockNo
0xE604
Multiple parametrization of a periphery address for Ethernet PG/OP channel
ZInfo1: Periphery address
ZInfo3:
0: Periphery address is input, 1: Periphery address is output
0xE701
Internal error - Please contact the VIPA Hotline!
0xE703
Internal error - Please contact the VIPA Hotline!
0xE720
Internal error - Please contact the VIPA Hotline!
0xE721
Internal error - Please contact the VIPA Hotline!
0xE801
CMD - Auto command: CMD_START recognized and successfully executed
0xE802
CMD - Auto command: CMD_End recognized and successfully executed
0xE803
CMD - Auto command: WAIT1SECOND recognized and successfully executed
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Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xE804
CMD - Auto command: WEBPAGE recognized and successfully executed
0xE805
CMD - Auto command: LOAD_PROJECT recognized and successfully executed
0xE806
CMD - Auto command: SAVE_PROJECT recognized and successfully executed
0xE807
CMD - Auto command: FACTORY_RESET recognized and successfully
executed
0xE80B
CMD - Auto command: DIAGBUF recognized and successfully executed
0xE80E
CMD - Auto command: SET_NETWORK recognized and successfully executed
0xE8FB
CMD - Auto command: Error: Initialization of the Ethernet PG/OP channel
by means of SET_NETWORK is faulty
0xE8FC
CMD - Auto command: Error: Some IP parameters missing in SET_NETWORK
0xE8FE
CMD - Auto command: Error: CMD_START missing
0xE8FF
CMD - Auto command: Error: Error while reading CMD file (memory card
error)
0xE901
Check sum error
0xEA00
Internal error - Please contact the VIPA Hotline!
0xEA01
Internal error - Please contact the VIPA Hotline!
0xEA02
SBUS: Internal error (internal plugged sub module not recognized)
ZInfo1: Internal slot
0xEA03
SBUS: Communication error CPU - PROFINET I/O controller:
ZInfo1: Slot
ZInfo2: Status
(0: OK, 1: ERROR, 2: BUSSY, 3: TIMEOUT, 4: LOCKED, 5: UNKNOWN)
0xEA04
SBUS: Multiple parametrization of a periphery address
ZInfo1: Periphery address
ZInfo2: Slot
ZInfo3: Data width
0xEA05
Internal error - Please contact the VIPA Hotline!
0xEA07
Internal error - Please contact the VIPA Hotline!
0xEA08
SBUS: Parametrized input data width unequal to plugged input data width
ZInfo1: Parametrized input data width
ZInfo2: Slot
ZInfo3: Input data width of the plugged module
74
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xEA09
SBUS: Parametrized output data width unequal to plugged output data width
ZInfo1: Parametrized output data width
ZInfo2: Slot
ZInfo3: Output data width of the plugged module
0xEA10
SBUS: Input periphery address outside the periphery area
ZInfo1: Periphery address
ZInfo2: Slot
ZInfo3: Data width
0xEA11
SBUS: Output periphery address outside the periphery area
ZInfo1: Periphery address
ZInfo2: Slot
ZInfo3: Data width
0xEA12
SBUS: Error at writing record set
ZInfo1: Slot
ZInfo2: Record set number
ZInfo3: Record set length
0xEA14
SBUS: Multiple parametrization of a periphery address (diagnostics
address)
ZInfo1: Periphery address
ZInfo2: Slot
ZInfo3: Data width
0xEA15
Internal error - Please contact the VIPA Hotline!
0xEA18
SBUS: Error at mapping of the master periphery
ZInfo2: Slot of the master
0xEA19
Internal error - Please contact the VIPA Hotline!
0xEA20
Error - RS485 interface is not pre-set to PROFIBUS DP master bus a PROFIBUS DP master is configured.
0xEA21
Error - Configuration RS485 interface X2/X3:
PROFIBUS DP master is configured but missing
ZInfo2: Interface x
0xEA22
Error - RS485 interface X2 - Value exceeds the limits
ZInfo: Configured value of X2
0xEA23
Error - RS485 interface X3 - Value exceeds the limits
ZInfo: Configured value of X3
0xEA24
Error - Configuration RS485 interface X2/X3:
Interface/protocol missing, default settings are used
ZInfo2: Configured value for X2
ZInfo3: Configured value for X3
HB140 | CPU | 315-2AG12 | GB | 14-40
75
Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xEA30
Internal error - Please contact the VIPA Hotline!
0xEA40
Internal error - Please contact the VIPA Hotline!
0xEA41
Internal error - Please contact the VIPA Hotline!
0xEA50
Error - PROFINET configuration
ZInfo1: User slot of the PROFINET I/O controller
ZInfo2: IO-Device-No.
ZInfo3: IO-Device slot
0xEA51
Error - There is no PROFINET IO controller at the configured slot
ZInfo1: User slot of the PROFINET I/O controller
ZInfo2: Recognized ID at the configured slot
0xEA53
Error - PROFINET configuration - There are too many PROFINET IO
devices configured
ZInfo1: Number of configured devices
ZInfo2: Slot
ZInfo3: Maximum possible number of devices
0xEA54
Error - PROFINET IO controller reports multiple parametrization of a
periphery address
ZInfo1: Periphery address
ZInfo2: User slot of the PROFINET I/O controller
ZInfo3: Data width
0xEA61 ... 0xEA63 Internal error - Please contact the VIPA Hotline!
76
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xEA64
PROFINET/EtherCAT CP
Configuration error: Zinfo1:
Bit 0: Too many devices
Bit 1: Too many devices per ms
Bit 2: Too many input bytes per ms
Bit 3: Too many output bytes per ms
Bit 4: Too many input bytes per device
Bit 5: Too many output bytes per device
Bit 6: Too many productive connections
Bit 7: Too many input bytes in the process image
Bit 8: Too many output bytes in the process image
Bit 9: Configuration not available
Bit 10: Configuration not valid
Bit 11: Cycle time too small
Bit 12: Cycle time too big
Bit 13: Not valid device number
Bit 14: CPU is configured as I device
Bit 15: Obtain an IP address in a different way is not supported for the IP
address of the controller
0xEA65
Internal error - Please contact the VIPA Hotline!
0xEA66
PROFINET IO controller
Error in communication stack
PK: Rackslot
OBNr: StackError.Service
DatId: StackError.DeviceRef
ZInfo1: StackError.Error.Code
ZInfo2: StackError.Error.Detail
ZInfo3: StackError.Error.AdditionalDetail
<< 8 + StackError.Error.AreaCode
0xEA67
Error - PROFINET IO controller - reading record set
PK: Error type
0: DATA_RECORD_ERROR_LOCAL
1: DATA_RECORD_ERROR_STACK
2: DATA_RECORD_ERROR_REMOTE
OBNr: PROFINET IO controller slot
DatId: Device-No.
ZInfo1: Record set number
ZInfo2: Record set handle
ZInfo3: Internal error code for service purposes
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Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xEA68
Error - PROFINET IO controller - writing record set
PK: Error type
0: DATA_RECORD_ERROR_LOCAL
1: DATA_RECORD_ERROR_STACK
2: DATA_RECORD_ERROR_REMOTE
OBNo: PROFINET IO controller slot
DatId: Device-No.
ZInfo1: Record set number
ZInfo2: Record set handle
ZInfo3: Internal error code for service purposes
0xEA69
Internal error - Please contact the VIPA Hotline!
0xEA6A
PROFINET IO controller
Service error in communication stack
PK: Rackslot
OBNo: ServiceIdentifier
DatId: 0
ZInfo1: ServiceError.Code
ZInfo2: ServiceError.Detail
ZInfo3: StackError.Error.AdditionalDetail
0xEA6B
PROFINET IO controller
Vendor ID mismatch
PK: Rackslot
OBNo: PLC Mode
DatId: 0
ZInfo1: Device ID
ZInfo2: ZInfo3: -
0xEA6C
PROFINET IO controller
Device ID mismatch
PK: Rackslot
OBNo: PLC Mode
DatId: 0
ZInfo1: Device ID
ZInfo2: ZInfo3: -
78
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xEA6D
PROFINET IO controller
No empty name
PK: Rackslot
OBNo: PLC Mode
DatId: 0
ZInfo1: Device ID
ZInfo2: ZInfo3: -
0xEA6E
PROFINET IO controller
RPC response missing
PK: Rackslot
OBNo: PLC Mode
DatId: 0
ZInfo1: Device ID
ZInfo2: ZInfo3: -
0xEA6F
PROFINET IO controller
PN module mismatch
PK: Rackslot
OBNo: PLC-Mode
DatId: 0
ZInfo1: Device ID
ZInfo2: ZInfo3: -
0xEA97
Storage error SBUS service channel
ZInfo3 = Slot
0xEA98
Timeout at waiting for reboot of a SBUS module (server)
0xEA99
Error at file reading via SBUS
HB140 | CPU | 315-2AG12 | GB | 14-40
79
Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xEAA0
Emac Error occurred
OBNo: Current PLC mode
ZInfo1: Diagnostics address of the master / controller
ZInfo2:
0: None Rx queue is full
1: No send buffer available
2: Send stream was cut off; sending failed
3: Exhausted retries
4: No receive buffer available in Emac DMA
5: Emac DMA transfer aborted
6: Queue overflow
7: Unexpected frame received
ZInfo3: Number of errors, which occurred
0xEAB0
Link mode not valid
OBNo: Current PLC mode
ZInfo1: Diagnostics address master / controller
Zinfo2: Current LinkMode
0x01: 10Mbit full-duplex
0x02: 100Mbit half-duplex
0x03: 100Mbit full-duplex
0x05: 10Mbit half-duplex
0xFF: Link mode not defined
0xEB03
SLIO error on IO mapping
0xEB10
SLIO error: Bus error
ZInfo1: Type of error
0x82: ErrorAlarm
80
0xEB20
SLIO error: Interrupt information undefined
0xEB21
SLIO error on accessing the configuration data
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xEC03
EtherCAT: Configuration error
ZInfo1: Errorcode
1: NUMBER_OF_SLAVES_NOT_SUPPORTED
2: SYSTEM_IO_NR_INVALID
3: INDEX_FROM_SLOT_ERROR
4: MASTER_CONFIG_INVALID
5: MASTER_TYPE_ERROR
6: SLAVE_DIAG_ADDR_INVALID
7: SLAVE_ADDR_INVALID
8: SLAVE_MODULE_IO_CONFIG_INVALID
9: LOG_ADDR_ALREADY_IN_USE
10: NULL_PTR_CHECK_ERROR
11: IO_MAPPING_ERROR
12: ERROR
0xEC04
EtherCAT: Multiple configuration of a periphery address
ZInfo1: Periphery address
ZInfo2: Slot
0xEC10
EtherCAT: Restoration bus with its slaves
OB start Info (Local data) StartEvent and Eventclass: 0xEC10
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics address of the master
ZInfo3: Number of stations, which are not in the same state as the master
(> 0)
HB140 | CPU | 315-2AG12 | GB | 14-40
81
Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xEC11
EtherCAT: Restoration bus with missing slaves
OB start Info (Local data) StartEvent and Eventclass: 0xEC11
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics address of the master
ZInfo3: Number of stations, which are not in the same state as the master
(> 0)
0xEC12
EtherCAT: restoration slave
OB start Info (Local data) StartEvent and Eventclass: 0xEC12
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics of the Station
ZInfo3: AlStatusCode
0xEC30
EtherCAT: Topology OK
OB start Info (Local data) StartEvent and Eventclass: 0xEC30
ZInfo2: Diagnostics address of the master
0xEC50
EtherCAT: DC not in Sync
ZInfo1: Diagnostics address of the master
0xED10
EtherCAT: Bus failure
OB start Info (Local data) StartEvent and Eventclass: 0xED10
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics address of the master
ZInfo3: Number of stations, which are not in the same state as the master
82
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xED12
EtherCAT: Failure slave
OB start Info (Local data) StartEvent and Eventclass: 0xED12
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics of the Station
ZInfo3: AlStatusCode
0xED20
EtherCAT: Bus state change without calling OB86
OB start Info (Local data) StartEvent and Eventclass: 0xED20
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics address of the master
ZInfo3: Number of stations, which are not in the same state as the master
0xED21
EtherCAT: error in bus state change
OB: 0x00
PK: 0x00
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX = current state, YY = expected state)
ZInfo2: Diagnostics address of the master
ZInfo3: ErrorCode:
0x0008: Busy
0x000B: Invalid Parameter
0x000E: Invalid State
0x0010: Timeout
HB140 | CPU | 315-2AG12 | GB | 14-40
83
Deployment CPU 315-2AG12
VIPA System 300S CPU
VIPA specific diagnostic entries
Event-ID
Description
0xED22
EtherCAT: Bus state change without calling OB86
OB start Info (Local data) StartEvent and Eventclass: 0xED22
DatID:
0xXXYY:
XX=0x54 with input address in ZInfo1,
XX=0x55 with output address.
YY=0x00 Station not available,
YY=0x01 Station available (process data)
ZInfo1: 0xXXYY (XX=OldState, YY=NewState)
ZInfo2: Diagnostics of the Station
ZInfo3: AlStatusCode
0xED30
EtherCAT: Topology Mismatch
OB start Info (Local data) StartEvent and Eventclass: 0xED30
ZInfo2: Diagnostics address of the master
0xED31
EtherCAT: Interrupt Queue Overflow
OB start Info (Local data) StartEvent and Eventclass: 0xED31
ZInfo2: Diagnostics address of the master
0xED40 ... 0xED4F Internal error - Please contact the VIPA Hotline!
0xED50
EtherCAT: DC not in Sync
ZInfo1: Diagnostics address of the master
0xED60
EtherCAT: Diagnostics buffer CP:
Slave state change
PK: 0
OB: PLC-Mode
DatID 1/2: 0
ZInfo1: 0x00YY:
YY: New EtherCAT state of the slave
ZInfo2: EtherCAT station address
ZInfo3: AlStatusCode (EtherCAT specific error code)
84
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment CPU 315-2AG12
VIPA specific diagnostic entries
Event-ID
Description
0xED61
EtherCAT: Diagnostics buffer CP:
CoE emergency
PK: EtherCAT station address (low byte)
OB: EtherCAT station address (high byte)
DatID 1/2: Error code
ZInfo1: 0xYYZZ:
YY: Error register
ZZ: MEF byte 1
ZInfo 2: 0xYYZZ:
YY: MEF byte 2
ZZ: MEF byte 3
ZInfo3: 0xYYZZ:
YY: MEF byte 4
ZZ: MEF byte 5
0xED62
EtherCAT: Diagnostics buffer CP:
Error on SDO access during state change
PK: EtherCAT station address (low byte)
OB: EtherCAT station address (high byte)
DatID 1/2: Subindex
ZInfo1: Index
ZInfo2: SDO error code (high word)
ZInfo3: SDO error code (low word)
0xED70
EtherCAT: Diagnostics buffer CP:
Twice HotConnect group found
PK: 0
OB: PLC-Mode
DatID 1/2: 0
ZInfo1: Diagnostics address of the master
ZInfo2: EtherCAT station address
ZInfo3: 0
0xEE00
Additional information at UNDEF_OPCODE
0xEE01
Internal error - Please contact the VIPA Hotline!
0xEEEE
CPU was completely overall reset, since after PowerON the start-up could
not be finished.
0xEF11 ... 0xEF13 Internal error - Please contact the VIPA Hotline!
HB140 | CPU | 315-2AG12 | GB | 14-40
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Deployment CPU 315-2AG12
VIPA System 300S CPU
Control and monitoring of variables with test functions
Event-ID
Description
0xEFFF
Internal error - Please contact the VIPA Hotline!
PK: C-Source module number | DatID: Line number
5.21
Control and monitoring of variables with test functions
Overview
For troubleshooting purposes and to display the status of certain variables you can access certain test functions via the menu item Debug
of the Siemens SIMATIC Manager.
The status of the operands and the RLO can be displayed by means
of the test function ‘Debug è Monitor’.
You can modify and/or display the status of variables by means of the
test function ‘PLC è Monitor/Modify Variables’.
‘Debug è Monitor’
This test function displays the current status and the RLO of the different operands while the program is being executed.
It is also possible to enter corrections to the program.
When using the test function “Monitor” the PLC must be in
RUN mode!
The processing of the states may be interrupted by means of jump
commands or by timer and process-related alarms. At the breakpoint
the CPU stops collecting data for the status display and instead of the
required data it only provides the PG with data containing the value 0.
For this reason, jumps or time and process alarms can result in the
value displayed during program execution remaining at 0 for the items
below:
n
n
n
n
n
the result of the logical operation RLO
Status / AKKU 1
AKKU 2
Condition byte
absolute memory address SAZ. In this case SAZ is followed by a
"?".
The interruption of the processing of statuses does not change the
execution of the program. It only shows that the data displayed is no
longer.
‘PLC
è Monitor/Modify
Variables’
This test function returns the condition of a selected operand (inputs,
outputs, flags, data word, counters or timers) at the end of programexecution.
This information is obtained from the process image of the selected
operands. During the "processing check" or in operating mode STOP
the periphery is read directly from the inputs. Otherwise only the
process image of the selected operands is displayed.
Control of outputs
86
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VIPA System 300S CPU
Deployment CPU 315-2AG12
Control and monitoring of variables with test functions
It is possible to check the wiring and proper operation of output modules.
You can set outputs to any desired status with or without a control
program. The process image is not modified but outputs are no longer
inhibited.
Control of variables
The following variables may be modified: I, Q, M, T, C and D.
The process image of binary and digital operands is modified independently of the operating mode of the CPU.
When the operating mode is RUN the program is executed with the
modified process variable. When the program continues they may,
however, be modified again without notification.
Process variables are controlled asynchronously to the execution
sequence of the program.
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Fast introduction
6
Deployment PtP communication
6.1 Fast introduction
General
The CPU has a PROFIBUS/PtP interface with a fix pinout. After an
overall reset the interface is deactivated. By appropriate configuration
the PtP function (point to point) can be enabled:
n PtP functionality
– Using the PtP functionality the RS485 interface is allowed to
connect via serial point-to-point connection to different source
res. target systems.
– The activation of the PtP functionality happens by embedding
the SPEEDBUS.GSD from VIPA in the hardware catalog. After
the installation the CPU may be configured in a PROFIBUS
master system and here the interface may be switched to PtP
communication.
Protocols
The protocols res. procedures ASCII, STX/ETX, 3964R, USS and
Modbus are supported.
Parametrization
The parametrization of the serial interface happens during runtime
using the FC/SFC 216 (SER_CFG). For this you have to store the
parameters in a DB for all protocols except ASCII.
Communication
The FCs/SFCs are controlling the communication. Send takes place
via FC/SFC 217 (SER_SND) and receive via FC/SFC 218
(SER_RCV). The repeated call of the FC/SFC 217 SER_SND
delivers a return value for 3964R, USS and Modbus via RetVal that
contains, among other things, recent information about the acknowledgement of the partner station. The protocols USS and Modbus
allow to evaluate the receipt telegram by calling the FC/SFC 218
SER_RCV after SER_SND. The FCs/SFCs are included in the consignment of the CPU.
Overview FCs/SFCs for
serial communication
The following FCs/SFCs are used for the serial communication:
FC/SFC
88
Description
FC/SFC 216
SER_CFG
RS485 parameterize
FC/SFC 217
SER_SND
RS485 send
FC/SFC 218
SER_RCV
RS485 receive
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VIPA System 300S CPU
Deployment PtP communication
Deployment of RS485 interface for PtP
6.2 Principle of the data transfer
Overview
The data transfer is handled during runtime by using FC/SFCs. The
principle of data transfer is the same for all protocols and is shortly
illustrated in the following.
n Data, which are written into the according data channel by the
CPU, is stored in a FIFO send buffer (first in first out) with a size
of 2x1024byte and then put out via the interface.
n When the interface receives data, this is stored in a FIFO receive
buffer with a size of 2x1024byte and can there be read by the
CPU.
n If the data is transferred via a protocol, the embedding of the data
to the according protocol happens automatically.
n In opposite to ASCII and STX/ETX, the protocols 3964R, USS and
Modbus require the acknowledgement of the partner.
n An additional call of the FC/SFC 217 SER_SND causes a return
value in RetVal that includes among others recent information
about the acknowledgement of the partner.
n Further on for USS and Modbus after a SER_SND the acknowledgement telegram must be evaluated by a call of the FC/SFC
218 SER_RCV.
6.3 Deployment of RS485 interface for PtP
Switch to PtP operation
Per default, the RS485 interface is deactivated. Via hardware configuration the RS485 interfaces may be switched to PtP operation (point
to point) via the parameter Function RS485 of the Properties.
Requirements
Since the VIPA specific CPU parameters may be set, the installation
of the SPEEDBUS.GSD from VIPA in the hardware catalog is necessary. The CPU may be configured in a PROFIBUS master system
and the appropriate parameters may be set after installation.
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Deployment of RS485 interface for PtP
Installation of the
SPEEDBUS.GSD
The GSD (Geräte-Stamm-Datei) is online available in the following
language versions. Further language versions are available on
inquires:
Name
Language
SPEEDBUS.GSD
german (default)
SPEEDBUS.GSG
german
SPEEDBUS.GSE
english
The GSD files may be found at www.vipa.com at the "Service" part.
The integration of the SPEEDBUS.GSD takes place with the following
proceeding:
1.
Browse to www.vipa.com
2.
Click to ‘Service è Download è GSD- and EDS-Files
è Profibus’
3.
Download the file Cx000023_Vxxx.
4.
Extract the file to your work directory. The SPEEDBUS.GSD is
stored in the directory VIPA_System_300S.
5.
Start the hardware configurator from Siemens.
6.
Close every project.
7.
Select ‘Options è Install new GSD-file’.
8.
Navigate to the directory VIPA_System_300S and select
SPEEDBUS.GSD an.
ð The SPEED7 CPUs and modules of the System 300S from
VIPA may now be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O /
VIPA_SPEEDBUS.
90
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Deployment PtP communication
Deployment of RS485 interface for PtP
Proceeding
The embedding of the CPU 315-2AG12 happens by means of a virtual PROFIBUS master system with the following approach:
1.
Perform a hardware configuration for the CPU. Ä Chapter 5.4
‘Hardware configuration - CPU’ on page 39
2.
Configure always as last module a Siemens DP master CP
342-5 (342-5DA02 V5.0). Connect and parameterize it at operation mode "DP-Master".
3.
Connect the slave system "VIPA_SPEEDbus". After installing
the SPEEDBUS.GSD this may be found in the hardware catalog
at PROFIBUS DP / Additional field devices / I/O / VIPA /
VIPA_SPEEDBUS.
4.
For the slave system set the PROFIBUS address 100.
5.
Configure at slot 0 the VIPA CPU 315-2AG12 of the hardware
catalog from VIPA_SPEEDbus.
6.
By double clicking the placed CPU 315-2AG12 the properties
dialog of the CPU may be opened.
As soon as the project is transferred together with the PLC user program to the CPU, the parameters will be taken after start-up.
The hardware configuration, which is shown here, is only
required, if you want to customize the VIPA specific
parameters.
Setting PtP parameters
Properties RS485
1.
By double clicking the CPU 315-2AG12 placed in the slave
system the properties dialog of the CPU may be opened.
2.
Switch the Parameter ‘Function RS485 X3’ to ‘PtP’ .
n Logical states represented by voltage differences between the two
cores of a twisted pair cable
n Serial bus connection in two-wire technology using half duplex
mode
n Data communications up to a max. distance of 500m
n Data communication rate up to 115.2kbaud
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Parametrization> FC/SFC 216 - SER_CFG
RS485
9pin SubD jack
Pin
RS485
1
n.c.
2
M24V
3
RxD/TxD-P (Line B)
4
RTS
5
M5V
6
P5V
7
P24V
8
RxD/TxD-N (Line A)
9
n.c.
Connection
6.4 Parametrization
6.4.1 FC/SFC 216 - SER_CFG
Description
92
The parametrization happens during runtime deploying the FC/SFC
216 (SER_CFG). You have to store the parameters for STX/ETX,
3964R, USS and Modbus in a DB.
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Deployment PtP communication
Parametrization> FC/SFC 216 - SER_CFG
Parameters
Parameter
Declaration
Data type
Description
PROTOCOL
IN
BYTE
1=ASCII, 2=STX/ETX, 3=3964R
PARAMETER
IN
ANY
Pointer to protocol-parameters
BAUDRATE
IN
BYTE
Number of baudrate
CHARLEN
IN
BYTE
0=5bit, 1=6bit, 2=7bit, 3=8bit
PARITY
IN
BYTE
0=Non, 1=Odd, 2=Even
STOPBITS
IN
BYTE
1=1bit, 2=1.5bit, 3=2bit
FLOWCONTROL
IN
BYTE
1 (fix)
RETVAL
OUT
WORD
Return value (0 = OK)
All time settings for timeouts must be set as hexadecimal value. Find
the Hex value by multiply the wanted time in seconds with the baudrate.
Example:
Wanted time 8ms at a baudrate of 19200baud
Calculation: 19200bit/s x 0.008s ≈ 154bit → (9Ah)
Hex value is 9Ah.
PROTOCOL
Here you fix the protocol to be used.
You may choose between:
1: ASCII
2: STX/ETX
3: 3964R
4: USS Master
5: Modbus RTU Master
6: Modbus ASCII Master
PARAMETER (as DB)
At ASCII protocol, this parameter is ignored.
At STX/ETX, 3964R, USS and Modbus you fix here a DB that contains the communication parameters and has the following structure
for the according protocols:
Data block at STX/ETX
DBB0:
STX1
BYTE
(1. Start-ID in hexadecimal)
DBB1:
STX2
BYTE
(2. Start-ID in hexadecimal)
DBB2:
ETX1
BYTE
(1. End-ID in hexadecimal)
DBB3:
ETX2
BYTE
(2. End-ID in hexadecimal)
WORD
(max. delay time between 2
telegrams)
DBW4: TIMEOUT
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Parametrization> FC/SFC 216 - SER_CFG
The start res. end sign should always be a value <20, otherwise the sign is ignored!
With not used IDs please always enter FFh!
Data block at 3964R
DBB0:
Prio
BYTE
(The priority of both partners
must be different)
DBB1:
ConnAttmptNr
BYTE
(Number of connection trials)
DBB2:
SendAttmptNr
BYTE
(Number of telegram retries)
DBB4:
CharTimeout
WORD
(Char. delay time)
DBW6: ConfTimeout
WORD
(Acknowledgement delay time )
WORD
(Delay time)
Data block at USS
DBW0: Timeout
Data block at Modbus master
DBW0: Timeout
WORD
(Respond delay time)
BAUDRATE
Velocity of data transfer in bit/s (baud)
04h:
1200baud
05h:
1800baud
06h:
2400baud
07h:
4800baud
08h:
7200baud
09h:
9600baud
0Ah:
14400baud
0Bh:
19200baud
0Ch:
38400baud
0Dh:
57600baud
0Eh:
115200baud
CHARLEN
Number of data bits where a character is mapped to.
0: 5bit
PARITY
94
2: 7bit
3: 8bit
The parity is -depending on the value- even or odd. For parity control,
the information bits are extended with the parity bit, that amends via
its value ("0" or "1") the value of all bits to a defined status. If no parity
is set, the parity bit is set to "1", but not evaluated.
0: NONE
STOPBITS
1: 6bit
1: ODD
2: EVEN
The stop bits are set at the end of each transferred character and
mark the end of a character.
HB140 | CPU | 315-2AG12 | GB | 14-40
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Deployment PtP communication
Communication> Overview
1: 1bit
2: 1.5bit
3: 2bit
FLOWCONTROL
The parameter FLOWCONTROL is ignored. When sending RTS=1,
when receiving RTS=0.
RETVAL FC/SFC 216
(Return values)
Return values send by the block:
Error
code
Description
0000h
no error
809Ah
Interface not found e. g. interface is used by PROFIBUS
In the VIPA SLIO CPU with FeatureSet PTP_NO only the
ASCII protocol is configurable. If another protocol is
selected the FC/SFC216 also left with this error code.
8x24h
Error at FC/SFC-Parameter x, with x:
1: Error at PROTOCOL
2: Error at PARAMETER
3: Error at BAUDRATE
4: Error at CHARLENGTH
5: Error at PARITY
6: Error at STOPBITS
7: Error at FLOWCONTROL
809xh
Error in FC/SFC parameter value x, where x:
1: Error at PROTOCOL
3: Error at BAUDRATE
4: Error at CHARLENGTH
5: Error at PARITY
6: Error at STOPBITS
7: Error at FLOWCONTROL
8092h
Access error in parameter DB (DB too short)
828xh
Error in parameter x of DB parameter, where x:
1: Error 1. parameter
2: Error 2. parameter
...
6.5 Communication
6.5.1 Overview
The communication happens via the send and receive blocks FC/
SFC 217 (SER_SND) and FC/SFC 218 (SER_RCV). The FCs/SFCs
are included in the consignment of the CPU.
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Communication> FC/SFC 217 - SER_SND
6.5.2 FC/SFC 217 - SER_SND
Description
This block sends data via the serial interface. The repeated call of the
FC/SFC 217 SER_SND delivers a return value for 3964R, USS and
Modbus via RETVAL that contains, among other things, recent information about the acknowledgement of the partner station.
The protocols USS and Modbus require to evaluate the receipt telegram by calling the FC/SFC 218 SER_RCV after SER_SND.
Parameters
Parameter
Declaration Data type
Description
DATAPTR
IN
ANY
Pointer to Data Buffer for sending data
DATALEN
OUT
WORD
Length of data sent
RETVAL
OUT
WORD
Return value (0 = OK)
DATAPTR
Here you define a range of the type Pointer for the send buffer where
the data to be sent are stored. You have to set type, start and length.
Example:
Data is stored in DB5 starting at 0.0 with a length of 124byte.
DataPtr:=P#DB5.DBX0.0 BYTE 124
DATALEN
Word where the number of the sent Bytes is stored.
At ASCII if data were sent by means of FC/SFC 217 faster to the
serial interface than the interface sends, the length of data to send
could differ from the DATALEN due to a buffer overflow. This should
be considered by the user program.
With STX/ETX, 3964R, Modbus and USS always the length set in
DATAPTR is stored or 0.
RETVAL FC/SFC 217
(Return values)
96
Return values of the block:
Error code
Description
0000h
Send data - ready
1000h
Nothing sent (data length 0)
20xxh
Protocol executed error free with xx bit pattern for
diagnosis
7001h
Data is stored in internal buffer - active (busy)
7002h
Transfer - active
80xxh
Protocol executed with errors with xx bit pattern for
diagnosis (no acknowledgement by partner)
90xxh
Protocol not executed with xx bit pattern for diagnosis
(no acknowledgement by partner)
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Deployment PtP communication
Communication> FC/SFC 217 - SER_SND
Error code
Description
8x24h
Error in FC/SFC parameter x, where x:
1: Error in DATAPTR
2: Error in DATALEN
Protocol specific
RETVAL values
8122h
Error in parameter DATAPTR (e.g. DB too short)
807Fh
Internal error
809Ah
interface not found e.g. interface is used by PROFIBUS
809Bh
interface not configured
ASCII
Value
Description
9000h
Buffer overflow (no data send)
9002h
Data too short (0byte)
STX/ETX
Value
Description
9000h
Buffer overflow (no data send)
9001h
Data too long (>1024byte)
9002h
Data too short (0byte)
9004h
Character not allowed
3964R
Value
Description
2000h
Send ready without error
80FFh
NAK received - error in communication
80FEh
Data transfer without acknowledgement of partner or
error at acknowledgement
9000h
Buffer overflow (no data send)
9001h
Data too long (>1024byte)
9002h
Data too short (0byte)
USS
Error code Description
2000h
Send ready without error
8080h
Receive buffer overflow (no space for receipt)
8090h
Acknowledgement delay time exceeded
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Communication> FC/SFC 217 - SER_SND
Error code Description
80F0h
Wrong checksum in respond
80FEh
Wrong start sign in respond
80FFh
Wrong slave address in respond
9000h
Buffer overflow (no data send)
9001h
Data too long (>1024byte)
9002h
Data too short (<2byte)
Modbus RTU/ASCII Master
Error code Description
98
2000h
Send ready (positive slave respond)
2001h
Send ready (negative slave respond)
8080h
Receive buffer overflow (no space for receipt)
8090h
Acknowledgement delay time exceeded
80F0h
Wrong checksum in respond
80FDh
Length of respond too long
80FEh
Wrong function code in respond
80FFh
Wrong slave address in respond
9000h
Buffer overflow (no data send)
9001h
Data too long (>1024byte)
9002h
Data too short (<2byte)
HB140 | CPU | 315-2AG12 | GB | 14-40
VIPA System 300S CPU
Deployment PtP communication
Communication> FC/SFC 217 - SER_SND
Principles of programming
The following text shortly illustrates the structure of programming a
send command for the different protocols.
3964R
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Deployment PtP communication
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Communication> FC/SFC 217 - SER_SND
USS / Modbus
ASCII / STX/ETX
100
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VIPA System 300S CPU
Deployment PtP communication
Communication> FC/SFC 218 - SER_RCV
6.5.3 FC/SFC 218 - SER_RCV
Description
This block receives data via the serial interface.
Using the FC/SFC 218 SER_RCV after SER_SND with the protocols
USS and Modbus the acknowledgement telegram can be read.
Parameters
Parameter
Declaration Data type
Description
DATAPTR
IN
ANY
Pointer to Data Buffer for received data
DATALEN
OUT
WORD
Length of received data
ERROR
OUT
WORD
Error Number
RETVAL
OUT
WORD
Return value (0 = OK)
DATAPTR
Here you set a range of the type Pointer for the receive buffer where
the reception data is stored. You have to set type, start and length.
Example:
Data is stored in DB5 starting at 0.0 with a length of 124byte.
DataPtr:=P#DB5.DBX0.0 BYTE 124
DATALEN
Word where the number of received Bytes is stored.
At STX/ETX and 3964R, the length of the received user data or 0 is
entered.
At ASCII, the number of read characters is entered. This value may
be different from the read telegram length.
ERROR
This word gets an entry in case of an error.
The following error messages may be created depending on the protocol:
ASCII
Bit
Error
Description
0
overrun
Overflow, a sign couldn’t be read fast enough
from the interface
1
framing error
Error that shows that a defined bit frame is not
coincident, exceeds the allowed length or contains an additional bit sequence (Stop bit error)
2
parity
Parity error
3
overflow
Buffer is full
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Communication> FC/SFC 218 - SER_RCV
STX/ETX
Bit
Error
Description
0
overflow
The received telegram exceeds the size of the
receive buffer.
1
char
A sign outside the range 20h ... 7Fh has been
received.
3
overflow
Buffer is full.
3964R / Modbus RTU/ASCII Master
RETVAL FC/SFC 218
(Return value)
Bit
Error
Description
0
overflow
The received telegram exceeds the size of the
receive buffer.
Return values of the block:
Error code Description
0000h
no error
1000h
Receive buffer too small (data loss)
8x24h
Error at FC/SFC-Parameter x, with x:
1: Error at DATAPTR
2: Error at DATALEN
3: Error at ERROR
102
8122h
Error in parameter DATAPTR (e.g. DB too short)
809Ah
Serial interface not found res. interface is used by
PROFIBUS
809Bh
Serial interface not configured
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VIPA System 300S CPU
Deployment PtP communication
Protocols and procedures
Principles of programming
The following picture shows the basic structure for programming a
receive command. This structure can be used for all protocols.
6.6 Protocols and procedures
Overview
The CPU supports the following protocols and procedures:
n
n
n
n
n
ASCII communication
STX/ETX
3964R
USS
Modbus
ASCII
ASCII data communication is one of the simple forms of data
exchange. Incoming characters are transferred 1 to 1. At ASCII, with
every cycle the read FC/SFC is used to store the data that is in the
buffer at request time in a parameterized receive data block. If a telegram is spread over various cycles, the data is overwritten. There is
no reception acknowledgement. The communication procedure has to
be controlled by the concerning user application. An according
Receive_ASCII FB may be found within the VIPA library in the service
area of www.vipa.com.
STX/ETX
STX/ETX is a simple protocol with start and end ID, where STX
stands for Start of Text and ETX for End of Text.
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Protocols and procedures
n Any data transferred from the periphery must be preceded by a
Start followed by the data characters and the end character.
Depending of the byte width the following ASCII characters can be
transferred: 5bit: not allowed: 6bit: 20...3Fh, 7bit: 20...7Fh, 8bit:
20...FFh.
n The effective data, which includes all the characters between Start
and End are transferred to the CPU when the End has been
received.
n When data is send from the CPU to a peripheral device, any user
data is handed to the FC/SFC 217 (SER_SND) and is transferred
with added Start- and End-ID to the communication partner.
n You may work with 1, 2 or no Start- and with 1, 2 or no End-ID.
n If no End-ID is defined, all read characters are transferred to the
CPU after a parametrizable character delay time (Timeout).
As Start-res. End-ID all Hex values from 01h to 1Fh are permissible.
Characters above 1Fh are ignored. In the user data, characters below
20h are not allowed and may cause errors. The number of Start- and
End-IDs may be different (1 Start, 2 End res. 2 Start, 1 End or other
combinations). For not used start and end characters you have to
enter FFh in the hardware configuration.
Message structure:
3964
The 3964R procedure controls the data transfer of a point-to-point link
between the CPU and a communication partner. The procedure adds
control characters to the message data during data transfer. These
control characters may be used by the communication partner to
verify the complete and error free receipt.
The procedure employs the following control characters:
n
n
n
n
n
STX: Start of Text
DLE: Data Link Escape
ETX: End of Text
BCC: Block Check Character
NAK: Negative Acknowledge
You may transfer a maximum of 255byte per message.
Procedure
104
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Deployment PtP communication
Protocols and procedures
When a DLE is transferred as part of the information it is
repeated to distinguish between data characters and DLE
control characters that are used to establish and to terminate the connection (DLE duplication). The DLE duplication is reversed in the receiving station.
The 3964R procedure requires that a lower priority is
assigned to the communication partner. When communication partners issue simultaneous send commands, the
station with the lower priority will delay its send command.
USS
The USS protocol (Universelle serielle Schnittstelle = universal serial
interface) is a serial transfer protocol defined by Siemens for the drive
and system components. This allows to build-up a serial bus connection between a superordinated master and several slave systems.
The USS protocol enables a time cyclic telegram traffic by presetting
a fix telegram length.
The following features characterize the USS protocol:
n
n
n
n
n
Multi point connection
Master slave access procedure
Single master system
Max. 32 participants
Simple and secure telegram frame
It is essential:
n You may connect 1 master and max. 31 slaves at the bus
n The single slaves are addressed by the master via an address
sign in the telegram.
n The communication happens exclusively in half-duplex operation.
n After a send command, the acknowledgement telegram must be
read by a call of the FC/SFC 218 SER_RCV.
The telegrams for send and receive have the following structure:
Master slave telegram
STX
LGE
ADR
02h
PKE
H
IND
L
H
PWE
L
H
STW
L
H
HSW
L
H
BCC
L
Slave master telegram
STX
02h
LGE
ADR
PKE
H
IND
L
H
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PWE
L
H
ZSW
L
H
HIW
L
H
BCC
L
105
Deployment PtP communication
VIPA System 300S CPU
Protocols and procedures
with
STX - Start sign
STW - Control word
LGE - Telegram length
ZSW - State word
ADR - Address
HSW - Main set value
PKE - Parameter ID
HIW - Main effective value
IND
- Index
BCC - Block Check Character
PWE - Parameter value
Broadcast with set bit 5
in ADR byte
A request can be directed to a certain slave ore be send to all slaves
as broadcast message. For the identification of a broadcast message
you have to set bit 5 to 1 in the ADR byte. Here the slave addr. (bit
0 ... 4) is ignored. In opposite to a "normal" send command, the
broadcast does not require a telegram evaluation via FC/SFC 218
SER_RCV. Only write commands may be sent as broadcast.
Modbus
n The Modbus protocol is a communication protocol that fixes a
hierarchic structure with one master and several slaves.
n Physically, Modbus works with a serial half-duplex connection.
There are no bus conflicts occurring, because the master can only
communicate with one slave at a time.
n After a request from the master, this waits for a preset delay time
for an answer of the slave. During the delay time, communication
with other slaves is not possible.
n After a send command, the acknowledgement telegram must be
read by a call of the FC/SFC 218 SER_RCV.
n The request telegrams send by the master and the respond telegrams of a slave have the following structure:
Telegram structure
Start sign
Slave
address
Broadcast with slave
address = 0
106
Function
Code
Data
Flow control
End sign
n A request can be directed to a special slave or at all slaves as
broadcast message.
n To mark a broadcast message, the slave address 0 is used.
n In opposite to a "normal" send command, the broadcast does not
require a telegram evaluation via FC/SFC 218 SER_RCV.
n Only write commands may be sent as broadcast.
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Modbus - Function codes
ASCII, RTU mode
Modbus offers 2 different transfer modes. The mode selection happens during runtime by using the FC/SFC 216 SER_CFG.
n ASCII mode: Every byte is transferred in the 2 sign ASCII code.
The data are marked with a start and an end sign. This causes a
transparent but slow transfer.
n RTU mode: Every byte is transferred as one character. This enables a higher data pass through as the ASCII mode. Instead of
start and end sign, a time control is used.
Supported Modbus protocols
The following Modbus Protocols are supported by the RS485 interface:
n Modbus RTU Master
n Modbus ASCII Master
6.7 Modbus - Function codes
Naming convention
Modbus has some naming conventions:
n Modbus differentiates between bit and word access; bits = "Coils"
and words = "Register".
n Bit inputs are referred to as "Input-Status" and bit outputs as "CoilStatus".
n word inputs are referred to as "Input-Register" and word outputs
as "Holding-Register".
Range definitions
Normally the access at Modbus happens by means of the ranges 0x,
1x, 3x and 4x.
0x and 1x gives you access to digital bit areas and 3x and 4x to
analog word areas.
For the CPs from VIPA is not differentiating digital and analog data,
the following assignment is valid:
0x - Bit area for master output data
Access via function code 01h, 05h, 0Fh
1x - Bit area for master input data
Access via function code 02h
3x - word area for master input data
Access via function code 04h
4x - word area for master output data
Access via function code 03h, 06h, 10h
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Modbus - Function codes
A description of the function codes follows below.
Overview
With the following Modbus function codes a Modbus master can
access a Modbus slave: With the following Modbus function codes a
Modbus master can access a Modbus slave. The description always
takes place from the point of view of the master:
Code
Command
Description
01h
Read n bits
Read n bits of master output area 0x
02h
Read n bits
Read n bits of master input area 1x
03h
Read n words
Read n words of master output area 4x
04h
Read n words
Read n words master input area 3x
05h
Write 1 bit
Write 1 bit to master output area 0x
06h
Write 1 word
Write 1 word to master output area 4x
0Fh
Write n bits
Write n bits to master output area 0x
10h
Write n words
Write n words to master output area 4x
Point of View of "Input" and "Output" data
The description always takes place from the point of view of the
master. Here data, which were sent from master to slave, up to their
target are designated as "output" data (OUT) and contrary slave data
received by the master were designated as "input" data (IN).
Respond of the slave
108
If the slave announces an error, the function code is send back with
an "ORed" 80h.
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Modbus - Function codes
Without an error, the function code is sent back.
Slave answer:
Function code OR 80h
® Error
Function code
® OK
Byte sequence in a
word
1 word
High-byte Low-byte
Check sum CRC, RTU,
LRC
The shown check sums CRC at RTU and LRC at ASCII mode are
automatically added to every telegram. They are not shown in the
data block.
Read n bits 01h, 02h
Code 01h: Read n bits of master output area 0x
Code 02h: Read n bits of master input area 1x
Command telegram
Slave address
Function code
Address 1. bit
Number of bits
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
Respond telegram
Slave
address
Function
code
Number of
read bytes
Data 1.
byte
Data 2.
byte
1byte
1byte
1byte
1byte
1byte
...
Check sum
CRC/LRC
1word
max. 250byte
Read n words 03h, 04h
03h: Read n words of master output area 4x
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Modbus - Function codes
04h: Read n words master input area 3x
Command telegram
Slave address
Function code
Address 1. bit
Number of
words
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
Respond telegram
Slave
address
Function
code
Number of
read bytes
Data 1.
word
Data 2.
word
1byte
1byte
1byte
1word
1word
...
Check sum
CRC/LRC
1word
max. 125words
Write 1 bit 05h
Code 05h: Write 1 bit to master output area 0x
A status change is via "Status bit" with following values:
"Status bit" = 0000h ® Bit = 0
"Status bit" = FF00h ® Bit = 1
Command telegram
Slave address
Function code
Address bit
Status bit
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
Slave address
Function code
Address bit
Status bit
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
Respond telegram
110
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Modbus - Function codes
Write 1 word 06h
Code 06h: Write 1 word to master output area 4x
Command telegram
Slave address
Function code
Address word
Value word
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
Slave address
Function code
Address word
Value word
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
Respond telegram
Write n bits 0Fh
Code 0Fh: Write n bits to master output area 0x
Please regard that the number of bits has additionally to be set in
byte.
Command telegram
Slave
address
Function
code
1byte
1byte
Address Number
1. bit
of bits
1word
1word
Number
of bytes
Data 1.
byte
Data 2.
byte
...
Check
sum
CRC/
LRC
1byte
1byte
1byte
1byte
1word
max. 250byte
Respond telegram
Slave address
Function code
Address 1. bit
Number of bits
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
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Modbus - Example communication
Write n words 10h
Code 10h: Write n words to master output area 4x
Command telegram
Slave
address
Function
code
1byte
1byte
Address Number Number
1. word of words of bytes
1word
1word
1byte
Data 1.
word
Data 2.
word
...
Check
sum
CRC/
LRC
1word
1word
1word
1word
max. 125words
Respond telegram
Slave address
Function code
Address 1. word
Number of
words
Check sum CRC/
LRC
1byte
1byte
1word
1word
1word
6.8 Modbus - Example communication
Overview
The example establishes a communication between a master and a
slave via Modbus. The following combination options are shown:
n CPU 31xS as Modbus RTU master
n CPU 21xSER-1 as Modbus RTU slave
n Siemens SIMATIC Manager and possibilities for the project
transfer
n Modbus cable connection
Approach
1.
Assemble a Modbus system consisting of a CPU 31xS as
Modbus master and a CPU 21xSER-1 as Modbus slave and
Modbus cable.
2.
Execute the project engineering of the master! For this you
create a PLC user application with the following structure:
n OB 100:
Call SFC 216 (configuration as Modbus RTU master) with
timeout setting and error evaluation.
n OB 1:
Call SFC 217 (SER_SND) where the data is send with error
evaluation. Here you have to build up the telegram according
to the Modbus rules. Call SFC 218 (SER_RECV) where the
data is received with error evaluation.
112
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Modbus - Example communication
3.
Execute the project engineering of the slave! The PLC user
application at the slave has the following structure:
n OB 100:
Call SFC 216 (configuration as Modbus RTU slave) with
timeout setting and Modbus address in the DB and error
evaluation.
n OB 1:
Call SFC 217 (SER_SND) for data transport from the slave
CPU to the output buffer. Call SFC 218 (SER_RECV) for the
data transport from the input buffer to the CPU. Allow an
according error evaluation for both directions.
Structure for the according PLC programs for master and slave:
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Modbus - Example communication
114
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Deployment PROFIBUS communication
Fast introduction
7
Deployment PROFIBUS communication
7.1 Overview
PROFIBUS DP
n PROFIBUS is an international standard applicable to an open and
serial field bus for building, manufacturing and process automation that can be used to create a low (sensor-/actuator level) or
medium (process level) performance network of programmable
logic controllers.
n PROFIBUS comprises an assortment of compatible versions. The
following details refer to PROFIBUS DP.
n PROFIBUS DP is a special protocol intended mainly for automation tasks in a manufacturing environment. DP is very fast, offers
Plug'n'Play facilities and provides a cost-effective alternative to
parallel cabling between PLC and remote I/O. PROFIBUS DP was
designed for high-speed data communication on the sensoractuator level.
n The data transfer referred to as "Data Exchange" is cyclical.
During one bus cycle, the master reads input values from the
slaves and writes output information to the slaves.
CPU with DP master
The PROFIBUS DP master is to be configured in the hardware configurator from Siemens. Therefore the configuration happens by the
sub module X1 (MPI/DP) of the Siemens CPU.
After the transmission of the data to the CPU, the configuration data
are internally passed on to the PROFIBUS master part.
During the start-up the DP master automatically includes his data
areas into the address range of the CPU. Project engineering in the
CPU is not required.
Deployment of the DP
master with CPU
Via the PROFIBUS DP master PROFIBUS DP slaves may be coupled to the CPU. The DP master communicates with the DP slaves
and links up its data areas with the address area of the CPU.
At every POWER ON res. overall reset the CPU fetches the I/O mapping data from the master. At DP slave failure, the ER-LED is on and
the OB 86 is requested. If this is not available, the CPU switches to
STOP and BASP is set. As soon as the BASP signal comes from the
CPU, the DP master is setting the outputs of the connected periphery
to zero. The DP master remains in the operating mode RUN independent from the CPU.
DP slave operation
For the deployment in a super-ordinated master system you first have
to project your slave system as Siemens CPU in slave operation
mode with configured in-/output areas. Afterwards you configure your
master system. Couple your slave system to your master system by
dragging the CPU 31x from the hardware catalog at Configured stations onto the master system, choose your slave system and connect
it.
7.2 Fast introduction
Overview
The PROFIBUS DP master is to be configured in the hardware configurator. Here the configuration happens by means of the sub
module X2 (DP) of the Siemens CPU.
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Hardware configuration - CPU
Steps of configuration
For the configuration of the PROFIBUS DP master please follow the
following approach:
n Hardware configuration - CPU
n Deployment as DP master or Deployment as DP slave
n Transfer of the complete project to CPUÄ Chapter 5.10
‘Project transfer’ on page 52
In the Siemens SIMATIC Manager the CPU 315-2AG12
from VIPA is to be configured as
CPU 318-2 (318-2AJ00-0AB00 V3.0)!
The integrated PROFIBUS DP master (X3) is to be configured and connected via the sub module X2 (DP). The
Ethernet PG/OP channel of the 315-2AG12 is always to be
configured as 1. module after the really plugged modules
at the standard bus as CP 343-1 (343-1EX11) from Siemens.
7.3 Hardware configuration - CPU
Precondition
The configuration of the CPU takes place at the Siemens ‘hardware
configurator’ . The hardware configurator is part of the Siemens
SIMATIC Manager. It serves for project engineering. The modules,
which may be configured here are listed in the hardware catalog. If
necessary you have to update the hardware catalog with ‘Options
è Update Catalog’.
For project engineering a thorough knowledge of the Siemens
SIMATIC Manager and the Siemens hardware configurator is
required.
Please consider that this SPEED7-CPU has 4 ACCUs.
After an arithmetic operation (+I, -I, *I, /I, +D, -D, *D, /D,
MOD, +R, -R, *R, /R) the content of ACCU 3 and ACCU 4
is loaded into ACCU 3 and 2. This may cause conflicts in
applications that presume an unmodified ACCU 2.
For more information may be found in the manual "VIPA
Operation list SPEED7" at "Differences between SPEED7
and 300V programming".
Proceeding
In the Siemens SIMATIC Manager the following steps should be executed:
116
1.
Start the Siemens hardware configurator with a new project.
2.
Insert a profile rail from the hardware catalog.
3.
Place at ‘Slot’ -Number 2 the CPU 318-2 (6ES7
318-2AJ00-0AB0/V3.0).
4.
The integrated PROFIBUS DP master (jack X3) is to be configured and connected via the sub module ‘X2 DP’ .
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Deployment PROFIBUS communication
Deployment as PROFIBUS DP master
7.4 Deployment as PROFIBUS DP master
Precondition
The hardware configuration described before was established.
Proceeding
1.
Open the properties dialog of the DP interface of the CPU by
means of a double-click at ‘DP’ .
2.
Set Interface type to "PROFIBUS"
3.
Connect to PROFIBUS and preset an address (preferably 2)
and confirm with [OK].
4.
Switch at Operating mode to "DP master" and confirm the dialog
with [OK]. A PROFIBUS DP master system is inserted.
ð A PROFIBUS DP master system is inserted:
Now the project engineering of your PROFIBUS DP master is finished. Please link up now your DP slaves with periphery to your DP
master.
1.
For the project engineering of PROFIBUS DP slaves you search
the concerning PROFIBUS DP slave in the hardware catalog
and drag&drop it in the subnet of your master.
2.
Assign a valid PROFIBUS address to the DP slave.
3.
Link up the modules of your DP slave system in the plugged
sequence and add the addresses that should be used by the
modules.
4.
If needed, parameterize the modules.
5.
Save, compile and transfer your project.
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Deployment as PROFIBUS DP slave
7.5 Deployment as PROFIBUS DP slave
Fast introduction
Project engineering of
the slave section
Project engineering of
the master section
118
In the following the deployment of the PROFIBUS section as "intelligent" DP slave on master system is described, which exclusively may
be configured in the Siemens SIMATIC Manager. The following steps
are required:
1.
Configure a station with a CPU with operating mode DP slave.
2.
Connect to PROFIBUS and configure the in-/output area for the
slave section.
3.
Save and compile your project.
4.
Configure another station with another CPU with operating
mode DP master.
5.
Connect to PROFIBUS and configure the in-/output ranges for
the master section.
6.
Save, compile and transfer your project to your CPU.
1.
Start the Siemens SIMATIC Manager and configure a CPU as
described at "Hardware configuration - CPU".
2.
Designate the station as "...DP slave".
3.
Add your modules according to the real hardware assembly.
4.
Open the properties dialog of the DP interface of the CPU by
means of a double-click at ‘DP’ .
5.
Set Interface type to "PROFIBUS".
6.
Connect to PROFIBUS and preset an address (e.g. 3) and confirm with [OK].
7.
Switch at Operating mode to "DP slave" .
8.
Via Configuration you define the in-/output address area of the
slave CPU, which are to be assigned to the DP slave.
9.
Save, compile and transfer your project to your CPU.
1.
Insert another station and configure a CPU.
2.
Designate the station as "...DP master".
3.
Add your modules according to the real hardware assembly.
4.
Open the properties dialog of the DP interface of the CPU by
means of a double-click at ‘DP’ .
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Deployment PROFIBUS communication
Deployment as PROFIBUS DP slave
5.
Set Interface: type to "PROFIBUS".
6.
Connect to PROFIBUS and preset an address (e.g. 2) and confirm with [OK].
7.
Switch at Operating mode to "DP master" and confirm the dialog
with [OK].
8.
Connect your slave system to this master system by dragging
the "CPU 31x" from the hardware catalog at Configured stations
onto the master system and select your slave system to be coupled.
9.
Open the Configuration at Object properties of your slave
system.
10. Via double click to the according configuration line you assign
the according input address area on the master CPU to the
slave output data and the output address area to the slave input
data.
11. Save, compile and transfer your project to your CPU.
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PROFIBUS installation guidelines
7.6 PROFIBUS installation guidelines
PROFIBUS in general
n A PROFIBUS DP network may only be built up in linear structure.
n PROFIBUS DP consists of minimum one segment with at least
one master and one slave.
n A master has always been deployed together with a CPU.
n PROFIBUS supports max. 126 participants.
n Per segment a max. of 32 participants is permitted.
n The max. segment length depends on the transfer rate:
9.6 ... 187.5bit/s ® 1000m
500kbit/s ® 400m
1.5Mbit/s ® 200m
3 ... 12Mbit/s ® 100m
n Max. 10 segments may be built up. The segments are connected
via repeaters. Every repeater counts for one participant.
n The bus respectively a segment is to be terminated at both ends.
n All participants are communicating with the same transfer rate.
The slaves adjust themselves automatically on the transfer rate.
Transfer medium
n As transfer medium PROFIBUS uses an isolated twisted-pair
cable based upon the RS485 interface.
n The RS485 interface is working with voltage differences. Though it
is less irritable from influences than a voltage or a current interface. You are able to configure the network as well linear as in a
tree structure.
n Max. 32 participants per segment are permitted. Within a segment
the members are linear connected. The segments are connected
via repeaters. The maximum segment length depends on the
transfer rate.
n PROFIBUS DP uses a transfer rate between 9.6kbit/s and 12Mbit/
s, the slaves are following automatically. All participants are communicating with the same transfer rate.
n The bus structure under RS485 allows an easy connection res.
disconnection of stations as well as starting the system step by
step. Later expansions don’t have any influence on stations that
are already integrated. The system realizes automatically if one
partner had a fail down or is new in the network.
Bus connection
The following picture illustrates the terminating resistors of the
respective start and end station.
120
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Deployment PROFIBUS communication
PROFIBUS installation guidelines
The PROFIBUS line has to be terminated with its ripple
resistor. Please make sure to terminate the last participants on the bus at both ends by activating the terminating
resistor.
EasyConn bus connector
In PROFIBUS all participants are wired parallel. For that purpose, the
bus cable must be feed-through. Via the order number 972-0DP10
you may order the bus connector "EasyConn". This is a bus connector with switchable terminating resistor and integrated bus diagnostic.
Dimensions in mm
0°
45°
90°
A
64
61
66
B
34
53
40
C
15.8
15.8
15.8
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PROFIBUS installation guidelines
To connect this EasyConn plug, please use the standard
PROFIBUS cable type A (EN50170). Starting with release
5 you also can use highly flexible bus cable:
Lapp Kabel order no: 2170222, 2170822, 2170322.
With the order no. 905-6AA00 VIPA offers the "EasyStrip"
de-isolating tool that makes the connection of the EasyConn much easier.
Dimensions in mm
Termination with "EasyConn"
The "EasyConn" bus connector is provided with a switch that is used
to activate a terminating resistor.
Wiring
[1] 1./last bus participant
[2] further participants
CAUTION!
The terminating resistor is only effective, if the connector is
installed at a bus participant and the bus participant is connected to a power supply.
The tightening torque of the screws to fix the connector to
a device must not exceed 0.02Nm!
A complete description of installation and deployment of
the terminating resistors is delivered with the connector.
122
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Commissioning and Start-up behavior
Assembly
1.
Loosen the screw.
2.
Lift contact-cover.
3.
Insert both wires into the ducts provided (watch for the correct
line colour as below!)
4.
Please take care not to cause a short circuit between screen
and data lines!
5.
Close the contact cover.
6.
Tighten screw (max. tightening torque 0.08Nm).
The green line must be connected to A, the red line to B!
7.7 Commissioning and Start-up behavior
Start-up on delivery
In delivery the CPU is overall reset. The PROFIBUS part is deactivated and its LEDs are off after Power ON.
Online with bus parameter without slave
project
The DP master can be served with bus parameters by means of a
hardware configuration. As soon as these are transferred the DP
master goes online with his bus parameter. This is shown by the RUN
LED. Now the DP master can be contacted via PROFIBUS by means
of his PROFIBUS address. In this state the CPU can be accessed via
PROFIBUS to get configuration and DP slave project.
Slave configuration
If the master has received valid configuration data, he switches to
Data Exchange with the DP Slaves. This is indicated by the DE-LED.
CPU state controls DP
master
After PowerON respectively a receipt of a new hardware configuration
the configuration data and bus parameter were transferred to the DP
master. Dependent on the CPU state the following behavior is shown
by the DP master:
Master behavior at CPU
STOP
n The global control command "Clear" is sent to the slaves by the
master. Here the DE-LED is blinking.
n DP slaves with fail safe mode were provided with output telegram
length "0".
n DP slaves without fail safe mode were provided with the whole
output telegram but with output data = 0.
n The input data of the DP slaves were further cyclically transferred
to the input area of the CPU.
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Commissioning and Start-up behavior
Master behavior at CPU
RUN
124
n The global control command "Operate" is sent to the slaves by the
master. Here the DE-LED is on.
n Every connected DP slave is cyclically attended with an output
telegram containing recent output data.
n The input data of the DP slaves were cyclically transferred to the
input area of the CPU.
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WinPLC7
Installation
8
WinPLC7
8.1 System conception
General
WinPLC7 is a programming and simulation software from VIPA for
every PLC programmable with Siemens STEP®7. This tool allows you
to create user applications in FBD, LAD and STL. Besides of a comfortable programming environment, WinPLC7 has an integrated simulator that enables the simulation of your user application at the PC
without additional hardware. This "Soft-PLC" is handled like a real
PLC and offers the same error behavior and diagnostics options via
diagnostics buffer, USTACK and BSTACK.
Detailed information and programming samples may be
found at the online help respectively in the online documentation of WinPLC7.
Alternatives
There is also the possibility to use according configuration tools from
Siemens instead of WinPLC7 from VIPA. Here the proceeding is part
of this manual.
System requirements
n
n
n
n
Source
You may receive a demo version from VIPA. Without any activation
with the demo version the CPUs 11x of the System 100V from VIPA
may be configured. To configure the SPEED7 CPUs a license for the
"profi" version is necessary. This may be online be received from
VIPA and activated.
Windows XP (SP3)
Windows Vista
Windows 7 (32 and 64 bit)
Windows 8 (32 and 64 bit)
There are the following sources to get WinPLC7:
n Online
– At www.vipa.com in the service area at Downloads a link to
the current demo version and the updates of WinPLC7 may be
found.
n CD
– SW211C1DD: WinPLC7 Single license, CD, with documentation in german
– SW211C1ED: WinPLC7 Single license, CD, with documentation in english
8.2 Installation
Precondition
The project engineering of a SPEED7 CPU from VIPA with WinPLC7
is only possible using an activated "Profi" version of WinPLC7.
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WinPLC7
VIPA System 300S CPU
Installation
Installation WinPLC7
Demo
Activation of the "Profi"
version
The installation and the registration of WinPLC7 has the following
approach:
1.
For installation of WinPLC7 start the setup program of the corresponding CD respectively execute the online received exe file.
2.
Select the according language.
3.
Accept the licensing agreement.
4.
Set an installation directory and a group assignment and start
the installation.
1.
Start WinPLC7.
ð A ‘Demo’ dialog is shown
2.
Click at [Activate Software].
ð The following dialog for activation is shown:
3.
Fill in the following fields:
n Email-Addr.
n Your Name
n Serial number
The serial number may be found on a label at the CD case of
WinPLC7.
4.
If your computer is connected to Internet you may online request
the Activation Key by [Get activation key via Internet]. Otherwise
click at [This PC has no access to the Internet] and follow the
instructions.
ð With successful registration the activation key is listed in the
dialog window respectively is sent by email.
5.
Enter this at ‘Activation code’ and click at [OK].
ð Now, WinPLC7 is activated as "Profi" version.
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Example project engineering > Project engineering
Installation of WinPCAP
for station search via
Ethernet
To find a station via Ethernet (accessible nodes) you have to install
the WinPCAP driver. This driver may be found on your PC in the
installation directory at WinSPS-S7-V5/WinPcap_... .exe. Execute this
file and follow the instructions.
8.3 Example project engineering
8.3.1 Job definition
In the example a FC 1 is programmed, which is cyclically called by
the OB 1. By setting of 2 comparison values (value1 and value2)
during the FC call, an output of the PLC-System should be activated
depending on the comparison result. By setting of 2 comparison
values (value1 and value2) during the FC call, an output of the PLCSystem should be activated depending on the comparison result.
Here it should apply:
n if value1 = value2 activate output Q 124.0
n if value1 > value2 activate output Q 124.1
n if value1 < value2 activate output Q 124.2
Precondition
n You have administrator rights for your PC.
n WinPLC7 is installed and activated as "Profi" version.
n One SPEED7 CPU and one digital output module are installed
and cabled.
n The Ethernet PG/OP channel of the CPU is connected to your
Ethernet network. Your CPU may be connected to your PC with
an Ethernet cable either directly or via hub/switch.
n WinPCap for station search via Ethernet is installed.
n The power supply of the CPU and the I/O periphery are activated
and the CPU is in STOP state.
8.3.2 Project engineering
Hardware configuration
1.
Start WinPLC7 ("Profi" version)
2.
Create and open a new project with [Create a new solution].
1.
For the call of the hardware configurator it is necessary to set
WinPLC7 from the Simulator-Mode to the Offline-Mode. For this
and the communication via Ethernet set "Target: TCP/IP Direct".
2.
Double click to ‘Hardware stations’ and here at ‘Create new’ .
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3.
Enter a station name. Please consider that the name does not
contain any spaces.
4.
After the load animation choose in the register Select PLCSystem the system "VIPA SPEED7" and click to [Create]. A new
station is created.
5.
Save the empty station with [Strg]+[S].
6.
By double click or drag&drop the according VIPA CPU in the
hardware catalog at ‘CPU SPEED7’ the CPU is inserted to your
configuration.
7.
For output place a digital output module, assign the start
address 124 and save the hardware configuration.
Establish online access via Ethernet PG/OP channel:
1.
Open the CPU-Properties, by double clicking to the CPU at slot
2 in the hardware configurator.
2.
Click to the button [Ethernet CP-Properties (PG/OP-channel)].
ð The dialog ‘Properties CP343’ is opened.
3.
Chose the register ‘Common Options’ .
4.
Click to [Properties Ethernet].
5.
Choose the subnet ‘PG_OP_Ethernet’ .
6.
Enter a valid IP address-and a subnet mask. You may get this
from your system administrator.
7.
Close every dialog window with [OK].
8.
Select, if not already done, ‘Target: External TCP/IP direct’ .
9.
Open with ‘Online è Send configuration to the CPU’ a dialog
with the same name.
10. Click to [Accessible nodes]. Please regard to use this function it
is necessary to install WinPCap before!
11. Choose your network card and click to [Determining accessible
nodes].
ð After a waiting time every accessible station is listed. Here
your CPU with IP 0.0.0.0 is listed, too. To check this the
according MAC address is also listed. This MAC address
may be found at a label beneath the front flap of the CPU.
12. For the temporary setting of an IP address select you CPU and
click to [Temporary setting of the IP parameters]. Please enter
the same IP parameters, you configured in the CPU properties
and click to [Write Parameters].
13. Confirm the message concerning the overall reset of the CPU.
ð The IP parameters are transferred to the CPU and the list of
accessible stations is refreshed.
14. Select your CPU and click to [Confirm].
ð Now you are back in the dialog "Send configuration".
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Transfer hardware configuration
Choose your network card and click to [Send configuration].
ð After a short time a message is displayed concerning the
transfer of the configuration is finished.
The hardware configuration is finished, now and the CPU may always
be accessed by the IP parameters as well by means of WinPLC7.
Usually the online transfer of the hardware configuration
happens within the hardware configurator. With ‘File
è Save active station in the WinPL7 sub project’ there is
also the possibility to store the hardware configuration as a
system file in WinPLC7 to transfer it from WinPLC7 to the
CPU.
Programming of the
FC 1
The PLC programming happens by WinPLC7. Close the hardware
configurator and return to your project in WinPLC7. The PLC program
is to be created in the FC 1.
1.
In ‘Project content’ choose ‘New è FC’.
2.
Enter "FC1" as block and confirm with [OK].
ð The editor for FC 1 is called.
Creating parameters
In the upper part of the editor there is the parameter table. In this
example the 2 integer values value1 and value2 are to be compared
together. Since both values are read only by the function, these are to
be defined as "in".
1.
Select the ‘in à’ row at the ‘parameter table’ and enter at the
field ‘Name’ "value1". Press the [Return] key.
ð The cursor jumps to the column with the data type.
2.
The data type may either directly be entered or be selected from
a list of available data types by pressing the [Return] key. Set
the data type to INT and press the [Return] key.
ð Now the cursor jumps to the ‘Comment’ column.
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3.
Here enter "1. compare value" and press the [Return] key.
ð A new ‘in à’ row is created and the cursor jumps to ‘Name’ .
4.
Proceed for value2 in the same way as described for value1.
5.
Save the block. A note that the interface of the block was
changed may be acknowledged with [Yes].
ð The parameter table shows the following entries, now:
Enter the program
As requested in the job definition, the corresponding output is activated depending on the comparison of value1 and value2. For each
comparison operation a separate network is to be created.
130
1.
The program is to be created as FBD (function block diagram).
Here change to the FBD view by clicking at ‘FBD’ .
2.
Click to the input field designated as "<empty>". The available
operations may be added to your project by drag&drop from the
hardware catalog or by double click at them in the hardware catalog.
3.
Open in the catalog the category "Comparator" and add the
operation ‘CMP==I’ to your network.
4.
Click to the input left above and insert value1. Since these are
block parameters a selection list of block parameters may be
viewed by entering "#".
5.
Type in "#" and press the [Return] key.
6.
Choose the corresponding parameter of the list and confirm it
with the [Return] key.
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Example project engineering > Project engineering
7.
Proceed in the same way with the parameter value2.
The allocation to the corresponding output, here Q 124.0, takes place
with the following proceeding:
1.
Click to the output at the right side of the operator.
2.
Open in the catalog the category ‘Bit logic’ and select the function ‘--[=]’ . The inserting of ‘--[=]’ corresponds to the WinPLC7
shortcut [F7].
3.
Insert the output Q 124.0 by clicking to the operand.
ð Network1 is finished, now.
Adding a new network
For further comparisons the operations "CMP>I" at Q 124.1 and
"CMP<I" at Q 124.2 are necessary. Create a network for both operations with the following proceeding:
1.
Move your mouse at an arbitrary position on the editor window
and press the right mouse key.
2.
Select at ‘context menu è Insert new network’.
ð A dialog field is opened to enter the position and number of
the networks.
3.
Proceed as described for "Network 1".
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4.
Save the FC 1 with ‘File è Save content of focused window’
respectively press [Strg]+[S].
ð After you have programmed the still missing networks, the
FC 1 has the following structure:
Creating the block OB 1
132
The FC 1 is to be called from the cycle OB 1.
1.
Go to OB 1, which was automatically created with starting the
project.
2.
Go to ‘Project content’ or to ‘Solution’ and open the OB 1 by a
double click.
3.
Change to the STL view.
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Example project engineering > Test the PLC program in the Simulator
4.
Type in "Call FC 1" and press the [Return] key.
ð The FC parameters are automatically displayed and the following parameters are assigned:
5.
Save the OB 1 with
respectively press [Strg]+[S].
8.3.3 Test the PLC program in the Simulator
Proceeding
With WinPLC7 there is the possibility to test your project in a Simulator.
1.
Here select ‘Target: Simulator’ .
2.
Transfer the blocks to the simulator with [Load all blocks into the
PLC].
3.
Switch the CPU to RUN, by clicking at ‘RUN’ in the ‘CPU
Control Center’ of ‘Edit project’ .
ð The displayed state changes from STOP to RUN.
4.
To view the process image select ‘View
è Display process image window’ or click at
.
ð The various areas are displayed.
5.
Double click to the process image and enter at ‘Line 2’ the
address PQB 124. Confirm your input with [OK]. A value marked
by red color corresponds to a logical "1".
6.
Open the OB 1.
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7.
Change the value of one variable, save the OB 1 and transfer it
to the simulator.
ð According to your settings the process image changes
immediately. The status of your blocks may be displayed
with ‘Block è Monitoring On/Off’.
Visualization via PLC
mask
A further component of the simulator is the PLC mask. Here a CPU is
graphically displayed, which may be expanded by digital and analog
peripheral modules. As soon as the CPU of the simulator is switched
to RUN state, inputs may be activated by mouse and outputs may be
displayed.
1.
Open the PLC mask with ‘view è PLC mask’.
ð A CPU is graphically displayed.
2.
Double-click to the output module, open its properties dialog and
enter the Module address 124.
3.
Switch the operating mode switch to RUN by means of the
mouse.
ð Your program is executed and displayed in the simulator,
now.
8.3.4 Transfer PLC program to CPU and its execution
Proceeding
134
1.
For transfer to the CPU set the transfer mode to "Target: TCP/
IP-Direct".
2.
If there are more network adapters in your PC, the network
adapter may be selected via ‘Extras è Select network adapter’.
3.
For presetting the Ethernet data click to [...] and click to [Accessible nodes].
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Example project engineering > Transfer PLC program to CPU and its execution
4.
Click at [Determining accessible nodes].
ð After a waiting time every accessible station is listed.
5.
Choose your CPU, which was provided with TCP/IP address
parameters during the hardware configuration and click to [Confirm].
6.
Close the dialog ‘Ethernet properties’ with [OK].
7.
Transfer your project to your CPU with ‘PLC è Send all blocks’.
8.
Switch your CPU to RUN state.
9.
Open the OB 1 by double click.
10. Change the value of one variable, save the OB 1 and transfer it
to the CPU.
ð According to your settings the process image changes
immediately. The status of your blocks may be displayed
with ‘Block è Monitoring On/Off’.
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