datasheet for TJA1048T by NXP Semiconductors N.V.

datasheet for TJA1048T by NXP Semiconductors N.V.
TJA1048
Dual high-speed CAN transceiver with Standby mode
Rev. 2 — 25 March 2011
Product data sheet
1. General description
The TJA1048 is a dual high-speed CAN transceiver that provides an interface between a
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1048 belongs to the third generation of high-speed CAN transceivers from NXP
Semiconductors, offering significant improvements over first- and second-generation
devices such as the TJA1040. It offers improved Electro Magnetic Compatibility (EMC)
and ElectroStatic Discharge (ESD) performance, and also features:
• Ideal passive behavior to the CAN bus when the supply voltage is off
• A very low-current Standby mode with bus wake-up capability on both channels
• TJA1048T can be interfaced directly to microcontrollers with supply voltages from
3 V to 5 V
These features make the TJA1048 an excellent choice for all types of HS-CAN networks
containing more than one HS-CAN interface that require a low-power mode with wake-up
capability via the CAN bus, especially for Body Control and Gateway units.
2. Features and benefits
2.1 General
̈
̈
̈
̈
̈
̈
̈
Two TJA1042 HS-CAN transceivers combined monolithically in a single package
Fully ISO 11898-2 and ISO 11898-5 compliant
Suitable for 12 V and 24 V systems
Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
VIO input allows for direct interfacing with 3 V to 5 V microcontrollers
Available in SO14 and HVSON14 packages
Leadless HVSON14 package (3.0 mm × 4.5 mm) with improved Automated Optical
Inspection (AOI) capability
̈ Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
2.2 Low-power management
̈ Very low-current Standby mode with host and bus wake-up capability
̈ Functional behavior predictable under all supply conditions
̈ Transceiver disengages from the bus when not powered up (zero load)
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
̈ Wake-up receiver powered by VIO; allows shut down of VCC
2.3 Protection
̈
̈
̈
̈
̈
High ESD handling capability on the bus pins
Bus pins protected against transients in automotive environments
Transmit Data (TXD) dominant time-out function
Undervoltage detection on pins VCC and VIO
Thermally protected
3. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
VCC
supply voltage
ICC
supply current
Conditions
Min
Typ
Max
Unit
4.5
-
5.5
V
-
0.5
2
μA
both channels recessive
-
-
20
mA
one channel dominant
-
-
80
mA
both channels dominant
-
90
140
mA
3.5
-
4.5
V
-
+6
kV
Standby mode
Normal mode
Vuvd(VCC)
undervoltage detection voltage on
pin VCC
VESD
electrostatic discharge voltage
IEC 61000-4-2 at pins CANHx and CANLx −6
VCANH
voltage on pin CANH
pins CANH1 and CANH2; no time limit;
DC limiting value
−58
-
+58
V
VCANL
voltage on pin CANL
pins CANL1 and CANL2; no time limit; DC −58
limiting value
-
+58
V
Tvj
virtual junction temperature
−40
-
+150
°C
4. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
TJA1048T
SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
TJA1048TK
HVSON14
plastic, thermal enhanced very thin small outline package; no leads;
14 terminals; body 3 × 4.5 × 0.85 mm
SOT1086-2
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
5. Block diagram
VIO
VCC
11
3
TEMPERATURE
PROTECTION
VCC/VIO
UNDERVOLTAGE
DETECTION
13
SLOPE CONTROL
AND DRIVER
TXD1
1
12
MODE
CONTROL
TIME-OUT
CANH1
CANL1
VCC
NORMAL
RECEIVER
STBN1
14
VIO
WAKE-UP
FILTER
LOW-POWER
RECEIVER
VCC
RXD1
4
MUX and
DRIVER
10
SLOPE CONTROL
AND DRIVER
VIO
TXD2
6
9
CANH2
CANL2
TIME-OUT
VCC
STBN2
8
NORMAL
RECEIVER
VIO
WAKE-UP
FILTER
RXD2
GNDA
7
LOW-POWER
RECEIVER
MUX and
DRIVER
2
5
GNDB
015aaa146
Fig 1.
Block diagram
TJA1048
Product data sheet
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© NXP B.V. 2011. All rights reserved.
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
6. Pinning information
6.1 Pinning
terminal 1
index area
TXD1
1
14 STBN1
GNDA
2
13 CANH1
VCC
3
12 CANL1
RXD1
4
GNDB
5
TXD2
6
9
CANL2
RXD2
7
8
STBN2
TJA1048T
11 VIO
10 CANH2
TXD1
1
14 STBN1
GNDA
2
13 CANH1
VCC
3
12 CANL1
RXD1
4
GNDB
5
10 CANH2
TXD2
6
9
CANL2
RXD2
7
8
STBN2
11 VIO
015aaa207
Transparent top view
015aaa144
Fig 2.
TJA1048TK
Pin configuration diagram: SO14
Fig 3.
Pin configuration diagram: HVSON14
6.2 Pin description
Table 3.
Symbol
Pin
Description
TXD1
1
transmit data input 1
GNDA
2[1]
transceiver ground
VCC
3
transceiver supply voltage
RXD1
4
receive data output 1; reads out data from bus line1
GNDB
5[1]
transceiver ground
TXD2
6
transmit data input 2
RXD2
7
receive data output 2; reads out data from bus line 2
STBN2
8
standby control input 2 (HIGH = Normal mode, LOW = Standby mode)
CANL2
9
LOW-level CAN bus line 2
CANH2
10
HIGH-level CAN bus line 2
VIO
11
supply voltage for I/O level adapter
CANL1
12
LOW-level CAN bus line 1
CANH1
13
HIGH-level CAN bus line 1
STBN1
14
standby control input 1 (HIGH = Normal mode, LOW = Standby mode)
[1]
TJA1048
Product data sheet
Pin description
Pins 2 and 5 must be connected together externally in the application.
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
4 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
7. Functional description
The TJA1048 is a dual HS-CAN stand-alone transceiver with Standby mode and robust
ESD handling capability. It combines the functionality of two TJA1040/TJA1042
transceivers with improved EMC and quiescent current performance. Improved slope
control and high DC handling capability on the bus pins provide additional application
flexibility.
7.1 Operating modes
The TJA1048 supports two operating modes per transceiver, Normal and Standby. The
operating mode can be selected independently for each transceiver via pins STBN1 and
STBN2 (see Table 4).
Table 4.
Mode
Operating modes
Pin STBN1/STBN2
Pin RXD1/RXD2
LOW
HIGH
Normal
HIGH
bus dominant
bus recessive
Standby
LOW
wake-up request detected
no wake-up request detected
7.1.1 Normal mode
A HIGH level on pin STBN1/STBN2 selects Normal mode. In this mode, the transceiver
can transmit and receive data via the bus lines CANH1/CANL1 and CANH2/CANL2 (see
Figure 1 for the block diagram). The differential receiver converts the analog data on the
bus lines into digital data which is output on pin RXD1/RXD2. The slope of the output
signals on the bus lines is controlled and optimized in a way that guarantees the lowest
possible EME.
7.1.2 Standby mode
A LOW level on pin STBN1/STBN2 selects Standby mode. In Standby mode, the
transceiver is not able to transmit or correctly receive data via the bus lines. The
transmitter and Normal-mode receiver blocks are switched off to reduce supply current,
and only a low-power differential receiver monitors the bus lines for activity.
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by VIO, and is capable of detecting CAN bus
activity even if VIO is the only supply voltage available. When pin RXD1/RXD2 goes LOW
to signal a wake-up request, a transition to Normal mode will not be triggered until
STBN1/STBN2 is forced HIGH.
A dedicated wake-up sequence (specified in ISO11898-5) must be received to wake-up
the TJA1048 from a low-power mode. This filtering is necessary to avoid spurious
wake-up events due to a dominant clamped CAN bus or dominant phases caused by
noise or spikes on the bus.
A valid wake-up pattern consists of:
A dominant phase of at least twake(busdom) followed by
A recessive phase of at least twake(busrec) followed by
A dominant phase of at least twake(busdom)
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
5 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
The complete dominant-recessive-dominant pattern must be received within tto(wake)bus to
be recognized as a valid wake-up pattern (see Figure 4). Pin RXD1/RXD2 will remain
recessive until the wake-up event has been triggered.
After a wake-up sequence has been detected, the TJA1048 will remain in Standby mode
with the bus signals reflected on RXD1/RXD2. Note that dominant or recessive phases
lasting less than tfltr(wake)bus will not be detected by the low-power differential receiver and
will not be reflected on RXD1/RXD2 in Standby mode.
A wake-up event will not be registered if any of the following events occurs while a
wake-up sequence is being transmitted:
The TJA1048 switches to Normal mode
The complete wake-up pattern was not received within tto(wake)bus
A VIO undervoltage is detected (VIO < Vuvd(VIO); see Section 7.2.3)
If any of these events occurs while a wake-up sequence is being received, the internal
wake-up logic will be reset and the complete wake-up sequence will have to be
re-transmitted to trigger a wake-up event.
twake(busrec)
CANHx
VO(diff)bus
CANLx
twake(busdom)
twake(busdom)
RXDx
tfltr(wake)bus
tfltr(wake)bus
tto(wake)bus
015aaa147
Fig 4.
Wake-up timing
7.2 Fail-safe features
7.2.1 TXD dominant time-out function
A 'TXD dominant time-out' timer is started when pin TXD1/TXD2 is set LOW. If the LOW
state on this pin persists for longer than tto(dom)TXD, the transmitter is disabled, releasing
the bus lines to recessive state. This function prevents a hardware and/or software
application failure from driving the bus lines to a permanent dominant state (blocking all
network communications). The TXD dominant time-out timer is reset when pin
TXD1/TXD2 is set HIGH. The TXD dominant time-out time also defines the minimum
possible bit rate of 40 kbit/s. The TJA1048 has two TXD dominant time-out timers that
operate independently of each other.
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
6 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
7.2.2 Internal biasing of TXD1, TXD2, STBN1 and STBN2 input pins
Pins TXD1 and TXD2 have internal pull-ups to VIO and pins STBN1 and STBN2 have
internal pull-downs to GNDA and GNDB. This ensures a safe, defined state if any of these
pins is left floating. Pins GNDA and GNDB must be connected together in the application.
Pull-up/pull-down currents flow in these pins in all states. Pins TXD1 and TXD2 should be
held HIGH in Standby mode to minimize standby currents; pins STBN1 and STBN2
should be held LOW.
7.2.3 Undervoltage detection on pins VCC and VIO
Should VCC drop below the VCC undervoltage detection level, Vuvd(VCC), both transceivers
will switch to Standby mode. The logic state of pins STBN1 and STBN2 will be ignored
until VCC has recovered.
Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceivers will
switch off and disengage from the bus (zero load) until VIO has recovered.
7.2.4 Overtemperature protection
The output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, Tj(sd), both output drivers will be
disabled. When the virtual junction temperature drops below Tj(sd) again, the output
drivers will recover independently once TXD1/TXD2 has been reset to HIGH. Including
the TXD1/TXD2 condition prevents output driver oscillation due to small variations in
temperature.
7.3 VIO supply pin
Pin VIO should be connected to the microcontroller supply voltage (see Figure 5). This will
adjust the signal levels of pins TXD1, TXD2, RXD1, RXD2, STBN1 and STBN2 to the I/O
levels of the microcontroller. Pin VIO also provides the internal supply voltage for the
transceiver’s low-power differential receiver. For applications running in low-power mode,
this allows the bus lines to be monitored for activity even if there is no supply voltage on
pin VCC.
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
7 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
8. Application design-in information
3V
BAT
INH
5V
VCC
3
CANH1
VIO
11
13
14
8
1
TJA1048T
CANL1
4
12
6
CANH2
10
7
STBN1
STBN2
TXD1
RXD1
TXD2
RXD2
Pxx
VDD
Pyy
TX0
RX0
MICROCONTROLLER
TX1
RX1
GND
2
5
CANL2
GNDA
GNDB
9
015aaa148
Optionally, the 5 V supply can be switched off in Standby mode.
Fig 5.
TJA1048
Product data sheet
Typical application with 3 V microcontroller
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter
Conditions
voltage on pin x
Vx
VESD
Max
Unit
on pins CANH1, CANL1, CANH2 and CANL2
−58
+58
V
on any other pin
−0.3
+7
V
−150
+100
V
−6
+6
kV
−6
+6
kV
−4
+4
kV
−300
+300
V
−750
+750
V
no time limit; DC value
transient voltage
Vtrt
Min
electrostatic discharge voltage
on pins CANH1, CANL1, CANH2 and CANL2
[1]
IEC 61000-4-2
[2]
on pins CANH1, CANL1, CANH2 and CANL2
[3]
[4]
HBM
on pins CANH1, CANL1, CANH2 and CANL2
at any other pin
[5]
MM
at any pin
[6]
CDM
at corner pins
at any pin
Tvj
virtual junction temperature
Tstg
storage temperature
[7]
−500
+500
V
−40
+150
°C
−55
+150
°C
[1]
Verified by an external test house to ensure pins CANH1, CANL1, CANH2 and CANL2 can withstand ISO 7637 part 3 automotive
transient test pulses 1, 2a, 3a and 3b.
[2]
IEC 61000-4-2 (150 pF, 330 Ω).
[3]
ESD performance of pins CANH1, CANL1, CANH2 and CANL2 according to IEC 61000-4-2 (150 pF, 330 Ω) has been be verified by an
external test house.
[4]
Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 kΩ).
[5]
Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 μH, 10 Ω).
[6]
Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF).
[7]
In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P × Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
10. Thermal characteristics
Table 6.
Thermal characteristics
Values determined for free convection conditions on a JESD51-7 board.
TJA1048
Product data sheet
Symbol
Parameter
Conditions
Value
Unit
Rth(vj-a)
thermal resistance from virtual junction to
ambient
SO14
65
K/W
HVSON14
42
K/W
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
11. Static characteristics
Table 7.
Static characteristics
Tvj = −40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V; RL = 60 Ω unless specified otherwise; all voltages are
defined with respect to ground; positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
4.5
-
5.5
V
-
0.5
2
μA
both channels recessive
-
-
20
mA
one channel dominant
-
-
80
mA
both channels dominant
-
90
140
mA
3.5
-
4.5
V
2.8
-
5.5
V
-
16.5
26
μA
both channels recessive
-
-
35
μA
one channel dominant
-
-
300
μA
both channels dominant
-
-
550
μA
1.3
2.0
2.7
V
0.7VIO
-
VIO + 0.3
V
Supply; pin VCC
VCC
ICC
supply voltage
supply current
[1]
Standby mode; VTXD = VIO
Normal mode
Vuvd(VCC)
undervoltage detection
voltage on pin VCC
I/O level adapter supply; pin VIO
VIO
IIO
supply voltage on pin VIO
supply current on pin VIO
[1]
Standby mode; VTXD = VIO
Normal mode
Vuvd(VIO)
undervoltage detection
voltage on pin VIO
Standby mode control input; pins STBN1 and STBN2
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
−0.3
-
0.3VIO
V
IIH
HIGH-level input current
VSTBN[2] = VIO
1
-
10
μA
IIL
LOW-level input current
VSTBN = 0 V
−1
-
+1
μA
CAN transmit data input; pins TXD1 and TXD2
VIH
HIGH-level input voltage
0.7VIO
-
VIO + 0.3
V
VIL
LOW-level input voltage
−0.3
-
0.3VIO
V
−5
-
+5
μA
−260
−150
−30
μA
-
5
10
pF
[3]
IIH
HIGH-level input current
VTXD
IIL
LOW-level input current
VTXD = 0 V
Ci
= VIO
[4]
input capacitance
CAN receive data output; pins RXD1 and RXD2
IOH
HIGH-level output current VRXD[5] = VIO − 0.4 V; VIO = VCC
−8
−3
−1
mA
IOL
LOW-level output current
2
5
12
mA
2.75
3.5
4.5
V
0.5
1.5
2.25
V
−300
-
+300
mV
VRXD = 0.4 V; bus dominant
Bus lines; pins CANH1, CANL1, CANH2 and CANL2
VO(dom)
dominant output voltage
VTXD = 0 V; t < tto(dom)TXD
pin CANH1/CANH2
pin CANL1/CANL2
Vdom(TX)sym transmitter dominant
voltage symmetry
TJA1048
Product data sheet
Vdom(TX)sym = VCC − VCANH
[6]
− VCANL
[7]
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
Table 7.
Static characteristics …continued
Tvj = −40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V; RL = 60 Ω unless specified otherwise; all voltages are
defined with respect to ground; positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VO(dif)bus
bus differential output
voltage
VTXD = 0 V; t < tto(dom)TXD
VCC = 4.75 V to 5.25 V; RL = 45 Ω to 65 Ω
1.5
-
3
V
VTXD = VIO; recessive; no load
−50
-
+50
mV
Normal mode; VTXD = VIO; no load
2
0.5VCC 3
V
−0.1
-
V
VO(rec)
recessive output voltage
Standby mode; no load
+0.1
differential receiver
threshold voltage
Normal mode; Vcm(CAN) = −30 V to +30 V
[8]
0.5
0.7
0.9
V
Standby mode
Vcm(CAN) = −12 V to +12 V
[8]
0.4
0.7
1.15
V
Vhys(RX)dif
differential receiver
hysteresis voltage
Normal mode; Vcm(CAN) = −30 V to +30 V
[8]
50
120
200
mV
IO(dom)
dominant output current
VTXD = 0 V; t < tto(dom)TXD; VCC = 5 V
pin CANH1/CANH2; VCANH = 0 V
−100
−70
−40
mA
pin CANL1/CANL2; VCANL = 5 V/40 V
40
70
100
mA
Vth(RX)dif
IO(rec)
recessive output current
Normal mode; VTXD = VIO
VCANH = VCANL = −40 V to +40 V
−5
-
+5
mA
IL
leakage current
VCC = VIO = 0 V; VCANH = VCANL = 5 V
−5
-
+5
μA
Ri
input resistance
9
15
28
kΩ
ΔRi
input resistance deviation between pin CANH1/CANH2 and pin
CANL1/CANL2
−1
-
+1
%
Ri(dif)
differential input
resistance
19
30
52
kΩ
Ci(cm)
common-mode input
capacitance
[4]
-
-
20
pF
Ci(dif)
differential input
capacitance
[4]
-
-
10
pF
[4]
-
190
-
°C
Temperature detection
Tj(sd)
[1]
shutdown junction
temperature
Total supply current (ICC + IIO) in Standby mode is typically 17 μA, with a maximum value of 26 μA.
[2]
STBN refers to the input signal on pin STBN1 or pin STBN2.
[3]
TXD refers to the input signal on pin TXD1 or pin TXD2.
[4]
Not tested in production.
[5]
RXD refers to the output signal on pin RXD1 or pin RXD2.
[6]
CANH refers to the input/output signal on pin CANH1 or pin CANH2.
[7]
CANL refers to the input/output signal on pin CANL1 or pin CANL2.
[8]
Vcm(CAN) is the common mode voltage of CANH1/CANL1 and CANH2/CANL2.
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
11 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
12. Dynamic characteristics
Table 8.
Dynamic characteristics
Tvj = −40 °C to +150 °C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V; RL = 60 Ω unless specified otherwise; all voltages are
defined with respect to ground; positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Transceiver timing; pins CANH1, CANH2, CANL1, CANL2, TXD1, TXD2, RXD1 and RXD2; see Figure 6 and Figure 7
td(TXD-busdom)
delay time from TXD to bus dominant
Normal mode
-
65
-
ns
td(TXD-busrec)
delay time from TXD to bus recessive
Normal mode
-
90
-
ns
td(busdom-RXD) delay time from bus dominant to RXD
Normal mode
-
60
-
ns
td(busrec-RXD)
delay time from bus recessive to RXD
Normal mode
-
65
-
ns
tPD(TXD-RXD)
propagation delay from TXD to RXD
Normal mode
60
-
250
ns
tto(dom)TXD
TXD dominant time-out time
VTXD = 0 V; Normal mode
0.5
2
5
ms
td(stb-norm)
standby to normal mode delay time
7
25
47
μs
twake(busdom)
bus dominant wake-up time
Standby mode
0.5
-
5
μs
twake(busrec)
bus recessive wake-up time
Standby mode
0.5
-
5
μs
tto(wake)bus
bus wake-up time-out time
0.5
2
5
ms
tfltr(wake)bus
bus wake-up filter time
0.5
1.5
5
μs
Standby mode
+5 V
47 µF
100 nF
VIO
VCC STBN1 STBN2
CANH1
TXD1
RL
100 pF
RL
100 pF
CANL1
TXD2
TJA1048
CANH2
RXD1
15 pF
RXD2
15 pF
GNDA
CANL2
GNDB
015aaa145
Fig 6.
TJA1048
Product data sheet
Timing test circuit for CAN transceiver
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
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NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
HIGH
TXDx
LOW
CANHx
CANLx
dominant
0.9 V
VO(dif)(bus)
0.5 V
recessive
HIGH
0.7VIO
RXDx
0.3VIO
LOW
td(TXD-busrec)
td(TXD-busdom)
td(busrec-RXD)
td(busdom-RXD)
tPD(TXD-RXD)
Fig 7.
tPD(TXD-RXD)
015aaa211
CAN transceiver timing diagram
13. Test information
13.1 Quality information
This product has been qualified to the appropriate Automotive Electronics Council (AEC)
standard Q100 or Q101 and is suitable for use in automotive applications.
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
14. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
Fig 8.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Package outline SOT108 (SO14)
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
14 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
HVSON14: plastic, thermal enhanced very thin small outline package; no leads;
14 terminals; body 3 x 4.5 x 0.85 mm
SOT1086-2
X
A
B
D
E
A
A1
c
terminal 1
index area
detail X
e1
terminal 1
index area
e
1
7
C
C A B
C
v
w
b
y1 C
y
L
k
Eh
14
8
Dh
0
2.5
Dimensions
Unit
mm
5 mm
scale
A
A1
b
max 1.00 0.05 0.35
nom 0.85 0.03 0.32
min 0.80 0.00 0.29
c
D
Dh
E
Eh
0.2
4.6
4.5
4.4
4.25
4.20
4.15
3.1
3.0
2.9
e
e1
1.65
1.60 0.65
1.55
3.9
k
L
0.35 0.45
0.30 0.40
0.25 0.35
v
0.1
w
y
0.05 0.05
y1
0.1
sot1086-2
Fig 9.
References
Outline
version
IEC
JEDEC
JEITA
SOT1086-2
---
MO-229
---
European
projection
Issue date
10-07-14
10-07-15
Package outline SOT1086 (HVSON14)
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
15. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.
16. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
16.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
16.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
16.3 Wave soldering
Key characteristics in wave soldering are:
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
16.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 9 and 10
Table 9.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
≥ 350
< 2.5
235
220
≥ 2.5
220
220
Table 10.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 10.
TJA1048
Product data sheet
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Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
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TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 10. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
17. Soldering of HVSON packages
Section 16 contains a brief introduction to the techniques most commonly used to solder
Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON
leadless package ICs can found in the following application notes:
• AN10365 ‘Surface mount reflow soldering description”
• AN10366 “HVQFN application information”
18. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TJA1048 v.2
20110325
Product data sheet
-
TJA1048 v.1
Modifications
TJA1048 v.1
TJA1048
Product data sheet
•
•
•
•
•
•
•
Section 1: text revised
Section 2.1: package-related features added
Table 1: added along with ‘Quick reference data’ disclaimer in Section 19.3
Section 7.2.2: text revised
Table 5: parameter Tamb deleted
Table 7: measuring conditions for parameters ICC, IIO and IIL (for pins TXD1 and TXD2) revised
Section 15 and Section 17: added
20101103
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 March 2011
-
© NXP B.V. 2011. All rights reserved.
18 of 21
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NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
TJA1048
Product data sheet
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
19 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TJA1048
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 March 2011
© NXP B.V. 2011. All rights reserved.
20 of 21
TJA1048
NXP Semiconductors
Dual high-speed CAN transceiver with Standby mode
21. Contents
1
2
2.1
2.2
2.3
3
4
5
6
6.1
6.2
7
7.1
7.1.1
7.1.2
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.3
8
9
10
11
12
13
13.1
14
15
16
16.1
16.2
16.3
16.4
17
18
19
19.1
19.2
19.3
19.4
20
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Low-power management . . . . . . . . . . . . . . . . . 1
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6
TXD dominant time-out function . . . . . . . . . . . . 6
Internal biasing of TXD1, TXD2, STBN1 and
STBN2 input pins . . . . . . . . . . . . . . . . . . . . . . . 7
Undervoltage detection on pins VCC and VIO . . 7
Overtemperature protection . . . . . . . . . . . . . . . 7
VIO supply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Application design-in information . . . . . . . . . . 8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal characteristics . . . . . . . . . . . . . . . . . . 9
Static characteristics. . . . . . . . . . . . . . . . . . . . 10
Dynamic characteristics . . . . . . . . . . . . . . . . . 12
Test information . . . . . . . . . . . . . . . . . . . . . . . . 13
Quality information . . . . . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Handling information. . . . . . . . . . . . . . . . . . . . 16
Soldering of SMD packages . . . . . . . . . . . . . . 16
Introduction to soldering . . . . . . . . . . . . . . . . . 16
Wave and reflow soldering . . . . . . . . . . . . . . . 16
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 17
Soldering of HVSON packages. . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Contact information. . . . . . . . . . . . . . . . . . . . . 20
21
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 25 March 2011
Document identifier: TJA1048
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