10477A Help Note

10477A Help Note
Help Note
Publication Number 10472-92001
December 2000
© Copyright Agilent Technologies, Inc. 2000
All Rights Reserved
Selecting the Correct Probe Pod
Selecting the Correct Probe Pod
The following equivalent circuit information is provided to help you
select the appropriate clock and data pods for your application.
NOTE:
For more information about probe pods see the online help system provided
with your module.
10472A 2.5 V Clock Pod.
Clock output type:
74AVC16244
Clock output rate:
200 MHz maximum
Clock out delay:
approximately 8 ns total in 14 steps
Clock input type:
74AVC16244 (3.6 V maximum)
Clock input rate:
DC to 200 MHz
Pattern input rate:
74AVC16244 (3.6 V maximum; no connect=logic
0)
Clock in to clock out:
approximately 30 ns
Pattern in to recognition:
approximately 15 ns + 1 clock period
Recommended lead set:
10498A
3
Selecting the Correct Probe Pod
10473A 3-State 2.5 V Data Pod.
NOTE:
Output type:
74AVC16244
3-state enable:
negative true; no connect=enabled
Maximum clock:
300 MHz
Skew:
Typical less than 1 ns, worst case 2 ns
Recommended lead set:
10498A
You will notice by looking at the pod label, there are two pin 7’s. One is a 3state output and the other is not. By looping the non 3-state output back into
the 3-state enable line, the channel can be used as a 3-state enable.
4
Selecting the Correct Probe Pod
10475A 1.8 V Clock Pod.
Clock output type:
74AVC16244
Clock output rate:
200 MHz maximum
Clock out delay:
approximately 8 ns total in 14 steps
Clock input type:
74AVC16244 (3.6 V maximum)
Clock input rate:
DC to 200 MHz
Pattern input rate:
74AVC16244 (3.6 V maximum; no connect=logic
0)
Clock in to clock out:
approximately 30 ns
Pattern in to recognition:
approximately 15 ns + 1 clock period
Recommended lead set:
10498A
5
Selecting the Correct Probe Pod
10476A 3-State 1.8 V Data Pod.
NOTE:
Output type:
74AVC16244
3-state enable:
negative true; no connect=enabled
Maximum clock:
300 MHz
Skew:
Typical less than 1.5 ns, worst case 2.5 ns
Recommended lead set:
10498A
You will notice by looking at the pod label, there are two pin 7’s. One is a 3state output and the other is not. By looping the non 3-state output back into
the 3-state enable line, the channel can be used as a 3-state enable.
6
Selecting the Correct Probe Pod
10477A 3.3 V Clock Pod.
Clock output type:
74AVC16244
Clock output rate:
200 MHz maximum
Clock out delay:
approximately 8 ns total in 14 steps
Clock input type:
74AVC16244 (3.6 V maximum)
Clock input rate:
DC to 200 MHz
Pattern input rate:
74AVC16244 (3.6 V maximum; no connect=logic
0)
Clock in to clock out:
approximately 30 ns
Pattern in to recognition:
approximately 15 ns + 1 clock period
Recommended lead set:
10498A
7
Selecting the Correct Probe Pod
10483A 3-State 3.3 V Data Pod.
NOTE:
Output type:
74AVC16244
3-state enable:
negative true; no connect=enabled
Maximum clock:
300 MHz
Skew:
Typical less than 1 ns, worst case 2 ns
Recommended lead set:
10498A
You will notice by looking at the pod label, there are two pin 7’s. One is a 3state output and the other is not. By looping the non 3-state output back into
the 3-state enable line, the channel can be used as a 3-state enable.
8
Selecting the Correct Probe Pod
E8140A LVDS Clock Pod.
Clock output type:
65LVDS179 (LVDS) and 10H125 (TTL)
Clock output rate:
200 MHz maximum (LVDS and TTL)
Clock out delay:
approximately 8 ns total in 14 steps
Clock input type:
65LVDS179 (LVDS with 100 ohm)
Clock input rate:
DC to 150 MHz (LVDS)
Pattern input rate:
10H124 (TTL) (no connect=logic 1)
Clock in to clock out:
approximately 30 ns
Pattern in to recognition:
approximately 15 ns + 1 clock period
Recommended lead set:
10498A
9
Selecting the Correct Probe Pod
E8141A LVDS Data Pod.
Output type:
65LVDS389 (LVDS data lines)
10H125 (TTL non-3-state channel 7)
3-state enable:
positive true TTL; no connect=enabled
Maximum clock:
300 MHz
Skew:
Typical less than 1 ns, worst case 2 ns
Recommended lead set:
E8142A
NOTE:
You will notice by looking at the pod label, there are two pin 7’s. One is a 3state output and the other is not. By looping the non 3-state output back into
the 3-state enable line, the channel can be used as a 3-state enable..
NOTE:
The LVDS Data Pod must be connected to the leads in such a way that the
striped row of cables faces up.
10
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This is Agilent Selecting the
Correct Probe Pod Help Note
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Publication number
10472-92001, December 2000
Print History as follows:
10472-92000, October 2000
Printed in USA.
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*10472-92001*
*10472-92001*
Agilent Part Number 10472-92001
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