LNK302/304-306

®

LinkSwitch-TN Family

Lowest Component Count, Energy-Effi cient

Off-Line Switcher IC

Product Highlights

Cost Effective Linear/Cap Dropper Replacement

• Lowest cost and component count buck converter solution

• Fully integrated auto-restart for short-circuit and open loop fault protection – saves external component costs

• LNK302 uses a simplifi ed controller without auto-restart for very low system cost

• 66 kHz operation with accurate current limit – allows low cost off-the-shelf 1 mH inductor for up to 120 mA output current

• Tight tolerances and negligible temperature variation

• High breakdown voltage of 700 V provides excellent input surge withstand

• Frequency jittering dramatically reduces EMI (~10 dB)

– minimizes EMI fi lter cost

• High thermal shutdown temperature (+135 °C minimum)

Much Higher Performance over Discrete Buck and

Passive Solutions

• Supports buck, buck-boost and fl yback topologies

• System level thermal overload, output short-circuit and open control loop protection

• Excellent line and load regulation even with typical confi guration

• High bandwidth provides fast turn-on with no overshoot

• Current limit operation rejects line ripple

• Universal input voltage range (85 VAC to 265 VAC)

• Built-in current limit and hysteretic thermal protection

• Higher power factor than capacitor-fed solutions

• Entirely manufacturable in SMD

EcoSmart ®

– Extremely Energy Effi cient

• Consumes typically only 50/80 mW in self-powered buck topology at 115/230 VAC input with no load (opto feedback)

• Consumes typically only 7/12 mW in fl yback topology with external bias at 115/230 VAC input with no load

• Meets California Energy Commission (CEC), Energy

Star, and EU requirements

Applications

• Appliances and timers

• LED drivers and industrial controls

Description

LinkSwitch-TN is specifi cally designed to replace all linear and capacitor-fed (cap dropper) non-isolated power supplies in the under 360 mA output current range at equal system cost while offering much higher performance and energy effi ciency.

+

Wide Range

HV DC Input

FB BP

D S

LinkSwitch-TN

+

DC

Output

PI-3492-111903

Figure 1. Typical Buck Converter Application (See Application

Examples Section for Other Circuit Confi gurations).

OUTPUT CURRENT TABLE 1

230 VAC ±15% 85-265 VAC

PRODUCT 4

MDCM 2 CCM 3 MDCM 2 CCM 3

LNK302P/G/D 63 mA 80 mA 63 mA 80 mA

LNK304P/G/D 120 mA 170 mA 120 mA 170 mA

LNK305P/G/D 175 mA 280 mA 175 mA 280 mA

LNK306P/G/D 225 mA 360 mA 225 mA 360 mA

Table 1. Output Current Table.

Notes:

1. Typical output current in a non-isolated buck converter. Output power capability depends on respective output voltage. See Key Applications

Considerations Section for complete description of assumptions, including fully discontinuous conduction mode (DCM) operation.

2. Mostly discontinuous conduction mode.

3. Continuous conduction mode.

4. Packages: P: DIP-8B, G: SMD-8B, D: SO-8C.

LinkSwitch-TN devices integrate a 700 V power MOSFET, oscillator, simple On/Off control scheme, a high voltage switched current source, frequency jittering, cycle-by-cycle current limit and thermal shutdown circuitry onto a monolithic IC. The startup and operating power are derived directly from the voltage on the DRAIN pin, eliminating the need for a bias supply and associated circuitry in buck or fl yback converters. The fully integrated auto-restart circuit in the LNK304-306 safely limits output power during fault conditions such as short-circuit or open loop, reducing component count and system-level load protection cost. A local supply provided by the IC allows use of a non-safety graded optocoupler acting as a level shifter to further enhance line and load regulation performance in buck and buck-boost converters, if required.

November 2008

LNK302/304-306

BYPASS

(BP)

FEEDBACK

(FB)

1.65 V -V

T

6.3 V

JITTER

CLOCK

DC

MAX

OSCILLATOR

REGULATOR

5.8 V

5.8 V

4.85 V

+

-

BYPASS PIN

UNDER-VOLTAGE

CURRENT LIMIT

COMPARATOR

-

+

VI

LIMIT

DRAIN

(D)

THERMAL

SHUTDOWN

S Q

R Q

LEADING

EDGE

BLANKING

SOURCE

(S)

PI-3904-020805

Figure 2a. Functional Block Diagram (LNK302).

BYPASS

(BP)

FEEDBACK

(FB)

1.65 V -V

T

DRAIN

(D)

REGULATOR

5.8 V

6.3 V

AUTO-

RESTART

COUNTER

CLOCK

RESET

FAULT

PRESENT

JITTER

CLOCK

DC

MAX

OSCILLATOR

5.8 V

4.85 V

+

-

BYPASS PIN

UNDER-VOLTAGE

CURRENT LIMIT

COMPARATOR

+

VI

LIMIT

THERMAL

SHUTDOWN

S Q

R Q

LEADING

EDGE

BLANKING

SOURCE

(S)

PI-2367-021105

Figure 2b. Functional Block Diagram (LNK304-306).

Rev. I 11/08

Pin Functional Description

DRAIN (D) Pin:

Power MOSFET drain connection. Provides internal operating current for both start-up and steady-state operation.

BYPASS (BP) Pin:

Connection point for a 0.1 µF external bypass capacitor for the internally generated 5.8 V supply.

FEEDBACK (FB) Pin:

During normal operation, switching of the power MOSFET is controlled by this pin. MOSFET switching is terminated when a current greater than 49 µA is delivered into this pin.

SOURCE (S) Pin:

This pin is the power MOSFET source connection. It is also the ground reference for the BYPASS and FEEDBACK pins.

P Package (DIP-8B)

G Package (SMD-8B) D Package (SO-8C)

S 1

S 2

BP 3

FB 4

8 S

7 S

5 D

Figure 3. Pin Confi guration.

BP

FB

1

2

D 4

8

7

6

5

S

S

S

S

PI-3491-120706

LinkSwitch-TN Functional

Description

LinkSwitch-TN combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike conventional

PWM (pulse width modulator) controllers, LinkSwitch-TN uses a simple ON/OFF control to regulate the output voltage. The

LinkSwitch-TN controller consists of an oscillator, feedback

(sense and logic) circuit, 5.8 V regulator, BYPASS pin undervoltage circuit, over-temperature protection, frequency jittering, current limit circuit, leading edge blanking and a 700 V power

MOSFET. The LinkSwitch-TN incorporates additional circuitry for auto-restart.

Oscillator

The typical oscillator frequency is internally set to an average of 66 kHz. Two signals are generated from the oscillator: the maximum duty cycle signal (DC

MAX

) and the clock signal that indicates the beginning of each cycle.

LNK302/304-306

The LinkSwitch-TN oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 4 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in

Figure 4 illustrates the frequency jitter of the LinkSwitch-TN.

Feedback Input Circuit

The feedback input circuit at the FB pin consists of a low impedance source follower output set at 1.65 V. When the current delivered into this pin exceeds 49 µA, a low logic level (disable) is generated at the output of the feedback circuit. This output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled), otherwise the power MOSFET remains off

(disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the FB pin voltage or current during the remainder of the cycle are ignored.

5.8 V Regulator and 6.3 V Shunt Voltage Clamp

The 5.8 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.8 V by drawing a current from the voltage on the DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node for the LinkSwitch-TN.

When the MOSFET is on, the LinkSwitch-TN runs off of the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows the LinkSwitch-TN to operate continuously from the current drawn from the DRAIN pin. A bypass capacitor value of 0.1 µF is suffi cient for both high frequency decoupling and energy storage.

In addition, there is a 6.3 V shunt regulator clamping the

BYPASS pin at 6.3 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of

LinkSwitch-TN externally through a bias winding to decrease the no-load consumption to about 50 mW.

BYPASS Pin Under-Voltage

The BYPASS pin under-voltage circuitry disables the power

MOSFET when the BYPASS pin voltage drops below 4.85 V.

Once the BYPASS pin voltage drops below 4.85 V, it must rise back to 5.8 V to enable (turn-on) the power MOSFET.

Over-Temperature Protection

The thermal shutdown circuitry senses the die temperature.

The threshold is set at 142 °C typical with a 75 °C hysteresis.

When the die temperature rises above this threshold (142 °C) the power MOSFET is disabled and remains disabled until the die temperature falls by 75 °C, at which point it is re-enabled.

Current Limit

The current limit circuit senses the current in the power MOSFET.

When this current exceeds the internal threshold (I

LIMIT

), the

Rev. I 11/08

LNK302/304-306

600

500

400

300

200

100

0

V

DRAIN

68 kHz

64 kHz

0 20

Time (µs)

Figure 4. Frequency Jitter.

power MOSFET is turned off for the remainder of that cycle.

The leading edge blanking circuit inhibits the current limit comparator for a short time (t

LEB

) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifi er reverse recovery time will not cause premature termination of the switching pulse.

Auto-Restart (LNK304-306 only)

In the event of a fault condition such as output overload, output short, or an open loop condition, LinkSwitch-TN enters into autorestart operation. An internal counter clocked by the oscillator gets reset every time the FB pin is pulled high. If the FB pin is not pulled high for 50 ms, the power MOSFET switching is disabled for 800 ms. The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed.

Applications Example

A 1.44 W Universal Input Buck Converter

The circuit shown in Figure 5 is a typical implementation of a

12 V, 120 mA non-isolated power supply used in appliance control such as rice cookers, dishwashers or other white goods.

This circuit may also be applicable to other applications such as night-lights, LED drivers, electricity meters, and residential heating controllers, where a non-isolated supply is acceptable.

The input stage comprises fusible resistor RF1, diodes D3 and

D4, capacitors C4 and C5, and inductor L2. Resistor RF1 is a fl ame proof, fusible, wire wound resistor. It accomplishes several functions: a) Inrush current limitation to safe levels for rectifi ers D3 and D4; b) Differential mode noise attenuation; c) Input fuse should any other component fail short-circuit

(component fails safely open-circuit without emitting smoke, fi re or incandescent material).

The power processing stage is formed by the LinkSwitch-TN, freewheeling diode D1, output choke L1, and the output capacitor C2. The LNK304 was selected such that the power supply operates in the mostly discontinuous-mode (MDCM).

Diode D1 is an ultra-fast diode with a reverse recovery time (t rr

) of approximately 75 ns, acceptable for MDCM operation. For continuous conduction mode (CCM) designs, a diode with a t rr

of

≤35 ns is recommended. Inductor L1 is a standard off-the- shelf inductor with appropriate RMS current rating (and acceptable temperature rise). Capacitor C2 is the output fi lter capacitor; its primary function is to limit the output voltage ripple. The output voltage ripple is a stronger function of the ESR of the output capacitor than the value of the capacitor itself.

To a fi rst order, the forward voltage drops of D1 and D2 are identical. Therefore, the voltage across C3 tracks the output voltage. The voltage developed across C3 is sensed and regulated via the resistor divider R1 and R3 connected to U1’s FB pin.

The values of R1 and R3 are selected such that, at the desired output voltage, the voltage at the FB pin is 1.65 V.

Regulation is maintained by skipping switching cycles. As the output voltage rises, the current into the FB pin will rise. If this exceeds I

FB then subsequent cycles will be skipped until the current reduces below I

FB

. Thus, as the output load is reduced, more cycles will be skipped and if the load increases, fewer

85-265

VAC

RF1

8.2 Ω

2 W

D3

1N4007

D4

1N4007

L2

1 mH

C4

4.7 µF

400 V

R1

13.0 kΩ

1%

R3

2.05 kΩ

1%

FB BP

C1

100 nF

D S

C5

4.7 µF

400 V

LinkSwitch-TN

LNK304

D1

UF4005

C3

10 µF

35 V

L1

1 mH

280 mA

D2

1N4005GP

C2

100 µF

16 V

R4

3.3 kΩ

12 V,

120 mA

RTN

PI-3757-112103

Figure 5. Universal Input, 12 V, 120 mA Constant Voltage Power Supply Using LinkSwitch-TN.

Rev. I 11/08

LNK302/304-306

AC

INPUT

RF1 D3

C4

L2

C5

S

S

D

LinkSwitch-TN

FB

BP

S

C1

R3

S

R1

C3

D1

D2

+

L1

C2

DC

OUTPUT

D4

Optimize hatched copper areas ( ) for heatsinking and EMI.

Figure 6a. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Confi guration using P or G Package.

PI-3750-121106

RF1 D3 L2

AC

INPUT

C4 C5

D

FB

BP

C1

S

S

S

S

R3

D1

R1

C3

L1

D2 C2

DC

OUTPUT

+

D4

Optimize hatched copper areas ( ) for heatsinking and EMI.

PI-4546-011807

Figure 6b. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Confi guration using D Package

to Bottom Side of the Board. cycles are skipped. To provide overload protection if no cycles are skipped during a 50 ms period, LinkSwitch-TN will enter auto-restart (LNK304-306), limiting the average output power to approximately 6% of the maximum overload power. Due to tracking errors between the output voltage and the voltage across

C3 at light load or no load, a small pre-load may be required

(R4). For the design in Figure 5, if regulation to zero load is required, then this value should be reduced to 2.4 k Ω.

Key Application Considerations

LinkSwitch-TN Design Considerations

Output Current Table

Data sheet maximum output current table (Table 1) represents the maximum practical continuous output current for both mostly discontinuous conduction mode (MDCM) and continuous conduction mode (CCM) of operation that can be delivered from a given LinkSwitch-TN device under the following assumed conditions:

1) Buck converter topology.

2) The minimum DC input voltage is

≥70 V. The value of input capacitance should be large enough to meet this criterion.

3) For CCM operation a KRP* of 0.4.

4) Output voltage of 12 VDC.

5) Effi ciency of 75%.

6) A catch/freewheeling diode with t rr

≤75 ns is used for

MDCM operation and for CCM operation, a diode with t rr

≤35 ns is used.

7) The part is board mounted with SOURCE pins soldered to a suffi cient area of copper to keep the SOURCE pin temperature at or below 100 °C.

*KRP is the ratio of ripple to peak inductor current.

LinkSwitch-TN Selection and Selection Between

MDCM and CCM Operation

Select the LinkSwitch-TN device, freewheeling diode and output inductor that gives the lowest overall cost. In general, MDCM

Rev. I 11/08

LNK302/304-306

TOPOLOGY

High-Side

Buck –

Direct

Feedback

+

V

IN

BASIC CIRCUIT SCHEMATIC

FB BP

D S

LinkSwitch-TN

V

O

+

KEY FEATURES

1. Output referenced to input

2. Positive output (V

O

) with respect to -V

IN

3. Step down – V

O

< V

IN

4. Low cost direct feedback (±10% typ.)

High-Side

Buck –

Optocoupler

Feedback

Low-Side

Buck –

Optocoupler

Feedback

+

FB BP

D S

LinkSwitch-TN

V

IN

+

V

IN

LinkSwitch-TN

PI-3751-121003

PI-3752-121003

+

+

V

O

1. Output referenced to input

2. Positive output (V

O

) with respect to -V

IN

3. Step down – V

O

< V

IN

4. Optocoupler feedback

- Accuracy only limited by reference

choice

- Low cost non-safety rated opto

- No pre-load required

5. Minimum no-load consumption

V

O

Low-Side

Buck –

Constant

Current LED

Driver

BP

S

FB

D

+

V

IN

LinkSwitch-TN

V

F

+

I

O

PI-3753-111903

1. Output referenced to input

2. Negative output (V

O

) with respect to +V

IN

3. Step down – V

O

< V

IN

4. Optocoupler feedback

- Accuracy only limited by reference

choice

- Low cost non-safety rated opto

- No pre-load required

- Ideal for driving LEDs

BP

S

FB

D

R =

V

F

I

O

PI-3754-112103

High-Side

Buck Boost –

Direct

Feedback

High-Side

Buck Boost –

Constant

Current LED

Driver

+

V

IN

FB BP

D S

LinkSwitch-TN

V

O

+

PI-3755-121003

+

V

IN

FB BP

D S

LinkSwitch-TN

2 kΩ

300 Ω

R

SENSE

R

SENSE

10 µF

50 V

100 nF

=

2 V

I

O

I

O

1. Output referenced to input

2. Negative output (V

O

3. Step up/down – V

O

) with respect to +V

IN

> V

IN or V

O

< V

IN

4. Low cost direct feedback (±10% typ.)

5. Fail-safe – output is not subjected to input

voltage if the internal MOSFET fails

6. Ideal for driving LEDs – better accuracy

and temperature stability than Low-side

Buck constant current LED driver

PI-3779-120803

Table 2. Common Circuit Confi gurations Using LinkSwitch-TN. (continued on next page)

Rev. I 11/08

LNK302/304-306

TOPOLOGY

Low-Side

Buck Boost –

Optocoupler

Feedback

+

BASIC CIRCUIT SCHEMATIC

V

IN

LinkSwitch-TN

V

O

BP

S

FB

D

PI-3756-111903

+

KEY FEATURES

1. Output referenced to input

2. Positive output (V

O

) with respect to +V

IN

3. Step up/down – V

O

> V

IN

or V

O

4. Optocoupler feedback

< V

IN

- Accuracy only limited by reference

choice

- Low cost non-safety rated opto

- No pre-load required

5. Fail-safe – output is not subjected to input

voltage if the internal MOSFET fails

Table 2 (cont). Common Circuit Confi gurations Using LinkSwitch-TN. provides the lowest cost and highest effi ciency converter. CCM designs require a larger inductor and ultra-fast (t rr

≤35 ns) freewheeling diode in all cases. It is lower cost to use a larger

LinkSwitch-TN in MDCM than a smaller LinkSwitch-TN in CCM because of the additional external component costs of a CCM design. However, if the highest output current is required, CCM should be employed following the guidelines below.

Topology Options

LinkSwitch-TN can be used in all common topologies, with or without an optocoupler and reference to improve output voltage tolerance and regulation. Table 2 provide a summary of these confi gurations. For more information see the Application

Note – LinkSwitch-TN Design Guide.

Component Selection

Referring to Figure 5, the following considerations may be helpful in selecting components for a LinkSwitch-TN design.

Freewheeling Diode D1

Diode D1 should be an ultra-fast type. For MDCM, reverse recovery time t rr

≤75 ns should be used at a temperature of

70 °C or below. Slower diodes are not acceptable, as continuous mode operation will always occur during startup, causing high leading edge current spikes, terminating the switching cycle prematurely, and preventing the output from reaching regulation.

If the ambient temperature is above 70 °C then a diode with t rr

≤35 ns should be used.

For CCM an ultra-fast diode with reverse recovery time t rr

≤35 ns should be used. A slower diode may cause excessive leading edge current spikes, terminating the switching cycle prematurely and preventing full power delivery.

Fast and slow diodes should never be used as the large reverse recovery currents can cause excessive power dissipation in the diode and/or exceed the maximum drain current specifi cation of LinkSwitch-TN.

Feedback Diode D2

Diode D2 can be a low-cost slow diode such as the 1N400X series, however it should be specifi ed as a glass passivated type to guarantee a specifi ed reverse recovery time. To a fi rst order, the forward drops of D1 and D2 should match.

Inductor L1

Choose any standard off-the-shelf inductor that meets the design requirements. A “drum” or “dog bone” “I” core inductor is recommended with a single ferrite element due to its low cost and very low audible noise properties. The typical

inductance value and RMS current rating can be obtained from the LinkSwitch-TN design spreadsheet available within the

PI Expert design suite from Power Integrations. Choose L1 greater than or equal to the typical calculated inductance with

RMS current rating greater than or equal to calculated RMS inductor current.

Capacitor C2

The primary function of capacitor C2 is to smooth the inductor current. The actual output ripple voltage is a function of this capacitor’s ESR. To a fi rst order, the ESR of this capacitor should not exceed the rated ripple voltage divided by the typical current limit of the chosen LinkSwitch-TN.

Feedback Resistors R1 and R3

The values of the resistors in the resistor divider formed by

R1 and R3 are selected to maintain 1.65 V at the FB pin. It is recommended that R3 be chosen as a standard 1% resistor of

2 k Ω. This ensures good noise immunity by biasing the feedback network with a current of approximately 0.8 mA.

Feedback Capacitor C3

Capacitor C3 can be a low cost general purpose capacitor. It provides a “sample and hold” function, charging to the output voltage during the off time of LinkSwitch-TN. Its value should be 10 µF to 22 µF; smaller values cause poorer regulation at light load conditions.

Rev. I 11/08

LNK302/304-306

Pre-load Resistor R4

In high-side, direct feedback designs where the minimum load is <3 mA, a pre-load resistor is required to maintain output regulation. This ensures suffi cient inductor energy to pull the inductor side of the feedback capacitor C3 to input return via

D2. The value of R4 should be selected to give a minimum output load of 3 mA.

In designs with an optocoupler the Zener or reference bias current provides a 1 mA to 2 mA minimum load, preventing

“pulse bunching” and increased output ripple at zero load.

LinkSwitch-TN Layout Considerations

In the buck or buck-boost converter confi guration, since the

SOURCE pins in LinkSwitch-TN are switching nodes, the copper area connected to SOURCE should be minimized to minimize

EMI within the thermal constraints of the design.

In the boost confi guration, since the SOURCE pins are tied to DC return, the copper area connected to SOURCE can be maximized to improve heatsinking.

The loop formed between the LinkSwitch-TN, inductor (L1), freewheeling diode (D1), and output capacitor (C2) should be kept as small as possible. The BYPASS pin capacitor

C1 (Figure 6) should be located physically close to the

SOURCE (S) and BYPASS (BP) pins. To minimize direct coupling from switching nodes, the LinkSwitch-TN should be placed away from AC input lines. It may be advantageous to place capacitors C4 and C5 in-between LinkSwitch-TN and the

AC input. The second rectifi er diode D4 is optional, but may be included for better EMI performance and higher line surge withstand capability.

Quick Design Checklist

As with any power supply design, all LinkSwitch-TN designs should be verifi ed for proper functionality on the bench. The following minimum tests are recommended:

1) Adequate DC rail voltage – check that the minimum DC input voltage does not fall below 70 VDC at maximum load, minimum input voltage.

2) Correct Diode Selection – UF400x series diodes are recommended only for designs that operate in MDCM at an ambient of 70 °C or below. For designs operating in continuous conduction mode (CCM) and/or higher ambients, then a diode with a reverse recovery time of 35 ns or better, such as the BYV26C, is recommended.

3) Maximum drain current – verify that the peak drain current is below the data sheet peak drain specifi cation under worst-case conditions of highest line voltage, maximum overload (just prior to auto-restart) and highest ambient temperature.

4) Thermal check – at maximum output power, minimum input voltage and maximum ambient temperature, verify that the LinkSwitch-TN SOURCE pin temperature is

100 °C or below. This fi gure ensures adequate margin due to variations in R

DS(ON)

from part to part. A battery powered thermocouple meter is recommended to make measurements when the SOURCE pins are a switching node. Alternatively, the ambient temperature may be raised to indicate margin to thermal shutdown.

In a LinkSwitch-TN design using a buck or buck boost converter topology, the SOURCE pin is a switching node. Oscilloscope measurements should therefore be made with probe grounded to a DC voltage, such as primary return or DC input rail, and not to the SOURCE pins. The power supply input must always be supplied from an isolated source (e.g. via an isolation transformer).

Rev. I 11/08

LNK302/304-306

ABSOLUTE MAXIMUM RATINGS

(1,5)

DRAIN Voltage .................................. ................ -0.3 V to 700 V

Peak DRAIN Current (LNK302).................200 mA (375 mA) (2)

Peak DRAIN Current (LNK304).................400 mA (750 mA) (2)

Peak DRAIN Current (LNK305).................800 mA (1500 mA) (2)

Peak DRAIN Current (LNK306).................1400 mA (2600 mA) (2)

FEEDBACK Voltage .........................................-0.3 V to 9 V

FEEDBACK Current.............................................100 mA

BYPASS Voltage ..........................................-0.3 V to 9 V

Storage Temperature .......................................... -65 °C to 150 °C

Operating Junction Temperature (3) ..................... -40 °C to 150 °C

Lead Temperature (4) ........................................................260 °C

Notes:

1. All voltages referenced to SOURCE, T

A

= 25 °C.

2. The higher peak DRAIN current is allowed if the DRAIN to SOURCE voltage does not exceed 400 V.

3. Normally limited by internal circuitry.

4. 1/16 in. from case for 5 seconds.

5. Maximum ratings specifi ed may be applied, one at a time, without causing permanent damage to the product.

Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability.

THERMAL IMPEDANCE

Thermal Impedance: P or G Package:

( θ

JA

) ........................... 70 °C/W (3) ; 60 °C/W (4)

( θ

JC

) (1) ............................................... 11 °C/W

D Package:

( θ

JA

) ..................... .... 100 °C/W (3) ; 80 °C/W (4)

( θ

JC

) (2) ............................................... 30 °C/W

Notes:

1. Measured on pin 2 (SOURCE) close to plastic interface.

2. Measured on pin 8 (SOURCE) close to plastic interface.

3. Soldered to 0.36 sq. in. (232 mm 2 ), 2 oz. (610 g/m 2 ) copper clad.

4. Soldered to 1 sq. in. (645 mm 2 ), 2 oz. (610 g/m 2 ) copper clad.

Parameter Symbol

Conditions

SOURCE = 0 V; T

J

= -40 to 125 °C

See Figure 7

(Unless Otherwise Specifi ed)

CONTROL FUNCTIONS

Output

Frequency

f

OSC

Maximum Duty

Cycle

FEEDBACK Pin

Turnoff Threshold

Current

FEEDBACK Pin

Voltage at Turnoff

Threshold

DC

MAX

I

FB

V

FB

T

J

= 25 °C

Average

Peak-Peak Jitter

S2 Open

T

J

= 25 °C

DRAIN Supply

Current

I

S1

I

S2

V

FB

≥2 V

(MOSFET Not Switching)

See Note A

FEEDBACK

Open

(MOSFET

Switching)

See Notes A, B

LNK302/304

LNK305

LNK306

Min

62

66

30

1.54

Typ

66

4

69

49

1.65

160

200

220

250

Max

70

72

68

1.76

220

260

280

310

Units

kHz

%

µA

V

µA

µA

Rev. I 11/08

LNK302/304-306

Parameter Symbol

Conditions

SOURCE = 0 V; T

J

= -40 to 125 °C

See Figure 7

(Unless Otherwise Specifi ed)

CONTROL FUNCTIONS (cont.)

LNK302/304

BYPASS Pin

Charge Current

I

CH1

V

BP

T

J

= 0 V

= 25 °C

LNK305/306

LNK302/304

I

CH2

V

BP

T

J

= 4 V

= 25 °C

LNK305/306

BYPASS Pin

Voltage

BYPASS Pin

Voltage Hysteresis

V

BP

V

BPH

BYPASS Pin

Supply Current

I

BPSC

CIRCUIT PROTECTION

See Note D

Current Limit

I

LIMIT

(See

Note E) di/dt = 55 mA/µs

T

J

= 25 °C di/dt = 250 mA/µs

T

J

= 25 °C di/dt = 65 mA/µs

T

J

= 25 °C di/dt = 415 mA/µs

T

J

= 25 °C di/dt = 75 mA/µs

T

J

= 25 °C di/dt = 500 mA/µs

T

J

= 25 °C di/dt = 95 mA/µs

T

J

= 25 °C di/dt = 610 mA/µs

T

J

= 25 °C

LNK302

LNK304

LNK305

LNK306

LNK302/304

Minimum On Time

t

ON(MIN)

LNK305

LNK306

Leading Edge

Blanking Time

t

LEB

T

J

= 25 °C

See Note F

Thermal Shutdown

Temperature

T

SD

Min

0.8

68

126

145

240

271

350

396

450

135

-5.5

-7.5

-3.8

-4.5

5.55

508

280

360

400

170

Typ Max Units

375

450

482

578

360

460

500

215

136

165

257

308

-3.3

-4.6

-2.3

-3.3

5.8

0.95

142

-1.8

-2.5

-1.0

-1.5

6.10

1.2

150 mA

V

V

µA mA ns ns

°C

401

504

515

647

475

610

675

146

185

275

345

Rev. I 11/08

LNK302/304-306

Parameter Symbol

Conditions

SOURCE = 0 V; T

J

= -40 to 125 °C

See Figure 7

(Unless Otherwise Specifi ed)

CIRCUIT PROTECTION (cont.)

Thermal Shutdown

Hysteresis

OUTPUT

T

SHD

See Note G

ON-State

Resistance

OFF-State Drain

Leakage Current

Breakdown Voltage

R

DS(ON)

I

DSS

BV

DSS

I

D

I

D

I

D

I

D

LNK302

= 13 mA

LNK304

= 25 mA

LNK305

= 35 mA

LNK306

= 45 mA

T

J

= 25 °C

T

J

= 100 °C

T

J

= 25 °C

T

J

= 100 °C

T

J

= 25 °C

T

J

= 100 °C

T

J

= 25 °C

T

J

= 100 °C

LNK302/304

V

BP

= 6.2 V, V

V

DS

T

J

FB

≥2 V,

= 560 V,

= 25 °C

LNK305

LNK306

V

BP

= 6.2 V, V

FB

≥2 V,

T

J

= 25 °C

Rise Time

Fall Time

DRAIN Supply

Voltage

t

R t

F

Measured in a Typical Buck

Converter Application

Output Enable

Delay

Output Disable

Setup Time

t

EN t

DST

See Figure 9

Auto-Restart

ON-Time

Auto-Restart

Duty Cycle

t

AR

DC

AR

T

J

= 25 °C

See Note H

LNK302

LNK304-306

LNK302

LNK304-306

Min

700

50

Typ

75

48

76

24

38

12

19

7

11

50

50

0.5

Not Applicable

50

Not Applicable

6

Max

22.1

8.1

12.9

50

70

55.2

88.4

27.6

44.2

13.8

90

10

Units

°C

Ω

µA

µs

µs ms

%

V ns ns

V

Rev. I 11/08

LNK302/304-306

NOTES:

A. Total current consumption is the sum of I

S1

and I

DSS

when FEEDBACK pin voltage is

≥2 V (MOSFET not switching) and the sum of I

S2

and I

DSS

when FEEDBACK pin is shorted to SOURCE (MOSFET switching).

B Since the output MOSFET is switching, it is diffi cult to isolate the switching current from the supply current at the

DRAIN. An alternative is to measure the BYPASS pin current at 6 V.

C. See Typical Performance Characteristics section Figure 14 for BYPASS pin start-up charging waveform.

D. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACK

pins and not any other external circuitry.

E. For current limit at other di/dt values, refer to Figure 13.

F. This parameter is guaranteed by design.

G. This parameter is derived from characterization.

H. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).

50 V

S1

470 Ω

5 W

S

S

D FB

BP

S

S

Figure 7. LinkSwitch-TN General Test Circuit.

470 kΩ

0.1 µF

S2

50 V

PI-3490-060204

DC

MAX

(internal signal) tP

FB

V

DRAIN

1 t

P

= f

OSC tEN

Figure 9. LinkSwitch-TN Output Enable Timing.

PI-3707-112503

Figure 8. LinkSwitch-TN Duty Cycle Measurement.

Rev. I 11/08

LNK302/304-306

Typical Performance Characteristics

1.1

1.0

0.9

-50 -25 0 25 50 75 100 125 150

Junction Temperature (°C)

Figure 10. Breakdown vs. Temperature.

1.4

1.2

1.0

0.8

0.6

Normalized di/dt di/dt = 1 di/dt = 6

0.4

0.2

5

2

1

4

3

0

0

-50 0 50 100

Temperature (°C)

Figure 12. Current Limit vs. Temperature at

Normalized di/dt.

150

7

6

0 0.2

0.4

0.6

Time (ms)

0.8

Figure 14. BYPASS Pin Start-up Waveform.

1.0

1.2

1.0

0.8

0.6

0.4

0.2

0

-50 -25 0 25 50 75 100 125

Junction Temperature (°C)

Figure 11. Frequency vs. Temperature.

1.4

1.2

1.0

0.8

0.6

0.4

0.2

LNK302

LNK304

LNK305

LNK306

Normalized di/dt = 1

Normalized

Current

Limit = 1

55 mA/µs

65 mA/µs

75 mA/µs

95 mA/µs

136 mA

257 mA

375 mA

482 mA

0

1 2 3 4

Normalized di/dt

Figure 13. Current Limit vs. di/dt.

5 6

400

350

300

250

200

150

100

50

25 °C

100 °C

Scaling Factors:

LNK302 0.5

LNK304 1.0

LNK305 2.0

LNK306 3.4

0

0 2 4 6 8 10 12 14 16 18 20

DRAIN Voltage (V)

Figure 15. Output Characteristics.

Rev. I 11/08

LNK302/304-306

Typical Performance Characteristics (cont.)

1000

100

Scaling Factors:

LNK302 0.5

LNK304 1.0

LNK305 2.0

LNK306 3.4

10

1

0 100 200 300 400 500 600

Drain Voltage (V)

Figure 16. C

OSS

vs. Drain Voltage.

PART ORDERING INFORMATION

LNK 304 G N - TL

LinkSwitch Product Family

TN Series Number

Package Identifi er

G Plastic Surface Mount DIP

P Plastic DIP

D Plastic SO-8C

Lead Finish

N Pure Matte Tin (RoHS Compliant)

G RoHS Compliant and Halogen Free (D package only)

Tape & Reel and Other Options

Blank Standard Confi gurations

TL

Tape & Reel, 1 k pcs minimum for G Package. 2.5 k pcs for D Package. Not available for P Package.

Rev. I 11/08

LNK302/304-306

-E-

.240 (6.10)

.260 (6.60)

Pin 1

-D-

.125 (3.18)

.145 (3.68)

-T-

SEATING

PLANE

.100 (2.54) BSC

⊕ D S .004 (.10)

.367 (9.32)

.387 (9.83)

.137 (3.48)

MINIMUM

.057 (1.45)

.068 (1.73)

(NOTE 6)

.015 (.38)

MINIMUM

DIP-8B

Notes:

1. Package dimensions conform to JEDEC specification

MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)

package with .300 inch row spacing.

2. Controlling dimensions are inches. Millimeter sizes are

shown in parentheses.

3. Dimensions shown do not include mold flash or other

protrusions. Mold flash or protrusions shall not exceed

.006 (.15) on any side.

4. Pin locations start with Pin 1, and continue counter-clock-

wise to Pin 8 when viewed from the top. The notch and/or

dimple are aids in locating Pin 1. Pin 6 is omitted.

5. Minimum metal to metal spacing at the package body for

the omitted lead location is .137 inch (3.48 mm).

6. Lead width measured at package body.

7. Lead spacing measured with the leads constrained to be

perpendicular to plane T.

.120 (3.05)

.140 (3.56)

.014 (.36)

.022 (.56)

.048 (1.22)

.053 (1.35)

⊕ T E D S .010 (.25) M

.008 (.20)

.015 (.38)

.300 (7.62) BSC

(NOTE 7)

.300 (7.62)

.390 (9.91)

P08B

PI-2551-121504

-E-

.240 (6.10)

.260 (6.60)

Pin 1

-D-

.125 (3.18)

.145 (3.68)

.032 (.81)

.037 (.94)

⊕ D S .004 (.10)

.100 (2.54) (BSC)

.367 (9.32)

.387 (9.83)

.137 (3.48)

MINIMUM

.372 (9.45)

.388 (9.86)

⊕ E S .010 (.25)

SMD-8B

Pin 1

.046 .060

.060 .046

.086

.186

.286

Solder Pad Dimensions

.080

.420

Notes:

1. Controlling dimensions are

inches. Millimeter sizes are

shown in parentheses.

2. Dimensions shown do not

include mold flash or other

protrusions. Mold flash or

protrusions shall not exceed

.006 (.15) on any side.

3. Pin locations start with Pin 1,

and continue counter-clock-

wise to Pin 8 when viewed

from the top. Pin 6 is omitted.

4. Minimum metal to metal

spacing at the package body

for the omitted lead location

is .137 inch (3.48 mm).

5. Lead width measured at

package body.

6. D and E are referenced

datums on the package

body.

.057 (1.45)

.068 (1.73)

(NOTE 5)

.048 (1.22)

.053 (1.35)

.009 (.23)

.004 (.10)

.012 (.30)

.004 (.10)

.036 (0.91)

.044 (1.12)

8

°

G08B

PI-2546-121504

Rev. I 11/08

LNK302/304-306

4 B

2

4.90 (0.193) BSC

A

8

4

5

SO-8C

0.10 (0.004) C A-B 2X

D

2 3.90 (0.154) BSC

2X

0.10 (0.004) C D

Pin 1 ID

1.27 (0.050) BSC

1 4

6.00 (0.236) BSC

0.20 (0.008) C

2X

7X 0.31 - 0.51 (0.012 - 0.020)

0.25 (0.010) M C A-B D

SEATING

PLANE

C

1.04 (0.041) REF

0.40 (0.016)

1.27 (0.050)

1.35 (0.053)

1.75 (0.069)

0.10 (0.004)

0.25 (0.010)

1.25 - 1.65

(0.049 - 0.065)

0.10 (0.004) C

7X

SEATING PLANE

C

H

0.17 (0.007)

0.25 (0.010)

D07C

Reference

Solder Pad

Dimensions

2.00 (0.079)

+ +

1.27 (0.050)

DETAIL A

GAUGE

PLANE

0 - 8 o

0.25 (0.010)

BSC

DETAIL A

+

4.90 (0.193)

+

0.60 (0.024)

Notes:

1. JEDEC reference: MS-012.

2. Package outline exclusive of mold flash and metal burr.

3. Package outline inclusive of plating thickness.

4. Datums A and B to be determined at datum plane H.

5. Controlling dimensions are in millimeters. Inch dimensions

are shown in parenthesis. Angles in degrees.

PI-4526-040207

Rev. I 11/08

Notes

LNK302/304-306

Rev. I 11/08

Rev. I 11/08

LNK302/304-306

Notes

LNK302/304-306

Revision Notes

C

D

1) Released fi nal data sheet.

1) Corrected Minimum On Time.

E 1) Added LNK302.

F

G

1) Added lead-free ordering information.

1) Minor error corrections.

2) Renamed Feedback Pin Voltage parameter to Feedback Pin Voltage at Turnoff Threshold and

H

I

1) Added SO-8C package.

1) Updated Part Ordering Information section with Halogen Free

Date

3/03

1/04

8/04

12/04

3/05

12/06

11/08

Rev. I 11/08

LNK302/304-306

For the latest updates, visit our website: www.powerint.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power

Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES

NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED

WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.

Patent Information

The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.

Life Support Policy

POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR

SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:

1.

2.

A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signifi cant injury or death to the user.

A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies.

©2006, Power Integrations, Inc.

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Rev. I 11/08