HP Application Note 200
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Fundamentals of the
Electronic Counters
Application Note 200
Electronic Counter Series
Input Conditioning
Input Signal
Main Gate
Time Base
Time Base
Table of Contents
Fundamentals of the Conventional Counters ........................................................................................... 3
The Reciprocal Counters ........................................................................................................................... 20
Time Interval Measurement ...................................................................................................................... 24
Automatic Microwave Frequency Counters ........................................................................................... 35
Purpose of This Application Note
When Hewlett-Packard introduced its first digital electronic counter, the HP 524A in 1952, a
milestone was considered to have been laid in the field of electronic instrumentation. Frequency
measurement of up to 10 MHz or a 100-ns resolution of time between two electrical events became
possible. Since then, electronic counters have become increasingly powerful and versatile in the
measurements they perform and have found widespread applications in the laboratories, production lines and service centers of the telecommunications, electronics, electronic components,
aerospace, military, computer, education and other industries. The advent of the integrated circuit,
the high speed MOS and LSI devices, and lately the microprocessor, has brought about a proliferation of products to the counter market.
This application note is aimed at introducing to the reader the basic concepts, techniques and the
underlying principles that constitute the common denominator of this myriad of counter products.
The application note begins with a discussion on the fundamentals of the conventional counter,
the types of measurements it can perform and the important considerations that can have significant impact on measurement accuracy and performance. Following the section on the fundamentals of conventional counters comes a section which focuses on counters that use the reciprocal
technique. Then come sections which discuss time interval counters and microwave counters.
Fundamentals of the Conventional Counters
The conventional counter is a digital electronic device which measures the frequency of an input
signal. It may also have been designed to perform related basic measurements including the period
of the input signal, ratio of the frequency of two input signals, time interval between two events
and totalizing a specific group of events.
Functions of the Conventional Counter
Frequency Measurement
The frequency, f, of repetitive signals may be defined by the number of cycles of that signal per
unit of time. It may be represented by the equation:
f= n/t
where n is the number of cycles of the repetitive signal that occurs in time interval, t.
If t = 1 second, then the frequency is expressed as n cycles per second or n Hertz.
As suggested by equation (1), the frequency, f, of a repetitive signal is measured by the conventional counter by counting the number of cycles, n, and dividing it by the time interval, t. The basic
block diagram of the counter in its frequency mode of measurement is shown in Figure 1.
Input Conditioning
Input Signal
Main Gate
Time Base
Time Base
Figure 1. Basic block diagram of the conventional counter in its frequency mode of measurement.
The input signal is initially conditioned to a form that is compatible with the internal circuitry of
the counter. The conditioned signal appearing at the door of the main gate is a pulse train where
each pulse corresponds to one cycle or event of the input signal. With the main gate open, pulses
are allowed to pass through and get totalized by the counting register. The time between the
opening to the closing of the main gate or gate time is controlled by the Time Base. From equation
(1), it is apparent that the accuracy of the frequency measurement is dependent on the accuracy in
which t is determined. Consequently, most counters employ crystal oscillators with frequencies
such as 1, 5 or 10 MHz as the basic time base element.
The Time Base Divider takes the time base oscillator signal as its input and provides as an output a
pulse train whose frequency is variable in decade steps made selectable by the Gate Time switch.
The time, t, of equation (1) or gate time is determined by the period of the selected pulse train
emanating from the time base dividers. The number of pulses totaled by the counting register for
the selected gate time yields the frequency of the input signal. The frequency counted is displayed
on a visual numerical readout. For example, if the number of pulses totaled by the counting
register is 50,000, and the selected gate time is one second, the frequency of the input signal is
50,000 Hertz.
Period Measurement
The period, P, of an input signal is the inverse of its frequency.
P =1/ f
∴P = t /n
The period of a signal is therefore the time taken for the signal to complete one cycle of oscillation. If the time is measured over several input cycles, then the average period of the repetitive
signal is determined. This is often referred to as multiple period averaging.
The basic block diagram for the conventional counter in its period measurement mode is shown in
Figure 2. In this mode of measurement, the duration over which the main gate is open is controlled
by the frequency of the input signal rather than that of the time base. The Counting Register now
counts the output pulses from the time-base dividers for one cycle or the period of the input signal.
The conditioned input signal may also be divided so that the gate is open for decade steps of the
input signal period rather than for a single period. This is the basis of the multiple period averaging technique.
Period measurement allows more accurate measurement of unknown low-frequency signals
because of increased resolution. For example, a frequency measurement of 100 Hz on a counter
with 8-digit display and a 1-second gate time will be displayed as 00000.100 KHz. A single period
measurement of 100 Hz on the same counter with 10 MHz time base would display 0010000.0 µs.
The resolution is improved 1000 fold.
Main Gate
Input Conditioning
Time Base
Time Base
Figure 2. Basic block diagram of the conventional counter in its period measurement mode.
Frequency Ratio of Two Input Signals
The ratio of two frequencies is determined by using the lower-frequency signal for gate control
while the higher-frequency signal is counted by the Counting Register, as shown in Figure 3.
Accuracy of the measurement may be improved by using the multiple averaging technique.
Higher Frequency
Input Signal
Input Conditioning
Counting Register
Main Gate
Lower Frequency
Input Signal
Time Base
Input Conditioning
Figure 3. Ratio Measurement Mode
Time Interval Measurement
The basic block diagram of the conventional counter in its time interval mode of measurement is
shown in Figure 4. The main gate is now controlled by two independent inputs, the START input,
which opens the gate, and the STOP input which closes it. Clock pulses from the dividers are
accumulated for the time duration for which the gate is open. The accumulated count gives the
time interval between the START event and the STOP event. Sometimes the time interval may be
for signal of different voltage levels such as th shown in Figure 5. The input conditioning circuit
must be able to generate the START pulse at the 0.5V amplitude point, and the STOP pulse at the
1.5V amplitude point.
Main Gate
Input Conditioning
Counting Register
Input Conditioning
Time Base
Time Base
Figure 4. Time Interval Measurement Mode
Several techniques are currently available to enhance considerably the resolution of the time
interval measurement. These techniques are discussed along with other details in the section
about time interval measurements beginning on page 24.
Figure 5. Measurement of time interval, th , by trigger level adjustment.
Totalizing Mode of Measurement
In the totalizing mode of measurement, one of the input channels may be used to count the total
number of a specific group of pulses. The basis block diagram, Figure 6, for this mode of operation
is similar to that of the counter in the frequency mode. The main gate is open until all the pulses
are counted. Another method is to use a third input channel for totalizing all the events. The first
two input channels are used to trigger the START/STOP of the totalizing activity by opening/
closing the main gate.
Input Conditioning
Start/Stop Totalizing
Main Gate
Time Base
Time Base
Figure 6. Totalize Measurement Mode
The START/STOP of the totalizing activity can also be controlled manually by a front panel switch.
In the HP 5345A Electronic Counter totalizing of a group of events in two separate signals is done
by connecting the two input signals to Channel A and B. With the Function switch set at START,
the main gate opens to commence the count accumulation. The totalizing operation is terminated
by turning the function switch to STOP position. The readout on the HP 5345A will display either
(A + B) or (A – B) depending on the position of the ACCUM MODE START/STOP switch on the
rear panel.
Other Functions of a Conventional Counter
There are three other functions which are sometimes employed in the conventional counter.
Counters employed in these functions are known as:
• Normalizing Counters
• Preset Counters
• Prescaled Counters
A. Normalizing Counters
The normalizing counter displays the frequency of the input signal being measured multiplied by a
numerical constant.
If f is the frequency of the input signal, the displayed value, y, is given by
y = a· f
where a is a numerical constant.
This technique is commonly used in industrial applications for measurement of RPM or flow rate.
The normalizing factor may be set via thumbwheel switches or by a built-in IC memory circuit.
B. Preset Counters
Preset counters provide an electrical output when the display exceeds the number that is preset in
the counter via a means such as thumbwheel switches. The electrical output is normally used for
controlling other equipment in industrial applications. Examples include batch counting and limit
sensing for engine RPM measurements.
C. Prescaled Counters
Besides the input amplifier trigger, two other elements in the counter limit the reliability of frequency measurement at the upper end. These are the speed of the main gate switches and the
counting registers. One technique that is employed which increases the range of the frequency
response without exacting high speed capabilities of the main gate and counting register is simply
to add a prescaler (divider). The prescaler divides the input signal frequency by a factor, N, before
applying the signal to the main gate. This technique is called prescaling. See Figure 7. However, the
main gate has to remain open N times longer in order to accumulate the same number of counts in
the counting register. Therefore, prescaling involves a tradeoff. The frequency response is increased by a factor of N, but so is the measurement time to achieve the same resolution. A slower
and less expensive main gate and counting register can be used, but at the expense of an additional divider.
÷ N Prescaler
Main Gate
Time Base
Time Base
Figure 7. Block Diagram of Prescaling Counters
Prescaled 500-MHz counters are typically less expensive than their direct-count counterparts. For
measurement of average frequency, prescaled counters may be satisfactory. However, their limitations include:
• poorer resolution by factor of N for same measurement time
• short measurement times (e.g. 1 µs) are typically not available
• cannot totalize at rates of the upper frequency limits indicated
Important Basic Considerations That Affect Performance of
the Conventional Counter
Input Considerations
The major elements of the input circuitry are shown in Figure 8 and consist of attenuator, amplifier
and Schmitt trigger. The Schmitt trigger is necessary to convert the analog output of the input
amplifier into a digital form compatible with the counter’s counting register.
Schmitt Trigger
Figure 8. Major elements of a counter’s input circuitry
A. Sensitivity
The sensitivity of a counter is defined as the minimum specified input signal that can be counted.
Sensitivity is usually specified in terms of the RMS value of a sinusoidal input. For pulse type
inputs, therefore, the minimum pulse amplitude sensitivity is 2 2 of the specified value of the
trigger level.
The amplifier gain and the voltage difference between the Schmitt trigger hysteresis levels determine the counter’s sensitivity. At first glance it might be thought that the more sensitive the counter input, the better. This is not so. Since the conventional counter has a broadband input and with
a highly sensitive front end, noise can cause false triggering. Optimum sensitivity is largely dependent on input impedance, since the higher the impedance the more susceptible to noise and false
counts the counter becomes.
Inasmuch as the input to a counter looks like the input to a Schmitt trigger, it is useful to think of
the separation between the hysteresis levels as the peak-peak sensitivity of the counter. To effect
one count in the counter’s counting register, the input must cross both the upper and lower hysteresis levels. This is summarized by Figure 9.
Input Signals
to Counter
Output From
Schmitt Trigger
Figure 9. Input Characteristics. To effect a count the signal must cross through both the upper and lower
hysteresis levels. Thus in (b), the “ringing” on the input signal shown does not cause a count.
B. ac-dc Coupling
As Figure 10 shows, ac coupling of the input is almost always provided to enable signals with a dc
content to be counted.
dc Coupling
ac Coupling
Figure 10. ac-dc Coupling. An input signal with the dc content shown in (a) would not be counted unless ac
coupling, as shown in (b), was used to remove the signal’s dc content.
C. Trigger Level
In the case of pulse inputs, ac coupling is of little value if the duty cycle is low. Moreover, ac
coupling should not be used on variable duty cycle signals since the trigger point varies with duty
cycle and the operator has little idea where his signal levels are in relation to ground at the amplifier input. The function of the trigger level control is to shift the hysteresis levels above or below
ground to enable positive or negative pulse trains respectively, to be counted. This is summarized
in Figure 11.
Figure 11. Trigger Level Control. The signal (a) will not be counted. Using the trigger level control to shift the
hysteresis levels above ground (b), enables a count. For negative pulse trains (c), the hysteresis levels can be
moved below ground.
Many counters provide a three position level control with the “preset” position corresponding to
Figure 11 (a), a position normally labeled “+” corresponding to Figure 11 (b) and “–” for the Figure
11 (c) case. The more sophisticated counters provide a continuously adjustable trigger level
control, adjustable over the whole dynamic range of the input. This more flexible arrangement
ensures that any signal within the dynamic range of the input and of an amplitude consistent with
the counter’s sensitivity can be counted.
D. Slope Control
The slope control determines if the Schmitt circuit is triggered by a signal with a positive (+) slope
(going from one voltage level to another of a more positive level regardless of polarity) to generate
an output pulse at the upper hysteresis limit (V u ) or by a signal with a negative (–) slope which
causes an output pulse to be generated at the lower hysteresis limit (V L ).
E. Dynamic Range
The dynamic range of the input is defined as the input amplifier’s linear range of operation. Clearly,
it is not important for the input amplifier of a frequency counter to be absolutely linear as it is in
an oscilloscope for example (this is not the case for time interval, see “Time Interval Measurement” on page 24). With a well designed amplifier, exceeding the dynamic range will not cause
false counts. However, input impedance could drop and saturation effects may cause the amplifier
speed of response to decrease. Of course, all amplifiers have a damage level and protection is
usually provided. Conventional protection often fails, however, where high speed transients (e.g.,
at turn-on of a transmitter) and low impedance 50Ω inputs are involved. To this end, several of the
Hewlett-Packard counters (HP 5328A and HP 5305B) employ high speed fuses, in addition to the
conventional protection, to further protect the wideband 50Ω input amplifiers.
F. Attenuators
It is, nevertheless, not good practice to exceed the dynamic range of the input. To avoid this on
larger level signals, attenuators are provided. The more sophisticated inputs with wide dynamic
range usually employ step attenuators with attenuation positions such as X1, X10, and X100.(These
positions represent nominal attenuation. The attenuation values used depend on the dynamic
range of the input.) Another variation is a variable attenuation scheme. This is mandatory for low
dynamic range inputs, but it also provides the additional advantage of variably attenuating noise
signals to minimize the noise while maintaining maximum signal amplitude.
G. Input Impedance
For frequencies up to around 10 MHz, a 1 MΩ input impedance is usually preferred. With this
impedance level, the majority of sources connected to the input are not loaded, and the inherent
shunt capacity of about 35 pF has little effect. As noted earlier, for noise considerations, sensitivities of 25 mV to 50 mV are preferred. Beyond about 10 MHz, however, the inherent shunt capacity
of high impedance inputs rapidly reduces input impedance. For this reason, 50Ω impedance levels,
which can be provided with low shunt capacity, are preferred. Sensitivities of 10 mV are technologically feasible but because of noise and related problems 20 mV to 25 mV are considered
optimum with 50Ω inputs. A sensitivity of 1 mV, for example, is possible, of course, however the
user must pay a premium for this and noise problems can occur.
H. Automatic Gain Control
Automatic Gain Control (AGC) may be thought of as an automatically adjustable sensitivity
control. The gain of the amplifier-attenuator section of the input (see Figure 8) is automatically set
by the magnitude of the input signal.
A tradeoff exists between the speed of response of the automatic gain control and the minimum
frequency signal that can be counted. For this reason the lower frequency limit for AGC inputs is
usually around 50 Hz. AGC inputs, therefore, are useful primarily for frequency measurements
AGC provides a certain amount of operator ease since the sensitivity control is eliminated. A
second advantage of AGC is its ability to handle input signals of time varying amplitude. Figure 12
shows an example of this. The output of a magnetic transducer is shown as the frequency as the
rotating member reduces from 3300 Hz to 500 Hz. The signal level decreases from 800 mV to
200 mV and the noise decreases from 300 mV to 50 mV. If the sensitivity were set to count the
lower level signal, any attempt to count the higher level signal at 3300 Hz would result in false
counts due to the 300 mV noise level. AGC eliminates this problem since the noise shown on the
high level signal is attenuated, along with the signal, to a level where it does not cause false triggering. This assumes, of course, that the trigger level is appropriately set in the first place.
AGC has limitations in measurement of high frequency signals with AM modulation. Since the AGC
circuit makes adjustments for the measurement near the peak levels and ignores the valleys of the
input signal, erroneous counting can result due to the presence of AM modulation in high frequency signals.
800 mV
200 mV
300 mV
50 mV
Figure 12. Output of a magnetic transducer at 3300 Hz (a) and 500 Hz (b). Without AGC it would be
impossible to measure this changing frequency since a sensitivity setting to measure the lower frequency signal
would result in erroneous counts due to noise at the higher frequencies.
Figure 13 summarizes the various conditioning of the input signal prior to its application to the
main gate of the counter.
Figure 13. Input Signal Conditioning
Time Base Oscillator Considerations
The source of the precise time, t, as defined in equation (1) is the time base oscillator. Any error
inherent in the value of t will be reflected in the accuracy of the counter measurement. In this
section, the different types of time base oscillators used in a counter are reviewed along with the
basic factors that can affect the accuracy of the oscillator. Most counters employ a quartz crystal
as the oscillating element.
A. Types of Time Base Oscillators
The three basic types of crystal oscillators are:
• Room temperature Crystal Oscillator (RTXO)
• Temperature Compensated Crystal Oscillator (TCXO)
• Oven Controlled Crystal Oscillator
The Room Temperature crystal oscillators are those which have been manufactured for minimum
frequency change over a range of temperature — typically between 0°C to 50°C. This is accomplished basically through the proper choice of the crystal cut during the manufacturing process. A
high quality RTXO would vary by about 2.5 parts per million over the temperature range of 0°C to
The electrical equivalent circuit of the quartz crystal is shown in Figure 14. The values of R1, C 1 ,
L1 , and C0 are determined by the physical properties of the crystal. An external variable
capacitance is typically added to obtain a tuned circuit. The L, C and R are the elements that
make the frequency of the crystal oscillator temperature sensitive. Hence, one obvious method of
compensating for frequency changes due to temperature variation is to control some externally
added capacitance or components with opposite temperature coefficient to obtain a more stable
frequency of the tuned circuit. Oscillators with this method of compensation are often called
Temperature Compensated crystal oscillators (TCXO). These oscillators offer an order of magnitude improvement in frequency stability over that of the Room Temperature uncompensated type.
Typical frequency changes are 5 × 10-7 over 0°C to 50°C temperature range, or five times better
than that of the RTXO.
Figure 14. Equivalent Circuit of the Crystal
The third type of oscillator used in counters is the Oven Controlled crystal oscillator. In this
technique, the crystal oscillator is housed in an oven which minimizes the temperature changes
surrounding the crystal. Two types of ovens are typically employed — the simple ON/OFF switching oven and the proportional oven. The simple switching oven turns the power OFF when the
maximum temperature is reached and ON when the minimum temperature is reached. The more
sophisticated proportional oven controls and provides a heating that is proportional to the differential between the actual temperature and the desired temperature surrounding the crystal
oscillator inside the oven. Typical variation in frequency for a high quality proportional oven
controlled crystal oscillator is less than 7 parts in 10 9 over the 0°C to 50°C temperature range.
It usually takes 24 hours or more after turn-on for the oven oscillator to achieve its specified
stability. However, it can come to 5 parts in 10 9 of the final specified frequency value after a 20minute warm-up. Most counters employing an oven oscillator have a feature whereby the oscillator is powered whenever the power line is connected even if the counter is not turned on. Keeping
the counter connected to the power line avoids the need for the warm-up phase and retrace.
B. Factors Affecting Accuracy of Crystal Oscillators
Apart from the temperature effects, there are other significant factors which can affect the accuracy of the oscillator frequency. These other factors are Line Voltage Variation, Aging or Long Term
Stability, Short Term Stability, Magnetic Fields, Gravitational Fields and Environmental factors
such as vibration, humidity and shock. The first three factors are the significant ones and are
discussed below.
1. Effect of Line Voltage Variations
Variations in the line voltage causes variations in the oscillator frequency. The amount of variation
in the voltage applied to the oscillator and its associated circuit, of course, would depend on the
effectiveness of any voltage regulator incorporated in the instrument. Changes in the level of the
regulated voltage applied to the oscillator and its associated circuit or the oven controller would
cause changes on bias levels, phase of feedback signal resulting in variation in the output oscillator frequency. A high stability, Oven Controlled oscillator would provide frequency stability on the
order of 1 part per 10 10 for 10 percent change in the line voltage applied to the oven. For RTXO,
the frequency stability is typically on the order of 1 part per 10 7 for the same 10 percent change in
line voltage. Regulation better than this is unnecessary as frequency variations due to temperature
effects would mask the effects of line voltage changes.
2. Aging Rate or Long Term Stability
The physical properties of the quartz crystal exhibit a gradual change with time resulting in a
gradual cumulative frequency drift called Aging. See Figure 15. The aging rate is dependent on the
inherent quality of the crystals used. Aging goes on all the time. Aging is often specified in terms of
frequency changes per month since temperature and other effects would mask the small amount
Long Term Stability or Aging
Short Term Stability
Parts per 109 Change
Days from Calibration
Figure 15. Effect of Aging on Frequency Stability
of aging for a shorter time period. Aging for air crystals is given in frequency changes per month as
it is not practical to accurately and correctly measure over any shorter averaging period. For a
good RTXO, the aging rate is typically on the order of 3 parts per 10 7 per month. For a high quality
Oven controlled oscillator, the aging rate is typically 1.5 parts per 10 8 per month.
3. Short Term Stability
Often referred to as the Time Domain Stability, or fractional frequency deviation, short term
stability is the result of the inevitable noise (random frequency and phase fluctuations) generated
in the oscillator.
Since this noise is spectrally related, any specification of short term stability must include the
averaging or measurement time involved. The effect of this noise usually varies inversely with
measurement time. With quoted averaging time, the specification of short term stability essentially
specifies the uncertainty due to noise in the oscillator frequency over the quoted time period. The
accepted measure in the time domain is called Allan Variance. In practice, the square root of a
particular Allan Variance is given as σ ∆f ( t ) . It is akin to the RMS of the frequency variations
given for different averaging times.
( )
Figure 16 summarizes the oscillator characteristics described, utilizing typical specifications of
well designed oscillators.
Room Temperature
Crystal Oscillators
Crystal Oscillators
Simple Switching
Oven Oscillators
(0°C - 50°C)
<2.5 × 10–6
<5 × 10–7
<1 × 10–7
<7 × 10–9
Line Voltage
(10% change)
<1 × 10–7
<5 × 10–8
<1 × 10–9
<1 × 10–10
<3 × 10–7 /mo
<1 × 10–7 /mo
<1 × 10–7 /mo
Short Term
(1 sec avg.)
<2 × 10–9 rms
<1 × 10–9 rms
<5 × 10–10 rms
Oven Oscillators
<1.5 × 10–8 /mo
× 10–10 /day
<1 × 10–11 rms
Figure 16. Typical specifications of the four types of oscillators
The total time base oscillator error is the cumulative effect of all the individual sources of error
described above. The time base error is only one of the several sources of measurement error for
the counter. Hence, it may or may not be significant for a given counter measurement depending
on the particular application involved. Sources of counter measurement errors are described on
following pages.
Main Gate Requirements
As with any physical gate, the main gate of the counter does exhibit propagation delays and takes
some finite time to both switch ON and OFF. This finite amount of switching time is reflected in
the total amount of time the gate is open for counting. If this switching time is significant compared to the period of the highest frequency counted, errors in the count will result. However, if
this switching time is significantly less compared to the period of the highest frequency counted,
the error is not appreciable. For a 500-MHz signal with 2 ns period, this error will be insignificant if
the switching time of the main gate is substantially less than 1 ns. For true 500 MHz operation,
high-speed devices are necessary in the gate, input and counting register circuitry. The HP 5345A
Electronic Counter achieves this objective through the use of specially designed emitter-emitter
coupled logic circuits.
Sources of Measurement Error
The major sources of measurement error for an electronic counter are generally classified into the
following four categories:
the ±1 count error
the Time Base error
the Trigger error
the Systematic error
A. Types of Measurement Error
1. The ±1 Count Error
When an electronic counter makes a measurement, a ±1 count ambiguity can exist in the least
significant digit. This is often referred to as quantization error. This ambiguity can occur because
of the non-coherence between the internal clock frequency and the input signal as illustrated in
Figure 17. The error caused by this ambiguity is, in absolute terms, ±1 out of the total accumulated
Signal Input to Main Gate
Gate Opening Case No. 1
Gate Opening Case No. 2
Figure 17. ±1 Count Ambiguity. The main gate is open for the same time tm in both cases. Incoherence between
the clock and the input signal can cause two valid counts which for this example are 1 for Case No. 1
and 2 for Case No. 2.
2. The Time Base Error
Any error resulting from the difference between the actual time base oscillator frequency and its
nominal frequency is directly translated into a measurement error. This difference is the cumulative effect of all the individual time base oscillator errors described previously and may be expressed as dimensionless factor such as so many parts per million.
3. Trigger Error
Trigger error is a random error caused by noise on the input signal and noise from the input
channels of the counter. In period and time interval measurements, the input signal(s) control the
opening and closing of the counter’s gate. The effect of the noise is to cause one limit of the
hysteresis window to be crossed too soon or too late — causing the main gate to be open for an
incorrect period of time. This results in a random timing error for period and time interval
4. Systematic Error
For time interval measurements, any slight mismatch between the start channel and the stop
channel amplifier risetimes and propagation delays results in internal systematic errors. Mismatched probes or cable lengths introduce external systematic errors.
For time interval measurements, trigger level timing error is another systematic error which is
caused by uncertainty in the actual trigger point. This uncertainty is not due to noise, however, but
is due to offsets in trigger level readings caused by hysteresis and drifts. Trigger level timing error
may be expressed as
∆T =
trigger level error
signal slew rate at trigger point
Not all these four categories of measurement error are significant for all modes of counter measurement. As summarized in Figure 18, only the ±1 count and time base errors are considered as
important for frequency measurements using conventional counters.
In period measurement, all of the first three types of error can affect the accuracy of the measurement, while all the four types of error can be significant for time interval measurements.
±1 Count
± Time Base
Source of Errors
± Trigger
± Systematic
Time Interval
A Random error
A Random error
Figure 18. Summary of Measurement Errors
B. Frequency Measurement Error
The accuracy of an electronic counter is dependent on the mode of operation.
The total frequency measurement error may be defined as the sum of its ±1 count error and its
total time base error. The relative frequency measurement error due to ±1 count ambiguity is
∆f ±1
where fin is the input signal frequency.
f in
Hence, the higher the signal frequency, the smaller the relative frequency measurement error due
to ±1 count. The relative frequency measurement error due to the time base error is a
dimensionless factor usually expressed in parts per million. If the total error of the time base
amounted to say one part per million (1 × 10–6 ), the error contributed by the time base in the
measurement of a 10-MHz signal is
(1 × 10–6 ) × 107 Hz or 10 Hz.
Or, the relative frequency measurement error due to the time base error is ±1 × 10–6 . And that due
to the ±1 count error is ±1/107 or ±1 × 10–7 for a one second gate.
In this particular example, therefore, the ±1 count error becomes dominant for input frequency
less than 1 MHz but is masked by the time base error for input frequency higher than 1 MHz.
C. Period Measurement Error
The period measurement error may be defined as the sum effect of its ±1 count error, time base
error and trigger error.
For period measurement, the signal counted is the internal time clock of period tc . Hence, the
relative period measurement error due to ±1 count ambiguity is
=± c
where Tin is the period of the input signal.
The relative period measurement error due to time base error is again the dimensionless factor
expressed in parts per million. The general expression for computing the trigger error in period
measurement is:
rms trigger error =
1.4 x 2 + e n 2
sec rms
x = noise contributed by the counter’s input channels (less than several hundred
microvolts in some counters to as high as several millivolts in others)
en = rms noise contributed by signal source measured over the counter’s bandwidth
V/T = slew rate at trigger point of input signal
The ±1 count and the trigger error (but not the time base error) can be reduced by the multiple
period averaging technique. The main gate is opened over several cycles of the input signal and the
average period of the repetitive signal is determined.
The multiple period averaging measurement error becomes
1 count error trigger error
± time base error
where n is the number of cycles that have been averaged.
It should be noted that the ±1 count in period (or period averaging) measurement refers to the
counted clock while that for frequency measurement, the ±1 count, is that of the input signal. The
±1 count and trigger error are considered to occur randomly with a normal distribution and,
hence, are reduced inversely as the number of cycles averaged is increased. The time base error
factor (which is solely due to the total error of the time base) is not reduced by the period averaging technique. It should be noted, however, that the absolute magnitude of the time base error is
dependent on the magnitude of the period being measured, e.g. for the measurement of a 100 msec
period using a counter with time base error of 1 × 10–6 it would be
1 × 10 −6  100 ms or 100ns
If 100 cycles are measured and the period average taken, the measurement error due to the time
base error would be
1 × 10 −6  100 × 1000 ms =100 ns
Averaging, therefore, does not reduce the time base error. But for the measurement of a 1-second
period using the same counter, the time base error would be 1 µs.
D. Time Interval Measurement Error
The accuracy statement of the time interval measurement error may be written as:
T.I. Measurement error = ±1 count ± trigger error ± time base error ± systematic error.
The ±1 count error in time interval measurement refers to one count of the clock frequency.
Hence, the higher the clock frequency, the smaller the ±1 count error.
The general expression for computing the trigger error for time interval measurement is given by
rms trigger error =
( x 2 + e2 nA ) + ( x 2 + e2 nB )
( ∆V / ∆T )2 A ( ∆V / ∆T )2B
x = counter noise
enA/B = rms noise from source driving the A (START) / B (STOP) channel
∆V / ∆T A/B = slew rate at trigger point of signal at A/B.
It is apparent from this expression that the trigger error can be reduced by input pulses with fast
risetime or fast slew rate.
The comments for period measurement error due to time base error apply to time interval measurement. The other source of error for time interval measurement is known as systematic error.
This is a fixed error and is repeated in every measurement. Systematic error is usually small but is
important in absolute measurements of pulse width or time delays of short duration. Since the
error is fixed, it can reduce the accuracy of the measurement but has no effect on the resolution.
The accuracy of the time interval measurement error can be improved in several ways. We shall
mention this briefly here. Details are given in a separate section on Time Interval Measurement.
The first two sources of measurement error, i.e. ±1 count and ± trigger error are of a random
nature and can be reduced by taking the statistical average of a large number of measurements.
For a time interval averaging with N intervals averaged, these two sources of random error are
reduced by a factor of 1n . The reason for the square root is due to the fact that the random error
can occur in all the start/stop gate operations required for each of the time interval measurements
Again, the trigger error would be smaller for fast pulses with short risetime and large slew rate.
The time base source of measurement error is not changed by time interval averaging. Nor is the
systematic error. The magnitude of the time base error is, of course, reduced by the use of a better
quality time base oscillator. The systematic error can be made insignificant through proper calibration of the measurement set-up and elimination of the mismatch between the start and stop
The Reciprocal Counters
Characteristics of a Reciprocal Counter
The reciprocal counter is a new class of counter which always makes a period measurement on
the input signal. If frequency information is desired, it can be directly displayed by taking the
reciprocal of the period measurement. The reciprocal technique is gaining much popularity as it
offers two major and distinct features:
• The ±1 count quantization error is independent of the input signal frequency. Hence, for a
noiseless input signal and assuming negligible trigger and time base error, the resolution of
the reciprocal counter would also be independent of the input signal frequency.
• The period counting characteristic of the reciprocal technique provides the capability for
control of the main gate in real time.
We have stated earlier that:
Relative frequency measurement error due to ±1 count = ± f
Relative period measurement error due to ±1 count
= ±
where f in is the frequency of the input signal, t c is the period of the counted clock, T in is the
period of the input signal or the gate time of the counter if the gate remains open longer than
one cycle of the input signal.
For a given gate time, the amount of quantization error for frequency measurement is inversely
proportional to f in, the input frequency. In period measurement, for the same gate time, the
quantization error is constant and is determined by t c . The difference in quantization error of the
two methods of measurement is shown in Figure 19.
±1 Count Quantization Error
Period Measurement
For Same Gate
Time of 1 Second
Clock Frequency = 10MHz
Input Frequency
Figure 19. The ±1 count quantization error is less using the reciprocal technique vs. the conventional
frequency measurement method for all input frequencies less than the clock frequency.
As shown in Figure 19, the ±1 count quantization error in the period measurement is always
smaller than that for a corresponding frequency measurement for all input frequencies less than
that of the counted clock for a given measurement time. Assuming negligible trigger and time base
errors, the period measurement always has a higher resolution than a corresponding frequency
measurement for all input frequencies less than that of the counted clock. The corollary to this is
that the reciprocal technique can achieve the same resolving capability of the conventional frequency measurement approach with a significantly less measurement time.
For input frequency higher than that of the counted clock, the above-mentioned improvement in
resolution is no longer true. In fact, the ±1 count quantization error for the period measurement is
larger than that for a corresponding frequency measurement for input frequencies higher than that
of the counted clock. However, in a “smart” reciprocal counter, the measurement mode is automatically switched over to the frequency mode for input frequency higher than the clock frequency. In this way, the counter achieves improved resolution for all admissible input frequencies.
Hence, the frequency ranges of most reciprocal counters are designed to go up to but not exceed
the clock frequency. An example of the difference in quantization error between the period and
frequency measurement is given below:
For a 10-Hz signal with a 1-second gate and using a 10-MHz clock, the frequency measurement
∆f = ±1 = ±1 or ± 1 × 10 −1
f in 10
the period measurement error
∆T = ± t c = ±1 × 10 −7 = ±1 × 10 −7
where Tin = 1 second of gate time.
The second characteristic of the reciprocal counter is called arming or the capability of main gate
control in real time. This is not a unique feature, though, as it is implemented in some conventional
counters. The arming capability is due to the fact that in period measurement, the input signal
controls the opening/closing of the main gate. In frequency counting, the gate is controlled by the
signal from the time base oscillator and the operator has little, if any, control on when the gate
opens; all he knows is that at some undetermined point in time, the gate will open and accumulate
counts from the input signal. The gate then closes at a precise interval of time later and the counter displays the average frequency of the input signal over the time the gate was open.
Basic Operation of a Reciprocal Counter
The basic block diagram of a reciprocal counter is essentially similar to the conventional counter
except for the fact that the counting is done in separate registers for time and event counts. The
contents of these registers are processed and their quotients computed to obtain either the desired
period or frequency information which are displayed directly. The simplified block diagram of a
high-precision reciprocal counter designed by Hewlett-Packard — the HP 5345A — is shown in
Figure 20. The Event Counter accumulates counts from the input signal while at the same time, the
Time Counter accumulates counts from the internal clock for as long as the main gate is open. In a
single period measurement, the main gate opens for precisely one period under the control of the
input signal. During this time interval, the Event Counter would have accumulated one count while
the Time Counter would have accumulated a number of clock pulses. The number of accumulated
clock pulses is multiplied by the clock period to give the period of the input signal.
Input Signal
Time Counter
Input Channel A
Main Gate
Input Signal
Event Counter
Input Channel B
10MHz Crystal
Figure 20. Basic Block Diagram of HP 5345A Reciprocal Counter
This computation is done automatically by the arithmetic circuits and the results are displayed
directly. In period averaging, the main gate is open for more than one cycle of the input signals.
The Event and Time Counters accumulate and count pulses from the input signal and the internal
clock, respectively, during this time while the gate is open. The quotient of the product of clock
period and clock count to the event count is the average period of the input signal. In frequency
averaging, the reciprocal of the quotient is automatically computed and the result is displayed as
the average frequency.
External Arming Using a Reciprocal Counter
A reciprocal counter can be externally armed as shown schematically in Figure 21. While arming is
not needed for most applications, it can greatly simplify some difficult measurement problems.
Use of external arming to measure pulsed RF is shown in Figure 22. Of course, arming with such
From Input
Arming Pulse
Counting Register
Clock Input
Figure 21. Externally arming a period measuring counter. The measurement starts with the first input cycle
that occurs after arming.
Arming Trigger
Start Stop
Initiates Direct Measurement
of Input Pulsed RF Signal
Width Determined By
Measurement Time Controls
Figure 22. Measuring the frequency of a pulsed RF signal with a period measuring frequency counter via
external arming.
counters can be done automatically and many reciprocal counters offer only the automatic mode.
With automatic arming, the measurement in Figure 22 would start with the first input cycle of the
pulsed RF signal.
The inherent high resolving power of period counting, pIus the ability to initiate a measurement at
any point in real time via external arming, gives rise to the concept of frequency profiling. This
allows meaningful measurements on frequency agile, pulse compression and Doppler radar
systems. An example is shown in Figure 23.
Sequentially Applied
1 Per RF Burst
To Counter
Profile of
Pulse Compression
Figure 23. Characterizing a pulse compression system via external triggering of a period measuring
frequency counter.
In summary, period measurement has the advantage that it utilizes the full resolving capability of
the counter over its entire frequency range. In addition, the real time measurement capability of
period counting allows measurements on pulsed RF systems and the characterization of such
systems via the concept of frequency profiling. Other applications for period measuring frequency
counters include low frequency measurements (e.g., power line frequency) and the metrology lab
where high accuracy can be obtained in conveniently short measurement times. The disadvantage
of this type of counter is the additional cost — thus, if all one needs is the digital measurement of
average frequency, the conventional frequency counter is adequate.
However, with the advent of the microprocessor and Large Scale Integration (LSI) and their
continuing price reduction, it is anticipated that the arithmetic circuits, the time/event scalers, the
switching/main gate and related circuitry will be replaced by the microprocessor and LSI chips. As
this trend develops, it is anticipated that the reciprocal technique in counter design will gain
eminence leading to higher performance and lower cost reciprocal-type counters. With microprocessors built into these instruments, it is expected that the new reciprocal counters will have
several new features including:
• Greater arithmetical and computational capabilities such as statistics, offsetting or scaling
made on the measurements.
• Great ease in using the instrument with self-check or calibration conveniences.
• Improved interfacing and system capabilities.
• Greater programmability.
• New capabilities such as phase measurement.
Time Interval Measurement
Time interval is the measurement of elapsed time between two events and the measurement can
be accomplished using an electronic counter with the basic block diagram of Figure 4. As shown in
the block diagram, the main gate is controlled by two independent inputs, the START input opening the gate and the STOP input closing it. During that elapsed time, the clock pulses are accumulated. The accumulated count represents the time interval between the START event and the STOP
event. This is diagrammatically presented in Figure 24.
The resolution of the measurement is determined by the frequency of the counted clock (e.g., a
10-MHz clock provides 100 nanosecond resolution). This assumes that the other elements of the
time interval counter (input amplifier, main gate, DCAs) are operating at speeds consistent with
the clock frequency, for otherwise the instrument’s resolution would be meaningless.
Present state-of-the-art limits resolution to about 2 ns, although special techniques, to be described
later, can be utilized offering substantially improved resolution.
Gate Opens
Gate Closes
Accumulated Clock Pulses
Accumulated Count
Figure 24. In a time interval measurement, clock pulses are accumulated for the duration the main gate is
open. The gate is opened by one event, START, and closed by the other, STOP.
Input Considerations
If the signal inputs to the time interval counter were the clean, sharp pulses depicted by Figure 24,
there would be little to consider as far as the input circuitry is concerned. In fact, some special
purpose time interval counters are designed solely for use with this type of input, with trigger level
permanently set or adjustable with a screwdriver.
In the more general case, however, time interval measurement is a two-dimensional problem —
the dimension of time as well as voltage level. The voltage level aspect of the time interval measurement is illustrated by the simple example of Figure 5, where it is necessary to measure time
interval t h of a signal over different voltage levels. The time interval measuring instrument must be
able to generate a START pulse at the 0.5V level and a STOP pulse at the 1.5V level representing
the commencement and termination of the time interval measurement, respectively. Clearly, this is
different from the frequency or period measuring case where the input triggers at the same point
on the waveform from cycle to cycle of the input. Inherent in the time interval measurement,
therefore, is the dual dimensionality, amplitude and time. It is this dimensionality that places much
more stringent requirements on the input amplifier/trigger dual than those necessary for the
measurement of frequency or period.
To take care of the amplitude problem most time interval meters include adjustable trigger level
controls for both input channels. With the trigger level set at a certain voltage, V1 , the channel
produces an output pulse, which is applied to the main gate when the input signal reaches that
voltage level, V1 . To enable triggering at any point on the waveform, the trigger level is usually
made to be adjustable over the entire dynamic range of the input amplifiers. The input amplifiers
themselves must, of course, be linear and, more important, flat to minimize any distortion effect on
the input signal; and to provide full flexibility, a wider dynamic range than a frequency measuring
input is needed. Many applications require triggering on the negative-going slope of the input
signal as well as the positive slope (e.g., pulse width or fall time measurements) and slope controls
are added to facilitate this. Input impedance is generally 1 MΩ, although for measurement on high
speed signals, 50Ω is preferred to minimize capacitive loading and reflections due to impedance
mismatch in 50Ω systems. Finally, and most obviously, two independent inputs are needed, one for
the START channel and one for the STOP with provision made so that the two channels may be
commoned right at the input. These then are the essential differences between the inputs of time
interval and frequency counters — differences that place far more stringent requirements on
inputs designed for the time interval counter.
Trigger Level
Figure 5 emphasizes the importance of accurately setting trigger level, for any error in this setting
directly translates itself into a measurement error. Figure 25 illustrates schematically how the
trigger level is set.
Input Signal
To Main Gate
Reference Voltage
Figure 25. Trigger level is set by varying the reference voltage VR applied to the second input of the input
Assuming an idealized trigger circuit setting, the reference voltage VR = V1 will cause the trigger to
fire when the input signal voltage Vin = V1 . In actual fact the trigger voltage Vt is given by
Vt = VR + δ + h
where VR = reference voltage
δ = inherent finite mismatch between elements of the trigger circuit
h = half of the hysteresis width.
There are a variety of ways in which Vt can be determined. For the moment, we assume the Vt is
determined by measuring VR (this is, in fact, a technique that is used and is one of the better ones).
Equation (3) indicates that simply measuring VR will cause an error in the amount of δ + h.
The quantity, h, can be determined simply by measuring the hysteresis level, the minimum signal at
which triggering can occur.
The magnitude of the quantity δ depends on how well balanced the input amplifier-trigger is. For
slower speed inputs (e.g., 10 MHz bandwidth), it is relatively easy to design a well balanced input.
However, for high speed inputs finite mismatch becomes a factor. A well designed high speed input
will typically have mismatches of no more than 10 percent of the hysteresis level. Whether this is a
factor or not depends on the accuracy required. However, it should be noted that this mismatch
can increase with age and temperature variations.
High Speed Inputs
For high speed inputs, an additional error in the point at which triggering occurs becomes a factor.
It takes a finite charge for a trigger circuit to fire. Charge starts to accumulate when the input
voltage crosses the trigger level set at Vt and when sufficient charge has accumulated, the trigger
fires. In the meantime, however, the input signal is now at Vt 1, which is effectively where triggering occurs. This is summarized by Equation (4).
Vt 1 + Vt = ∆V
where Vt = trigger point voltage
∆V = error due to finite charge needed to cause the trigger to fire and,
Vt 1 = actual voltage level at which triggering occurs.
Measuring Trigger Level
In the past, when resolution of less than 1 µsec was all that was required, trigger level determination was satisfactorily accomplished by the oscilloscope intensification scheme. Signals derived
from the start and stop channels were routed through the time interval meter to the Z axis modulation of an oscilloscope. With the input signal displayed on the oscilloscope, the points at which
triggering occurred were evidenced by intensified dots. With today’s resolutions of 2 ns or better,
the inherent delays of this method cause it to be inadequate for high speed signals.
A second popular technique is to provide calibrated front panel trigger controls. The drift and
balance problems referred to earlier make this technique usable for the slower inputs only.
A third technique, that is somewhat better than either of the above, is to monitor the counter’s
main gate output and the signal being measured simultaneously on an oscilloscope. Changing the
trigger levels varies the position of the leading and trailing edges of the gate output with respect to
the signal being measured, and it is these edges of the gate that indicate where the START and
STOP channel trigger levels are set.
Obviously, this method is only usable on repetitive signals. There are also inherent delays in this
system, both within the instrument and the external cabling carrying all the signals that make it
difficult to use for signal speeds of better than 2 ns.
Since it is independent of signal speeds, the best method to measure trigger level is to actually
measure the DC voltage VR at which the trigger is set, as described above. In counters that use this
technique, the DC voltages are available at the instrument panel and can be measured with a DVM.
In fact several HP counters, e.g., HP 5328A, HP 5370A, go one step further and include an internal
DVM that can be used for DC voltage measurement in addition to measuring the trigger level
Increasing the Accuracy and Resolution of T.I. Measurements
As stated earlier, the accuracy statement may be written as:
T.I. Measurement error = ± 1 Count
± Trigger Error
± Time Base Error
± Systematic Error
The ±1 count error refers to one count of the clock frequency. The higher the clock frequency of
the T.I. counter, the smaller the ±1 count quantization error. From the general expression on
trigger error
rms trigger error =
x 2 + e nA 2
x 2 + e nB 2
( ∆V / ∆T ) 2 ( ∆V / ∆T ) 2
it is clear that this source of error can be significantly eliminated by reducing enA/B , the rms noise
amplitude, or when using input pulses of fast rise time and fast slew rate. The systematic error of a
high performing time interval counter usually is very small (0.7 ns for HP 5345A). This error can
also be eliminated through proper calibration. The HP 5370A actually measures the mismatch and
subtracts out the systematic error in subsequent measurements.
The trigger level timing error can be reduced by using the HP 5363A Time IntervaI Probes or by
caIi-bration of the trigger level. More details are given at the end of this section.
In the foregoing paragraphs, the techniques that could be used to improve the accuracy and
resolution of time interval measurements are reviewed.
Time Interval Averaging
There are several techniques that may be used to increase measurement accuracy and resolution
over the 2 ns limit of direct counting. One such technique is called Time Interval Averaging. Time
Interval Averaging is the technique for reducing measurement errors of a random nature by taking
the statistical average of a large number of measurements. It is useful under these two conditions:
• The ±1 count and trigger errors (random errors) significantly degrade the accuracy or
resolution of a time interval measurement.
• The time interval is repetitive.
As more and more unique samples of the intervals are averaged, the mean value will tend toward
the true value of the unknown time interval. For a Time Interval Averaging with N intervals averaged, the following expression gives the accuracy at a very high level of confidence.
Accuracy of T.I.A. = ± 1n (1 count + trigger error)
± time base error
± systematic error
The ±1 count equals the period of the clock for time interval measurement. Averaging reduces this
random error by a factor of 1n . Trigger error due to input noise and noise in the counter’s amplifier-trigger circuits can cause the counter to randomly start or stop a time interval measurement
slightly early or late. Again, this random error is reduced in a time interval averaging measurement
by a factor of 1n where “N” represent unique samples. Internal trigger error is much less than ±1
count error and can be virtually ignored for most time interval measurements. The time base and
systematic errors are not improved by T.I.A.
Two conditions must be satisfied for improvement in accuracy and resolution to be valid in a T.I.A.
measurement. These are:
• The presence of synchronized gating to avoid biased measurements.
• The repetition rate of the time interval must be asynchronous with the counter clock.
A. Direct Gating
Direct gating can cause an unacceptable bias in time interval measurement by truncating clock
pulses. Figure 26 shows what can happen using direct gating. The clock signal is a pulse train.
When the gate opens, it may truncate some fraction of a clock pulse. When closing, the gate may
again truncate a clock pulse. The counter does not know which of the truncated pulses should be
counted. In Figure 26, if the minimum countable pulse width of the counter is less than 0.2, then
the counter will display R = 3, which produces an error of greater than 1 count. Such errors can
produce a significant bias in the expected counter reading. Direct gating has the following disadvantages for time interval averaging measurements:
• Truncation of clock pulses can produce greater than 1 count error.
• Time interval measurements will be biased.
• The counter will never count intervals shorter than the minimum countable pulse width.
Counted Signal
Gate Control
Counted Signal
Figure 26. Direct Gating
Gate Control
Counted Signal
+ Edge
Arming Flip-Flop
Gate Control
Counted Signal
Figure 27. Synchronized Gating
Edge Representation of Clock
Actual Clock Signal
Figure 28. Edge Representation of Clock Signal
B. Synchronized Gating
Synchronized gating solves the problem of bias in time interval measurements. Figure 27 shows a
representative synchronized gating circuit and resultant gate timing. In practice, several variations
of the circuit may be used (see the HP Journal, April 1970). The gate is “synchronized” to the clock.
The START and STOP signals properly arm the gate for opening or closing; an edge of the clock
pulse actually switches the gate control flip-flop. Thus, only integral clock pulses would pass the
gate. No clock pulses are truncated. Since synchronized gating operates only on an edge, the clock
produces in effect a train of zero width pulses, as shown in Figure 28. Thus, synchronized gating
provides the following advantages for the time interval measurements:
• No truncation of clock pulses.
• Expected measurement as a result of T.I.A. is unbiased, assuming unique samples.
• Allows measurement of time intervals which are shorter than the minimum countable
width of the counter.
C. Asynchronous Repetition Rate
The second condition for improvement in accuracy and resolution to be valid in time interval
averaging is that the repetition rate of the time interval must be asynchronous with the counter
clock. If the repetition rate is synchronous with the clock, the average may not converge to the
true value of the time interval. One method which effectively breaks a synchronous relationship
between the repetition rate and the clock is to introduce phase jitter on the repetition rate or
clock. The HP 5345A and HP 5328A OPT 40-41 have their clocks modulated by white noise to
ensure that the added jitter truly achieves averaging of the time interval measurements.
When the repetition rate is asynchronous with the clock and when synchronized gating is present,
then the following results can be expected:
• The expected counter reading equals the time interval being measured.
• The standard deviation of the counter reading is proportional to
Analog Interpolators
Another technique that is used to improve the accuracy and resolution of a time interval measurement is to measure and reduce the ±1 count ambiguity through the use of interpolators.
To measure the time interval T of Figure 29, three separate measurements are actually made.
• The time interval, T0 , between the first clock pulse after the start pulse and the first clock
pulse after the stop pulse.
• The time interval, T1 , between the start pulse and the first clock pulse.
• The time interval, T2 , between the stop pulse and the next clock pulse.
The unknown time interval, T, is given by
T = T0 + T1 – T2.
Input Signal
10MHz Clock
Interpolated Times
T1' = T1 x 1000
T2' = T2 x 1000
Counted 10MHz Clock
1 2 3 4 5 6
Time Interval T = T0 + T1 – T2
Gated Clock Pulses,
Start to Stop
Start Interpolation Counts= N 1
Stop Interpolation Counts = N 2
1 2 3 4 5 6
N0 proportional to T0
N1 proportional to T1' = T1 x 1000
N2 proportional to T2' = T2 x 1000
T = (1000 N0 + N1 – N2) x 100pS
Figure 29. Time Intervals Measured by Analog Interpolators
The time interval T0 is measured by simply accumulating the N0 clock pulses that occur during
that interval. T1 and T2 are first multiplied, say 1000 times, by analog interpolators and then
measured in the conventional way. This reduces the significance of the ±1 count uncertainty by a
factor of 1000.
The “start” interpolator measures T1 . During the time T1 , a constant current charges a capacitor.
This capacitor is then discharged at a rate 1000 less. The stretched time, T1 ’, is measured by
counting the number of clock pulses N1 occurring over the interval T1 ’. In a similar manner, the
“stop” interpolator stretches the real time, T 2 , 1000 times so that it can be measured by counting
the number of clock pulses N2 occurring over the stretched time interval T 2 ’.
The time interval T may also be represented as:
N 
T =  N 0 + 1 − 2  × 100 ns
1000 1000 
The resolution of the measurement is therefore improved by 1000 times by interpolation. The
system behaves as if the clock frequency were 1000 times faster. The accuracy of the instrument
using analog interpolators is limited by the accuracy of the interpolators with measures T1 and T2
and also on the stability of the time base.
Dual Vernier Method of Interpolation
In the HP 5370A Universal Time Interval Counter, synchronous gating is extended to account for
both the start and stop pulses in the dual Vernier method of interpolation. Figure 30 shows the
timing waveforms of the dual Vernier scheme. Start and stop pulses each start their own individual
triggered phase-locked oscillator (TPO). The period is the same for both, T0 [1 + 1/N] where T0 is
the main clock period.
Coincidence between the start Vernier and the main clock is detected (the point labeled “start
coincidence”). This terminates the number of start Vernier counts at N1 . In exactly the same
manner, the stop coincidence terminates the stop Vernier count at N2 . The two coincidences are
also used to gate the main clock, producing a main clock burst, N0 . The sign of N0 is positive if
start coincidence precedes stop coincidence and negative if vice versa. All gating is synchronous
so the ±1 count ambiguity does not exist. The time interval is then computed by the microprocessor from:
N +1
T = T0 N 0 +
N1 − N 2 
The HP 5370A uses the dual Vernier interpolation technique with triggered phase-locked oscillators combined with a microprocessor to provide a powerful time-interval measuring instrument. ln
this instrument, T0 is 5 ns, representing a 200-MHz clock, with interpolation factor N = 256 giving a
resolution of 20 ps. This figure is a substantial improvement over the 2-ns limit using the conventional method of counting pulses from the internal clock of 500 MHz.
Reference Oscillator
Start Coincidence
Start TPO
Stop TPO
Stop Coincidence
T1 +T3= T + T 2
T= T 1 – T2 +T3
T 1= N 1T0 (1 + 1/N)
T 2= N 2 • T0 (1 + 1/N)
T 3= N 0 • T0 •
1 N
Time Interval Measured, T= T0 [N0 + (1 + 1/N)(N1–N2) ]
Figure 30. Timing Waveforms of the Dual Vernier Interpolation
Use of Time Interval Probes in Time Interval Measurements
Time interval measurement is normally done with oscilloscopes or with electronic counters that
have time interval measuring capability. However, even the best oscilloscopes and counters have
certain limitations in time interval measurements. The HP 5363A Time Interval Probes have been
designed basically to overcome some of these shortcomings. Their contributions are best understood by considering the problems they are designed to solve.
Trigger Point Determination
The biggest problem that counters have in time interval measurements stems from the fact that
their input circuits are optimized for frequency counting, i.e., for detecting zero crossings. While
having high accuracy and resolution for timing measurements, electronic counters are limited to
such “event” type measurements due to their comparatively poor ability to precisely define the
trigger point on more slowly rising signals.
Measurements such as risetimes, propagation delays and slew rate are difficult to make accurately
using electronic counters. The trigger level setting usually has a limited range, (typically ±1 Volt or
less) and its position can only be known accurately by using a digital voltmeter built into the
counter or connected externally. At best, this trigger level setting is the center of the hysteresis
band of the counter input (Figure 31); at worst, it is offset from this center in an unspecified
manner by several tens of millivolts. Therefore, the actual triggering point of the input amplifier
will be offset from the selected or measured level by an unknown amount. Furthermore, this offset
may be different, depending upon which slope the counter is triggering on, and it can also change
with the input frequency and signal level. Because of the limited dynamic range of counters,
dividers must be used to measure larger signals. This only aggravates the ambiguity problem.
Actual T.I.
to be Measured
Actual Trigger Point
Selected Trigger Level, VR
Hysteresis Band
(May Vary with Input
Signal Rise Time)
T.I. Measured
Figure 31. Hysteresis Problem of Typical Counter
Some counters use “hysteresis compensation” to give a more usable indication of the actual trigger
voltage. A dc voltage equal to approximately 1/2 the hysteresis band is added to (positive slope) or
subtracted from (negative slope) the selected trigger level or reference voltage. Such compensation does not eliminate the hysteresis window problem, but it does make counters with a large
window more usable.
The T.I. Probes solve the problem of trigger level indeterminancy by an automatic calibration
scheme instead of the hysteresis compensation. The user grounds the probe to be calibrated and
presses a front panel switch. This causes the reference voltage, VR in Figure 32, to move down in a
stair-step fashion (up for negative slope calibration) in 1 mV steps until the device just triggers.
Knowing the value of VR at this point allows the system to adjust itself so the actual trigger voltage
corresponds to the trigger level selected by the user. Recalibration, when slopes or probes are
changed, assures constant triggering accuracy.
Device Triggers
OV Input Signal
First Threshold Passes OV
Figure 32. Positive Slope Trigger Calibration
Any trigger voltage from –9-99 Volts to +9.99 Volts may be set in 10 mV steps manually by setting
two front panel thumbwheel switches. The probes’ 20V dynamic range and precise trigger-point
determination eliminate the need for attenuators in most cases and allow measurements closer to
the top and bottom of the waveform than was previously possible.
Circuit Loading Errors
Another limitation of the counter input amplifier is that it provides either a 50Ω termination or a
high input resistance with a large shunt capacitance, typically about 40 pF. This limitation makes it
difficult to transport the signal to the counter with impedance transformation or distortion caused
by the shunt input capacitance. A high speed signal would tend to be degraded before it could be
measured. Operating in a 50Ω environment can get around the capacitive loading problem, but this
solution generally introduces the expense of building in custom pulse transformers or other such
techniques at every desired test point.
The HP 5363A active probes solve the problem by providing a much lower input capacitance of 10
pF. Input resistance is 1MΩ. And, for even greater usefulness, the probes eliminate the usual need
for extensive cable length determination between the test point and the counter by bringing the
amplifiers to the test point rather than requiring the signal to be brought to the counter.
System Propagation Delay Errors
Delays through probes, cables and the inherent differential delays between the two input channels
limit the absolute accuracy of the time interval measurement to some unknown but fixed amount.
A second calibration procedure on the HP 5363A equalizes out such system delays and allows the
counter to be set to 0.0 ns. A fixed 10 ns can also be switched in, allowing the counter to measure
down to zero time interval for minimum T.I. range counters such as HP 5345A. See Figure 33. This
fixed 10 ns must, of course, be added back into the final reading when this mode of operation is
Output to
Time Interval Counter
"A" Probe
"B" Probe
Time Zero
Generated Fast Rise
Calibrated Signal.
Routed to Both
Start and Stop Channels.
10 ns
Pull to
Add 10.0 ns
Subtract 10 ns
from Measurement
Figure 33. Block diagram of probes.
Automatic Microwave Frequency Counters
A frequency counter, being a digital instrument, is limited in its frequency range by the speed of its
logic circuitry. Today the state of the art in high-speed logic allows the construction of counters
with a frequency range of around 500 MHz. Continuing advances in IC technology should extend
this range beyond 1 GHz in the not-too-distant future.
The designer of an automatic counter must look to some form of down-conversion in order to
extend frequency measurement beyond 500 MHz. Four techniques are available today to provide
this down-conversion:
Prescaling, with a range of 1.5 GHz;
Heterodyne Converter. Frequency measurements as high as 20 GHz are fairly common.
Transfer Oscillator, used in counters with ranges to 23 GHz;
Harmonic Heterodyne Converter, a new technique which can provide measurements
to 40 GHz.
Down-Conversion Techniques
Prescaling was described briefly in “Fundamentals of the Conventional Counters” on page 3. It
involves a simple division of the input frequency, resulting in a lower frequency signal which can
be counted in digital circuitry. The frequency measured by the counter section is related to the
input simply by the integer N. A display of the correct frequency is accomplished either by multiplying the counter’s contents by N or by increasing the counter’s gate time by a factor of N. Typically, N ranges from 2 to 16. Modern frequency counters using this technique are capable of measuring up to 1.3 GHz. Recent developments in solid-state technology might extend this range into
the low microwave range within a few years.
Heterodyne Converter
Heterodyne down-conversion centers about a mixer which beats the incoming microwave frequency against a high-stability local oscillator signal, resulting in a difference frequency which is
within the conventional counter’s 500-MHz bandwidth.
Figure 34 is the block diagram of an automatic microwave counter using the heterodyne downconversion technique. The down-converter section is enclosed by the dotted line. Outside the
dotted line is the block diagram of a conventional counter, with the addition of a new block called
the processor. The decision-making capability of a processor is necessary here in order to lead the
counter through its measurement algorithm. The high stability local oscillator of Figure 35 is
generated by first multiplying the frequency of the instrument’s time base to a convenient fundamental frequency (designated fin ), typically 100 to 500 MHz. This fin is directed to a harmonic
generator which produces a “comb line” of frequencies spaced at fin extending to the full frequency range of the counter. One line of this comb, designated Kfin , is then selected by the microwave filter and directed to the mixer. Emerging from the mixer is a video frequency equal to
fx – Kfin . This video frequency is amplified and sent to the counter. The display shows the sum of
the video frequency and Kfin , which is provided by the processor. (The processor stores the value
of K, since it is in control of the microwave filter.)
The signal detector block in Figure 34 is necessary for determining the correct K value. In practice,
the processor will begin with K =1 and will “walk” the value of K through the comb line until the
signal detector determines that a video frequency is present. At this point the acquisition routine is
terminated and measurement can begin.
The remaining block in Figure 34 which has not been discussed is the automatic gain control
(AGC) circuit. This circuit provides a degree of noise immunity by desensitizing the video amplifier
such that only the strongest frequency components of the video signal will enter the Schmitt
trigger and be counted.
A key ingredient in automating the heterodyne down-conversion process is the microwave filter.
Two filters used for this purpose are (1) a YIG filter, and (2) an array of thin-film filters which are
selected by PIN diode switches.
Unknown Input (fx)
fx ± Kfin
Switch Filter
Video Amp
fx – Kfin
Main Gate
Time Base
Figure 34. Block diagram of the heterodyne down-conversion technique.
Transfer Oscillator
The transfer oscillator uses the technique of phase locking a low frequency oscillator to the
microwave input signal. The low frequency oscillator can then be measured in a conventional
counter, and all that remains to be accomplished is to determine the harmonic relationship between that frequency and the input.
Figure 35 is the block diagram of an automated transfer oscillator. Once again, the down conversion circuitry is contained within the dotted line.
The input signal at frequency fx is shown being phase-locked to a voltage controlled oscillator
(VCO 1) in the upper portion of the converter section. Once phase lock is achieved, the relationship between the input and the VCO frequency is given by
f x = NF1 − Fif 1
where N is an integer.
The quadrature detector assures that lock occurs at NF1 – Fif 1 and not NF1 + Fif 1.
The lower sampler and portion of the converter section is used for determination of N. By offsetting F1 by a known frequency, F0 , the output of VCO 2 is given by
F2 = F1 ± F0
This signal is used to drive the lower sampler whose output frequency, Fif 2, is given by
Fif 2 = NF2 – fx
Fif 2 = Fif 1 ± NF0
This output from the lower sampler at Fif 2 is mixed with Fif 1 to generate NF0 . N is then determined in a ratio counter with NF0 and F0 as inputs. Once determined, N is then used to extend the
time base while F1 is being measured. By offsetting the display by Fif 1, equation (5) is solved and
the unknown frequency fx displayed.
F if 1
F if
F if
F if 2
Amp 2
Main Gate
From Time Base
Video Amp
Time Base
N Counter
Figure 35. Block diagram of the transfer oscillator down-conversion technique.
Harmonic Heterodyne Converter
The harmonic heterodyne converter, as its name implies, is a hybrid of the previous two techniques. A counter using this block diagram (Figure 36) will acquire the input microwave frequency
in the manner of the transfer oscillator, but it will then make frequency measurements like a
heterodyne converter.
Figure 36 shows the input fx being directed to a sampler, with the resulting down-converted video
signal fif = fx – Nfs amplified and sent to the counter. The sampling frequency fs is created by a
processor-controlled synthesizer.
The acquisition routine for this down-converter consists of tuning the synthesizer fs until the signal
detector finds a video signal fif of the appropriate frequency range (defined by the bandpass filter).
Next, the harmonic number N must be determined, as in the transfer oscillator. One method of
finding N is to use a second sampler loop, as with the transfer oscillator (Figure 35) or similar
technique. A second method is to step the synthesizer back and forth between two closely-spaced
frequencies and observe the differences in counter readings; it is then a simple task for the processor to calculate N.
Video Amp
Main Gate
Time Base
Time Base
Figure 36. Block diagram of the harmonic heterodyne down-conversion technique.
A frequency measurement is accomplished by the processor’s multiplying the known synthesizer
frequency fs by N, adding the result to the video frequency fif measured in the counting register,
and displaying the answer: fx = Nfs + fif . In this process the harmonic heterodyne converter
resembles the heterodyne converter, since the sampler is effectively mixing the Nth harmonic of a
very stable source with the input to produce a video difference frequency.
The harmonic heterodyne converter has the potential to be constructed at a lower cost than the
previous two techniques because it can be designed with just one microwave component (the
sampler) and the control, decisions, and calculations can be performed by a low-cost
Comparison of Performance of the Down-Conversion Technique
In this section, we will briefly examine the performance trade-offs among the three downconversion techniques which allow measurements over 1.5 GHz: heterodyne converter, transfer
oscillator and harmonic heterodyne converter.
The performance criteria to be used for the comparison include the following:
Measurement speed
Sensitivity and Dynamic Range
Signal-to-Noise Ratio
FM tolerance
AM tolerance
Amplitude Discrimination
Measurement Speed
The time required for a microwave counter to perform a measurement may be divided into two
• Acquisition Time — The time necessary for the counter to detect the microwave signal
and prepare to make a measurement: and
• Gate Time — The duration of the counter’s gate required to measure to a given resolution.
The accuracy of microwave counter measurements is limited by two factors:
• The ±1 counter error.
• Time base errors.
For a gate time of one second, the transfer osciIlator is limited to about 1 × 10–8 resolution (for
100-MHz clock). The heterodyne and harmonic heterodyne converters are limited to about
1 × 10–9 , at which point the short-term instabilities of common crystal oscillators become the
limiting factor. With the higher stability of an oven oscillator, these two converters are capable of
resolving 1 × 10–10 at microwave frequencies.
Sensitivity and Dynamic Range
As shown in Figure 37, there is little difference in sensitivity specifications among the three downconversion techniques. A good microwave counter will have sensitivity of about –25 dBm for most
Input Level
+20 dBm
Maximum Measured Input
0 dBm
–20 dBm
Harmonic Heterodyne Converter
HP 5340A Typical
Heterodyne Converter
–40 dBm
Transfer Oscillator
5 GHz
10 GHz
15 GHz
20 GHz
Figure 37. Available microwave counter sensitivity specifications. Maximum measured input (regardless of
down-conversion technique) is typically +7 dBm, although some counters allow measurements to +20 dBm.
The dynamic range of a microwave counter is a measure of the separation of the sensitivity specification and the highest level input signal which can be counted reliably. A typical value for this
upper level is +7 dBm, as shown in Figure 37.
Signal-to-Noise Ratio
An important consideration in choosing a microwave counter is the signal-to-noise environment of
the measurement. A transfer oscillator or harmonic heterodyne converter counter will be capable
of measuring the signal if the peak carrier exceeds the noise floor by 20 dB. A typical heterodyne
converter counter will require 40 dB or greater separation to allow accurate measurement.
FM Tolerance
All modern microwave counters are capable of measuring today’s microwave sources with their
inherent incidental frequency modulation. In general, although the transfer oscillator is capable of
measuring microwave frequencies with all common forms of FM modulation, the heterodyne and
harmonic heterodyne have an advantage in the area of FM tolerance.
AM Tolerance
A second form of modulation encountered during microwave measurements is amplitude modulation. The heterodyne converter’s tolerance to amplitude modulation is limited by its AGC circuitry
when such a circuit is employed in the counter design. A practical limitation of AM tolerance for
the heterodyne converter is around 50 percent AM. The transfer oscillator and the harmonic
heterodyne converter suffer no such limitations with respect to AM. Typically, they can measure a
carrier at a level of –10 dBm with 95 percent AM. The only requirement is that the trough of the
waveform be within the counter’s sensitivity specification.
Amplitude Discrimination
Frequently a microwave counter will be called upon to measure a signal in the presence of other
lower level signals. The ability to perform this measurement directly is referred to as amplitude
All modern microwave counters incorporate amplitude discrimination in their designs. This
capability is one of the key features of the transfer oscillator and harmonic heterodyne converter.
These counters are typically capable of always finding the most prominent component of the
spectrum, provided that it is at least 2 dB above nearby signals and at least 10 dB above signals at
the far end of the counter’s frequency range. Figure 38 illustrates these measurement capabilities.
2 dB (typical)
200 MHz
5 dB (typical)
1 GHz
10 dB (typical)
18 GHz
Figure 38. Amplitude discrimination capabilities of the transfer oscillator and harmonic heterodyne converter.
Each drawing indicates the required level separation in order for the counter to distinguish the greater signal.
The heterodyne converter is capable of amplitude discrimination of widely separated signals, but
for signals in the same frequency band it is limited by the AGC circuitry. Typical AGC circuitry
found in modern heterodyne converters provide discrimination between signals which lie from
4 dB to 30 dB apart, located in the same band.
Summary of Comparison
A summary of the performance trade-offs based on the criteria discussed above is presented in
Figure 39. Bold type indicates that the technique enjoys a significant performance advantage. It
should be noted that these comparisons are made on the basis of typical specifications; a comparison of the individual instruments may produce different results in some categories.
Heterodyne Converter
Transfer Oscillator
Heterodyne Converter
20 GHz
23 GHz
40 GHz
Measurement Speed
150 ms acquisition
1/R gate
150 ms acquisition
N/R gate
350 ms acquisition
1/R gate
Time base limited
Time base limited
Time base limited
Dynamic Range
–30 dBm/35–50 dB
–35 dBm/40 dB
–30 dBm/35–50 dB
40 dB
20 dB
20 dB
FM Tolerance
30–40 MHz peak-peak
1–10 MHz peak-peak
10–50 MHz peak-peak
AM Tolerance
Less than 50%
Greater than 90%
Greater than 90%
4–30 dB
2 –10 dB
2 –10 dB
Frequency Range
Signal-to-Noise Ratio
Figure 39. Summary of the performance of the three principal microwave counter down-conversion techniques.
References and Further Readings on Electronic Counters
General Information:
1. “Electronic Measurements and Instrumentation”, Barney Oliver and John Cage, McGraw-Hill,
1971, Chapter 6.
2. “Basic Electronic Instrument Handbook”, Clyde Coombs, Editor, McGraw-Hill, 1972.
3. “Fundamentals of Quartz Oscillators”, AN 200-2, Hewlett-Packard Co.
4. “AM, FM Measurements with the Transfer Oscillator”, AN 141, Hewlett-Packard Co.
5. “Timekeeping and Frequency Calibration”, AN 52-2, Hewlett-Packard Co.
6. For general information on Spectrum Analysis, see AN 150 Series, Hewlett-Packard Co.
Reciprocal Counters:
1. Hewlett-Packard Journal, June 1974.
2. “Recent Advances in Pulsed RF and Microwave Frequency Measurements”, AN 173,
Hewlett-Packard Co.
3. “Measuring Linearity of VCO’s from 10 Hz to 23 GHz”, AN 181-1, Hewlett-Packard Co.
4. “Measuring the Tuning Step Transient Response of VCO’s to 18 GHz”, AN 174-13,
Hewlett-Packard Co.
5. “Dynamic Measurement of Microwave VCO’s with HP 5345A Electronic Counter”, AN 173-1,
Hewlett-Packard Co.
Time Interval Measurements:
1. “Precision Time Interval Measurements Using an Electronic Counter”, AN 191,
Hewlett-Packard Co.
2. “Time Interval Averaging”, AN 162-1, Hewlett-Packard Co.
3. “Ovenless Oscillators will Resolve 20 Picosecond Pulses”, Electronics, Nov. 10, 1977 Issue,
pp 89-95.
4. “Active Probes Improve Precision of Time Interval Measurements”, Hewlett-Packard Journal,
Oct. 1975, pp 11-16.
5. Hewlett-Packard Journal, April 1970.
6. “Precision T.I. Measurements in Radar Applications”, AN 191-3, Hewlett-Packard Co.
7. “Measure Time Interval Precisely”, Electronic Design, Nov. 22, 1974 Issue.
Microwave Counters:
1. “Fundamentals of Microwave Frequency Counters”, AN 200-1, Hewlett-Packard Co.
2. “40 GHz Frequency Measurements with Standard HP Instruments”, AN 190, HewlettPackard Co.
3. “Microprocessor-Controlled Harmonic Heterodyne Microwave Counter also Measures
Amplitudes”. May 1978, Hewlett-Packard Journal.
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Data Subject to Change
Printed in U.S.A. March 1997
Hewlett-Packard Company
Copyright © 1997
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