STMicroelectronics DSILC6-4xx Datasheet

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STMicroelectronics DSILC6-4xx Datasheet | Manualzz

DSILC6-4xx

ESD Protection for high speed interface

Main applications

Where transient over-voltage protection in ESD sensitive equipment is required, such as:

Computers

Printers

Communication systems

Cell phone handsets and accessories

Video equipment

Description

The DSILC6-4xx is a monolithic application specific discrete dedicated to ESD protection of high speed interfaces, such as USB 2.0, Ethernet,

display and camera serial interfaces (LVDS).

The device is ideal for applications where both reduced printed circuit board space and power absorption capability are required.

Features

Diode array topology

4 line protection

5 V V

CC protection

Very low capacitance: 1 pF typ.

Lead-free pacakge

RoHS compliant

Benefits

Very low capacitance between lines to GND for optimized data integrity

Low PCB space consumption: 2.9 mm² max for

SOT-666 and 1.5 mm² max for Flip-Chip

Cut-off frequency > 2 GHz

High reliability offered by monolithic integration

MDDI, SMIA, MIPI specification compliant

I/O3

VCC

I/O4

I/O2

GND

I/O1

SOT-666

DSILC6-4P6

Functional diagram

I/O3

I/O4 VCC

I/O2

I/O1 GND

SOT-666

Top-side view

Flip-Chip

DSILC6-4F2

I/O1 VCC I/O2

I/O4

GND

I/O3

Flip-Chip

Top-side view

I/O1

VCC

I/O2

I/O4 GND I/O3

Flip-Chip

Top-side view

Order Code

Part Number

DSILC6-4P6

DSILC6-4F2

Marking

G

EI

Complies with the following standards:

IEC 61000-4-2 level 4:

8 kV (contact discharge)

15 kV (air discharge)

MIL STD 883G-Method 3015-7: class 3B

May 2007 Rev 3 1/11

www.st.com

11

Characteristics

1 Characteristics

DSILC6-4xx

Table 1.

Symbol

V

PP

I

PP

P

PP

T stg

T j

T

L

Absolute ratings

Parameter

Peak pulse voltage

Peak pulse current

Peak pulse power

IEC 61000-4-2 contact discharge

IEC 61000-4-2 air discharge

I/O to GND

Pulse waveform = 8/20 µs

SOT-666

Flip-Chip

SOT-666

Flip-Chip

Storage temperature range

Maximum junction temperature

Lead solder temperature (10 seconds duration)

Table 2.

Symbol

Electrical characteristics (T amb

= 25° C)

Parameter

V

RM

I

RM

V

BR

V

F

V

CL

I

PP

Reverse stand-off voltage

Leakage current

Breakdown voltage

Forward voltage

Clamping voltage

Peak pulse current

Value

8

15

5

7

90

120

-55 to +150

125

260

Unit

kV

A

W

°C

°C

°C

Symbol Parameter Test Conditions

I

V

RM

BR

V

F

C i/o-GND

C

ΔC i/o-i/o i/o-GND

ΔC i/o-i/o

Leakage current

Breakdown voltage between V

BUS

and GND

Forward voltage

V

RM

= 5 V

I

R

= 1 mA

I

F

= 10 mA

Capacitance between

I/O and GND

Capacitance between I/O

V

V

F = 1 MHz, V

V

I/O

I/O

I/O

= 0 V, F = 1 MHz, V

= 1.65 V, V

CC

OSC

= 4.3 V,

= 400 mV

= 0 V, F = 1 MHz, V

OSC

OSC

= 30 mV

= 30 mV

V

I/O

= 1.65 V, V

CC

= 4.3 V,

F = 1 MHz, V

OSC

= 400 mV

V

I/O

= 0 V, F = 1 MHz, V

OSC

= 30 mV

V

I/O

= 0 V, F = 1 MHz, V

OSC

= 30 mV

SOT-666

Flip-Chip

SOT-666

Flip-Chip

SOT-666

Flip-Chip

SOT-666

Flip-Chip

Value

Unit

Min Typ Max

0.5

µA

6 V

1

2 2.5

2.5

3

1.5

1.8

1.8

2.0

1.0

1.25

1.25

1.5

0.75

0.9

0.9

1.20

0.06

0.05

V pF

2/11

DSILC6-4xx

Figure 1.

Relative variation of leakage current versus junction temperature - SOT-666 (typical values)

100

I

RM

[T j

] / I

RM

[T j

=25°C]

Characteristics

Figure 2.

Relative variation of leakage current versus junction temperature Flip-Chip (typical values)

100

I

RM

[T j

] / I

RM

[T j

=25°C]

10

10

1

25 50 75 100 125

1

25 50 75 100 125

Figure 3.

Remaining voltage after

DSILC6-4P6 during ESD

15 kV positive surge (air discharge)

Figure 4.

Remaining voltage after

DSILC6-4F2 during ESD

15 kV positive surge (air discharge)

50 ns/div

50 ns/div

Figure 5.

Remaining voltage after

DSILC6-4P6 during ESD

15 kV negative surge (air discharge)

Figure 6.

Remaining voltage after

DSILC6-4F2 during ESD

15 kV negative surge (air discharge)

50 ns/div

50 ns/div

3/11

Characteristics DSILC6-4xx

Figure 7.

Frequency responses of all lines

DSILC6-4P6

0.00

S21(dB)

Figure 8.

Frequency response of all lines

DSILC6-4F2

0.00

S21 (dB)

- 5.00

- 5.00

- 10.00

- 10.00

- 15.00

- 15.00

- 20.00

- 20.00

100.0k

1.0M

Line 1

Line 3

F(Hz)

10.0M

100.0M

Line 2

Line 4

1.0G

- 25.00

F (Hz)

1.0M

3.0M

Line 1

Line 3

10.0M

30.0M

100.0M 300.0M

Line 2

Line 4

1.0G

3.0G

Figure 9.

Crosstalk results for lines

1/2 and 1/3 DSILC6-4P6

0.00

S21(dB)

- 20.00

- 40.00

- 60.00

- 80.00

- 100.00

- 120.00

- 140.00

100.0k

1.0M

Xtalk 1/2

10.0M

F(Hz)

100.0M

Xtalk 1/3

1.0G

Figure 10.

Crosstalk results for lines

1/2 and 1/3 DSILC6-4F2

0.00

S21 (dB)

- 20.00

- 40.00

- 60.00

- 80.00

- 100.00

- 120.00

- 140.00

F (Hz)

1.0M

Xtalk

3.0M

1/2

10.0M

30.0M

100.0M 300.0M

Xtalk 1/3

1.0G

3.0G

4/11

DSILC6-4xx Application examples

2.1 MDDI

Lower Clamshell

Power

Data+

Data-

Strobe+

Strobe-

Base band IC

GND

DSILC6-4xx

Upper Clamshell

Hinge

Analog Earpiece Audio

Power

MDDI Data (Host)

MDDI Strobe (Host)

GND

MDDI Client

& LCD

Controller

Chip (With

Frame

Buffer)

PRIMARY

LCD

SECONDARY

LCD

2.2 SMIA

DATA1+

DATA1-

CLOCK+

CLOCK-

SMIA device

SCL

SDA

DSILC6-4xx

ESDALC6V1P3

5/11

Application examples

2.3 Ethernet 1 Gb

SMP75-8

SMP75-8

+5V

SMP75-8

SMP75-8

DSILC6-4xx

+5V

DSILC6-4xx

BI_DA+

BI_DA-

BI_DB+

BI_DB-

DATA TRANSCEIVER

BI_DC+

BI_DC-

BI_DD+

BI_DD-

DSILC6-4xx

6/11

DEVICE-

UPSTREAM

TRANSCEIVER

SW

2

+ 3.3V

R

PU

SW

1

V

BUS

R

X LS/FS

R

X HS

T

X HS

+

+

+

R

X LS/FS -

R

X HS -

T

X HS -

GND

T

X LS/FS

+

T

X LS/FS -

R

S

R

S

USBLC6-2SC6

USB connector

V

BUS

D+

D-

GND

+ 5V

Protecting

Bus Switch

HUB-

DOWNSTREAM

TRANSCEIVER

R

PD

R

S

R

S

V

BUS

R

X LS/FS

R

X HS

T

X HS

+

+

R

X LS/FS -

R

X HS -

T

X HS -

+

GND

T

X LS/FS

+

T

X LS/FS -

R

PD

DEVICE-

UPSTREAM

TRANSCEIVER

SW

2

+ 3.3V

R

PU

SW

1

V

BUS

R

X LS/FS

R

X HS

T

X HS

+

+

+

R

X LS/FS -

R

X HS -

T

X HS -

GND

T

X LS/FS

+

T

X LS/FS -

R

S

R

S

USBLC6-2P6

USB connector

V

BUS

D+

D-

GND

DSILC6-4xx

R

PD

R

S

R

S

R

X LS/FS

R

X HS

T

X HS

+

+

R

X LS/FS -

+

R

X HS -

T

X HS -

GND

T

X LS/FS

+

T

X LS/FS -

R

PD

Mode

Low Speed LS

Full Speed FS

High Speed HS

SW

1

Open

Closed

SW

2

Closed

Open

Closed then open Open

DSILC6-4xx

3 Ordering information scheme

Ordering information scheme

DSI LC 6 - 4 xx

Product Designation

Low capacitance

Breakdown Voltage

6 = 6 Volts

Number of lines protected

4 = 4 lines

Packages

P6 = SOT-666

F2 = Flip-Chip

7/11

Package information DSILC6-4xx

Epoxy meets UL94, V0

Table 3.

SOT-666 Dimensions

L1

L3 b b1 e

D

Figure 11.

SOT-666 footprint

0.50

A

E1

E

L2

A3

Dimensions

Millimeters Inches Ref.

Min.

Typ.

Max.

Min.

Typ.

Max.

A 0.45

A3 0.08

b 0.17

0.60

0.018

0.18

0.003

0.34

0.007

0.024

0.007

0.013

b1 0.19

0.27

0.34

0.007 0.011 0.013

D 1.50

1.70

0.059

0.067

E 1.50

E1 1.10

1.70

1.30

0.059

0.043

0.067

0.051

e

L1

L2 0.10

0.50

0.19

0.30

0.004

0.020

0.007

0.012

L3 0.10

0.004

Figure 12.

SOT-666 marking

0.62

2.60

G

0.99

0.30

8/11

DSILC6-4xx

Figure 13.

Flip-Chip Dimensions

500 µm ± 50

650 µm ± 65

Package information

1.1 mm ± 50 µm

315 µm ± 50

Figure 14.

Flip-Chip footprint

Copper pad Diameter :

220µm recommended

Solder stencil opening :

330µm recommended

Solder mask opening recommendation :

300µm recommended

Figure 15.

Flip-Chip marking

Dot, ST logo xx = marking z = manufacturing location yww = datecode

(y = year ww = week)

E

x y x z w w

Figure 16.

Flip-Chip tape and reel specifications

Dot identifying Pin A1 location

4 +/- 0.1

Ø 1.5 +/- 0.1

0.73 +/- 0.05

4 +/- 0.1

User direction of unreeling

All dimensions in mm

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC

Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

9/11

Ordering information DSILC6-4xx

Ordering code

DSILC6-4P6

DSILC6-4F2

Marking

G

EI

Package

SOT-666

Flip-Chip

Weight

2.9 mg

2.22 mg

Base qty

3000

5000

Delivery mode

Tape and reel

Tape and reel

Date

10-Aug-2006

04-Jan-2007

28-May-2007

Revision

1

2

3

Description of Changes

Initial release.

Added Flip-Chip package. Added applications examples for

SMIA, Ethernet 1 Gb, and USB. Updated Tj max to 150. Added

V

RM

line in Table 2. Modified MDDI example figure.

Modified Functional diagram on page 1 to show Top side view instead of Bump side view of DSILC64F2. Removed V

RM

line in

Table 2. Added characteristic curves specific to each package for

ESD, Frequency response and Crosstalk

10/11

DSILC6-4xx

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11/11

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