TDA 2030

TDA 2030
TDA2030
®
14W Hi-Fi AUDIO AMPLIFIER
DESCRIPTION
The TDA2030 is a monolithic integrated circuit in
Pentawatt® package, intended for use as a low
frequency class AB amplifier. Typically it provides
14W output power (d = 0.5%) at 14V/4Ω; at ± 14V
or 28V, the guaranteed output power is 12W on a
4Ω load and 8W on a 8Ω (DIN45500).
The TDA2030 provides high output current and has
very low harmonic and cross-over distortion.
Further the device incorporates an original (and
patented) short circuit protection system comprising an arrangement for automatically limiting the
dissipated power so as to keep the working point
of the output transistors within their safe operating
area. A conventional thermal shut-down system is
also included.
Pentawatt
ORDERING NUMBERS : TDA2030H
TDA2030V
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Vs
Supply voltage
Value
Unit
± 18 (36)
V
Vi
Input voltage
Vi
Differential input voltage
± 15
Io
Output peak current (internally limited)
3.5
A
Power dissipation at Tcase = 90°C
20
W
-40 to 150
°C
Ptot
Tstg, Tj
Stoprage and junction temperature
Vs
V
TYPICAL APPLICATION
June 1998
1/12
TDA2030
PIN CONNECTION (top view)
+VS
OUTPUT
-VS
INVERTING INPUT
NON INVERTING INPUT
TEST CIRCUIT
2/12
TDA2030
THERMAL DATA
Symbol
Rth j-case
Parameter
Thermal resistance junction-case
Value
Unit
3
°C/W
max
ELECTRICAL CHARACTERISTICS (Refer to the test circuit, Vs = ± 14V , Tamb = 25°C unless otherwise
specified) for single Supply refer to fig. 15 Vs = 28V
Symbol
Parameter
Vs
Supply voltage
Id
Quiescent drain current
Ib
Input bias current
Vos
Input offset voltage
Ios
Input offset current
Po
Output power
Test conditions
B
Distortion
Power Bandwidth
(-3 dB)
Ri
Input resistance (pin 1)
Gv
Voltage gain (open loop)
Gv
Voltage gain (closed loop)
eN
Input noise voltage
iN
Input noise current
SVR
Id
Typ.
Max.
Unit
± 18
36
V
40
60
mA
0.2
2
µA
±2
± 20
mV
± 20
± 200
nA
±6
12
Vs = ± 18V (Vs = 36V)
d = 0.5%
Gv = 30 dB
f = 40 to 15,000 Hz
RL = 4Ω
RL = 8Ω
d = 10%
f = 1 KHz
RL = 4Ω
RL = 8Ω
d
Min.
12
8
14
9
W
W
18
11
W
W
Gv = 30 dB
Po = 0.1 to 12W
Gv = 30 dB
RL = 4Ω
f = 40 to 15,000 Hz
0.2
0.5
%
Po = 0.1 to 8W
Gv = 30 dB
RL = 8Ω
f = 40 to 15,000 Hz
0.1
0.5
%
Gv = 30 dB
Po = 12W
RL = 4Ω
0.5
f = 1 kHz
29.5
B = 22 Hz to 22 KHz
Supply voltage rejection
RL = 4Ω
Gv = 30 dB
Rg = 22 kΩ
Vripple = 0.5 Veff
fripple = 100 Hz
Drain current
Po = 14W
Po = W
RL = 4Ω
RL = 8Ω
40
10 to 140,000
Hz
5
MΩ
90
dB
30
30.5
dB
3
10
µV
80
200
pA
50
dB
900
500
mA
mA
3/12
TDA2030
Figure 1. Output power vs.
supply voltage
Figure 2. Output power vs.
supply voltage
Fig ure 3. Distortion vs.
output power
F ig ure 4. Di stortion vs.
output power
Fi gure 5. Distor tion vs.
output power
Fig ure 6. Distortion vs.
frequency
Fi gure 7. Distor tion vs.
frequency
4/12
Figure 8. Frequency response with different values
of the rolloff capacitor C8
(see fig. 13)
Figure 9. Quiescent current
vs. supply voltage
TDA2030
Figure 10. Supply voltage
rejection vs. voltage gain
Figure 11. Power dissipation and efficiency vs. output
power
Figure 12. Maximum power
dissipation vs. supply voltage (sine wave operation)
APPLICATION INFORMATION
Figure 13. Typical amplifier
with split power supply
Figure 14. P.C. board and component layout for
the circuit of fig. 13 (1 : 1 scale)
5/12
TDA2030
APPLICATION INFORMATION (continued)
Figure 15. Typical amplifier
with single power supply
Figure 16. P.C. board and component layout for
the circuit of fig. 15 (1 : 1 scale)
Figure 17. Bridge amplifier configuration with split power supply (Po = 28W, Vs = ±14V)
6/12
TDA2030
PRACTICAL CONSIDERATIONS
Printed circuit board
The layout shown in Fig. 16 should be adopted by
the designers. If different layouts are used, the
ground points of input 1 and input 2 must be well
decoupled from the ground return of the output in
which a high current flows.
Assembly suggestion
No electrical isolation is needed between the
package and the heatsink with single supply voltage
configuration.
Application suggestions
The recommended values of the components are
those shown on application circuit of fig. 13.
Different values can be used. The following table
can help the designer.
Component
Recomm.
value
R1
22 kΩ
Closed loop gain
setting
Increase of gain
Decrease of gain (*)
R2
680 Ω
Closed loop gain
setting
Decrease of gain (*)
Increase of gain
R3
22 kΩ
Non inverting input
biasing
Increase of input
impedance
Decrease of input
impedance
R4
1Ω
Frequency stability
Danger of osccilat. at
high frequencies
with induct. loads
R5
≅ 3 R2
Upper frequency
cutoff
Poor high frequencies
attenuation
C1
1 µF
Input DC
decoupling
Increase of low
frequencies cutoff
C2
22 µF
Inverting DC
decoupling
Increase of low
frequencies cutoff
C3, C4
0.1 µF
Supply voltage
bypass
Danger of
oscillation
C5, C6
100 µF
Supply voltage
bypass
Danger of
oscillation
C7
0.22 µF
Frequency stability
Danger of oscillation
C8
D1, D2
≅
1
2π B R1
1N4001
Purpose
Upper frequency
cutoff
Larger than
recommended value
Smaller bandwidth
Smaller than
recommended value
Danger of
oscillation
Larger bandwidth
To protect the device against output voltage spikes
(*) Closed loop gain must be higher than 24dB
7/12
TDA2030
SINGLE SUPPLY APPLICATION
Larger than
recommended value
Smaller than
recommended value
Component
Recomm.
value
R1
150 kΩ
Closed loop gain
setting
Increase of gain
Decrease of gain (*)
R2
4.7 kΩ
Closed loop gain
setting
Decrease of gain (*)
Increase of gain
R3
100 kΩ
Non inverting input
biasing
Increase of input
impedance
Decrease of input
impedance
R4
1Ω
Frequency stability
Danger of osccilat. at
high frequencies
with induct. loads
RA/RB
100 kΩ
C1
Purpose
Non inverting input Biasing
Power Consumption
1 µF
Input DC
decoupling
Increase of low
frequencies cutoff
C2
22 µF
Inverting DC
decoupling
Increase of low
frequencies cutoff
C3
0.1 µF
Supply voltage
bypass
Danger of
oscillation
C5
100 µF
Supply voltage
bypass
Danger of
oscillation
C7
0.22 µF
Frequency stability
Danger of oscillation
C8
D1, D2
≅
1
2π B R1
1N4001
Upper frequency
cutoff
To protect the device against output voltage spikes
(*) Closed loop gain must be higher than 24dB
8/12
Smaller bandwidth
Larger bandwidth
TDA2030
SHORT CIRCUIT PROTECTION
The TDA2030 has an original circuit which limits the
current of the output transistors. Fig. 18 shows that
the maximum output current is a function of the
collector emitter voltage; hence the output transistors work within their safe operating area (Fig. 2).
This function can therefore be considered as being
Fi g ure 1 8. Maximum
ou tpu t c urr en t vs.
voltage [VCEsat] across
each output transistor
peak power limiting rather than simple current limiting.
It reduces the possibility that the device gets damaged during an accidental short circuit from AC
output to ground.
Figure 19. Safe operating area and
collector characteristics of the
protected power transistor
THERMAL SHUT-DOWN
The presence of a thermal limiting circuit offers the
following advantages:
1. An overload on the output (even if it is permanent), or an above limit ambient temperature can
be easily supported since the Tj cannot be
higher than 150°C.
2. The heatsink can have a smaller factor of safety
compared with that of a conventional circuit.
There is no possibility of device damage due to
high junction temperature. If for any reason, the
junction temperature increases up to 150°C, the
thermal shut-down simply reduces the power
dissipation at the current consumption.
The maximum allowable power dissipation depends upon the size of the external heatsink (i.e. its
thermal resistance); fig. 22 shows this dissipable
power as a function of ambient temperature for
different thermal resistance.
9/12
TDA2030
Figure 20. Output power and
dr ai n cu rre nt vs. case
temperature (RL = 4Ω)
Figure 23. Example of heat-sink
Figure 21. Output power and
d rai n c urr en t vs. ca se
temperature (RL = 8Ω)
Fi g ure
22.
Maximum
allowable power dissipation
vs. ambient temperature
Dimension : suggestion.
The following table shows the length that
the heatsink in fig. 23 must have for several
values of Ptot and Rth.
Ptot (W)
Length of heatsink
(mm)
Rth of heatsink
(° C/W)
10/12
12
8
6
60
40
30
4.2
6.2
8.3
TDA2030
PENTAWATT PACKAGE MECHANICAL DATA
mm
DIM.
MIN.
A
C
D
D1
E
E1
F
F1
G
G1
H2
H3
L
L1
L2
L3
L4
L5
L6
L7
L9
M
M1
V4
Dia
inch
TYP.
2.4
1.2
0.35
0.76
0.8
1
3.2
6.6
MAX.
4.8
1.37
2.8
1.35
0.55
1.19
1.05
1.4
3.6
7
10.4
10.4
18.15
15.95
21.6
22.7
1.29
3
15.8
6.6
3.4
6.8
10.05
17.55
15.55
21.2
22.3
17.85
15.75
21.4
22.5
2.6
15.1
6
0.2
4.5
4
4.23
3.75
MIN.
TYP.
0.094
0.047
0.014
0.030
0.031
0.039
0.126
0.260
0.134
0.268
0.396
0.691
0.612
0.831
0.878
0.703
0.620
0.843
0.886
MAX.
0.189
0.054
0.110
0.053
0.022
0.047
0.041
0.055
0.142
0.276
0.409
0.409
0.715
0.628
0.850
0.894
0.051
0.118
0.622
0.260
0.102
0.594
0.236
4.75
4.25
0.008
0.177
0.157
0.167
0.148
0.187
0.167
40° (typ.)
3.65
3.85
0.144
0.152
L
L1
V3
V
V
E
L8
V
V1
V
M1
R
R
A
B
D
C
D1
L5
L2
R
M
V4
H2
L3
F
E
E1
V4
H3 H1
G G1
Dia.
F
F1
L7
H2
V4
L6
L9
RESIN BETWEEN
LEADS
11/12
TDA2030
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1998 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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12/12
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