datasheet for Avastar 88W8766P by Marvell

series

Marvell Avastar 88W8766P Integrated

WLAN/Bluetooth Single-Chip SoC

Supports PCIe v3.0 and USB 2.0 Interfaces for Connecting to the Host Processor

PRODUCT OVERVIEW

The Marvell ® Avastar™ 88W8766P is a highly integrated wireless local area network (WLAN) system-on-chip (SoC), speciically designed to support high throughput data rates for next generation WLAN products. The device is designed to support IEEE 802.11a/g/b and 802.11n payload data rates. The device also supports Bluetooth

4.0+High Speed (HS) and Bluetooth Low Energy (BLE).

The device provides the combined functions of Direct Sequence Spread Spectrum (DSSS) and Orthogonal Frequency Division Multiplexing (OFDM) baseband modulation, Medium Access Controller (MAC), CPU, memory, host interfaces, and direct-conversion WLAN RF radio with integrated 2.4 GHz PA and T/R switch on a single chip.

For security, the 88W8766P supports 802.11i security standards through implementation of the Advanced Encryption Standard (AES)/Counter Mode CBC-MAC Protocol (CCMP), Wired Equivalent Privacy (WEP) with Temporal

Key Integrity Protocol (TKIP), Advanced Encryption Standard (AES)/Cipher-Based Message Authentication Code

(CMAC), and WLAN Authentication and Privacy Infrastructure (WAPI) security mechanisms.

For video, voice, and multimedia applications, 802.11e Quality of Service (QoS) is supported. Also supported are

802.11h Dynamic Frequency Selection (DFS) for detecting radar pulses when operating in the 5 GHz range.

The 88W8766P supports PCIe v3.0 (2.5 Gbps) and USB 2.0 interfaces for connecting WLAN and Bluetooth activity respectively to the host processor.

The device is available in a QFN package.

BLOCK DIAGRAM

JTAG Interface

Power Management

Power Down

Switcher

3-Wire, 4-Wire Interface

2-Wire Serial Interface

1-Wire Serial Interface

SPI Serial EEPROM

UART

GPIO

Processor

Feroceon

CPU

SRAM/

ROM

JTAG

Bluetooth

Bluetooth/BLE

Baseband

B

U

S

C

P

U SRAM

CPU

Interface

Timers/

Interrupts

Power

Management

Switcher/

LDO

Peripheral Bus

Clocked

Serial Unit

UART

GPIO/LED

OTP

B

U

S

Peripheral Bus Unit

I

N

T

E

R

N

A

L

B

U

S

WLAN MAC / Baseband

MAC

Coexistence

Arbiter

DMA

802.11

Baseband

(DSSS / OFDM )

Direct

Conversion RF

PA

WLAN RF

LNA

PA

LNA

Shared

LNA

T/R

Switch

Bluetooth

RF

Common Analog

Common Analog Unit

(optional)

PA

XTAL_IN

XTAL_OUT

T/R

Switch

5 GHz WLAN Tx/Rx

2.4 GHz WLAN Tx/Rx

Bluetooth Tx/Rx

Host Interfaces

PCIe v3.0 (2.5 Gbps)

USB 2.0

PCIe v3.0 (2.5 Gbps)

USB 2.0

Fig 1. Avastar 88W8766P SoC Block Diagram

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Marvell Avastar 88W8766P Integrated WLAN/Bluetooth Single-Chip SoC

SPECIFICATIONS

APPLICATIONS

• Laptop/Netbook

• Imaging platforms (printers, digital picture frames)

• Gaming platforms

• Consumer electronic devices (TV, DVD players, Blu-ray players, etc.)

GENERAL FEATURES

• Single-chip integration of 802.11 wireless radio, baseband, MAC, CPU, memory, host interfaces

• CMOS and low-swing sinewave input clock

• 40 MHz crystal clock support

• Low power operation supporting deep sleep and standby modes

• Option to power directly from a single 3.3V supply or to use

3.3V/1.8V/1.2V pre-regulated supplies

• One time programmable (OTP) memory to eliminate need for external

EEPROM

• Fully compatible with Marvell Power Management device(s)

IEEE 802.11/STANDARDS

• 802.11 data rates of 1 and 2 Mbps

• 802.11b data rates of 5.5 and 11 Mbps

• 802.11a/g data rates 6, 9, 12, 18, 24, 36, 48, and 54 Mbps for multimedia content transmission

• 802.11g/b performance enhancements

• 802.11n compliant, with maximum data rates up to 72 Mbps (20 MHz channel) and 150 Mbps (40 MHz channel)

• 802.11d international roaming

• 802.11e QoS block acknowledgement (with support for 802.11n extension)

• 802.11h transmit power control

• 802.11h DFS radar pulse detection

• 802.11i enhanced security

• 802.11k radio resource measurement

• 802.11r fast hand-off for AP roaming

• 802.11w protected management frames

• Fully supports clients (stations) implementing IEEE Power Save mode

• Wi-Fi Direct connectivity

PACKAGING

• QFN

PROCESSOR

• CPU

- Integrated Marvell Feroceon ® CPU (ARMv5TE-compliant)

- 160 MHz maximum CPU clock speed

• DMA

- Independent 4-Channel Direct Memory Access (DMA)

MEMORY

• Internal Memory

- Internal SRAM for Tx frame queues/Rx data buffers

- Boot ROM

- ROM patching capability

WLAN MAC

• Ad-Hoc and Infrastructure Modes

• RTS/CTS for operation under DCF

• Hardware iltering of 32 multicast addresses and duplicate frame detection for up to 32 unicast addresses

• On-chip Tx and Rx FIFO for maximum throughput

• Open System and Shared Key Authentication services

• A-MPDU Rx (de-aggregation) and Tx (aggregation)

• 20/40 MHz coexistence

• Reduced Inter-Frame Spacing (RIFS) bursting

• Management information base counters

• Radio resource measurement counters

• Block acknowledgement with 802.11 extension

• Dynamic frequency selection (DFS)

• Transmit beamformee support

•

Transmit rate adaptation

•

Transmit power control

• Long and short preamble generation on a frame-by-frame basis for

802.11b frames

• Marvell Mobile Hotspot

WLAN BASEBAND

• 802.11n 1x1 SISO (on-chip Marvell SISO RF radio)

• Backward compatibility with legacy 802.11a/g/b technology

• WLAN/Bluetooth LNA sharing

• PHY data rates up to 150 Mbps

• 20 MHz bandwidth/channel, 40 MHz bandwidth/channel, upper/lower 20 MHz bandwidth in 40 MHz channel, and 20 MHz duplicate legacy bandwidth in 40 MHz channel mode operation

• Modulation and Coding Scheme (MCS)—0~7 and 32 (duplicate 6 Mbps)

• Enhanced radar detection for long and short pulse radar

• Enhanced AGC scheme for DFS channel

• Japan DFS requirements for W53 and W56

• Radio resource measurement

• Optional 802.11n SISO features:

- 20/40 MHz coexistence

- 1-stream STBC reception

- Short guard interval

- RIFS on receive path

- Beamformee function and hardware acceleration

- Greenield Tx/Rx

• Power save features

WLAN RADIO

• Integrated direct-conversion radio

• 20 and 40 MHz channel bandwidths

• Integrated T/R switch for 2.4 GHz path

• Integrated power ampliiers for both 2.4 GHz and 5 GHz paths

• Optional bypass for integrated power ampliiers

• Supports external ampliier for 5 GHz path

• WLAN Rx Path

- Direct conversion architecture eliminates need for external SAW ilter

- On-chip gain selectable LNAs with optimized noise igure and power consumption

- High dynamic range AGC function in receive mode

• WLAN Tx Path

- Integrated power ampliiers with power control

- Closed/open loop power control (0.5 dB increments)

- Optimized Tx gain distribution for linearity and noise performance

series

Marvell Avastar 88W8766P Integrated WLAN/Bluetooth Single-Chip SoC

SPECIFICATIONS

WLAN RADIO (continued)

• WLAN Local Oscillator

- Fractional-N for multiple reference clock support

- Fine channel step

WLAN ENCRYPTION

• WEP 64- and 128-bit encryption with hardware TKIP processing (WPA)

• AES-CCMP hardware implementation as part of 802.11i security standard (WPA2)

• Enhanced AES engine performance

• AES-Cipher-Based Message Authentication Code (CMAC) as part of the

802.11w security standard

• WLAN Authentication and Privacy Infrastructure (WAPI)

PERIPHERAL BUS INTERFACES

• Clocked Serial Unit (CSU)

- 3-Wire, 4-Wire (3W4W) Interface

- 2-Wire Serial Interface (TWSI)

- 1-Wire Serial Interface

- SPI Serial (EEPROM) Interface

• 16550 Universal Asynchronous Receiver/Transmitter (UART)

• General Purpose Input Output (GPIO)

• One-Time Programmable (OTP) memory to eliminate need for external

EEPROM

TEST

• On-chip diagnostic information

BLUETOOTH

• Bluetooth 4.0 + HS

• Bluetooth Class 2

• Bluetooth Class 1

• Single-ended, shared Tx/Rx path for Bluetooth

• Shared LNA for WLAN/Bluetooth

• Baseband and radio BDR and EDR packet types—1 Mbps (GFSK), 2

Mbps (/4-DQPSK), and 3 Mbps (8DPSK)

• Fully functional Bluetooth baseband—AFH, forward error correction, header error control, access code correlation, CRC, encryption bit stream generation, and whitening

• Adaptive Frequency Hopping (AFH) including Packet Loss Rate (PLR) and RSSI

• Interlaced scan for faster connection setup

• Simultaneous active ACL connection support

• Automatic ACL packet type selection

• Full master and slave piconet support

• Scatternet support

• HCI layer veriied to function with major proile stack vendors

• SCO/eSCO voice over HCI

• All standard pairing, authentication, link key, and encryption operations

• Standard Bluetooth power saving mechanisms (i.e., hold, sniff modes and sniff-subrating)

• Enhanced low power scan mode

• Dynamic Transmit Power Control (TPC)

• Channel Quality Driven (CQD) data rate

• SBC off load for A2DP streaming

• Wideband Speech Support

• Supports Advertiser, Scanner, Initiator, Master, and Slave roles and connects up to 64 links

• Supports WLAN/Bluetooth Coexistence (BCA) protocols

• Shared RF with BDR/EDR

• Supports encryption (AES)

• Hardware support for intelligent Adaptive Frequency Hopping (AFH)

• BDR/EDR, LE, and WLAN coexistence

HOST INTERFACES

• PCIe v3.0 (2.5 Gbps) and USB 2.0 interfaces

COEXISTENCE

• Advance coexistence support for internal Bluetooth and WLAN

series

Marvell Avastar 88W8766P Integrated

WLAN/Bluetooth Single-Chip SoC

THE MARVELL ADVANTAGE:

Marvell chipsets come with complete reference designs which include board layout designs, software, manufacturing diagnostic tools, documentation, and other items to assist customers with product evaluation and production. Marvell’s worldwide ield application engineers collaborate closely with end customers to develop and deliver new leading-edge products for quick time-to-market. Marvell utilizes worldleading semiconductor foundry and packaging services to reliably deliver high-volume and low-cost total solutions.

ABOUT MARVELL:

Marvell is a leader in storage, communications, and consumer silicon solutions. Marvell’s diverse product portfolio includes switching, transceiver, communications controller, processor, wireless, power management, and storage solutions that power the entire communications infrastructure, including enterprise, metro, home, storage, and digital entertainment solutions. For more information, visit our Web site at www.marvell.com

.

Marvell Semiconductor, Inc.

5488 Marvell Lane

Santa Clara, CA 95054

Phone 408.222.2500

www.marvell.com

Copyright © 2011. Marvell International Ltd. All rights reserved. Marvell, Moving Forward

Faster, and the Marvell logo are registered trademarks of Marvell or its afiliates. Avastar is a trademark of Marvell or its afiliate. All other trademarks are the property of their respective owners.

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