Fluorescent Ballast Design Using Passive P.F.C. and Crest Factor Control by Peter N. Wood International Rectifier Corporation 233 Kansas Street, El Segundo, CA 90245, USA ABSTRACT-Crest Factor in Fluorescent lamps is the ratio of lpeak to RMS current. e.g. for a sinusoidal current waveform C.F. = 1.414. High C.F. values are detrimental to lamp life and lamp manufacturers have imposed a maximum value of 1.7 to realize nominal lifespan. I. INTRODUCTION Power quality standards are being imposed worldwide in order to maximize the efficiency of the existing total generation capacity. Adding additional generating capacity is increasingly difficult and expensive because of environmental constraints so the onus for improved efficiency falls on the power user rather the power supplier. Off-line power converters of which electronic ballasts are a major category, are no longer permitted to present low power factor and high harmonic currents to the electric power grid. Indeed all classes of user equipment from motors to T.V. sets and computers are now , or soon will be regulated by power quality specifications. Electronic ballasts are generally required to comply with power quality specifications such as IEC 1000-3 which mandate maximum limits for harmonic currents out to the 39th harmonic (see Table 1). Other countries will issue similar power quality specifications to the European IEC1000 standard so it is expected that the worldwide lighting market will have similar requirements. II. POWER FACTOR CONTROL METHODS: There are two basic categories of power factor improvement circuits namely active and passive. A typical active P.F.C. circuit supplies a regulated DC bus at higher voltage then the maximum peak voltage of the AC supply and uses a simple boost topology as shown in Fig. 1. The boost topology of Fig. 1 may be operated at constant high frequency with continuous inductor current or in the critical conduction mode where the inductor is allowed to discharge to zero energy in before initiating a new charge cycle. Most of the commercially available control IC’s are of the latter type. The active PFC circuit is entirely satisfactory for harmonic compliance but the cost of the additional circuitry is often unacceptable in many low cost mass market ballast applications. Table 1 - IEC1000-3 LIMITS FOR CLASS C EQUIPMENT Harmonic Order (n) 2 3 5 7 9 11≤ n ≤ 39 Maximum Value Expressed as a Percentage of the Fundamental Input Current of Lumieres 2 30 x λ 10 7 5 3 L + + PFC Drive DC Output pw-fig01.vsd Fig. 1 - Active PFC Circuit + + + AC Input DC Output - AC Input DC Output + - pw-fig02.vsd pw-fig03.vsd Fig. 2 - L-C Passive PFC Circuit Fig. 3 -50% Valley Fill Passive PFC Circuit Passive PFC circuits on the other hand operate at mains frequency (50 or 60Hz) using capacitors and iron cored inductors tuned to the line frequency in a low pass or band pass configuration. Unfortunately the physical size and weight of these filters at mains frequency makes them unattractive, especially when one considers that the rest of the ballast circuitry can be smaller than the PFC components! Another novel way to achieve power factor improvement to >95% using simple, low cost circuitry is shown in Fig. 3. In this circuit the filter capacitors are charged in series via the diode and resistor on each half cycle of the rectified AC input. Each capacitor is charged to ½ of the AC peak voltage, minus three diode drops - two in the bridge rectifier and one in the diode between the two capacitors. The purpose of the resistor is to reduce the peaks in the current waveform as the capacitors charge. Since each capacitor is charged to half the peak AC voltage, they supply output current only after the bus voltage follows the sinusoidal waveform down to Vpeak /2. At this time the capacitors are essentially in parallel and supply load current until the rectified AC input again exceeds VP/2 on the next half cycle. The discharge duty cycle for the capacitors is approximately 37% followed by an idle period during which time the load is being supplied directly from the rectified AC input. At the peak of the input AC voltage there is an additional current to recharge the capacitors up to Vpeak. The magnitude and duration of this current is a function of the depth of discharge and the value of the resistor in the charging circuit. The L-C circuit at the AC input is a filter for inverter switching spikes which otherwise would appear on the AC input lines. It also smoothes out the steps in the current waveform of the passive PFC, valley fill circuit. Although the circuit presents a reasonably good Power Factor (>0.95) and the harmonics can be tamed by the L-C input filter, the major shortcoming of this circuit is the 50% bus ripple voltage which, in a typical ballast circuit, results in a crest factor exceeding 2.1. NOTE: Lamp manufacturers recommend a C.F. = 1.7 max and even that may result in a somewhat reduced lamp life. There are many low cost ballast designs similar to Fig. 4 in production today. Some are driven by selfoscillating drivers such as the IR2153. Others use the familiar current transformer drive, but all have a similar lamp current waveform envelope. A lamp life expectancy <5000 hours is typical of such circuits even when preheating is used during lamp start-up. NOTE: When measuring lamp current in this circuit, both cathode leads pass through the current probe. The lamp filament current is balanced out and only the actual lamp arc current is measured. It is immediately apparent that lamp current is directly proportional to lamp voltage and hence DC bus voltage. Lamp life is shorted not only by the 50% valley fill PFC but by variations in actual AC line voltage. Thus a ballast designed to supply rated lamp power at nominal AC line will have reduced light output at low line and reduced lamp life at high line. What is needed, therefore, is a low cost ballast which maintains constant lamp current over the entire AC line voltage range (line swings of 150VAC-270VAC are not uncommon in some areas of the world) but also has a current sense circuit fast enough to respond to and regulate the 120Hz 50% Valley Fill waveform. + VP= 320V VP/2 0 AC Input IR2155, 2151, 2152, 2153 are all self-oscillating level shifting driver IC’s incorporating an oscillator similar to the ever popular 555 timer IC. + VCC VB RT Ho RT L VS CT C Lo CT + COM IR2153 Current Envelope CF > 2.1 Current Probe pw-fig04.vsd The oscillator uses a timing capacitor and resistor and switches when the capacitor is charged and discharged to voltages of 1/3 VCC and 2/3 VCC. The IR215X control IC’s are all provided with an internal VCC zener clamp at about 15.6 VDC so the actual CT pin switch levels are 5.1 and 10.2V respectively, which means that the timing capacitor is charged and discharged 10.2 - 5.1V or 5.1 volts swing to reach each switching voltage. Fig. 4 - Electronic Ballast without Crest Factor Control Reference to Fig. 4 shows a simple selfoscillating ballast circuit where the switching frequency is determined by the values of RT and CT and given by the equation: f sw = ( 1 1.38C R + 75Ω T T ) Fig. 4 is a fixed frequency application without provisions for lamp filament pre-heating and is consequently not recommended for use in any ballasts where lamp life is a consideration. Pre-heat in fluorescent ballasts can be accomplished by applying a higher than operating frequency to the lamp circuit for a timed period, usually about 1 second and then reducing the frequency towards resonance to permit lamp starting with hot filaments. By adding an AC offset voltage to the timing circuit, the actual voltage change on the timing capacitor is reduced by the magnitude of the offset voltage. Thus with an offset voltage of 3 volts, for example, the capacitor charges and discharges by 5.1-3 = 2.1 volts. It is obvious therefore that a ∆V of 2.1 volts takes less time than a 5.1 volts ∆V. Since RT and VCC are constant, it can readily be seen that the time to reach the switching levels of 5.1 and 10.2 volts is reduced by about 60%, hence the switching frequency must also increase by 60%. It is also apparent that the AC offset voltage is the DC offset bias + 2VF of the IN4148 diodes. NOTE also that as the DC offset bias is changed, the lower end of CT takes on a DC bias but the incremental charge is not affected by this. Voffset VS. Fs IR2153 120000 An oscillator circuit as shown in Fig. 5 has a VCO function when an offset voltage is applied to the timing capacitor. The following explanation of circuit operation will clarify this function. 100000 Fs (Hz) III. THE VCO FUNCTION USING IR215X CONTROL IC’S: 110000 Vcc = 15.5V 90000 Vcc = 9V 80000 70000 VCC + VCC IN4148 RT RT VB 1nF Ho VS CT Lo 10K DC Offset Bias 0.1µµF CT IN4148 + 60000 -0.6V -0.4V -0.2V 0.0V 0.2V 0.4V 0.6V 0.8V 1.0V Voffset IR2153 Vo Fig. 6 - Frequency vs. DC Offset Bias COM COM pw-fig05.vsd Fig. 5 - Frequency Control by Offset Bias Voltage The graphs of Fig. 6 are exponential curves as is the charge on CT when charged through RT from a fixed voltage VCC. Because of this non-linearity, the offset voltage control technique is not suitable for open loop applications which would use a fraction of the rectified bus voltage of Fig. 4 as a control parameter. Of course, since the lamp current is being regulated by this circuit, it is only a short step to substitute a variable current sense resistor to obtain a lamp dimming function which still retains pre-heating but additionally will start and operate at any dimmed setting. However, when used in a closed loop application where the control parameter is lamp current, the nonlinearity becomes a second order variable provided there is sufficient loop gain to swamp out the second order effect. The circuit of Fig. 7 operates over a very broad range of AC input voltage and provides tight regulation of the light output. The 50% valley fill, passive PFC circuit as shown in Fig. 3, is used to provide the positive bus which has a ripple voltage swing of 160V to 330V at twice mains frequency. In terms of temperature stability, the two diodes in the offset circuit tend to reduce the AC offset at high temperature thus slightly reducing the frequency. This shift can be compensated by rectifying the lamp current waveform with a similar diode which tends to increase the DC sense voltage and with it the operating frequency. A small current transformer is used to sense lamp arc current and although this looks complicated referring to Fig. 7 it really is just a single winding toroid with both cathode leads passed through the toroid to form single turn opposing windings. In operation the opposing windings cancel out the filament currents leaving only the arc current as the measured parameter. The toroid itself is a small ferrite core such as those used in transformer driven ballast circuits costing about $0.10. The circuit shown in Fig. 7 shows how this is accomplished and yields a frequency vs. Lamp current control with close to zero temperature coefficient. Using the control technique described above, it is possible to design fluorescent ballasts with power factor >0.95, THD <15% (c.f. Table 1 values), lamp crest factor <1.7 without the additional complexity and cost of an active boost topology PFC circuit and that also accommodates a wide range of AC input voltage since the control parameter is lamp current only. 3 X 1N4007 10DF6 + 1 V CC 2 RT 12K 3 C T IRF820 VB 8 HO 7 47µ µF 250V 22 1W 47 µµ + 250V 0.1 µµ 5+5mH 0.01µ µF 250VAC 0.1 µµ 400V VS 6 LO 5 1N4148 220PF IRF820 1N4007 IRF014 40W 1mH COM 4 0.0q µµ F 630V Polyprop. 150K 1N4148 1N4148 + 230VAC 4 X 1N4007 47 µF µ ++ 16V 1N4007 0.1 µF µ 470 PF 630V 2.7K 22 0.033 µµ F 1N4148 10M Fig. 7 Using Lamp Current Regulation to Implement a 40W ballast with pre-heat, 0.96PF and input Voltage Range from 180 to 280VAC pwdisf09.vsd The secondary winding produces a voltage across a 2.7k resistor proportional to lamp current and this voltage is used as the offset bias to control oscillator frequency as described in Fig. 5. The control circuit time constant is less than 100mS which is fast enough to regulate the current waveform to the instantaneous values of the 50% valley fill voltage. The control loop achieves lamp crest factor control at about 1.6 versus over 2.1 without lamp current regulation. IV. PRE-HEAT: The DC offset bias can also be used to control frequency for pre-heating the lamp. A small N-Channel MOSFET combined with a 1 second time constant R-C circuit provides maximum offset bias i.e. maximum operating frequency during the pre-heat period. As the gate voltage rises above the threshold voltage VTH, the MOSFET slowly turns on and lowers the operating frequency by reducing the offset voltage. During this frequency sweep, the lamp soft starts and the resulting lamp current then controls the offset voltage in a closed loop mode. In order to maximize lamp life, the pre-heating of the lamp filaments must reach 700°C (red heat) at the time of ignition. The time period for pre-heat is typically one second or less which makes it important to transfer the maximum energy in the available time. It would appear that merely raising the filament voltage is the answer but unfortunately this causes an arc current to flow between the filament support wires and some point on the filament coil itself, causing a point on the filament to glow white lot. This is very destructive to the lamp and causes the ends of the lamp to blacken and eventually open circuits one of the filaments at greatly reduced lamp life. During the pre-heat cycle, the filaments area driven at constant current with a rising voltage due to the approximately 4:1 ratio of hot to cold filament resistance. As the frequency ramps down during the ignition period, the hot filaments receive an additional boost in voltage as the circuit approaches resonance. This boost voltage ensures that the filaments reach the required 700°C when ignition occurs. After ignition the lamp circuit behaves as an inductive load. The capacitor current is low during normal operation and the filaments are driven at reduced voltage which maximizes overall efficiency (see Fig. 8). NOTE: Filament temperature is largely maintained by arc current during steady state operation. Steady State 8.5V Rms Pre-Heat Soft Strike 1.25Sec Fig. 8 - Filament Voltage vs. Time In Fig. 8 note that there is no large spike of current when the lamp starts which helps to prolong lamp life. The waveforms of Fig. 9 show an expanded view of the lamp current at the point of ignition and the gradual increase of lamp current up to the steady state condition. Also shown is the regulation of lamp current versus the large 120Hz ripple on the inverter ½ bridge output. Measurements of the steady state lamp current waveform indicate a crest factor < 1.63 where CF = Peak Current Rms Current ≅ 130mA = 1625 . 180mA Crest factors less than 1.7 which is the lamp manufacturers recommended maximum coupled with soft starting as demonstrated in this ballast result in maximum lamp life expectancy. V. OPERATION ON 100-120VAC MAINS: The major problem when operating a ballast on 100120VAC mains is when the lamp voltage is higher than the mains voltage. Some method for boosting the high frequency lamp supply must be used. One such method is to use a step-up transformer at the output but that adds cost. Another method uses the lamp circuit Q factor to boost the voltage at frequencies slightly higher than the resonant frequency. With open loop designs that do not use feedback control, maintaining this operating point is almost impossible. However, when using lamp current regulation at the reduced bus voltages available from 120VAC mains, the operating point can be stabilized, but at low line there may be insufficient circuit Q to maintain reliable operation and the lamp extinguishes. For ballast designs used with lamps requiring a higher operating voltage than the A.C. mains voltage, an active boost PFC circuit must be used. Lamp Current Ramp up to Steady State after Soft Strike (100mA/Div) In general a higher power lamp means a longer arc tube because arc current is constant for lamps of the same tube diameter in a product family. Compact lamps have small diameter tubes and the total arc length is also small. These lamps typically operate in the 80-100 VRMS range and are therefore suitable for use with the valley fill, current control technique operating from 100-120VAC mains. A compact ballast of this type can operate from universal mains inputs from 85VAC to 280VAC using 500 volt MOSFETs, although there is a RDS(on) penalty at the lower input voltages by so doing. It is preferable, therefore, to design for a specific range of inputs say 85 to 130VAC or 180-280VAC. Regardless of the PFC circuit design, active or passive, the regulation of lamp current provides superior lamp operation and therefore longer lamp life. Lamp Current Ramp up to Steady State After Soft Strike (100mA/Div) Fig. 9 - Lamp Current In Fig. 9, note the 50% ripple voltage at the inverter output. Compare this with the upper waveform. Showing lamp current being controlled by frequency sweep as described in this paper. This current waveform yields a lamp crest factor of 1.625.