niessen daniel tesi

niessen daniel tesi
Alma Mater Studiorum - University of Bologna
Department of Electrical, Electronic and Information Engineering - DEI
Ph.D. Course in Electronics Engineering,
Telecommunications and Information Technology
Cycle XXV
Settore concorsuale: 09/E3 - Electronics
Settore scientifico disciplinare: ING-INF/01
Nonlinear Characterization and
Modelling of GaN HEMTs for
Microwave Power Amplifier
Applications
Candidate:
Daniel Niessen
Tutor:
Prof. Fabio Filicori
Supervisor:
Prof. Alberto Santarelli
Ph.D. Course Coordinator:
Prof. Alessandro Vanelli-Coralli
Final Examination Year 2013
Contents
Contents
i
Nomenclature
iv
Introduction
1
1 GaN Technology
3
1.1
GaN properties . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
1.2
Fundamentals of High Electron Mobility Transistors . . . . . . . .
8
1.3
Trapping and dispersive effects . . . . . . . . . . . . . . . . . . . .
11
1.3.1
Kink effect . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
1.3.2
Thermal effects . . . . . . . . . . . . . . . . . . . . . . . .
20
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
2 C-band AlGaN-GaN MMIC HPAs for SAR
27
2.1
Technology and device characterization . . . . . . . . . . . . . . .
28
2.2
Single-stage HPA . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
2.3
Double-stage HPA . . . . . . . . . . . . . . . . . . . . . . . . . .
32
2.4
Thermal issues with power-bar approach . . . . . . . . . . . . . .
36
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
38
3 Nonlinear thermal resistance characterization
41
3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
41
3.2
Nonlinear electrothermal modelling . . . . . . . . . . . . . . . . .
42
3.3
Nonlinear thermal resistance identification . . . . . . . . . . . . .
44
3.4
Validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
3.5
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
i
CONTENTS
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 A new pulsed characterization setup
4.1 Introduction . . . . . . . . . . . . . . . . . .
4.2 Setup description . . . . . . . . . . . . . . .
4.3 Advantages of the new setup . . . . . . . . .
4.4 Post-processing of measured data . . . . . .
4.4.1 Application of calibration correction
4.4.2 Transformation to voltages/currents .
4.4.3 Interpolation . . . . . . . . . . . . .
4.5 Calibration . . . . . . . . . . . . . . . . . .
4.5.1 Relative calibration . . . . . . . . . .
4.5.2 Absolute calibration . . . . . . . . .
4.5.3 Practical considerations . . . . . . .
4.5.4 Calibration verification . . . . . . . .
4.5.5 DC calibration . . . . . . . . . . . .
4.6 Characterization of GaAs HEMTs . . . . . .
4.7 Characterization of GaN HEMTs . . . . . .
4.8 Conclusions . . . . . . . . . . . . . . . . . .
References . . . . . . . . . . . . . . . . . . . . . .
5 Transient response characterization
5.1 Introduction . . . . . . . . . . . . .
5.2 Setup description . . . . . . . . . .
5.3 Verification measurements . . . . .
5.4 Device characterization . . . . . . .
5.5 Transient modelling . . . . . . . . .
5.6 Devices comparison . . . . . . . . .
5.7 Pulsed RF characterization . . . . .
5.8 Conclusions . . . . . . . . . . . . .
References . . . . . . . . . . . . . . . . .
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53
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55
55
57
59
64
65
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69
72
74
76
80
84
85
91
94
96
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101
101
103
105
107
114
118
122
124
126
6 Conclusions
129
6.1 Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
ii
Nomenclature
Acronyms
AF G Arbitrary Function Generator
CAD Computer Aided Design
DC
Direct Current
DSO Digital Storage Oscilloscope
DU T Device Under Test
F ET Field Effect Transistor
F F T Fast Fourier Transform
GaAs Gallium Arsenide
GaN Gallium Nitride
HB
Harmonic Balance
HEM T High Electron Mobility Transistor
IF F T Inverse Fast Fourier Transform
ISS
Impedance Standard Substrate
LDM OS Laterally Diffused Metal Oxide Semiconductor
LSN A Large Signal Network Analyzer
LU T Look Up Table
iii
CONTENTS
N V N A Nonlinear Vector Network Analyzer
OF DM Orthogonal Frequency-Division Multiplexing
PA
Power Amplifier
P AP R Peak-to-Average Power Ratio
pHEM T Pseudomorphic HEMT
RF
Radio Frequency
SOLT Short Open Load Thru
V N A Vector Network Analyzer
W BG Wide Band-Gap
iv
Introduction
Semiconductors technologies are rapidly evolving driven by the need for higher
performance demanded by applications. Thanks to the numerous advantages that
it offers, gallium nitride (GaN) is quickly becoming the technology of reference
in the field of power amplification at high frequency. The RF power density of
AlGaN/GaN HEMTs (High Electron Mobility Transistor) is an order of magnitude
higher than the one of gallium arsenide (GaAs) transistors. The first demonstration
of GaN devices dates back only to 1993. Although over the past few years some
commercial products have started to be available, the development of a new
technology is a long process. The technology of AlGaN/GaN HEMT is not yet
fully mature, some issues related to dispersive phenomena and also to reliability
are still present. Dispersive phenomena, also referred as long-term memory effects,
have a detrimental impact on RF performances and are due both to the presence
of traps in the device structure and to self-heating effects. A better understanding
of these problems is needed to further improve the obtainable performances.
Moreover, new models of devices that take into consideration these effects are
necessary for accurate circuit designs. New characterization techniques are thus
needed both to gain insight into these problems and improve the technology and
to develop more accurate device models.
This thesis presents the research conducted on the development of new characterization and modelling methodologies for GaN-based devices and on the use of
this technology for high frequency power amplifier applications.
The thesis is organized as follows. The properties of gallium nitride, the
fundamental working principles of HEMTs and the advantages that these offer
are introduced in Chapter 1. A review and some examples of the effects related to
traps and self-heating are also presented. In Chapter 2, to show the big potential of
1
Introduction
the technology also compared to GaAs, the design of some GaN-based Monolithic
Microwave Integrated Circuits (MMIC) high power amplifiers is presented with
some considerations on thermal issues. A method for the characterization of the
thermal resistance of devices is explained in Chapter 3. The method involves only
multi-bias small-signal S-parameter and DC I/V measurements at different base
plate temperatures. In Chapter 4, a new pulsed characterization setup is presented.
The post-processing of measurements and the specifically developed calibration
procedure are explained in detail. Results of the pulsed characterization of GaAs
and GaN HEMTs are presented. A different measurement setup developed to
characterize the effects of traps trough transient current measurements is presented
in Chapter 5. Different devices are measured and compared trough the extraction
of a model of the transient. Finally, some results of a pulsed RF characterization are
presented, showing how traps can be an added source of distortion for modulated
signals.
2
Chapter 1
GaN Technology
The development of new semiconductors technologies for power applications at
high frequency has been made necessary by the demand of a continuous increase in
performance of the final stage of power amplifiers. Modern wireless communication
systems, microwave and satellite links, defence and scientific radar and electronic
warfare systems are demanding: high power with high efficiency and linearity at
low cost. These are requirements that are in conflict with each other.
The pervasive deployment of technologies such as WiFi, GSM, UMTS, etc.
with the radio spectrum more and more crowded is in contrast with the need to
have increasingly high throughput. This is driving the definition of new standards
and technologies like LTE and WiMax that in order to ensure a high spectral
efficiency in terms of Bit/sec/Hz use complex modulations based on OFDM.
These modulations that have a high PAPR require a high linearity of the power
amplification stage to avoid distortion (measured in terms of EVM) and spectral
regrowth or spreading (i.e. ACPR) but maintaining a reasonable level of output
power. At the same time energy efficiency is becoming more and more important.
The power amplifier is often the subsystem with the highest power consumption
and its efficiency has a direct impact on battery life in mobile end user terminals
and on the operating cost of base stations.
In the field of very high power at microwave frequency, vacuum tube devices
like Traveling-wave tubes (TWT), Klystron and Magnetron are often still the
only possibility. Replacing these with solid-state devices in applications like
geostationary communication satellites or Radars would bring great advantages of
size and weight.
3
1. GAN TECHNOLOGY
Although a lot of work is being done on the development of new circuit
topologies and techniques for power amplifiers like Dohertry, Envelope Tracking,
Load modulation, advanced operation classes, digital predistortion, etc. ,current
semiconductors technologies like GaAs, SiGe and LDMOS are reaching their limits
and begin to no longer be able to fulfil all the requirements [1].
For a significant step forward a new technology was needed. The requirement
of high power and frequency requires transistors based on semiconductor materials
with both large breakdown voltages and high electron velocity. For this, research
has been focused on wide band-gap materials like GaN and SiC [2]. GaN has
a high electron saturation velocity which allows high frequency operation and
the ability to form heterojunctions that can be used to fabricate High Electron
Mobility Transistors (HEMT). The wide band-gap results in high breakdown
fields and in general in more rugged devices. These properties combined allow
to obtain high electron mobility and carrier concentration with high fields which
results in higher power densities and efficiency at high frequency [3]. Since the
first demonstration in the early nineties of AlGaN/GaN HEMT devices [4], the
technology has seen a continuous improvement in performance that has led in
the last five years to the availability of several commercial products and MMIC
processes. Today GaN HEMTs are a very promising candidate for high power
and efficiency microwave applications from L band of cellular base stations up
to K band for satellite communications and radars but the research trend is
to extend the application of GaN to higher millimeter-wave and even terahertz
frequencies [5].
The technology however is not yet fully mature and some specific problems
are still to be resolved and better understood.
Because of the high RF power density that can be in the order of 10 W/mm and
despite the higher obtainable efficiency, the thermal management is becoming an
important issue. In fact in many cases GaN technology is limited by the difficulty
in heat dissipation rather than by electrical limitations. Reliability of devices is
directly correlated with the operating junction temperature and despite power
densities up to 41 W per millimetre of gate periphery have been demonstrated [6]
today commercial devices and processes are optimized for densities of the order of
5 to 8 W/mm.
The characterization of the thermal resistance and the inclusion of thermal
4
1.1. GaN properties
effects in compact models is much more important for GaN based devices than it
was for GaAs. Moreover, heating and cooling are not instantaneous phenomena
and this could be a source of long-term memory effects and thus distortion that
have to be taken into account.
Another issue that is still affecting the technology is the presence of trap states.
These are due to imperfections in materials and to lattice mismatches at interfaces
of different layers of the device causing defects in the crystal structure. Traps
can capture and emit mobile charge carriers causing in general a degradation of
performances. Similarly to self-heating, trapping and de-trapping are dynamic
processes that can be an added source of distortion for modulated signals. Different
traps can be located in different positions in the device structure with different
effects on performances. In early stages of the development of the technology it
was discovered that adding a passivation on the surface of devices greatly reduces
surface traps. The problem is however not resolved because other traps are present
and their location and effects are not yet fully understood.
Both thermal and trapping phenomena can introduce memory effects and
are considered slow phenomena because the associated time constants are usually much longer than the period of applied RF signals. Because of this, their
effects are called long-term memory effects. In the frequency domain the consequence of these phenomena can be seen as the change of some device parameters
(i.e.transconductance) versus frequency. Effects of thermal and trapping phenomena are thus also called dispersive effects.
1.1
GaN properties
Gallium nitride is a wide band-gap (WBG) semiconductor with an energy gap
between valence and conduction band of Eg = 3.4 eV that allows to operate with
very high electric fields. The breakdown field can be higher than 3 MV/cm [3].
As a consequence, GaN-based devices can be biased at high drain voltages,
usually in the order of 30 V, without incurring in breakdown. The breakdown
voltage depends on the particular device structure but it is higher than 100 V.
Moreover, the high thermal conductivity of 1.3 W/(K cm), allows to operate at
higher temperatures compared to other semiconductors. Another advantage of
GaN is to have a high carrier saturation velocity (2.5 × 107 cm/s) which contributes
5
1. GAN TECHNOLOGY
Wide
band-gap
High
VBD
GaN
High vs
AlGaN/GaN
HEMT
High
Imax
High ns
Low
Ron
High µ
High opertion
temperature
High
frequency
High output
power
High PAE
Figure 1.1: Relations between GaN and HEMT properties and advantages for
applications.
to high current densities. The maximum current Imax is indeed proportional to
qns vs where q is the electron charge, ns is the carrier density and vs the electron
saturation velocity. The high vs allows also a high operation frequency being ft
(current gain cut-off frequency) and fmax (maximum power gain cut-off frequency)
proportional to it. Of fundamental importance is the possibility to realize an
AlGaN/GaN heterostructure which forms a two dimensional electron gas (2DEG)
at the interface. This was first discovered in 1992 by Khan [7]. The 2DEG, which
forms the channel of HEMT devices, has a high carrier density (ns ≈ 1 × 1013 /cm2 )
and a high electron mobility (µ ≈ 1500 − 2000 cm2 /(V s)) [8] that also allow a
high Imax current. The channel on-resistance, being inversely proportional to the
electron mobility, is small with consequent advantages in terms of efficiency. As
a consequence of all these physical properties, AlGaN/GaN HEMTs have high
breakdown voltages, current density, and can work at microwave frequencies with a
good efficiency. Power densities up to 41 W/mm [6] and ft up to 350 GHz [9] have
been demonstrated to date. A discrete AlGaN/GaN HEMT with an output power
of 800 W in pulsed operation at S-band has been reported [10] while commercial
discrete devices rated up to 380 W are available [11]. A schematic representation
of relations between physical and technological properties and advantages for
applications is shown in Fig. 1.1.
In Table 1.1 are reported the most important material properties of GaN and of
competing semiconductors [2]. Gallium nitride is better in almost all parameters.
The low band-gap of GaAs limits the maximum drain voltage to less than 10 V.
At the same output power, a lower voltage means a higher current and being
the dissipated power proportional to RI 2 the overall system efficiency is lower.
6
1.1. GaN properties
Material
Energy gap
(eV)
Si
GaAs
SiC
GaN
1.1
1.4
3
3.4
Electron mobility Breakdown field
Thermal conductivity
Dielectric constant
(W/(K cm))
(cm2 /(V s))
(MV/cm)
1350
5000
400
1500
0.3
0.4
3
3
11.8
12.5
10
9
1.5
0.5
3.5
1.3
Table 1.1: Material properties of microwave semiconductors.
A higher dissipated power means also higher costs and dimensions for cooling
systems. Furthermore, being the drain voltage higher and the current lower, the
optimal load impedance for maximum output power for GaN HEMTs is an order
of magnitude higher than for GaAs devices [12]. The maximum RF power density
of GaAs pHEMTs is in the order of 1 W/mm [13] while for GaN it is in the range
from 5 to 10 W/mm [1]. This means that for same RF output power a GaN
transistor is much smaller with smaller parasitic capacitances. The optimum
impedance is thus easier to match to the system 50 Ω with great advantages in
terms of bandwidth and matching networks losses. In general, all WBG materials
have also a higher resistance to radiation and are well suited for harsh environment
like space [14, 15].
An issue of GaN is the difficulty in realizing high quality bulk single crystal
GaN substrates. This problem was overcome in the late 1990s and early 2000s
when it became possible to grow high quality Silicon Carbide (SiC) substrates on
top of which is then growth the GaN epi-layer [1]. The SiC substrate has a very
high thermal conductivity (∼ 350 W/(m K)) that helps in heat dissipation and
allows a lower junction temperature than the one which would result with other
substrate technologies. Moreover, SiC has a lower lattice mismatch to GaN that
helps in reducing dislocation density in the epy-layer. The GaN on SiC technology
is well suited to realize both discrete devices and Monolithic Microwave Integrated
Circuits (MMIC).
Compared to silicon and LDMOS FET devices, which are currently the technology of choice for the cellular base station industry, gallium nitride has better
performances and allows high-power operation at much higher frequency. The big
advantages of Si are the lower raw cost and the high maturity of the technology.
However, the market share of GaN is increasing and with bigger volumes the
cost should go down becoming competitive. Moreover, in comparing the cost
of different technologies, it should be considered the full advantages that GaN
7
1. GAN TECHNOLOGY
brings at system level. In fact it can be shown [16] that for MMIC high power
density applications, GaN is already advantageous with respect to GaAs also in
terms of cost. To reduce cost it is also possible to realize AlGaN/GaN devices
on Si substrates with some penalties in maximum performances [17]. Si has a
lower thermal conductivity and also a lower electrical resistivity than SiC. A high
substrate resistivity is important to minimize losses in MMIC. The cost advantage
of GaN-on-Si technology is also due to the possibility of realizing 300 mm wafers
while SiC wafers are currently limited to 100 mm. At least one commercial vendor
is already offering GaN-on-Si technology with others moving in this direction.
GaN is not only very good for high power applications. In recent years several
GaN-based low noise amplifiers (LNA) have been reported with noises figures
around 1 dB and covering frequencies from L to X-band [18, 19]. Also other
components like SPDT switches and resistive mixers have been demonstrated [20].
This opens the possibility of realizing fully integrated front-ends in GaN [21, 22].
This is especially attractive for Radar applications like Synthetic Aperture Radars
(SAR) where a high number of Transmit/Receive modules is employed [17].
In Chapter 2 some MMIC power amplifiers, developed as part of the research
activity, will be presented to demonstrate the performances obtainable with the
AlGaN/GaN technology, also compared to GaAs.
1.2
Fundamentals of High Electron Mobility Transistors
Many technologies are available for the realization of high-frequency power amplifiers. In GaAs it is possible to realize Heterojunction Bipolar Transistors
(HBT), Metal Semiconductor Field Effect Transistor (MESFET), HEMTs and
pseudomorphic-HEMTs (pHEMT). In Si we have bipolar junction transistors (Si
BJT), Silicon Metal Oxide Semiconductor Field Effect Transistor (Si MOSFET),
Silicon Laterally Diffused Metal Oxide Semiconductor FET (LDMOS) and SiGe
HBT. Indium Phosphide (InP) HEMTs are used in very high frequency applications. With GaN it is possible to realize HEMT and HBT. The alternatives
are many. Every technology has advantages and disadvantages that need to be
assessed in relation to specifications both in terms of performance and cost. For
many years the main devices used in microwave power applications have been
8
1.2. Fundamentals of High Electron Mobility Transistors
GaAs MESFET, today HEMTs offer superior performance. HEMTs are sometimes
also known as MODFET (Modulation-Doped FET).
The HEMT is a FET transistor based on a heterostructure formed by two
semiconductors with different band-gap. The heterojunction forms a quantum
well in the conduction band which allows a high electron mobility. HEMTs are
usually depletion mode devices where the channel is normally-on and a negative
gate voltage is needed to turn it off. Although less common, enhancement mode
HEMTs are also possible [23].
For GaAs HEMTs, the two semiconductors are usually intrinsic GaAs and
n-doped AlGaAs. In GaN HEMTs the most common heterojunction is formed
by intrinsic GaN and undoped AlGaN. A simplified structure of AlGaAs/GaAs
HEMT is shown in Fig. 1.2 with the corresponding energy band diagram. The
doped AlGaAs has a bigger band-gap and is in contact with the undoped GaAs
which has a smaller energy gap. At the interface the conduction band of GaAs
is lower than the Fermi energy level forming a quantum well with a high carrier
density. Free electrons in the n-doped AlGaAs layer drops into the well forming
the 2DEG. Electrons in the 2DEG move in the undoped GaAs without colliding
with any impurities allowing a high carrier mobility, generally much greater than
can be obtained in bulk semiconductor material. The 2DEG is the channel of
the device and its carrier density depends on the applied gate-source field. Many
optimisations of the heterojunction are possible and adding other layers more
advanced devices like pHEMT and mHEMT are realized.
Gate
Source
Gate
Doped AlGaAs
Doped
AlGaAs
Undoped
GaAs
Drain
2DEG
Undoped GaAs
2DEG
Ec
Ef
Ev
GaAs substrate
Figure 1.2: Basic AlGaAs/GaAs HEMT structure (left) and band diagram (right).
9
1. GAN TECHNOLOGY
Source
Gate
AlGaN
Gate
Drain
2DEG
GaN
AlGaN
GaN
2DEG
Ec
Ef
Ev
SiC substrate
Figure 1.3: Basic AlGaN/GaN HEMT structure (left) and band diagram (right).
AlGaN/GaN HEMTs are realized in a similar way and a simplified structure
is shown in Fig. 1.3 An important difference is that in this case it is possible
to have a 2DEG even when the AlGaN layer is undoped [24]. Moreover, when
the AlGaN layer is doped, the 2DEG carrier density is not proportional to the
doping but to the Al concentration. In AlGaN/GaN HEMTs the origin of the
2DEG is thus different. It has been shown [25] that electrons that form the 2DEG
can result from loosely bond surface electrons and from impurities in the AlGaN
layer. As a consequence of the polar and piezoelectric nature of the AlGaN layer,
during its growth an intense electric field is created with the negative side of
the dipole facing the surface and the positive side facing the interface with GaN.
The high electric field (E ∼ 106 V cm−1 ) causes electrons to drift towards the
heterointerface and to the quantum well forming the 2DEG. As electrons move,
the electric field is reduced until an equilibrium condition is reached. The Al
concentration influences the stress at the AlGaN/GaN interface due to the lattice
mismatch. The polarization and piezoelectric charge density and thus the electric
field in the AlGaN are altered.
In reality, the structure of a GaN HEMT device is often more complex with
additional layers [1]. A resistive AlN nucleation layer is often added between the
SiC substrate and the GaN buffer. The use of another thin AlN interlayer between
the AlGaN barrier and the GaN channel has been demonstrated to reduce the
sheet resistance by increasing the mobility and electron density in the 2DEG.
The growth of epitaxial layers on the substrate can be performed both by Metal
10
1.3. Trapping and dispersive effects
Organic Chemical Vapour Deposition (MOCVD) and Molecular Beam Epitaxy
(MBE) techniques.
The metal electrode contacts are formed directly on the top AlGaN layer.
For the drain and the source are used ohmic contacts as in MESFET. The gate
contact is instead realized with a metal-semiconductor Schottky junction. High
quality contacts with low resistance are important for high frequency and efficiency
operation. A wide variety of combinations of metals and implanting technique
have been studied. Ti/Al/Ni/Au alloys are often employed [12]. Gate contacts
are often realized with a T-shape in order to realize short gate length with low
parasitic resistance [26].
In an AlGaN/GaN HEMT, for Vgs = 0 and Vds = 0, the band diagram is
similar to the one in Fig. 1.3. The 2DEG has a high carrier concentration and the
channel is on. For small value of the Vds drain-source potential, a current starts
to flow between the drain and source ohmic contacts through the 2DEG. Initially
the current is proportional to Vds but as the field increases the saturation electron
velocity is reached with a consequent saturation of Ids . The Vgs potential controls
the 2DEG carrier density: as the gate-source voltage goes negative the electron
density decreases with a reduction of Ids . When the negative pinch-off voltage is
reached the channel is fully depleted and the drain current is zero.
1.3
Trapping and dispersive effects
Despite the excellent performances already demonstrated at microwave frequencies
and the tremendous potential in a variety of applications, the GaN technology still
presents some issues that are not yet fully understood and need more investigation.
In particular, the performances of GaN HEMTs can be limited by dispersion
effects related to the presence of traps. Traps are also involved in the reliability
of devices.
The AlGaN/GaN processing technology is not yet fully mature and the quality
of materials is not perfect. The presence of crystallographic defects or dislocations
and electronic states on the surface of the device, can act as charge trapping
centres that limit the device performance [27]. The parasitic charge, moving in
and out of trap energy states, affects the density of the 2DEG. Trapped carriers
are maintained in these levels during an important lapse of time and cannot take
11
1. GAN TECHNOLOGY
part in the conduction with a direct reduction of the carrier density in the 2DEG.
What is probably more important is that trapped charges, forming a quasi-static
charge distribution on the surface or inside the device, can change the electric
field distribution altering the electric behaviour of the transistor.
Traps can be located at different position in the AlGaN/GaN HEMT structure:
on the surface, in the AlGaN layer, at the heterostructure interface or in the GaN
buffer layer [28,29]. Moreover, some trapping mechanisms are activated only under
certain circumstances, for instance with high fields or after thermal stress. Traps
can thus evolve during the operation of the device [30, 31]. Hot-electron induced
by high electric fields can generate new traps or lattice defects whit negative
impact on the reliability of the device [27, 32].
Different traps can have different effects on performances and on measured
characteristics of devices. These effects include small-signal (i.e. transconductance
and output conductance) frequency dispersion, anomalous IV characteristics (i.e.
kink effect), gate- and drain-lag transients and limited RF output power [28].
For instance, in the early stage of the development of the technology, many
AlGaN/GaN HEMTs showed a much lower RF output power density than expected
from static IV characteristics [33]. This is referred to as DC to RF dispersion or
current collapse and is a trap related phenomenon where both surface and bulk
traps can contribute [3].
In general, traps lead to dynamic IV characteristics that are different from static
one. The capture and emission of charge from trap centres are not instantaneous
phenomena. Time constants associated with different trapping and de-trapping
mechanisms can range widely from nanosecond to minutes [31, 34, 35]. These time
constants are in any case longer than the period of RF signals. The state of traps
is highly dependent on applied voltages and in general with higher fields more
carriers can be trapped. However, being these slow phenomena compared to RF
signals, trapped electrons cannot follow instantaneously the high frequency signal
. Trapping phenomena are thus referred as long-term effects or, viewed in the
frequency domain, as low frequency dispersion.
One form of current collapse due to traps which is commonly observed on
measured static IV characteristics of devices, is the so called kink effect. An
example of this effect will be discussed in Section 1.3.1.
Many characterization techniques have been developed over the years to study
12
1.3. Trapping and dispersive effects
traps and their influences on performances and reliability. Because of the dynamic
behaviour of traps, many methods are based on some sort of pulsed or transient
measurement. Other techniques are based for instance on low-frequency noise
measurements [31, 36] or on electroluminescence (EL) measurements [37].
A widely adopted method to assess the extent of trapping in a device and to
compare different devices or processes is based on a pulsed characterization [36–39].
The device is biased at a quiescent bias point defined by gate and drain bias
voltages (VGB ,VDB ). Gate and drain voltages are then synchronously pulsed to
different amplitudes (V̂G ,V̂D ). For each (V̂G ,V̂D ) combination the resulting drain
current is measured inside the pulses obtaining a pulsed output characteristic of
the device:
P
P
ID
= ID
(VGB , VDB , VG , VD )
(1.1)
Because of the presence of traps and also due to self heating phenomena, pulsed
IV characteristics performed starting from different bias points are in general
different. Indeed, the state of all the traps is dependent on the starting static field
distribution inside the device. To evaluate the amount of trapping and to rule out
self heating effects, three pulsed characteristics are measured for three starting
bias points, each whit a 0 W dissipated power:
A) (VGB , VDB ) = (0, 0): in this case, with no fields inside the device traps can be
considered empty.
B) (VGB , VDB ) = (VGpo , 0): the gate is biased at pinch-off and the G-D and the
G-S junctions are equally reverse biased.
C) (VGB , VDB ) = (VGpo , VDsat ): the gate is biased at pinch-off and the drain in
the saturation region (i.e. VDsat = 15 V). The field in the G-D region is high
being VGD = VGS − VDS .
An example of this type of characterization is schematically shown in Fig. 1.4.
As can be seen, the three characteristics are quite different. For case A, with
almost no trapping in the starting condition, the drain current is the highest. The
reduction of drain current in case B is often attributed to the presence of traps
below the gate. Finally, in case C, due to the high G-D field, electrons can tunnel
from the gate metal and get trapped at the surface between the gate and the drain
13
1. GAN TECHNOLOGY
ID
0
VD
Figure 1.4: Schematic representation of pulsed characteristics of a dispersive
device measured pulsing from three starting bias points (VGB , VDB ) = : A (0, 0)
(black), B (VGpo , 0) (blue) and C (VGpo , VDsat ) (red).
causing a significant reduction of the maximum drain current and an increase of
the channel resistance [30, 34]. This charge distribution on the surface can alter
the intrinsic controlling gate-to-source field. The effective VGS is thus reduced
compared to the externally applied one. This effect is referred to as virtual gate
or backgating. To quantify the effect of traps and to compare different devices
and technologies, it is possible to use a current collapse parameter defined as the
ratio between the drain current measured in case A and the one measured in case
B or C for the same (V̂G ,V̂D ) . This parameter is referred to as slump ratio [32].
In general, the discrepancy between case A and B has been put into relation
with traps located below the gate and in part with traps on the surface between
the gate and the drain. The discrepancy between A and C is instead strongly
correlated with traps on the surface and with traps in the GaN buffer layer.
One assumption of this kind of pulsed characterization is that the used voltage
pulses are shorter than traps and thermal time constants. The state of traps (and
the internal temperature) is thus only defined by the starting bias point and does
not change during the application of pulsed voltages. This assumption might not
be correct as will be shown in Chapter 4. Commonly used pulse lengths are in the
order of hundreds of nanoseconds or few microseconds. Thanks to the development
of a new type of measurement setup for pulsed characterization, we show that in
some circumstances even 50 ns are not short enough to consider the state of traps
defined only by the starting bias point. This is important also because, pulsed IV
characteristics, that are assumed to be dispersion-free, are also widely used as the
14
1.3. Trapping and dispersive effects
basis of some device modelling approaches.
The presence of the current collapse has severely limited the microwave output
power of GaN HEMTs. Fortunately it was discovered that with the adoption of a
SiN surface passivation the current collapse can be effectively reduced [40]. In fact,
for SiN passivated devices, the discrepancy between the pulsed characteristics in
the three cases is also strongly reduced [37]. The passivation helps in limiting the
accumulation of charge on the surface and thus also the backgating effect. The
adoption of field plates, which has been introduced to limit the high field between
the gate and the drain, has been shown to also help in the reduction of current
collapse [3]. These innovations allowed to obtain the outstanding performances
presented in Section 1.1. However, the problem of traps is not yet resolved. As will
be shown in Chapter 4 and Chapter 5, fast traps can alter the dynamic behaviour
of the device, possibly becoming a source of distortion for modulated RF signals.
Moreover, it has been shown that even if a virgin device presents little current
collapse, after device degradation the trapping effect increases and plays thus a
key role in reliability [41].
Other techniques that are commonly employed to evaluate trapping are the
gate-lag and drain-lag measurements [29]. Gate (drain) lag can be defined as the
response of the drain current to a step gate (drain) voltage variation. The current
does not respond instantaneously to the voltage change and presents instead a
slow transient that can be attributed to the presence of traps [42]. Gate-lag
measurements are performed starting from a bias point similar to case C. A step
gate voltage is applied (i.e. VG = 0) and the drain current is measured. Drain
lag is measured in similar way starting from a case A bias point and changing
only the drain voltage. Various variants of these methods have been proposed and
used to study traps in GaN HEMTs [28, 34, 35, 42].
In spite of this, a detailed understanding of traps is still lacking today. While
all trapping effects result in some sort of degradation of performances, the dominant trapping mechanism could vary in devices grown by different methods or
different processing procedures. A wide variety of phenomena have been observed
by different groups with different methods and on different technologies and
explanations are not always consistent. More research effort is needed to better
understand trapping phenomena.
15
1. GAN TECHNOLOGY
Figure 1.5: Schematic representation of sweep sequences for the four static
characterizations.
1.3.1
Kink effect
To show how dispersive phenomena due to traps can affect static IV characteristics,
in this Section an experiment conducted on an AlGaN/GaN HEMT device is
presented. By means of an HP4156 Precision Semiconductor Parameter Analyzer,
static IV characteristics are measured changing the way in which voltages are
swept.
The common way of measuring static IV characteristics of FET-like devices is
to sweep the gate voltage starting from below pinch-off (Vpo ) up to VG = 0 V or
possibly up to a slightly positive gate voltage until the gate-source diode starts to
conduct. For each gate voltage the drain voltage is swept from 0 V up to a safe
maximum voltage VDmax and the drain current ID is measured at every (VGi , VDi ).
In theory changing the order and direction in which voltages are swept should not
have any influence on the obtained ID (VG , VD ) characteristic.
We consider here four cases of the infinite possible (see also Fig. 1.5):
A) Common way:
sweep VG from Vpo up to 0 V
∀VG , sweep VD form 0 V up to VDmax .
B) Reverse VD :
sweep VG from Vpo up to 0 V
∀VG , sweep VD form VDmax down to 0 V.
C) Reverse VG :
sweep VG from 0 V down to Vpo
∀VG , sweep VD form 0 V up to VDmax .
16
1.3. Trapping and dispersive effects
D) Reverse VG and VD :
sweep VG from 0 V down to Vpo
∀VG , sweep VD form VDmax down to 0 V.
An AlGaN/GaN device with gate length of 0.25 µm and width of 400 µm (8 × 50)
has been characterized in these four ways at room temperature. In all cases same
voltages were used: VGmin = −4 V, VGmax = 0 V, in steps of 0.2 V; VDmin = 0 V,
VDmax = 30 V, in steps of 0.5 V.
The static IV characteristic obtained in the common way A is shown in Fig. 1.6.
What is referred to as kink effect or current collapse [33] is clearly observed in the
knee region for drain voltages around 4 V to 7 V with an abrupt increase in drain
current and output conductance. Kink effect in GaN is linked to charge carrier
trapping in deep levels located in the epitaxial layer [43],in the GaN buffer layer
below the gate [44] or in the upper band gap region of the AlGaN barrier [45].
This effect is not eliminated with SiN surface passivation (as in the case of the
measured device) suggesting that surface traps are not involved. These traps have
long time constants associated and the effect is a strong function of the maximum
drain voltage. When carriers are trapped create a negative charge below the gate
which act reducing the effective intrinsic gate to source controlling field and as a
consequence the drain current. This is in fact a backgating effect.
Observing case B, where the drain voltage is swept from high to low voltages,
carriers are trapped at maximum drain voltage but during the sweep to lower
voltages carriers have enough time to be gradually emitted back and the kink
effect is not present. In the A case instead, for a fixed VG , traps are filled sweeping
to higher drain voltages. When VG is then changed and a new sweep in VD
begins, traps are still filled and this is evident in the reduction of the drain current
in the knee region. When a critical drain voltage is reached (e.g. 4 V to 7 V)
traps are then released with an increase of the drain current. This long-term
memory behaviour is even more evident from the characterization in the C case
in Fig. 1.6. The first characteristic for VG = 0 V presents no kink because starting
from (VG = 0, VD = 0) traps are empty. The second curve, for VG = −0.2 V
present instead an evident kink. This is due to the fact that traps were charged
by the high VD reached at the end of the previous sweep for VG = 0 leading to
a reduction of the intrinsic G-S controlling field. Finally, the D case is almost
identical to case B showing that the direction in which the gate voltage is swept
17
Drain Current (mA)
1. GAN TECHNOLOGY
80
80
60
60
40
40
20
20
0
Drain Current (mA)
A
80
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
C
0
80
60
60
40
40
20
20
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
Drain Voltage (V)
0
B
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
D
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
Drain Voltage (V)
Figure 1.6: Static IV characteristics of the same device carried out in the four
different ways.
has not influence when the drain is swept from high to low voltages.
In case A the amount of kink depends also on the maximum drain voltage
reached during the characterization. In Fig. 1.7 are shown two static characteristics
of same device, in one case without any maximum DC power compliance and
in the other with a compliance of 1 W. The drain voltage at which the kink
occurs (VDkink ) can be defined as the VD where a peak in the output conductance
gd occurs. The position of the kink in the two cases is compared in Fig. 1.8
while in Fig. 1.8 is shown the calculated gd at VDkink versus gate voltage. With
a higher gd (VDkink ) is associated a more evident kink in the static characteristic.
When lower maximum VD are reached during the characterization the kink is less
pronounced and is shifted to lower voltages.
The amount and position of the kink is also dependent on the speed of the
voltage sweep. The HP4156 instrument allows to set the sweeping speed in terms of
the time to wait for every imposed (VG ,VD ) before taking the current measurement.
Previous measurements in this Section have been carried out with a 50 ms delay.
Case A has been repeated with two different settings for this delay: 0 s and 1 s.
For the slower sweep more carriers are trapped and this reflects in a higher output
18
Drain Current (mA)
1.3. Trapping and dispersive effects
80
80
60
60
40
40
20
20
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
0
Drain Voltage (V)
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
Drain Voltage (V)
80
3
60
gd (mS)
Drain Current (mA)
Figure 1.7: Static IV characteristics of the same device without (left) and with a
1 W DC power compliance (right). In evidence the VDkink voltage.
40
1
20
0
2
0
1
2
3
4
5
6
7
8
9 10 11 12
Drain Voltage (V)
0
−4 −3.5 −3 −2.5 −2 −1.5 −1 −0.5
0
Gate Voltage (V)
Figure 1.8: Comparison of VDkink (as seen in Fig. 1.7) (left) and output conductance
gd at VDkink (right), for no DC power compliance (blue) and 1 W compliance (red).
19
80
6
60
gd (mS)
Drain Current (mA)
1. GAN TECHNOLOGY
40
2
20
0
4
0
1
2
3
4
5
6
7
8
9 10 11 12
Drain Voltage (V)
0
−4 −3.5 −3 −2.5 −2 −1.5 −1 −0.5
0
Gate Voltage (V)
Figure 1.9: Comparison of VDkink (left) and output conductance gd at VDkink
(right), for no delay (green) and with 1 s delay (black). No power compliance in
both cases.
conductance at the kink voltage VDkink that is also shifted to lower VD as shown
in Fig. 1.9. In fact, whit a pulsed characterization the kink is rarely observed
demonstrating how for this effect slow trapping and detrapping phenomena are
involved.
This proves further how long-term memory effects are affecting also the shape
of DC output characteristics of devices. These traps are strongly dependent on
the peak drain voltage or on the peak drain-source electric field. The static
characteristic of a GaN device it thus dependent on the way it is measured. This
has to be considered carefully if DCIV are used in the extraction of devices models,
in particular the knee region can change significantly.
1.3.2
Thermal effects
Despite GaN allows to operate with higher channel temperatures, the performance
of the device is still dependent on the thermal state. Even with a good efficiency,
a high RF power density means also a high dissipated power. The increase of
channel temperature due to the dissipated power inside the device leads to lower
carrier mobility and saturation velocity with a consequent reduction of the drain
current and thus of the output power [46, 47]. The junction temperature depends
on the ambient temperature, the dissipated power and on the thermal resistance
20
REFERENCES
of the device, i.e.:
Tj = TA + Rθ PDISS
(1.2)
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Moreover, like traps, the change of the internal device temperature is not
instantaneous and has one or more associated time constants. Self-heating/cooling
effects are much slower than the fast varying RF signal, therefore are also considered
dispersive or long-term-memory effects.
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[37] M. Meneghini, N. Ronchi, A. Stocco, G. Meneghesso, U. K. Mishra, Y. Pei,
and E. Zanoni, “Investigation of trapping and hot-electron effects in GaN
HEMTs by means of a combined electrooptical method,” Electron Devices,
IEEE Transactions on, vol. 58, no. 9, pp. 2996–3003, Sep. 2011.
[38] A. Platzker, A. Palevsky, S. Nash, W. Struble, and Y. Tajima, “Characterization of GaAs devices by a versatile pulsed IV measurement system,” in
Microwave Symposium Digest, 1990., IEEE MTT-S International, vol. 3,
May 1990, pp. 1137–1140.
[39] O. Jardel, F. De Groote, C. Charbonniaud, T. Reveyrand, J.-P. Teyssier,
R. Quere, and D. Floriot, “A drain-lag model for AlGaN/GaN power HEMTs,”
in Microwave Symposium, 2007. IEEE/MTT-S International, Jun. 2007, pp.
601–604.
[40] B. Green, K. Chu, E. Chumbes, J. Smart, J. Shealy, and L. F. Eastman,
“The effect of surface passivation on the microwave characteristics of undoped
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[41] J. Joh and J. Del Alamo, “Impact of electrical degradation on trapping
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E. Zanoni, and C. Dua, “Mechanisms of RF current collapse in AlGaN-GaN
high electron mobility transistors,” Device and Materials Reliability, IEEE
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[44] L. Brunel, N. Malbert, A. Curutchet, N. Labat, and B. Lambert, “Kink effect
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on diamond and SiC substrates,” Electron Device Letters, IEEE, vol. 28,
no. 11, pp. 948–950, Nov. 2007.
26
Chapter 2
C-band AlGaN-GaN MMIC
HPAs for SAR
The advantages offered by GaN-on-SiC technology in terms of high power density and efficiency at microwave frequency are becoming attractive, not also for
commercial applications, but even for strategic fields like communication infrastructures, military and space. To give evidence of obtainable performances, also
compared to GaAs technology, in this Section some GaN MMIC high power
amplifiers designed and realized as part of the research activity are described.
This work has been developed in the framework of a project funded by the Italian
Space Agency (ASI) to make an assessment of the performance of GaN technology
for future satellite Synthetic Aperture Radar (SAR) systems. In SAR and in
active electronically scanned array (AESA) antennas, hundreds or thousands of
transmit/receive (T/R) modules are employed. Each module includes at least
HPA, LNA, phase shifter and switches or circulator. A modern T/R module
may require more than ten MMICs integrated on a substrate with other discrete
components. There is a big interest in reducing cost and size of T/R modules
and GaN is a very promising candidate for this type of application [1–3]. The
technology allows to realize compact HPA but also linear and robust LNAs and
mixers whit big advantages. For instance, the circulator and/or the limiter, that
is usually necessary whit GaAs MMIC, could be avoided and more circuits can be
integrated on a single MMIC [4–6].
C-Band MMIC HPAs have been designed exploiting a 0.25 µm gate length
HEMT GaN process on SiC substrate. The HPAs are designed for future SAR
27
2. C-BAND ALGAN-GAN MMIC HPAS FOR SAR
antenna applications. A first single-stage HPA delivers 10 W of output power
at 5.8 GHz with a 50 % Power Added Efficiency (PAE). A double-stage HPA
delivers 16 W output power with PAE over 38 % at 6 dB gain compression within
a 900 MHz bandwidth around 5.75 GHz. Up to 20 W output power and 40 % PAE
are obtained at higher gain compression. A comparison with another amplifier,
differing only for the layout of the devices in the final stage, points out that the
transistor thermal conditions represent the main limitation for this high power
density technology.
2.1
Technology and device characterization
The selected technology is a 0.25 µm gate length HEMT AlGaN-GaN process on
SiC from United Monolithic Semiconductors foundry. The process characteristics
are described in [7], where also long-term reliability data are provided. Static
and pulsed I/V characteristics, S-parameters and load pull measurements were
carried out on device samples in order to select the best device periphery for the
application: an 8 fingers by 125 µm cell was chosen as the best compromise in
terms of output power, PAE, gain and source/load impedances: indeed, larger
peripheries were discarded since they showed a decrease of the PAE. The selected
quiescent bias point is at class AB with VD = 30 V and ID = 80 mA/mm (about
IDSS /6). In Fig. 2.1 the measured (CW) load-pull contours and optima for
maximum output power and PAE are shown. The optimum output impedances
for power (ZP ) and PAE (ZE ) are close to each other, which is useful for the
design. The measured performance of the 1 mm cell, loaded with ZP and ZE , are
also shown in Fig. 2.1. The drain currents at maximum output power are 326 mA
and 285 mA respectively. The small signal gain, almost unchanged for the two
loads, is about 18.5 dB, while maximum power is obtained at 3.4 dB compression.
Performance differences between ZP and ZE are limited and the two loads are
quite similar: hence a good power/PAE compromise has been possible by choosing
an intermediate load between ZP and ZE .
28
2.1. Technology and device characterization
Figure 2.1: Measured load-pull contours for the 8 × 125 µm cell and CW performance for the cell loaded with ZP and ZE .
(a)
(b)
Figure 2.2: Single-stage HPA measured and simulated performances. Compression
characteristic at 5.8 GHz (a) and performance along the bandwidth at 3.5 dB gain
compression (b).
29
2. C-BAND ALGAN-GAN MMIC HPAS FOR SAR
2.2
Single-stage HPA
For a first foundry run a single-stage class AB HPA was designed. The purpose
of this design was to explore the capabilities of the technology and the accuracy
of available models. For this, a simple topology with two devices in parallel was
selected. The schematic and the layout of the HPA are shown in Fig. 2.3. The
two devices used in the circuit are 8 × 125 µm cells that are separated allowing
a better thermal dissipation and limiting self-heating. The single devices are
made unconditionally stable from 300 MHz upwards by a parallel RC stabilization
network directly in series to the gate port. The input and output matching
is realized with lumped components and by the distributed input and output
coupling networks. The two short-circuited stubs are also part of the output
matching and allow to bias the drain of devices. A resistor is added between drain
outputs to suppress eventual differential oscillations.
The MMIC realized by the foundry was mounted on a metallic carrier and
bias pad were bonded to a test jig. The HPA was then characterized in CW
conditions with baseplate at ambient temperature. The measured and simulated
performances versus input power at 5.8 GHz are shown in Fig. 2.2a. The peak
output power is 40 dBm (10 W) with 50 % PAE and 10.5 dB associated gain at
about 3.5 dB gain compression. This performance corresponds to 5 W/mm of RF
power per device periphery at C-band. The measured PAE is higher than the
simulated one. This was expected also from load-pull measurements. The used
foundry model [7] tend to overestimate the DC drain current and thus a lower
P AE = (POUT − PIN )/(VD0 ID0 ) is obtained in simulation. The dynamic drain
current under large-signal operation and in particular its DC component is strongly
affected by the presence of dispersive phenomena due to both thermal effects (e.g.
self-heating) and charge trapping phenomena [8]. Models that take into account
these phenomena are needed for an accurate prediction of the PAE [9, 10]. The
small error (≤ 1 dB) in gain at low source available power was also expected being
the model optimized for large-signal design. In the graph of Fig. 2.2b the HPA
measured performance along the bandwidth with fixed available input power of
29 dBm are given (about 3.5 dB gain compression). Output power exceeds 39 dBm
from 5.2 GHz to at least 6.5 GHz, with an associated gain of 10 dB. In the same
bandwidth the PAE is higher than 45 %.
In Table 2.1 these performances, obtained with GaN HEMTs, are compared
30
2.2. Single-stage HPA
VD
8x125
RFIN
RFOUT
8x125
VD
VG
(a)
(b)
Figure 2.3: Schematic (a) and layout (b) of the single-stage C-band HPA. Circuit
dimensions are 2 × 2 mm.
31
2. C-BAND ALGAN-GAN MMIC HPAS FOR SAR
Ref.
Tech.
Freq.
(GHz)
This work
[11]
GaN
GaAs
5.2–6.5
3.5–4
POUT
(dBm)
PAE
(%)
Gain
(dB)
Area
(mm2 )
Power
density
(W/mm)
40
39
52
35
10.5
16.5
4
13.4
5
0.53
Table 2.1: GaN and GaAs C-band MMIC HPAs comparison.
with a GaAs 8 W, S/C-band MMIC HPA found in literature and presented in [11].
The advantages of GaN technology are evident. In Table 2.1 are reported the
peak POUT , PAE and Gain over the bandwidth. The presented HPA has higher
performances over wider bandwidth. The power density is calculated as the peak
output power divided by the total periphery of transistors of the power stage.
The GaAs HPA has indeed two stages and this explain also its higher gain. With
GaN is obtained an order of magnitude higher power density with much better
efficiency and bandwidth.
2.3
Double-stage HPA
The schematic and a picture of a double-stage HPA are shown in Fig. 2.4. All
the devices used in the circuit are 8 × 125 µm cells. The transistors were made
unconditionally stable from 300 MHz upwards, by synthesizing an RC stabilization
network (RS, CS) directly at the gate port. An extensive use of lumped passive
components was necessary in the matching and bias networks, due to the relative
low operative frequency of approximately 5.5 GHz. RF chokes in the bias networks
are mainly implemented with spiral inductors (LG1,LG2,LD). The exceptions are
the second stage drain bias networks: in this case the use of spiral inductors was
not viable, because of the high current levels. It was also impossible to use λ/4
lines, which is too bulky for this frequency (5.5 mm on SiC substrate). Hence
short-circuited stubs (SB in Fig. 2.4a) were used to feed the bias current: these
stubs are short-circuited near the DC pads with a large MIM capacitor (CB)
connected to ground. At their connection point to the output combining network
(A in Fig. 2.4a), the stubs synthesize a selected impedance, which is part of the
device matching.
For its characterization the HPA was mounted on a test jig as shown in Fig. 2.5.
32
2.3. Double-stage HPA
VG1
VD1
VD2
VG2
CB
RG2
LD
LG2
RG1
LD
L2
RS1
L3
SB
RG2
RDF
C3
RG1
CS1
LG1
A
CS2
C4
CIN
RS2
8x125
L4
8x125
L5
L1
C5
C6
RDF
RDD
COUT
C1
C2
VD1
VG2
VD2
(a)
(b)
Figure 2.4: Schematic (a) and picture (b) of the C-band HPA. Circuit dimensions
are 4.5 × 3.5 mm.
33
2. C-BAND ALGAN-GAN MMIC HPAS FOR SAR
To manage the power dissipation and to control the base plate temperature the
test jig is then mounted on a Peltier cell. The drain voltage was pulsed from
Figure 2.5: MMIC HPA mounted on test jig for characterization.
0 V to 30 V, with fixed gate bias voltage. The pulse width is 100 µs, with a duty
cycle of 30 %. These values represent very long pulses and duty cycle for radar
applications, hence they are severe operating conditions. Shorter pulse width and
duty cycle would reduce the device channel temperature, improving performances.
The HPA pulsed S-parameters are shown in Fig. 2.6 at 30 ◦C base plate.
Figure 2.6: Pulsed S-parameter of the HPA at 30 ◦C base plate.
The HPA linear gain exceeds 25 dB in a 1.6 GHz bandwidth; in that bandwidth
|S11 | ≤ 7 dB and |S22 | ≤ 15 dB. In Fig. 2.7a the large signal characteristic of
the amplifier is shown at 5.4 GHz at 30 ◦C: in this condition the device channel
temperature is below 80 ◦C. The peak power is 20 W with 40 % PAE and 20 dB
34
2.3. Double-stage HPA
(a)
(b)
Figure 2.7: Double-stage HPA compression characteristic at 5.4 GHz (a) and
performance along the bandwidth at 6 dB gain compression (b).
associated gain at about 6 dB gain compression. This peak performance corresponds to 5 W/mm of RF power per device periphery at circuit level. The HPA
operates in class AB, with drain current of the HPA during the pulse of 1.65 A
(480 mA bias). In the graph of Fig. 2.7b the circuit measured performance along
the bandwidth with fixed available input power of 21.5 dBm are given (about
6 dB gain compression). Output power exceeds 42.05 dBm (16 W) from 5 GHz
to 6.2 GHz, with an associated gain over 20 dB. PAE is bigger than 37 % from
5.2 GHz to 6.2 GHz.
To the authors knowledge these performances represent the state of the art for
GaN MMIC HPA for this application. Indeed, while several examples of C-band
GaN hybrid HPAs are described in the literature, it was not possible to find
information about published C-Band MMIC HPA for T/R module space SAR
application. On the contrary, some example of GaN MMIC HPAs can be found
at present for X-band SAR application. A few examples of GaN MMIC HPAs
covering C band are the ones in [12,13] and [14], but these circuits address different
applications with broader bandwidth, making a direct comparison unfeasible. The
obtained performances of the double-stage HPA are compared in Table 2.2 with
published C-band MMIC HPAs for this type of application. The different GaAs
based technologies representing up to now the typical solution for this application
were considered. The proposed GaN design features clear advantages in terms
of power density and physical dimensions. It is worth to notice that also the
pulse width and duty cycle conditions are important parameters to be taken into
account when comparing the different circuits.
35
2. C-BAND ALGAN-GAN MMIC HPAS FOR SAR
Ref.
This work
[15]
[16]
[17]
[18]
[19]
Technology
Freq.
(GHz)
POUT
(dBm)
PAE
(%)
Gain
(dB)
Area
(mm2 )
GaN HEMT
GaAs HBT
GaAs pHEMT
GaAs pHEMT
GaAs pHMET
GaAs HBT
5.2–6.2
4.7–6
4.9–6.1
5.2–5.6
5–6
5–6
42.1–43
41.8–42.4
44.3–44.9
42–42.2
38.5–39
39–40
37–41
31–41
30–35
45–50
35
45–50
20
18
16.5
21
18
21
15.75
60
27.23
25.3
15.23
37.34
Power
Pulse/duty
density
(µs/%)
(W/mm)
5
2.17
1.29
0.67
0.75
2.6
100/30
100/10
20/2
25/10
10/25
CW
Table 2.2: C-band MMIC HPAs for Radar Applications
2.4
Thermal issues with power-bar approach
A second version of the double-stage HPA was designed (namely HPA2, while
the first version will be referred to as HPA1) in order to explore the performance
and issues of a more compact topology solution. HPA2 is totally similar to
HPA1, but it employs a power-bar topology in the final stage. The difference is
visible in Fig. 2.8: in the power-bar the devices are packed together in a smaller
area (0.73 mm2 vs 1.03 mm2 ), sharing the via holes connecting their sources to
ground. This space saving (−29 %) would be necessary in the design of an HPA
with eight HEMTs in the final stage for higher output power. Small differences
in the combining networks of the two HPAs do not compromise the following
comparisons, since their losses are practically identical. Performances of the HPAs
at peak output power are listed in Table 2.3.
The devices of HPA1 have more chip area to dissipate power, leading to a
lower operating temperature. For this reason HPA1 delivers more power with
better PAE. These thermal effects prove to be particularly critical when dealing
with GaN on SiC, due to the nonlinear thermal behaviour versus the dissipated
power as observed for example in [20]. Measured DC power consumptions of driver
stages PDCD are almost identical (HPA1: 7.83 W, HPA2: 7.97 W) indicating that
the drivers operate in very similar conditions. Measured DC power consumption
HPA1
HPA2
POUT
(W)
PAE
(%)
20
17.5
40
34
Gain PDCFS
(dB) (W)
PDFS
(W)
20.2
16.3
18.22
22.09
40.02
42.49
PDA
PDD
PDCD
2
(W/mm) (W/mm ) (W)
4.56
5.52
17.7
30.26
Table 2.3: HPA Pulsed performances at Peak Output Power.
36
7.83
7.97
2.4. Thermal issues with power-bar approach
Figure 2.8: Final stage configuration and occupied area: HPA1 spaced devices
(top), HPA2 power-bar topology (bottom).
PDCFS and estimated dissipated power PDFS of transistors in the final stage are
also shown in Table 2.2. In particular, the latter is calculated as:
PDFS = PDCFS + PINFS − (POUT + PLOSS )
(2.1)
where PINFS (RF power at the input of the final stage) and PLOSS (losses in the
output combiner) are simulated values. Simulations of PLOSS are supported by
measurements on separate cut-out passive structures and PINFS is simulated very
similar for the two HPAs. As shown in Table 2.3, lower peak output power is
obtained from HPA2 (−12.5 %) at higher DC power consumption (lower PAE).
Thus the topology of HPA2 leads to higher power dissipated per mm of active
periphery PDD (+21 %) as well as higher power dissipated per mm2 of chip area
PDA (+71 %), which is a really noticeable result. According to our analysis, such a
large difference in PDA is mainly due to nonlinearity effects of the thermal resistance
Rθ with the dissipated power [20], causing a detrimental thermal feedback in
the compact topology. A verification of the proposed analysis was performed by
measuring the HPAs with 1 µs pulse width and 1 % duty cycle: in those conditions,
where the thermal effect is negligible, the difference in the HPAs output power
falls to −1 %, validating the proposed considerations. These results confirm the
37
REFERENCES
influence of thermal budgeting in the exploitation of the GaN technology and they
remind the need of nonlinear models for the accurate Rθ prediction to optimize
the circuit performance at design level, while keeping reliable channel temperature
operation. In this work the electrical models provided by the foundry [7] have
been used for the determination of the device large-signal operating point, while
in-house thermal impedance measurements [21] were exploited for the computation
of the operating channel temperature.
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40
Chapter 3
Nonlinear thermal resistance
characterization
3.1
Introduction
GaN-based technology nowadays offers interesting features for the implementation
of microwave integrated circuits in terms of high power densities, high temperature
operation, energetic efficiency and ease of matching network design as shown in
Chapter 2. However, thermal management at transistor, circuit and system level
is one of the most important issues, which still require reliable solutions. Full
electrothermal models of transistor are needed in this context. They should be
able to provide accurate predictions of the electrical device behaviour depending
on the base plate temperature and the instantaneous dissipated power in the
device active area, also in order to guarantee thermally safe operating conditions
for the device. To this aim suitable methods for the numerical computation or
empirical characterization of the device thermal resistance (or, more in general,
impedance, when pulsed operation is involved like in radars) are needed. Some
approaches (e.g. [1, 2]) are based on channel temperature measurements using
different direct sensing techniques, which however require special equipment
and, in many cases, can be applied only with special-purpose, thermal-analysisoriented device structures and geometries. Other techniques are based on more
conventional electrical measurement techniques like, for instance, using the intrinsic
temperature dependence of the on-state gate junction I-V characteristic as a builtin temperature sensor (e.g. [3]). These have the advantage of not requiring
41
3. NONLINEAR THERMAL RESISTANCE CHARACTERIZATION
special-purpose measurement equipment or device structures and have already
been used for GaAs FET thermal characterization. These methods, however, have
not yet been fully validated in the case of GaN HEMTs, where some problems
may arise, owing to specific features of GaN technology (e.g. particular gate
junction characteristics, strong influence of the temperature dependence of the
source/drain parasitic resistors).
In this Chapter a different approach for the characterization of the nonlinear
(i.e. temperature/power dependent) thermal resistance of GaN devices is presented.
This method only requires conventional static drain current measurements at
different base plate temperatures and small-signal S-parameter measurements,
carried out at a frequency well above the upper cut-off of low- frequency dispersion
over a set of different biases in the current saturated region. This approach consists
of using the low-frequency dispersive effect on the drain current due to self-heating
phenomena as the sensing parameter of the channel temperature changes deriving
from dissipated power variations.
Since GaN FETs are also affected by charge-trapping (which are additional
dispersive phenomena), in order to correctly extract the thermal resistance parameters by best-fitting the measured data, the thermal resistance description is
embedded in a full electro-thermal model, where also low-frequency drain current
dispersion due to traps is taken into account. This does not only allow for the
correct identification of the self-heating dispersion and consequently of the thermal
resistance, but has also the advantage of leading to an intrinsically coherent, compact electro-thermal model. As GaN devices are capable of operating at relatively
high temperatures with high power densities, non-linearity of heat-conduction phenomena is taken into account by considering in our thermal model a second-order
dependence of the channel temperature on the dissipated power.
3.2
Nonlinear electrothermal modelling
We consider now the problem of characterizing the nonlinear electrothermal
behaviour of an on-wafer device sample. In particular, the following description
of the thermal resistance is assumed:
∗
Rθ [P, θB ] = Rθ0 + RθP P + RθB (θB − θB
)
42
(3.1)
3.2. Nonlinear electrothermal modelling
Figure 3.1: Intrinsic device description used for thermal resistance extraction.
where P is the dissipated power within the device; thetaB is the base plate
∗
temperature; θB
is a reference base plate temperature; Rθ0 is the thermal resistance
∗
value at θB and ideally zero dissipated power, while RθP and RθB are the thermal
resistance sensitivities with respect to power and base plate temperature variations.
The proposed method allows to characterize the three coefficients Rθ0 , RθP
and RθB on the basis of small-signal parameters and static I/V characteristics at
two different base plate temperatures. To this aim, we consider the model sketched
in Fig. 3.1. Extrinsic parasitic elements are thought as already de-embedded and
displacement current contributions are not considered here. Indeed, the model
is intended for describing only the purely resistive part of the dynamic device
behaviour, since displacement currents can be separately taken into account by
means of a parallel capacitive 2-port network.
The dynamic drain current is described here by means of:
∗
iD (t) = FDC
[vG (t) + ∆vG (t), vD (t)]
(3.2)
∗
where FDC
[ ] is the static I/V characteristic measured by keeping constant the
∗
base plate temperature at the reference value θB
. This characteristic is controlled
by an equivalent intrinsic gate voltage: ṽG = vG + ∆vG and the intrinsic drain
voltage vD . The equivalent gate voltage deviation ∆vG is defined by:
∆vG = αG (vG (t) − VG0 ) + αD (vD (t) − VD0 ) + αθ [vG ](θ0 − θS∗ (t))
(3.3)
where αG , αD are model parameters; αθ [ ] is a model function; VG0 , VD0 are the
average values of the instantaneous gate and drain voltages vG , vD ; θ0 is the
actual channel temperature in dynamic operation (thought as averaged along the
channel) and θS∗ at the generic time t is the channel temperature that would be
43
3. NONLINEAR THERMAL RESISTANCE CHARACTERIZATION
observed under stationary operation in the presence of VG = vG (t), VD = vD (t)
∗
and with the base plate temperature at the reference value θB
.
The three terms introduced in the gate voltage deviation (3.3) explain the
∗
differences between the actual dynamic current iD (t) and FDC
[vG (t), vD (t)] in
terms of different statuses of traps (two terms corresponding to gate and drain lag
effects) and different channel temperatures. Gate and drain lags are here treated
in a simplified way as linearly dependent on the gate and drain purely-alternate
voltage components vG (t)−VG0 and vD (t)−VD0 through the two scalar coefficients
αG and αD [4]. This has been considered sufficient for the purpose of thermal
resistance characterization and for a simplified electrothermal modelling approach
within the scope of this work.
The third term in (3.3) refers to a thermal correction. It can be further
developed by considering that:
θ0 = θB + Rθ [P0 , θB ]P0
(3.4)
∗
∗ ∗
θS∗ (t) = θB
+ Rθ [p∗S (t), θB
]pS (t)
(3.5)
where P0 represents the averaged dissipated power in a generic dynamic regime
and p∗S (t) is the power that would be dissipated under stationary operation in the
∗
presence of VG = vG (t), VD = vD (t) and with θB = θB
:
∗
p∗S (t) = vD (t)FDC
[vG (t), vD (t)]
3.3
(3.6)
Nonlinear thermal resistance identification
The electrothermal model (3.2)-(3.6) is used in this section for the identification
of the nonlinear thermal resistance (3.1) of a GaN HEMT with L = 0.25 µm and
a total periphery of 600 µm.
∗
The static I/V characteristic FDC
[ ] is measured on-wafer at the reference base
∗
◦
plate temperature θB = 36 C and is shown in Fig. 3.2.
The thermal resistance identification procedure consists of two steps.
∗
In the first step, the base plate temperature is held at the reference value θB
and multi-bias S-parameters are measured at a frequency low enough to neglect
44
3.3. Nonlinear thermal resistance identification
Figure 3.2: GaN HEMT (L = 0.25 µm, W = 600 µm): static I/V characteristic
∗
at the reference base plate temperature θB
= 36 ◦C; −3.5 V < VG < 0.5 V (step
0.25 V). Model predictions (red lines) coincide with measurements (circles) at
∗
θB = θB
since ∆vG = 0 under static operation.
reactive effects in the transistor, but high enough to be greater than the upper
cut-off frequency of dispersive phenomena due to traps and thermal effects. In
our experiment a frequency about hundreds of MHz has been chosen, in a range
where the trans- and output conductance of the transistor (i.e. the real parts of
admittance parameters Y21 and Y22 ) are almost independent of frequency.
The S-parameters are measured at the same base plate temperature used for
∗
the static characterization: θB = θB
. In this small signal condition the dissipated
power is defined by the bias point (P0 = VD0 × ID0 ) and is obviously the same
dissipated power of the reference static I/V in the same bias point:
∗
P0 = P0∗ = VD0 FDC
[VG0 , VD0 ]
(3.7)
In this condition the term θ0 − θS∗ (t) of (3.3) can be rewritten using (3.4) and
(3.5) as:
∗
∗ ∗
θ0 − θS∗ (t) =θB + Rθ [P0 , θB ]P0 − θB
− Rθ [p∗S (t), θB
]pS (t)
∗
∗
∗
∗ ∗
=θB
+ Rθ [P0∗ , θB
]P0∗ − θB
− Rθ [p∗S (t), θB
]pS (t)
∗
∗ ∗
]P0∗ − Rθ [p∗S (t), θB
]pS (t)
=Rθ [P0∗ , θB
(3.8)
p∗S (t) , the power that would be dissipated instant by instant under stationary
operation in the presence of VG = vG (t), VD = vD (t), can be further decomposed
45
3. NONLINEAR THERMAL RESISTANCE CHARACTERIZATION
in a time independent and in a time dependent term:
p∗S (t) = P0∗ + p∗Sa (t)
(3.9)
Continuing from equation (3.8) and using (3.9) and the definition of Rθ (3.1) we
can write
θ0 −θS∗ (t) =
= (Rθ0 + RθP P0∗ )P0∗ − [Rθ0 + RθP (P0∗ + p∗Sa (t))](P0∗ + p∗Sa (t))
= −Rθ0 p∗Sa (t) − 2RθP P0∗ p∗Sa (t) − RθP (p∗Sa (t))2
(3.10)
In the small signal condition considered here, the quantity (p∗Sa (t))2 is infinitesimal
and the last term of (3.10) can be neglected leading to:
θ0 − θS∗ (t) = −(Rθ0 p∗Sa (t) + 2RθP P0∗ p∗Sa (t))
= (Rθ0 + 2RθP P0∗ )(P0∗ − p∗S (t))
(3.11)
Consequently, in this case, the last term of the equivalent gate voltage deviation
(3.3) becomes
αθ [vG ](Rθ0 + 2RθP P0∗ )(P0∗ − p∗S (t))
(3.12)
The model function αθ [vG ] can be expanded in series around the bias gate voltage
VG0 :
dαθ d2 αθ αθ [vG ] = αθ [VG0 ] +
(vG − VG0 ) + 2 (vG − VG0 )2 + · · · (3.13)
dvG VG0
d vG VG0
and in substituting (3.13) into (3.12) all terms apart the first one can be neglected
being infinitesimal quantities that multiply the infinitesimal quantity (P0∗ − p∗S (t)).
Eventually the gate voltage deviation (3.3) can be rewritten as:
∆vG =αG (vG (t) − VG0 ) +
αD (vD (t) − VD0 ) +
αP [VG0 , P0∗ ](P0∗ − p∗S (t))
46
(3.14)
3.3. Nonlinear thermal resistance identification
Figure 3.3: GaN HEMT (L = 0.25 µm, W = 600 µm): measurements (circles) and
predictions (line) of the intrinsic trans- and output conductance versus VG0 at
VD0 = 14 V and 250 MHz.
where
αP [VG0 , P0∗ ] = αθ [VG0 ](Rθ0 + 2RθP P0∗ )
(3.15)
By assuming for αθ [VG0 ] a linear approximation versus VG0 of the form
αθ [VG0 ] = αθ0 + αθ1 VG0
(3.16)
equation (3.15) can be expressed as
αP [VG0 , P0∗ ] = (αθ0 Rθ0 ) + (2αθ0 RθP )P0∗ + (αθ1 Rθ0 )VG0 + (2αθ1 RθP )P0∗ VG0
= αP0 + αP1 P0∗ + αP2 VG0 + αP3 P0∗ VG0
(3.17)
where αP0 , αP1 , αP2 and αP3 are four coefficients to be identified in addition to
αG and αD . These are determined by fitting the measured trans-conductance and
output conductance in a bias range within the saturation region of the transistor
(10 V < VD0 < 18 V, IDSS /8 < ID0 < IDSS ) with the model defined by (3.2), (3.14)
and (3.17). The good approximation obtained for the multi-bias intrinsic transand output conductances is shown in Fig. 3.3.
The second step of the procedure consists in changing the base plate temperature to a different value (we used θB = 90 ◦C in our experiment) and measuring
the static I/V characteristic FDC [VG0 , VD0 ] in this new thermal condition. The
∗
difference between this static DC characteristic and the reference FDC
[ ] is point
47
3. NONLINEAR THERMAL RESISTANCE CHARACTERIZATION
by point only due to a different thermal state. Being the purely-alternate voltage
∗
components equal to zero, under DC operation at θB =
6 θB
to reproduce the new
characteristic from the reference one, the gate voltage deviation (3.3) reduces to:
∆VG = αθ [VG0 ] θ0 − θS∗ (t)
(3.18)
by substituting the definition of θ0 (3.4), θS∗ (t) (3.5) and then of Rθ (3.1) and by
∗
noting that in static conditions θS∗ (t) = P0∗ = VD0 FDC
[VG0 , VD0 ] (3.9) we obtain:
h
∗
∆VG = αθ [VG0 ] θB + Rθ0 + RθP P0 + RθB (θB − θB
) P0
∗ i
∗
∗
− θB + Rθ0 + RθP P0 P0
∗
= αθ [VG0 ](1 + RθB P0 )(θB − θB
)
+ αθ [VG0 ] Rθ0 + RθP (P0 + P0∗ ) (P0 − P0∗ )
(3.19)
where P0 = VD0 FDC [VG0 , VD0 ]. By defining now ∆P = P0∗ − P0 which is the
dissipated power variation due to the change of the base plate temperature, the
second term of (3.19) can be written as:
αθ [VG0 ] Rθ0 + 2RθP P0∗ + RθP ∆P ∆P
(3.20)
where we can neglect the second order infinitesimal term ∆P 2 .
The gate voltage variation (3.18) can thus be written as:
∗
∆VG = αθ [VG0 ](1 + RθB P0 )(θB − θB
)
+ αP [VG0 , P0∗ ](P0 − P0∗ )
(3.21)
where the function αP [VG0 , P0∗ ] is still defined as in (3.15) and must coincide with
it since, in spite of the different operative regimes considered, it describes the
same self-heating phenomenon. Since αP [ ] has been already determined during
the first step, the second term in (3.21) is completely known at each choice of
VG0 , VD0 . Thus (3.21) can be effectively used in order to distinguish the effects
due to the base plate temperature change from self-heating on the corresponding
total change in the internal channel temperature. In particular, we consider a set
of biases sharing a single value of the gate voltage VG0 giving a wide open channel
operation (for instance operation at about IDSS ) and different drain voltages VD0
48
3.4. Validation
Rθ0 (◦C W−1 )
RθP (◦C W−2 ) RθB (W−1 )
14.3
1.10
0.12
Table 3.1: GaN HEMT (L = 0.25 µm, W = 600 µm): extracted thermal coefficients.
(corresponding to different dissipated powers P0 and P0∗ ). Fitting the static current
FDC [VG0 , VD0 ] on this set of bias conditions easily lead to the determination of
the αθ [VG0 ] value and of the thermal resistance sensitivity RθB to base plate
temperature variations.
Finally, by taking (3.15) and (3.17) into account we obtain an estimation of the
remaining coefficients defining the nonlinear thermal resistance in (3.1), namely
Rθ0 and the sensitivity RθP to dissipated power variations:
Rθ0 =
αP0 + αP2 VG0
αθ [VG0 ]
(3.22)
RθP =
αP1 + αP3 VG0
2αθ [VG0 ]
(3.23)
In order to obtain maximally consistent parameters, the DC current fitting can
be possibly repeated at different values of VG0 and the Rθ0 , RθB , RθP coefficients
chosen after solving an over-determined set of equations. Extracted values are
reported in Table 3.1.
The corresponding thermal resistance versus dissipated power is also plotted
in Fig. 3.4, for different base plate temperatures.
3.4
Validation
As a validation example, the analytical method proposed in [5–7] for the extraction
of a constant thermal resistance has been applied to the case of the GaN HEMT
under investigation. Thermal resistance predictions according to [5] versus typical
values of the thermal conductivity of the SiC substrate (which is a temperature
dependent quantity) are shown in Fig. 3.5. These values are substantially in
agreement with those obtained with the coefficients in Table 3.1 for typical powers
49
3. NONLINEAR THERMAL RESISTANCE CHARACTERIZATION
Figure 3.4: GaN HEMT (L = 0.25 µm, W = 600 µm): thermal resistance Rθ [P, θB ]
versus dissipated power P at three different base plate temperatures θB .
Figure 3.5: Thermal resistance simulated through the analytical method proposed
in [5].
50
3.4. Validation
and base plate temperatures.
As far as the two thermal resistance sensitivities RθB , RθP are concerned,
these also seem in a reasonable agreement with literature data. For instance,
data reported in [8] for thermal resistance sensitivities of GaN HEMTs over SiC
substrates are comparable with those reported in Table 3.1. In fact, evaluation
from graphics shown in [8], after appropriate scaling of the device periphery, leads
to about 0.8 ◦C W−2 for RθP and 0.08 W−1 for RθB .
In order to complete the electrothermal model identification, the αθ [ ] function
has to be identified over the whole set of gate voltages. To this aim, after
the determination of the thermal resistance, further fitting of the static I/V
∗
characteristic FDC [VG0 , VD0 ] at θB =
6 θB
in the saturation region through (3.21),
leads to the complete identification of the αθ [ ] function. Prediction of the static I/V
characteristic at 60 ◦C (along with the static I/V at 90 ◦C used for identification)
is shown in Fig. 3.6, confirming the accuracy of the thermal resistance extraction.
(a)
(b)
Figure 3.6: GaN HEMT (L = 0.25 µm, W = 600 µm): predicted static I/V
characteristic (red lines) compared with measurements (circles) at two base plate
temperatures: 90 ◦C (used for the thermal resistance identification - a) and 60 ◦C
(b); −3.5 V < VG < 0.5 V (step 0.25 V).
An interesting possibility offered by the proposed electro-thermal model is to
provide a simple way to simulate isothermal static characteristics, possibly useful
in other device modelling approaches (e.g. [9]). This can be easily carried out by
simulating the DC characteristics with the model (3.2)-(3.3), where the channel
temperature θ0 is held constant. For instance, the iso-thermal I/V characteristic at
51
3. NONLINEAR THERMAL RESISTANCE CHARACTERIZATION
∗
θ0 = 136 ◦C (corresponding to θB = θB
= 36 ◦C and the self-heating at VD0 = 30 V
and ID = IDSS /2) is shown in Fig. 3.7.
Figure 3.7: GaN HEMT (L = 0.25 µm, W = 600 µm): isothermal static I/V
characteristic provided by the proposed model at channel temperature θ0 = 136 ◦C
∗
(θB = θB
= 36 ◦C and dissipated power about 5 W); −3.5 V < VG < 0.5 V (step
0.25 V).
Experimental large signal validation of the whole electrothermal modelling
approach is provided in Fig. 3.8, where the main device performance under classAB, X-band (10 GHz) operation is shown. To this aim, a purely quasi-static model
of the displacement current components [9] has been added in parallel to the
circuit schematic shown in Fig. 3.1. The measurements on the GaN HEMT are
carried out with a load-pull setup with source and load impedances for maximum
output power.
3.5
Conclusions
In this Chapter, a non-invasive method for compact electrothermal modeling
and nonlinear thermal resistance extraction of AlGaN/GaN FETs has been
proposed. The method involves only multi-bias small-signal S-parameter and DC
I/V measurements at different base plate temperatures and it does neither require
special-purpose device geometries/structures nor measurements in the conduction
region of the gate junction. The extracted values compare well with measured
electrothermal data and analogous parameters obtained with other methods taken
from the literature. Large-signal validation in X-band has been also provided
52
REFERENCES
(b)
(a)
Figure 3.8: GaN HEMT (L = 0.25 µm, W = 600 µm): transducer gain, output
power (a), PAE and average drain current (b), measured with load-pull setup
(circles) and predicted by the electro-thermal model (lines) at 10 GHz. Power
amplifier operation in class-AB (ID = IDSS /6, VD0 = 35 V) with source and load
impedances for maximum output power.
after embedding the proposed thermal resistance description into an RF nonlinear
device model.
References
[1] J. Park, M. W. Shin, and C. Lee, “Thermal modeling and measurement of
AlGaN-GaN HFETs built on sapphire and SiC substrates,” Electron Devices,
IEEE Transactions on, vol. 51, no. 11, pp. 1753–1759, Nov. 2004.
[2] R. Aubry, C. Dua, J.-C. Jacquet, F. Lemaire, P. Galtier, B. Dessertenne,
Y. Cordier, M.-A. DiForte-Poisson, and S. L. Delage, “Temperature measurement in algan/gan high-electron-mobility transistors using micro-raman
scattering spectroscopy,” Eur. Phys. J. Appl. Phys., vol. 30, pp. 77–82, 2005.
[3] I. Angelov and C. Karnfelt, “Direct extraction techniques for thermal resistance
of MESFET and HEMT devices,” in Radio Frequency Integrated Circuits
(RFIC) Symposium, 2007 IEEE, Jun. 2007, pp. 351–354.
[4] A. Santarelli, F. Filicori, G. Vannini, and P. Rinaldi, “Backgating model
including self-heating for low-frequency dispersive effects in III-V FETs,”
Electronics Letters, vol. 34, no. 20, pp. 1974–1976, Oct. 1998.
53
REFERENCES
[5] A. Darwish, A. Bayba, and H. Hung, “Thermal resistance calculation of
AlGaN-GaN devices,” Microwave Theory and Techniques, IEEE Transactions
on, vol. 52, no. 11, pp. 2611–2620, Nov. 2004.
[6] W.-Y. Yin, “Comments on ”thermal resistance calculation of AlGaN-GaN
devices”,” Microwave Theory and Techniques, IEEE Transactions on, vol. 53,
no. 9, pp. 3051–3052, Sep. 2005.
[7] A. Darwish, A. Bayba, and H. Hung, “Authors’ reply [to comments on ’thermal resistance calculation of AlGaN-GaN devices’],” Microwave Theory and
Techniques, IEEE Transactions on, vol. 53, no. 9, pp. 3052–3053, Sep. 2005.
[8] A. Conway, P. Asbeck, J. Moon, and M. Micovic, “Accurate thermal analysis
of GaN HFETs,” Solid-State Electronics, vol. 52, no. 5, pp. 637–643, 2008.
[9] A. Santarelli and V. Di Giacomo, “Empirical modeling of GaN FETs for
nonlinear microwave circuit applications,” in Microwave Symposium Digest
(MTT), 2010 IEEE MTT-S International, May 2010, pp. 1198–1201.
54
Chapter 4
A new pulsed characterization
setup
4.1
Introduction
Many approaches have been presented in the scientific literature dealing with
compact models of FETs based on pulsed drain current versus voltage (pulsed IV)
characteristics (e.g. [1–5]). This kind of curves is obtained through low-duty-cycle
narrow-width pulsed periodic gate and drain excitations, so that every measured
IV curve sample ideally corresponds to a fixed channel temperature operation
and to a frozen-like state of trapped charges (e.g. [6–14]). Although this kind
of characterization seems to work well in association with GaAs technologies,
some doubts have raised when considering GaN based transistors, due to specific
properties of charge trapping dynamics in GaN on SiC devices [15, 16]. Due
to this reason, some nonlinear models have been proposed, which avoid the use
of pulsed I/V curves but nevertheless take into account dispersive phenomena
(e.g.: [17]). Low-frequency source/load-pull methods represent another viable
alternative [18]. However, pulsed characterization is undoubtedly suited for I/V
curve tracing also due to its dynamic isothermal nature. For this reason, it is
worth to further investigate how and if the associated limitations can be overcome.
In order to obtain a iso-dynamic IV device characteristic it is important to use
pulses that are shorter than the time constants associated with dispersive phenomena. Conventional setups [6–9] which essentially are based on pulsed voltage
generators with an ideally zero output impedance are limited to a pulse length
55
4. A NEW PULSED CHARACTERIZATION SETUP
of about 200 ns. To overcome these limitations here is proposed and described
in detail a new pulsed characterization setup that relies on 50 Ω pulser and a
digital storage oscilloscope (DSO). Furthermore, it is possible to fully calibrate the
setup in order to obtain devices characteristic directly at the DUT ports. Another
advantage is the possibility to obtain the complete time domain waveform of the
pulsed voltages and currents while with commercial systems only the final output
IV characteristic is obtained. This hides many details that could be relevant
and important for the understanding of long term memory phenomena. This
setup, first introduced in [19], is specifically dedicated to the characterization of
dispersive phenomena related to thermal and charge trappings in III-V compound
semiconductor FETs, but it can be more generally used also in different contexts
(e.g. other semiconductors testing). Specific requirements for the pulsed periodic
excitation are reviewed and the impact on pulsed IVs are discussed also in relation to the specific hardware solutions adopted. In addition, some interesting
differences between GaAs and GaN technologies are explored and highlighted with
experimental data. Critical issues in performing pulsed characterization of GaN
based-devices are discussed.
This Chapter is organized as follows. In Section 4.2 the new pulsed measurement
system is described and then in Section 4.3 main advantages of the hardware configuration are highlighted. More details on measurement data post-processing are
given in Section 4.4 while the calibration error model and procedure is described
in Section 4.5 where also some validation measurements are presented. The setup
is then used for the on-wafer characterization of a GaAs pHEMT. Experimental
results are presented in Section 4.6, where pulsed IV slopes are compared to
measurements taken with standard VNA. Pulsed IV characteristics are also used
for the implementation of a simple nonlinear model of the GaAs device. Largesignal high-frequency experimental validation at 2.5 GHz is also presented in this
Section. In the last Section 4.7, a GaN on SiC FET is characterized on-wafer
and experimental results are presented. Critical differences are highlighted with
respect to GaAs devices in relation to charge trapping effects.
56
4.2. Setup description
4.2
Setup description
The measurement system is schematically presented in Fig. 4.1. Its components
consist of standard instrumentation, usually available in most laboratories oriented
to the characterization of circuit/devices for low-frequency applications. In particular, periodic pulsed waveforms having 20 V peak to peak maximum amplitudes
on 50 Ω loads and programmable rise/fall times from 2.5 ns upwards are obtained
through a two-channel arbitrary function generator (AFG). Additional power
amplification can be added in the case of need for higher pulse amplitudes and
currents on the drain side. For instance, this could be the case when dealing with
large periphery GaN devices. A 10 kHz to 250 MHz, 25 W power amplifier has
been used for the measurements on GaN devices presented in Section 4.7. The
internal impedance of the two AFG channels is set to 50 Ω. The generator outputs
are connected through 50 Ω cables to wide-band matched dual directional couplers
(10 kHz to 1000 MHz), while two bias-tee (max. current: 400 mA, bandwidth:
200 kHz to 12 GHz) provide direct and alternate current path separation. The
four output of the couplers feed the input of a suitably fast time-domain sampling
system. A standard 8 bit oscilloscope can be effectively used (with some limitation
in the sensitivity) or a more sophisticated data acquisition system based on higherresolution A/D boards can be adopted. All the results presented are obtained
through a standard four-channel 8 bit, 1.5 GHz bandwidth sampling oscilloscope,
Figure 4.1: Schematic of the pulsed measurement setup.
57
4. A NEW PULSED CHARACTERIZATION SETUP
Instrument
Model
Arbitrary Function Generator
Agilent 81150
Digital Storage Oscilloscope
Agilent 54845A
Bias System
HP 4142
Directional Couplers
Amplifier Research DC3010
Power Amplifier
Amplifier Research 25A250A
Bias Tees
AEROFLEX 8810
Bias Tees
Minicircuit ZFBT-6GW+
Thermal Chuck
Temptronic TP03215A
Table 4.1: Used components and instruments.
externally triggered by the TRIG OUT signal of the waveform generator. On wafer
measurements have been carried out by means of a thermally- controlled probestation with Ground-Signal-Ground access to the DUT electrodes. In Table 4.1
are summarized the used instruments.
The measurement system is fully automated through a remote controlling
software, specifically developed in the MATLAB programming environment. The
controlling interface allows the shaping of the periodic pulsed waveforms, the
setting of the bias voltages, of the sweep parameters of the pulse amplitudes, the
acquisition averaging and the base-plate temperature.
A SOLT-like on-wafer calibration technique has been specifically developed. This
is based on the wideband characterization under sinusoidal excitation of the
measurement setup after replacement of the actual DUT with a set of calibration
standards, i.e. Short, Open, 50 Ω Load and a Thru. Absolute calibration of the
pulse amplitudes is also taken into account. More detail on the calibration are
given in Section 4.5. Let xa1 (t), xb1 (t), xa2 (t) and xb2 (t) be the time-domain
waveforms sampled at the four channels of the oscilloscope. After the calibration
corrections are applied, the four incident and reflected waveforms at the DUT
ports (or equivalently the waveforms of the voltages and currents) are completely
known. Subsequently, in the post-processing phase, the pulsed I/V characteristic
can be extracted from the amplitude of the reconstructed time domain voltage
and current waveforms.
It is worth noting that the working principle of the pulsed setup presented here
is very similar to the one used in other measurement systems for the linear and
non-linear characterization of electron devices (i.e. VNAs, high-frequency [20] and
58
4.3. Advantages of the new setup
low-frequency load-pull [18], LSNAs and NVNAs [21]). However, this is to our
knowledge the first system for pulsed I/V device characterization fully based on
measurements in the wave-variable domain with a full calibration procedure.
4.3
Advantages of the new setup
The main feature of the proposed measurement system consists in generating
pulses in a 50 Ω environment. Equivalently, the DUT can be thought as excited
by incident pulsed waves a1 (t), a2 (t) instead of pulsed voltages. Generation of
pulses in a 50 Ω environment offers great and fundamental advantages.
First, resistive terminations seen by the DUT usually guarantee its stability.
Most of conventional setups, which use voltage instead of wave pulses, may in
some case force the user to introduce extra resistive components for maintaining
stability [13]. This is not necessary in the actual setup since the bias networks
used and the two-channel pulse generator provide wide-band 50 Ω terminations
from the very low frequency of 100 kHz up to some hundreds of megahertz (in
the bandwidth of the AFG, see Fig. 4.2). At higher frequencies, although not
perfectly 50 Ω, the terminations provided by the setup are dissipative (in the order
of 200 Ω max.) up to several gigahertz minimizing the likelihood of instabilities.
In any case better 50 Ω terminations can be obtained by using attenuators along
the input and output paths. In the author experience this has never been needed.
Secondly, reflections due to mismatches of cables and setup components are
Real part Zout
100
90
80
70
60
50
40
30
20
10
0
40
60
80 100 120 140 160 180 200
Frequency (MHz)
Figure 4.2: Real part of measured output impedance of the Agilent 81150 AFG.
59
4. A NEW PULSED CHARACTERIZATION SETUP
reduced to a minimum. This leads to:
1. ability to operate with pulse widths down to 50 ns (compared to typical
200 ns of other pulsed systems [6–8]);
2. simplified on-wafer calibration procedures, since the incident wave pulses are
almost undistorted and calibration mostly involve attenuation corrections
and phase shifts due to the setup components;
3. more freedom in the choice of cable lengths, since they are 50 Ω.
A simple experiment demonstrating this advantage was executed. The input
port of the DUT (almost equivalent to an open circuit up to frequencies of some
hundreds of megahertz) was replaced with the high-impedance input port of an
oscilloscope. The voltage waveform measured at the instrument input (this reading
being proportional to the incident wave at the input of the DUT) is shown in Fig.
4.3 for two different internal impedances of the pulse generator: 5 Ω (similar to a
voltage pulse excitation) and 50 Ω (actual wave-pulse excitation). As it can be
seen, the 50 Ω case corresponds to the expected almost ideal case, while undesired
strong oscillations originate in the 5 Ω case due to the presence of mismatches
along the pulse travelling path. It is worth noting that standard voltage pulse
measurement systems apply pulses through the DC path of the bias network,
thus adopting quite a different electrical scheme. However, analogously to what
happens in our experiment, the voltage pulse travels through a 50 Ω matched cable
and a 50 Ω probe tip before reaching the DUT and for this reason mismatches
across the pulse travelling path are necessarily involved.
A third important characteristic of the proposed measurement setup consists
in direct and alternate current path separation through bias networks. The pulsed
excitation (50 Ω internal impedance) feeds the AC port, while the bias system feeds
the DC port exactly as in standard power amplifier circuit schematics. Special
attention must be paid to the bias network frequency response in relation to the
choice of pulse width and duty cycle adopted, so as to avoid excitation distortion.
Wide-band bias tees (200 kHz to 12 GHz) have been chosen in the proposed setup.
A more common solution consists of using bias networks with relatively high
cut-off frequency of the DC path (in the order of hundreds of megahertz) and
in injecting both bias and pulse waveforms into the DC port (provided that the
whole spectrum of the pulses lays below the cut-off frequency of the low-pass DC
60
4.3. Advantages of the new setup
(a)
(b)
Figure 4.3: Instrument voltage reading proportional to the input incident wave
when the DUT input is replaced by an open circuit (similar to the gate input of a
FET). Pulse generator internal impedance set to 50 Ω and 5 Ω. Pulse width: 50 ns
(a) and 200 ns (b).
feed inductor). Moreover, the AC port of the bias-tees is usually closed on 50 Ω
terminations for limiting risks of device instability at high frequency, e.g.: [6–8]
(risks still exist however at lower frequencies through the DC path and the voltage
pulse generation circuitry).
In order to highlight other advantages of the proposed setup it is worthwhile to
analyse the repetitive pulse waveform. Let V (t) = V0 + v(t) be the voltage at the
generic device port, where V0 is the average value and v(t) is the purely-ac voltage
component. By assuming δ = τ /T (τ : pulse width, T : time period) as the duty
cycle, an ideal repetitive pulse voltage waveform v(t) (with positive amplitude A)
at the device terminals looks like in Fig. 4.4, with Vbase = −δA and V̂ = (1 − δ)A.
In addition, by expanding the pulsed waveform v(t) in Fourier series, we obtain:
v(t) =
+∞
X
An cos
n=−∞
n6=0
with
n2πt
T
(4.1)
sin(πnδ)
= δA sinc(nδ)
πnδ
(4.2)
sin(πτ fn )
= δA sinc(τ fn )
πτ fn
(4.3)
An = δA
or equivalently
An = δA
61
4. A NEW PULSED CHARACTERIZATION SETUP
Figure 4.4: Due to the DC and AC current path separation provided by the bias
networks, the bias system fixes the average value of the pulse. Positive pulse case
is shown in the figure.
Figure 4.5: Discrete amplitude spectrum of the pulsed waveform (plotted here for
n ≥ 1 only).
The corresponding amplitude spectrum is shown in Fig. 4.5.
Direct and alternate current path separation through bias networks, as in the
present setup, leads to a couple of other important advantages.
First, the bias system sets and maintains the average voltage value V0 at the
gate and drain terminals (strictly corresponding to the selected bias) independently
of the duty cycle adopted during the repetitive wave pulse excitation and regardless
of the pulse amplitudes. This issue is interesting when dealing with the purpose of
characterizing the dispersion due to charge trappings in FETs. In fact, provided
that all the spectral components An of the repetitive pulse excitation waveform
62
4.3. Advantages of the new setup
lay at frequencies above the upper cut-off of dispersive phenomena (i.e. ft >
fcutoff ),the current deviation due to charge trapping between static and pulsed
I/V curves can be considered (for a wide range of devices such as GaAs HEMTs)
as a function of the average gate and drain voltages only, as a first order of
approximation [22]. The charge trapping state is thus well defined through the
proposed pulsed setup. Instead, when considering pulsed systems where DC
and AC components of voltages and currents share the same electrical path, the
quiescent (baseline) voltage value Vbase is not coincident with the average voltage
V0 since: V0 = Vbase + δA. In this case, it is clear that the duty cycle has to be
chosen small enough to guarantee that the baseline voltage practically coincides
with the average value. This has to be carefully considered especially when dealing
with the characterization of wide-bandgap devices (such as GaN-based transistor),
which operate at very large drain-source signal amplitudes. With this respect,
the choice of duty cycle could be slightly relaxed in the actual case and the pulse
spectrum first harmonic component A1 at ft = 1/T = δ/τ could be more easily
shifted towards and above the dispersion frequency cut-off (the pulse width τ
is usually chosen as the minimum value allowed by the instrumentation setup).
However, it is worth noting that excessively high duty cycle should be avoided in
any case. In fact, this might result in: 1) variations of the thermal state during the
pulsed characterization, which is related to the rms value of the voltage waveforms
2
(Vrms
= δ(1 − δ)A2 ); 2) spurious variations of the dynamic drain current due to
a second-order dependency of the trap state on the rms values of the applied
voltages (mainly observed in GaN transistors [15]). Duty cycles in the order of a
few percent are usually adopted.
A second advantage of having AC and DC current paths separation consists in
the ability of monitoring the average drain current during the pulsed characterization. This leads to a better understanding of the dispersion mechanisms. In fact,
the average drain current observed under above-cut-off repetitive pulse voltage
excitations can be expressed as [15]:
ID0 = F {VG0 , VD0 , X̃, ϑ0 }
(4.4)
where VG0 and VD0 are the average gate and drain voltages, X̃ is a vector of
variables denoting a particular (frozen) state of charged traps and ϑ0 is the
channel temperature corresponding to the power dissipated at the average voltage
63
4. A NEW PULSED CHARACTERIZATION SETUP
conditions and at a default baseplate temperature (36 ◦C in our experiments). The
frozen state of traps X̃ has been often considered a function of the average gate
and drain voltages only and this assumption is verified later in this work in the
experimental validation Section 4.6 dedicated to GaAs transistor characterization.
In fact, it will be shown that the average current under pulsed operation remains
constant at the quiescent value for different gate and drain pulse amplitudes,
as expected. Things change instead when considering GaN transistors. Some
Authors, e.g.: [15, 16] suggest that the X̃ variables might be also dependent
on other quantities (such as rms values of voltages under an almost sinusoidal
regime [15] or dependent on peak values of voltages [16]). This is confirmed in
the following Section 4.7 dedicated to GaN transistors.
4.4
Post-processing of measured data
During the measurement, for each combination of gate and drain pulse amplitudes,
a whole period T of the four waveforms (xa1 , xb1 , xa2 , xb2 ) is acquired with the
scope. The mean voltages and currents (VG0 , VD0 , IG0 , ID0 ) are measured with
the bias system (e.g. HP 4142). The outputs of the pulsed measurement are
therefore basically two:
• the waves measurement matrix S P of dimension
4 × NG × ND × Np
(4.5)
where NG and ND are the number of gate and drain amplitudes and
Np = Sr T
(4.6)
is the number of points in time acquired at the sampling rate Sr .
• the DC measurement matrix S DC of dimension
4 × NG × ND
(4.7)
To obtain the pulsed I/V characteristic Id = Fp {VG0 , VD0 , VG , VD } from these two
matrices five basic post-processing steps are necessary:
64
4.4. Post-processing of measured data
1. Calibration correction, which leads to calibrated incident and reflected waves
at the DUT ports;
2. Transformation from incident/reflected waves to voltage/currents;
3. Addition of DC voltages and currents;
4. Peak values extraction;
5. Interpolation (and optional extrapolation) of voltage/currents on a rectangular voltage domain at the DUT ports.
Post-processing of data is carried out off-line after the user-programmed acquisitions have been completed. However, real-time post-processing represents a
feasible alternative. In the following Sections these steps are described in more
detail.
4.4.1
Application of calibration correction
The calibration is performed in the frequency domain and its implementation will
be addressed in Section 4.5. In order to apply the calibration to the measurements
more steps are necessary:
1. Decimation of all time-domain measurements in S P to reduce the maximum
frequency of acquired data;
2. Transformation to the frequency domain by means of Fast Fourier Transform
(FFT);
3. Application of calibration (see Section 4.5);
4. Transformation of corrected waves back to the time domain by means of
Inverse FFT (IFFT);
Time domain waves are sampled with sampling rate Sr , in our setup this could
be as high as 8 GS/s. The frequency resolution of the FFT or the spacing between
frequency components is
Sr
∆f =
(4.8)
Nsampl
65
4. A NEW PULSED CHARACTERIZATION SETUP
where Nsampl is the number of time domain sample to be processed. The spectrum
of the periodic waveform has instead components at integer multiples of 1/T .
Therefore, for a correct application of the FFT the following relation has to be
verified
Sr
1
=
(4.9)
Nsampl
T
or, in other words, the period should be an integer multiple of the sampling
interval ts :
T
(4.10)
Nsampl = Sr T =
ts
This is ensured by always setting the scope in order to acquire the right number
of time-domain points at the selected sampling rate.
The highest frequency component in the FFT output is the Nyquist frequency
fNy = Sr /2. The calibration instead is performed on a frequency grid up to a
C
maximum frequency fmax
that usually is lower:
C
fmax
< fNy
(4.11)
It is thus necessary to decimate the time domain waveform in order to reduce the
0
C
highest frequency from fNy to fNy
= fmax
. This is done by first low-pass filtering
the signal with a high order FIR filter and then by downsampling by a factor of
D=
fNy
C
fmax
(4.12)
This effectively reduces the sampling rate and the number of points maintaining
the correct ∆f . The filter is needed to avoid aliasing and has the added benefit of
C
reducing the noise on the signal. A maximum frequency for the calibration fmax
of
100 MHz has been used for the measurements presented in the following Sections.
This bandwidth is enough also for short pulses with fast rise and fall time. While
the ideal periodic pulse repetition has in theory an infinite bandwidth and that
the pulse width sets the nulling frequency (1/τ ) of the first lobe of the spectrum,
as a first approximation the relevant bandwidth of a real pulse can be estimated
from its 10 % to 90 % rise or fall-time tr [23, 24] with
BW puls ≈
66
0.5
tr
(4.13)
4.4. Post-processing of measured data
For a bandwidth of 100 MHz the minimum rise time is thus approximately 5 ns.
The calibration correction is then performed for every complex harmonic
component of the spectrum as explained in Section 4.5.
As the final step, the corrected waveforms in the frequency domain are transformed back to the time domain by means of an Inverse Fast Fourier Transform.
4.4.2
Transformation to voltages/currents
The transformation from incident/reflected waves to voltages/currents time domain
waveforms at the DUT ports is then readily performed with
v(t) = a(t) + b(t)
i(t) =
p
R0
a(t) − b(t)
√
R0
(4.14)
(4.15)
where the following formalism for incident and reflected waves definition is
adopted [25]:
1
a= p
(v + Zref i)
2 |<{Zref }|
1
∗
b= p
(v − Zref
i)
2 |<{Zref }|
(4.16)
(4.17)
Zref is the reference impedance associated with the formalism and in our case is
chosen to be equal to the real input impedance of the sampling instrument, i.e.
Zref = R0 = 50 Ω. Follows:
1
a = √ (v + R0 i)
2 R0
1
b = √ (v − R0 i)
2 R0
67
(4.18)
(4.19)
4. A NEW PULSED CHARACTERIZATION SETUP
The measured DC values from matrix S DC are then added:
V (t) = V0 + v(t)
(4.20)
I(t) = I0 + i(t)
(4.21)
From the time-domain current and voltage pulsed waveforms at the DUT ports
is then possible to extract the peak values to obtain the pulsed I/V characteristic.
This can be done either automatically or manually selecting on a plot of all
waveforms a suitable range inside the pulse width. This has the advantage to
allow to visually inspect the quality of pulses and to avoid to select time ranges
where some ringing could be present.
It has to be stressed here that at this point the entire period of the pulsed
voltages and currents is available. This allows for instance to observe and study
any long term transient response if present.
As already explained, thanks to the DC and AC path separation, it is also
possible to work separately on the DC and AC characteristics. As will be shown
in Section 4.7 in some circumstances this gives new insight into the effects of
dispersive phenomena on the pulsed characteristic.
4.4.3
Interpolation
Ohmic voltage drops across 50 Ω resistors make the organization of acquired data
slightly more complicated to deal with in comparison to the case where more
conventional voltage pulses are applied. A rectangular bi-dimensional grid of waves
applied at the generator ports turn out into a non-rectangular grid of voltages at
the device ports due to the current-dependent voltage drops across 50 Ω resistors,
as will be shown in Section 4.6. Suitable bi-dimensional post-processing of data is
executed in order to achieve a full reconstruction of the dynamic drain current
characteristics over a rectangular domain of voltages at the device ports. In
particular, the measured data can be seen as samples of the two functions:
xb1 = F1 [xa1 , xa2 ]
(4.22)
xb2 = F2 [xa1 , xa2 ]
(4.23)
Bi-dimensional interpolation algorithms on non-rectangular grids available in
68
4.5. Calibration
commercial mathematical processing tools [26] can be exploited to this aim. Alternatively, special purpose routines can be developed in order to avoid interpolation
on non-rectangular grids.
4.5
Calibration
The time domain voltage and current pulsed waveforms at the DUT ports are
obtained from the incident and reflected waves. These are not measured directly
at the DUT ports but are sampled in the time domain by the oscilloscope at the
coupled ports of the two dual directional couplers. A calibration procedure is thus
necessary to reconstruct the waves, and consequently voltages and currents, at the
reference plane. In general a calibration procedure is defined by an error model
that describes how the wanted quantities are linked to the actual measurements (or
that, in other words, describes systematic measurement errors) and by a procedure
that describes a way to determine the coefficients of the error model [27]. This
usually involves the measurement with the instrument to be calibrated of known
(and sometimes unknown) standards. The calibration procedure presented here
and implemented for the first time for a pulsed I/V measurement setup is based
on calibrations employed in LSNA and NVNA systems [28–31].
The two dashed boxes, on the input and on the output, in Fig. 4.6 can be
considered as two linear 4-port networks. These include the directional couplers
but also bias tees, probes and 50 Ω connection cables.
Taking into consideration only the input box, ports 3 and 4 are closed on the
oscilloscope 50 Ω input impedance and thus the reflected waves at these ports can
be considered to be equal to zero
b3 = 0
b4 = 0
Port 2 represents the DUT reference plane where we want to determine the a2
and b2 incident and reflected waves. As a consequence of the limited directivity of
the dual directional coupler and to the presence of the bias tee, that particularly
at low frequency could present a not perfect match, a portion of the wave that
69
4. A NEW PULSED CHARACTERIZATION SETUP
travels toward the DUT is reflected back and contribute to the wave measured
at port 4. In a similar way, a portion of the wave that is reflected back from the
DUT goes also to port 3 where in an ideal case we would like to sample only the
incident wave.
We can thus write the waves at the DUT, a2 and b2 , as a linear combination
of both the measured waves a3 and a4 1
b2 = k̂a3 + p̂a4
(4.24)
a2 = q̂a3 + r̂a4
(4.25)
This defines a linear error model for the input port with parameters k̂, p̂, q̂
and r̂ . For a single frequency the waves are effectively sinusoidal and can be
represented by a single complex phasor. The error model is thus defined by four
complex parameters or equivalently by eight real quantities and puts into relation
the sinusoidal waves, measured with the scope, with the incident and reflected
sinusoidal waves at the DUT plane.
Redefining the waves names in relation to the DUT as shown in Fig. 4.7 and
assuming that the input and output box are isolated we can write the complete
1
2
DUT
a2
b2
50
50
4
3
a3 b3
a4 b4
50
50
50
50
Scope
Figure 4.6: Schematic of the pulsed measurement setup.
1
Note that the linear combination of sinusoidal waves of same frequency but different phases
is still sinusoidal with the same frequency but different phase and amplitude.
70
4.5. Calibration
error model
aD1 = k̂aR1 + p̂bR1
(4.26)
bD1 = q̂aR1 + r̂bR1
(4.27)
aD2 = ŝaR2 + t̂bR2
(4.28)
bD2 = ûaR2 + v̂bR2
(4.29)
where the subscript D stand for DUT and R for Reading. 1 and 2 now refer
respectively to the input and output part of the setup. In matrix form this can
be written as


 
aD1
aR1


 
 bD1 
 bR1 


 
(4.30)
a  = M a 
 D2 
 R2 
bD2
bR2
where M is the complex calibration matrix

k̂

 q̂
M =
0

0
p̂
r̂
0
0
0
0
ŝ
û

0

0

t̂ 

v̂
(4.31)
The coupling factors of the couplers and attenuations and phase relations
CAL.
STANDARD
1
aD1
bD1
50
aR1
50
DUT
2
aD2
bD2
50
bR1
bR2
aR2
50
50
50
Scope
Figure 4.7: Schematic of the pulsed measurement setup.
71
4. A NEW PULSED CHARACTERIZATION SETUP
between ports are not perfectly constant within the operational bandwidth and
this has to be taken into account. Being the system linear the calibration can
still be applied but it has to be performed for different frequencies. In our case of
periodic pulsed waveforms that can be expanded in Fourier series (see Eq. (4.1))
the calibration is repeated for the harmonic frequencies from the fundamental
C
(f0 = 1/T ) up to a maximum frequency fmax
.
Being N the number of harmonics to be considered, the total number of real
parameters to be determined with the calibration procedure is thus 8 × N . The
calibration matrix M and its coefficients are therefore a function of frequency or
of the harmonic index n, i.e. M n , k̂ n , p̂n , q̂ n , r̂n , etc.. In the following this will be
omitted for clarity of notation.
Normalizing now the calibration matrix M
rewritten as

1 p

q r
M = k̂M = kejφk 
0 0

0 0
to its first element k̂ it can be
0
0
s
u

0

0

t

v
where k̂ has been expanded in its phasor form and where p = k̂p̂ , q =
(4.32)
q̂
k̂
and so on.
The calibration procedure can now be divided in two parts. In a first step
a common Short, Open, Load and Thru (SOLT) calibration is used in order to
determine the coefficients of the matrix M . This is the same calibration that is
performed with VNAs and allows to correct systematic errors in the measurement
of the ratio of incident, reflected and transmitted waves at the DUT ports. To
obtain also the correct amplitude and phase for all the four waves a second
calibration step is necessary to determine also the complex coefficient k̂.
4.5.1
Relative calibration
The SOLT calibration is based on the measurement of known standards. In our
case of a low working frequency, standards can be considered as ideal but in a
more general case an appropriate model could be used. The relation between
incident and reflected waves at the DUT plane is thus defined by the standard that
is being measured. For on-wafer measurements the calibration reference plane is
defined at the probe tips and a calibration substrate must therefore be used. In
72
4.5. Calibration
this work a Cascade Microtech Impedance Standard Substrate (ISS) 101-190 has
been used.
From (4.30) and (4.32) follows
aD1 = kejφk [aR1 + pbR1 ]
(4.33)
bD1 = kejφk [qaR1 + rbR1 ]
(4.34)
aD2 = kejφk [saR2 + tbR2 ]
(4.35)
bD2 = ke
jφk
[uaR2 + vbR2 ]
(4.36)
For now we can consider only the input section of the setup in Fig. 4.7. A calibration standard is connected at the DUT port reference plane and the AFG is setted
X
up to generate a sinusoidal signal at an appropriate frequency. The aX
R1 and bR1
waves are acquired by the scope, where the superscript indicates the standard.
For the Short we have bD1 = −aD1 and from (4.33) follows
aSR1 + qaSR1 + rbSR1 + qbSR1 = 0
(4.37)
For the Open bD1 = aD1 and thus
O
(q − 1)aO
R1 + (r − p)bR1 = 0
(4.38)
For the Load bD1 = 0 leading to the equation
qaLR1 + rbLR1 = 0
(4.39)
This gives a system of three equations that can be solved for the three unknown
coefficients q, r and p. In matrix form:
 S
    S 
aR1 bSR1 bSR1
q
−aR1
 O
O
O ×  =  O 
aR1 bR1 −bR1  r   aR1 
aLR1 bLR1
0
p
0
73
(4.40)
4. A NEW PULSED CHARACTERIZATION SETUP
In a similar way for the output section of the setup and for the Short, Open and
Load standards it is possible to write the equations
uaSR2 + vbSR2 + saSR2 + tbSR2 = 0
(4.41)
O
O
O
uaO
R2 + vbR2 − saR2 − tbR2 = 0
(4.42)
uaLR2 + vbLR2 + saLR2 = 0
(4.43)
In the case of the Thru standard the two ports at the DUT are directly connected
an thus aD2 = bD1 . From (4.33) follows
saTR2 + tbTR2 = qaTR1 + rbTR1
(4.44)
In the second term of (4.44) q and r are already known from (4.40) and thus
defining
K T = qaTR1 + rbTR1
(4.45)
it is possible to write the system of four equations to be solved for the four
unknown coefficients u, v, s and t :

    
aSR2 bSR2 aSR2
bSR2
u
0
 O





O
O 
aR2 bO
v   0 
−a
−b
R2
R2
R2

× = 
aL bL
 s  0 
0
0
 R2 R2
    
T
T
0
0
aR2
bR2
t
KT
(4.46)
At this point the matrix M in (4.32) is fully known. In order to know the full
calibration matrix M another calibration step is necessary to determine also the
coefficient k̂.
4.5.2
Absolute calibration
Theoretically the determination of k̂ can be performed in two equivalent ways.
From (4.33) we can write
aD1
k̂ =
(4.47)
aR1 + pbR1
or
aD2
k̂ =
(4.48)
saR2 + tbR2
74
Alma Mat
Department of Elec
4.5. Calibration
Taking into consideration (4.47), the function generator is connected at the input
of the section 1 in Fig. 4.7. In this case is needed the direct measurement of
the aD1 wave at the DUT port and therefore the inputs of the oscilloscope are
connected in order to sample at the same time the three waves. In general, for an
on-wafer calibration, where the reference plane is at the probe tips, this poses a
problem because it is not possible to directly connect the scope there. The more
rigorous way to address this is to use the principle of reciprocity and an additional
calibration step like the one presented in [30, 32]. In our case, due to the low
working frequency, it has been verified that is otherwise possible to neglect the
effects of probes without introducing relevant errors. It is thus possible to skip
this last extra calibration step.
Ph.D
Telecomm
Nonline
With the determination of k̂ the whole calibration matrix M is known and is
thus possible to obtain the four incident and reflected waves at the DUT ports Model
from the four waves measured, at the same time, with the scope.
Micro
In Figures from 4.8 to 4.13 are shown the magnitude and phase of the eight
complex coefficients of M plotted versus frequency for a typical calibration of
the setup. The calibration has been performed on a frequency grid uniformly
spaced from 100 kHz to 20 MHz in steps of 100 kHz and logarithmically spaced
from 20 MHz up to 100 MHz.
Magnitude (dB)
42
41
40
39
38 5
10
106
107
Frequency (Hz)
108
Tutor:
Prof. Fabio Filicori
Figure 4.8: Magnitude of coefficients k̂ (blue) and r̂ (black) -Port 1- of calibration
matrix M versus frequency for typical setup configuration.
Ph.D. Course Coo
Prof. Alessandro Va
75
Mi
4. A NEW PULSED CHARACTERIZATION SETUP
Magnitude (dB)
42
41
40
39
38 5
10
106
107
Frequency (Hz)
108
Nonli
Mod
Mic
Tutor:
Prof. Fabio Fili
Figure 4.9: Magnitude of coefficients ŝ (blue) and v̂ (black) -Port 2- of calibration
matrix M versus frequency for typical setup configuration.
Ph.D. Course
Prof. Alessandr
Magnitude (dB)
30
20
10
0
−10
−20 5
10
106
107
Frequency (Hz)
108
Tutor:
Prof. Fabio Filic
Figure 4.10: Magnitude of coefficients p̂ (green) and q̂ (red) -Port 1- of calibration
matrix M versus frequency for typical setup configuration.
4.5.3
Practical considerations
Ph.D. Course
Prof. Alessandro
It is important to point out that all the elements of the calibration matrix M are
complex coefficients and each wave measured with the scope has to be described
by a complex phasor.
At the oscilloscope port, from waves definitions (4.18)-(4.19) and being the
76
Micro
4.5. Calibration
S
Magnitude (dB)
30
20
Nonline
Modell
Micro
10
0
−10
−20 5
10
106
107
Frequency (Hz)
108
Tutor:
Prof. Fabio Filicori
Figure 4.11: Magnitude of coefficients t̂ (green) and û (red) -Port 2- of calibration
matrix M versus frequency for typical setup configuration.
Ph.D. Course Coo
Prof. Alessandro Van
Phase (◦ )
180
90
0
−90
F
−180
105
106
107
Frequency (Hz)
108
Tutor:
Prof. Fabio Filicori
Figure 4.12: Phase of coefficients k̂ (blue), r̂ (black), p̂ (green) and q̂ (red) -Port
1- of calibration matrix M versus frequency for typical setup configuration.
reference impedance equal to 50 Ω as the input impedance follows
Ph.D. Course Coo
Prof. Alessandro Van
V
a= √
R0
(4.49)
b=0
(4.50)
For every wave to be measured during the calibration the module is thus determined
by a measurement, directly on the scope, of the peak-to-peak amplitude of the
77
F
Mic
4. A NEW PULSED CHARACTERIZATION SETUP
Phase (◦ )
180
90
0
−90
−180
105
106
107
Frequency (Hz)
108
Tutor:
Prof. Fabio Filic
Figure 4.13: Phase of coefficients ŝ (blue), v̂ (black), t̂ (green) and û (red) -Port
2- of calibration matrix M versus frequency for typical setup configuration.
sinusoidal voltage waveform. The phase is determine by measuring thePh.D.
delay τ Course
from the trigger instant t0 to the first positive crossing of the mean value
of theAlessandro
Prof.
sinusoidal voltage waveform and can be calculated as
φ = 2πf τ
(4.51)
where f is the used frequency.
The complex phasor of the wave a becomes
Vpp
a = √ e−jφ
2 50
(4.52)
The measurement of the peak-to-peak amplitude and considering the mean value of
the sine allow to minimize the effect of any DC offset error introduced by the scope1 .
The trigger signal comes from the AFG and is always synchronised with the
beginning of the period of the generated signal (the sinusoidal waveform in the
case of the calibration) on the main output channel. Besides starting the scope
acquisition, the trigger therefore defines also the time instant of reference t0 against
which all the phases of the measured signals are calculated.
1
Oscilloscope’s DC offset accuracy is usually worse than the AC gain accuracy.
78
4.5. Calibration
As already stated the scope has a limited vertical resolution. In order to maximise
the accuracy of all measurements is thus important to use always the smallest
allowed vertical range that guarantees not to clip the signal. For the Load standard
for instance the reflected wave could be very small while for the Open almost all the
incident wave is reflected. An optimized autoscale algorithm has thus been implemented to set in the best way possible the vertical range of the individual channels.
In order to improve the precision of the measurement and to reduce the effect of noise it is also possible to set in the software the number Na of waveforms
to be acquired and averaged. Assuming that the noise is random with a uniform
Gaussian distribution and that it is uncorrelated with the signal, the theoretical
improvement in terms of extra bit of vertical resolution is
Nb =
1
log2 (Na)
2
(4.53)
It has to be considered that increasing the number of averages increases the time
required for the measurement. A good compromise is obtained with Na = 128
and this value has been used for measurements presented here.
Also the horizontal temporal resolution is limited and depends mainly on the
used sampling rate Sr being the sampling period inversely proportional to it. For
instance, in the case of the Agilent 54845A scope used in this work, the time delay
measurement accuracy is specified [33] as
0.2
± (0.007%)∆t +
Sr
(4.54)
Note that this accuracy is better than 1/Sr due to the use of sin(x)/x interpolation
and that there is also a small dependency on the measured time difference ∆t.
To improve the time measurement accuracy is thus desirable to maximize the
sampling rate. On the other hand, for a correct phase determination, it is necessary
to acquire at least a complete period T of the calibration sine wave. The number
of points required is
Np = T Sr
(4.55)
At low frequency this could be a problem due to limited memory resources of the
scope. Therefore, for every harmonic frequency, the highest sampling rate that
79
M
4. A NEW PULSED CHARACTERIZATION SETUP
Phase Accuracy (◦ )
2
1.5
1
0.5
0 5
10
106
107
Frequency (Hz)
108
Tutor:
Prof. Fabio F
Figure 4.14: Theoretical phase accuracy versus frequency with Agilent 54845A
DSO for a sampling rate of 8 GS/s.
Ph.D. Cour
Prof. Alessan
As a consequence of (4.54) and (4.51), considering a constant sampling rate for
guarantees to be able to acquire a whole period is selected.
all the harmonics, the accuracy of the phase determination worsens with increasing
frequency. As an example, in Fig. 4.14 is reported the theoretical phase accuracy
in degrees versus frequency for a 8 GS/s sampling rate. Periodic pulse waveforms
used in this work have an amplitude spectrum that is decreasing with frequency
and most of the energy is well below 20 MHz. The phase error introduced in our
case is therefore not relevant. However, in trying to adopt this approach for higher
frequency, the phase accuracy could quickly become the limiting factor.
4.5.4
Calibration verification
In order to verify the measurement and calibration procedure, different experiments
were conducted. A full two port calibration of the setup has been performed
as explained in previous Sections using a frequency grid uniformly spaced from
100 kHz to 20 MHz in steps of 100 kHz and logarithmically spaced from 20 MHz
up to 120 MHz with 50 points per decade. A scope channel setted to 1 MΩ input
impedance has then been connected in place of the DUT on the input (1) section
of the setup (see Fig. 4.7). Outputs aR1 and bR1 from the coupler are connected
to other two 50 Ω channels. The function generator is setted to generate 50 ns
pulses with a period of 5 µs (f0 = 200 kHz). The three channels are acquired at
80
Micro
4.5. Calibration
·10−2
Amplitude (V)
2
1
0
−1
−2
0
20
40
60
80
Time (ns)
100
120
Tutor:
Prof. Fabio Filicori
Figure 4.15: Raw aR1 (red) and bR1 (blue) measurements for different pulses
amplitudes with 1 MΩ load.
Ph.D. Course Coo
the same time and voltage pulses reconstructed applying the calibrationProf.
to aR1 Alessandro Va
and bR1 are compared with the pulses directly measured on the 1 MΩ channel.
In Fig. 4.15 are shown measured aR1 and bR1 waves for different amplitudes.
Reconstructed voltage waveforms at the reference plane obtained by applying the
calibration are shown in Fig. 4.16a along whit voltage pulses directly measured by
the scope as a comparison. From the figure it is possible to see how waveforms
are correctly aligned in time compared also to the raw acquisition of aR1 and bR1
of Fig. 4.15.
The relative amplitude error calculated for every time instant tk as
Vmeas (tk ) − Vrec (tk ) Err rel (tk ) = 100 × Vmeas (tk )
(4.56)
is plotted in Fig. 4.17a for all pulses amplitudes. For smaller pulses the relative
error is around 2 % but it is important to note that the relative error gets better
as the amplitude increases.
The same verification experiment has been conducted for the output section
(2), in this case also with the power amplifier connected between the output of
the function generator and the coupler (see Fig. 4.1). As shown in Figures 4.16b
and 4.17b similar results were obtained.
Other verification measurements where conducted changing pulses parameters
81
F
Department of Electrical, Electronic
Depar
Ph.D. Course in Ele
Telecommunications and
4. A NEW PULSED CHARACTERIZATION SETUP
Cycle
4
4
2
2
Settore concorsuale:
Amplitude (V)
Amplitude (V)
Settore scientifico dis
0
−2
0
−2
Nonlinear CharN
−4
−4
0
20 40 60 80 100 120
0
20 40 60 80 100 120
Modelling
of G
Time (ns)
Time (ns)
Microwave Po
Figure 4.16: Reconstructed voltage waveforms at the reference plane for different
amplitudes (blue) and directly measured waveforms (red) for input (a) and output
Applic
(b) section of setup.
(a)
(b)
8
Relative Error (%)
Relative Error (%)
8
6
4
|V̂ |
2
0
40
50
60
Time (ns)
Cand
6
Daniel
4
|V̂ |
2
0
70
40
50
60
Tutor:
Time (ns)
Prof. Fabio Filicori
(a)
(b)
70
Tutor:
Prof. F
Figure 4.17: Relative error for voltage pulses of Fig. 4.16a for input (a) and
Fig. 4.16b for output section of setup (b). The error decreases as the pulse
Ph.D. Course Coordinator:
Ph.D.
amplitude increases.
Prof. Alessandro Vanelli-Coralli
Prof. A
82
Final Examina
75
75
50
50
Amplitude (mA)
Amplitude (mA)
4.5. Calibration
25
0
-25
-50
-75
25
0
-25
-50
-75
0
20
40 60 80
Time (ns)
100 120
(a)
0
20
40 60 80
Time (ns)
100 120
(b)
Figure 4.18: Reconstructed current waveforms at the reference plane for different
amplitudes (blue) and measured waveforms (red) for input (a) and output (b)
section of setup.
and with slightly different setup configurations obtaining always similar results in
terms of relative error.
For instance, to verify also current accuracy, outputs of section (1) and (2)
have been connected this time to scope 50 Ω channels. In Fig. 4.18a are shown
the reconstructed current pulses and the pulses obtained from the direct voltage
measurement divided by the nominal 50 Ω input impedance. Also in this case the
calibration guarantee a good accuracy (Fig. 4.19a). Similar results for section (2)
are shown in Fig. 4.18b and 4.19b. Note how in this case a pulse length of only
20 ns has been used.
83
Microwave Po
Applic
4. A NEW PULSED CHARACTERIZATION SETUP
8
Relative Error (%)
Relative Error (%)
8
6
4
|V̂ |
2
0
40
50
60
70
Time (ns)
Cand
6
Daniel
4
|V̂ |
2
0
80
60
Tutor:50
Time (ns)
Prof. Fabio Filicori
(a)
70
(b)
Tutor:
Prof. F
Figure 4.19: Relative error for current pulses of Fig. 4.18a for input (a) and
Fig. 4.18b for output section of setup (b). The error decreases as the pulse
Ph.D. Course Coordinator:
Ph.D.
amplitude increases.
Prof. Alessandro Vanelli-Coralli
Prof. A
4.5.5
DC calibration
As already explained, the setup guarantees AC and DC path separation and in
previous Sections the procedure for the AC path calibration has been presented.
For the DC path it has to be considered that a parasitic resistance from the
DC source/monitor to probe tips is present. This series resistance is inFinal
part due Examina
to cables and in part due to bias tees and usually is of the order of 1–2 Ω. For
instance, for a GaN device biased at 20 V on the drain and with a drain current
of 500 mA, a parasitic resistance of 1.5 Ω means an error of 1 V, or 5 %, on the
actual bias point. For the pulsed characterization it is important to set and to
know the correct bias point because, as explained, dispersive effects are strongly
dependent on the DC polarization starting condition.
The DC calibration is performed as an added step during the Short measurement step of the relative calibration explained in Section 4.5.1. With the DC
source/monitor, a small DC current is sweep from −10 mA to 10 mA in steps
of 1 mA while the voltage is measured. Resistances Rg and Rd , of the gate and
drain DC paths, are calculated from the slope of the linear least square fitting
of measurements. Imposing the current and measuring the voltage guarantees
always a safe current on the Short standard.
84
4.6. Characterization of GaAs HEMTs
During the biasing of the device, before the pulsed measurement, Rg and Rd
are then used in an iterative procedure for setting the correct biasing point.
4.6
Characterization of GaAs HEMTs
The measurement setup and the corresponding calibration technique have been
first validated through GaAs HEMTs. The Power Amplifier shown at the drain
side in Fig. 4.1 was not needed in this case. Small-signal trans-conductance and
output-conductance of a GaAs pHEMT (L = 0.25 µm, W = 300 µm) have been
obtained from S-parameters measured on-wafer at different biases and at 250 MHz.
At this frequency the displacement contribution to the drain current is negligible
and the admittance parameters are almost real quantities.
Provided that the upper frequency cut-off of the dispersive phenomena (thermal
and charge trapping effects) lays below the lower spectral component f1 of the
pulsed periodic excitation waveform, so called above cut-off conditions are met.
In this case, the slopes of the measured pulsed IV curves in their quiescent points
should be coherent with the differential parameters obtained from standard VNAs.
Sets of pulsed drain current measurements have been carried out by choosing
different couples of gate and drain voltage bias conditions. Constant gate voltage
has been kept during these measurements and pulses have been initially applied
to the drain terminal only. Then, the slopes versus the drain voltage of the pulsed
IV curves in the bias points have been evaluated and compared with output
conductance data from VNA measurements.
Pulse width and duty cycle have been initially chosen equal to 200 ns (20 ns
rise time) and 10 %, respectively. Good agreement on output conductance has
been verified (also taking into account that rather small absolute quantities are
being considered), as shown in Table 4.2.
In order to test the amount of dispersion mainly due to charge trapping in the
device, the pulsed IV characteristics have been compared to corresponding static
IV curves. Two sets of curves, at VG0 = −0.4 V, VD0 = 5 V and VG0 = −0.5 V,
VD0 = 5 V are for instance shown in Fig. 4.20. Quite critical differences of slopes
are observed between the static and the pulsed curves (static output conductance
is about 2 mS in VG0 = −0.4 V, VD0 = 5 V, so the dispersion leads to a variation
from the static value of about 70 %).
85
4. A NEW PULSED CHARACTERIZATION SETUP
Bias
VG0
(V)
VD0
(V)
Output
Conductance
from S-par. at
250 MHz (mS)
Output
Conductance
from pulsed I/V
(mS)
Relative
Difference
(%)
−0.4
−0.4
−0.5
−0.5
−0.6
1.5
5
1.5
5
5
6.56
3.40
6.35
3.34
3.22
6.51
3.11
6.74
3.21
3.18
−0.76
−8.5
6.14
3.89
−1.2
Table 4.2: GaAs pHEMT (L = 0.25 µm, W = 300 µm): Small-Signal Output
Conductance
Figure 4.20: GaAs pHEMT - Measured Static (continuous lines) and pulsed
(slashed) drain current sets from VG0 = −0.5 V, VD0 = 5 V and VG0 = −0.4 V,
VD0 = 5 V. Biases of the two sets are outlined in red. Drain pulses only.
Another test was carried out by biasing the device in VG0 = −0.5 V, VD0 = 5 V
and by applying gate pulses only. Obtained pulsed trans-characteristic data are
shown in Fig. 4.21. No compensation of the 50 Ω load-line was carried out during
this test. The slope of the curve in the quiescent condition corresponds to 95.43 mS.
This value is in good agreement with 92.14 mS obtained by using S-parameters in
86
4.6. Characterization of GaAs HEMTs
Figure 4.21: GaAs pHEMT - Pulsed Drain Current from VG0 = −0.5 V, VD0 = 5 V.
Bias condition is outlined in red. Gate pulses, 50 Ω load.
the same bias (3.57 % error) and taking into account the 50 Ω termination:
gm = <
Y21
1 + R0 Y22
(4.57)
In order to test the pulsed setup in full operative mode, by also taking into
account the measurement data post-processing procedures, a full characterization
of the GaAs pHEMT was carried out through the application of simultaneous
pulses from both gate and drain ports, by adopting waveforms with 50 ns pulse
width and 1 % duty cycle. The post-processing compensate the effects of the 50 Ω
terminations and leads to look-up-tables functions defined on a rectangular grid
of voltages at the device ports. An example of measured pulsed-IV characteristics
is shown in Fig. 4.22, where all the data shown have been obtained without
extrapolation.
A new test of coherence between pulsed IV slopes versus gate (Gm ) and drain
(Gd ) voltages and admittance parameters obtained from S-parameters (<{Y21 },
<{Y22 }) has been carried out on these data. Corresponding results are presented
in Table 4.3.
In order to show the effects of the 50 Ω pulse wave sources on the resulting
voltages at the DUT ports, a set of gate and drain voltage pairs corresponding
to a uniform grid of incident excitation waves is presented in Fig. 4.23a (circles).
As it can be seen, all the voltage pairs corresponding to a given gate pulse-wave
87
4. A NEW PULSED CHARACTERIZATION SETUP
(a)
(b)
Figure 4.22: GaAs pHEMT (L = 0.25 µm, W = 300 µm): Pulsed IV Characteristics measured (pulse width: 50 ns, duty cycle: 1 %) with the new setup from
VG0 = −0.5 V, VD0 = 5 V (a), VG0 = −0.6 V, VD0 = 5 V (b).
Bias
Y-par (50 MHz)
VG0
(V)
VD0
(V)
ID0
(mA)
−0.8
−0.6
−0.6
−0.3
5
3
5
5
9.4
22.4
25.6
57.8
Pulsed I/V
Relative Diff.
<{Y21 } <{Y22 }
(mS)
(mS)
Gm
(mS)
Gd
(mS)
Gm
%
Gd
%
69.2
101.8
102.5
104.0
65.0
88.5
91.2
100.0
2.3
3.9
3.1
3.4
−6.1
−13.1
−11.1
−3.9
−1.3
−1.5
−4.0
0.6
2.4
4.0
3.2
3.4
Table 4.3: GaAs pHEMT (L = 0.25 µm, W = 300 µm): Pulsed IV Slopes Coherence Test.
88
4.6. Characterization of GaAs HEMTs
(a)
(b)
Figure 4.23: a) Gate and Drain voltage pairs at the DUT ports corresponding
to incident and reflected wave acquisitions (•) and to reconstructed points on a
uniform grid (+); b) Example of pulse waveforms of gate/drain voltages and drain
current obtained from measured incident and reflected waves.
excitation lay on a straight line, due to the almost open circuit condition at the
DUT input. Post-processing of measured data leads to reconstruct the pulsed
drain I/V characteristics on a uniform grid of voltages (see for instance the plussymbols grid in the same figure). Time-domain waveform examples of the gate
and drain voltages and of the drain current obtained after post-processing of data
is reported in Fig. 4.23b (pulse highlighted in Fig. 4.23a).
The pulsed drain current characteristics have been eventually used for the
extraction of a compact quasi-static high-frequency model of the GaAs pHEMT
as shown in Fig. 4.24. This was implemented into Agilent Advanced Design
System (ADS) CAD. Lumped extrinsic parasitic components, according to the
circuit topology shown in the figure, have been identified by fitting RF small-signal
differential-parameters under Cold FET [34] and off-state channel gate bias. The
obtained values are reported in Fig. 4.24. Parasitic effects have been de-embedded
from the pulsed drain characteristics and the intrinsic current versus voltage
description has been stored into a look-up-table (LUT).
A purely capacitive-like quasi-static description of the displacement gate and
drain current contributions have been extracted from multi-bias Y-parameters
at low frequencies (in the range between some hundreds of megahertz and a
few gigahertz where the device almost exhibits a purely quasi-static behaviour).
The non linear capacitance matrix (as a function of gate and drain voltages)
has been also de-embedded from parasitics and the four capacitances stored
89
4. A NEW PULSED CHARACTERIZATION SETUP
Figure 4.24: Equivalent Circuit Model used for large-signal HB simulations of an
S-band single stage Power Amplifier.
Figure 4.25: GaAs pHEMT (L = 0.25 µm, W = 300 µm): Large Signal test. Single
stage Power Amplifier (50 Ω terminations) at f0 = 2.5 GHz. Output power (1st ,
2nd ,3rd Harmonics) (left), Transducer Gain and Drain Efficiency (right). Bias:
VG0 = −0.5 V, VD0 = 5 V (ID0 = 37 mA).
into LUTs. Displacement currents are implemented into the CAD environment
through Symbolically Defined Devices. Finally, gate-source and gate-drain diodes
were identified from Gummel-Plots under forward bias of the gate junction, deembedded from parasitics and implemented into schematic.
The model has been used for the large-signal simulation of a single-stage PA
working at 2.5 GHz in two bias conditions. Gate and drain terminations were
set at 50 Ω. Experimental validation results (on-wafer) are shown in Fig. 4.25
in terms of 1st , 2nd and 3rd harmonic output power, Transducer Gain and Drain
Efficiency. It must be emphasized that little thermal self- heating takes place into
these devices when measured on-wafer. Otherwise, thermal corrections should
have been taken into account, especially at very high level of input power.
90
4.7. Characterization of GaN HEMTs
Bias
Y-par. (50 MHz)
Pulsed I/V
Relative Diff.
VG0
(V)
VD0
(V)
ID0
(mA)
<{Y21 } <{Y22 }
(mS)
(mS)
Gm
(mS)
Gd
(mS)
Gm
%
Gd
%
−2.0
−2.1
−1.6
−0.6
15
20
25
25
48.4
47.8
145.1
284.9
169.2
149.9
186.6
153.2
189.6
153.2
203.6
162.3
4.9
3.8
3.5
2.9
12.1
2.2
9.1
6.0
−1.0
−3.8
−8.8
−11.3
4.9
3.9
3.8
3.3
Table 4.4: GaN HEMT (L = 0.25 µm, W = 600 µm): Small-Signal Output
Conductance
4.7
Characterization of GaN HEMTs
An AlGaN/GaN FET on SiC (L = 0.25 µm, W = 300 µm, IDSS = 450 mA) has
been characterized on-wafer under gate and drain pulsed excitations (τ = 50 ns,
δ = 1 %). As in the previous case, pulsed IV slopes around the quiescent conditions,
both versus drain and gate voltage variations, have been compared to the real
parts of small-signal admittance parameters obtained from low-frequency VNA
data. The results are presented in Table 4.4 for different bias conditions. The
relative differences observed are comparable with those obtained with the GaAs
based device.
Instead, a different behaviour is observed when considering the large-signal
pulsed behaviour. Drain-pulsed-only IV characteristics at constant gate voltage were first measured. The experiment has been repeated twice, by choosing
VD0 = 15 V and VD0 = 25 V. The obtained IV-plots are shown in Fig. 4.26a and
Fig. 4.26b respectively (continuous lines), while the corresponding average drain
currents appear in Fig. 4.26c and Fig. 4.26d.
A slope change in the pulsed drain IV curves at each of the two gate voltages considered is well observed. This change always occurs at the drain voltage
corresponding to the selected bias condition. Changing the bias condition leads
to a corresponding shift in the position of the slope-change. Dramatic drop in the
average current is observed in the presence of positive drain pulses ( V̂D > VD0 ),
while almost constant average values are monitored in the presence of negative
drain pulses (V̂D < VD0 ). Since thermal phenomena are generally characterized
by slow time constants, we assume that they do not play a role in the pulsed
91
4. A NEW PULSED CHARACTERIZATION SETUP
(a)
(b)
(c)
(d)
Figure 4.26: GaN HEMT (L = 0.25 µm, W = 600 µm): Drain-Pulsed I/V curves
at constant Gate voltages. Drain pulses from VD0 = 15 V (a) and VD0 = 25 V
(b). Corresponding average drain currents (c), (d). Slashed lines in (a) and (b)
correspond to what it would be observed, if the average drain current is kept
constant at the bias value.
92
4.7. Characterization of GaN HEMTs
experiment considered (i.e. constant internal temperature Θ0 at all the pulsed IV
points). Thus, according to
ID0 = F {VG0 , VD0 , X̃, ϑ0 }
(4.58)
the observed behaviour of the average drain current suggests that the set of
variables X̃ representing the state of traps could depend on peak values of drain
voltages in the case of positive pulses, i.e.:
X̃ = f (VG0 , VD0 , V̂D )
(4.59)
while a simple dependence on the average drain voltage can be accepted in the
case of negative pulses, i.e.:
X̃ = f (VG0 , VD0 )
(4.60)
This behaviour is in agreement with Jardel et al. [16]. Charge capture time
constants are smaller than the actual pulse width (50 ns), so that traps change
their state during the positive pulses. This leads to observe in Figures 4.26a
and 4.26b an almost iso-thermal-DC IV characteristic for each V̂D > VD0 (with
decrease in the output IV slope). The same does not apply when negative drain
pulses (V̂D < VD0 ) are considered, because charge emission time constants are
sensibly longer than pulse width. This leads to observe an almost ideal iso-thermal
and traps- frozen IV characteristic for each VD < VD0 .
For the sake of comparison, the same kind of experiment has been carried out
with the GaAs pHEMT already introduced in the previous Section. Pulsed and
average drain currents at two constant gate voltages are plotted in Figures 4.27a
and 4.27b. Neither critical slope-changes in the pulsed IV curve nor variations in
the average drain current are observed when considering both negative and positive
pulses. This could possibly suggest that capture and emission time constants are
in these GaAs devices both long enough to satisfy above cut-off pulsed operation.
The testing of the pulsed IV behaviour with respect to gate-only pulses was
not such as straightforward. In fact, due to the 50 Ω load-line, a gate pulse always
also leads to an associated drain pulse. Thus, IV characteristics were measured
by simultaneously pulsing from the gate and drain ports and the IV data were
93
4. A NEW PULSED CHARACTERIZATION SETUP
(a)
(b)
Figure 4.27: GaAs pHEMT : Pulsed (continuous) and average (slashed) Drain
Current at VG0 = −0.5 V and VG0 = −0.4 V. Drain pulses only at VD0 = 5 V (a)
and VD0 = 1.5 V (b).
interpolated on a rectangular grid of voltages at the device ports. For instance,
the pulsed IV characteristics obtained from VG0 = −1.6 V, VD0 = 25 V and from
VG0 = −1 V, VD0 = 15 V are shown in Figures 4.28a and 4.28b, respectively.
Moreover, the pulsed trans-characteristics corresponding to VD0 = 25 V and
VD0 = 15 V are shown in Figures 4.29a and 4.29b. In the same figures the average
current values are superimposed. Almost constant average current values are
observed versus gate voltage variations.
Finally, the average currents observed in the presence of both gate and drain
pulses are presented in Figures 4.30a and 4.30b. As it can be seen, in the presence
of positive drain pulses, the peak of the gate pulse also plays a role in the definition
of the trap states.
4.8
Conclusions
In this Chapter a new measurement setup for the pulsed characterization of devices
has been presented. This system has many advantages compared to conventional
setup and in particular allows to generate and measure shorter pulses. Moreover,
a full calibration procedure has been implemented and validated. The setup has
then been used to characterize GaAs and GaN on SiC Field Effect Transistors.
Critical differences in the behaviour of the charge trapping phenomena taking place
into these devices have been highlighted through the interpretation of the average
94
4.8. Conclusions
(a)
(b)
Figure 4.28: GaN HEMT (L = 0.25 µm, W = 600 µm) : Pulsed Drain current
characteristics from VG0 = −1.6 V, VD0 = 25 V (a) and VG0 = −1 V, VD0 = 15 V
(b).
(b)
(a)
Figure 4.29: GaN HEMT (L = 0.25 µm, W = 600 µm) : Pulsed transcharacteristics from VG0 = −1.6 V, VD0 = 25 V (a) and VG0 = −1 V, VD0 = 15 V
(b).Curves are plotted for the drain voltage corresponding to the quiescent condition. Direct current components are also plotted in the figures.
95
REFERENCES
(b)
(a)
Figure 4.30: GaN HEMT (L = 0.25 µm, W = 600 µm) : Average drain current
measured during a gate and drain pulsed IV acquisition: V̂G = −1.6 V (bluecrosses), V̂G = −2.4 V (red-squares), V̂G = −0.8 V (green-circles). Pulses from
VG0 = −1.6 V, VD0 = 25 V (a); V̂G = −1 V (blue-crosses), V̂G = −2.2 V (redsquares), V̂G = −0.2 V (green-circles). Pulses from VG0 = −1 V, VD0 = 15 V
(b).
drain currents measured during the pulsed characterization. This allows to observe
that, in some circumstances, even a pulse length of 50 ns is not short enough to
consider the state of traps as only determined by the bias point. The presented
results prove that the trapping and detrapping behaviour in GaN HEMTs is highly
asymmetric. Time constant associated with traps capture are really fast while
the emission is a slow process. The proposed setup represents in our opinion a
valuable characterization instrument, which will allow further investigations of
the complex charge trapping phenomena in GaN FETs and the development of
pulsed measurement procedures to be used for nonlinear model extractions and
circuit design.
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dynamics,” Microwave Theory and Techniques, IEEE Transactions on, vol. 49,
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[4] A. Jarndal and G. Kompa, “Large-signal model for AlGaN/GaN HEMTs
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[5] Agilent ADS Circuit Components Manual, Agilent EEsof EDA, 2012. [Online].
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[10] M. Golio, Ed., The RF and Microwave Handbook. CRC Press, 2010.
[11] C. Gaquiere, J. P. Lafont, and Y. Crosnier, “Pulsed bias/pulsed RF characterization measurement system of FET at constant intrinsic voltages,” Microwave
and Optical Technology Letters, vol. 20, no. 5, pp. 349–352, 1999.
[12] J. Scott, J. Rathmell, A. Parker, and M. Sayed, “Pulsed device measurements
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[14] J. Collantes, Z. Ouarch, C.-Y. Chi, M. Sayed, and R. Quere, “Discrepancies
obtained in transconductance extracted from pulsed I-V curves and from
pulsed S-parameters in HEMTs and PHEMTs,” Electronics Letters, vol. 34,
no. 3, pp. 291–292, Feb. 1998.
[15] A. Santarelli, R. Cignani, V. Di Giacomo, S. D’Angelo, D. Niessen, and F. Filicori, “Large-signal characterization of GaN-based transistors for accurate
nonlinear modelling of dispersive effects,” in Integrated Nonlinear Microwave
and Millimeter-Wave Circuits (INMMIC), 2010 Workshop on, Apr. 2010, pp.
115–118.
[16] O. Jardel, F. De Groote, T. Reveyrand, J.-C. Jacquet, C. Charbonniaud,
J.-P. Teyssier, D. Floriot, and R. Quere, “An electrothermal model for
AlGaN/GaN power HEMTs including trapping effects to improve large-signal
simulation results on high VSWR,” Microwave Theory and Techniques, IEEE
Transactions on, vol. 55, no. 12, pp. 2660–2669, Dec. 2007.
[17] A. Santarelli and V. Di Giacomo, “Empirical modeling of GaN FETs for
nonlinear microwave circuit applications,” in Microwave Symposium Digest
(MTT), 2010 IEEE MTT-S International, May 2010, pp. 1198–1201.
[18] A. Raffo, S. Di Falco, V. Vadala, and G. Vannini, “Characterization of
GaN HEMT low-frequency dispersion through a multiharmonic measurement
system,” Microwave Theory and Techniques, IEEE Transactions on, vol. 58,
no. 9, pp. 2490–2496, Sep. 2010.
[19] A. Santarelli, R. Cignani, D. Niessen, S. D’Angelo, P. A. Traverso, and
F. Filicori, “Characterization of GaN and GaAs FETs through a new pulsed
measurement system,” in Microwave Integrated Circuits Conference (EuMIC),
2011 European, Oct. 2011, pp. 1–4.
[20] V. Teppati, A. Ferrero, and U. Pisani, “Recent advances in real-time load-pull
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“Calibration issues for the large signal network analyzer (LSNA),” in ARFTG
Conference Digest, Fall 2002. 60th, Dec. 2002, pp. 99–106.
[22] A. Santarelli, V. Di Giacomo, A. Raffo, F. Filicori, G. Vannini, R. Aubry,
and C. Gaquire, “Nonquasi-static large-signal model of GaN FETs through
an equivalent voltage approach,” International Journal of RF and Microwave
Computer-Aided Engineering, vol. 18, no. 6, pp. 507–516, 2008.
[23] H. Johnson and M. Graham, High Speed Digital Design: A Handbook of Black
Magic. Prentice Hall, 1993.
[24] “Evaluating oscilloscope bandwidths for your application,” Application Note
5989-5733EN, Agilent Technologies, Inc, 2012.
[25] D. F. Williams and B. K. Alpert, “A general waveguide circuit theory,” J.
Res. Natl. Inst. Stand. Technol, vol. 97, pp. 533–562, 1992.
[26] Matlab User Guide, The MathWorks, Inc., Natick, Massachusetts, United
States, 2012. [Online]. Available: www.mathworks.com
[27] A. Rumiantsev and N. Ridler, “VNA calibration,” Microwave Magazine,
IEEE, vol. 9, no. 3, pp. 86–99, Jun. 2008.
[28] G. Kompa and F. van Raay, “Error-corrected large-signal waveform measurement system combining network analyzer and sampling oscilloscope
capabilities,” Microwave Theory and Techniques, IEEE Transactions on,
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[29] T. van den Broeck and J. Verspecht, “Calibrated vectorial nonlinear-network
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[30] J. Verspecht, P. Debie, A. Barel, and L. Martens, “Accurate on wafer measurement of phase and amplitude of the spectral components of incident and
scattered voltage waves at the signal ports of a nonlinear microwave device,”
in Microwave Symposium Digest, 1995., IEEE MTT-S International, vol. 3,
May 1995, pp. 1029–1032.
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[31] J. Verspecht, “Large-signal network analysis,” Microwave Magazine, IEEE,
vol. 6, no. 4, pp. 82–92, Dec. 2005.
[32] A. Ferrero and U. Pisani, “An improved calibration technique for on-wafer
large-signal transistor characterization,” Instrumentation and Measurement,
IEEE Transactions on, vol. 42, no. 2, pp. 360–364, Apr. 1993.
[33] “Infiniium 54800 series oscilloscopes,” Product Overview 5980-2397EN, Agilent Technologies, Inc, 2001.
[34] G. Dambrine, A. Cappy, F. Heliodore, and E. Playez, “A new method for
determining the FET small-signal equivalent circuit,” Microwave Theory and
Techniques, IEEE Transactions on, vol. 36, no. 7, pp. 1151–1159, Jul. 1988.
100
Chapter 5
Transient response
characterization
5.1
Introduction
One of the aims of the pulsed characterization setup presented in Chapter 4 was to
generate pulses short enough to be faster than the time constants associated with
thermal and trapping dispersive phenomena in order to obtain iso-dynamic pulsed
I/V characteristics. In other words, we wanted to characterize devices above the
cut-off frequency of dispersive phenomena. It has been shown for instance that
with GaN HEMTs this requirement can be met when pulsing from a drain voltage
bias to lower voltages while, pulsing to higher voltages, a change in the mean
value of the drain current is observed indicating a change in the state of traps.
Otherwise, in practical applications, devices could be driven or controlled by
signals that have a dynamic behaviour that is slower than dispersive phenomena.
In the frequency domain this means that real signals could have a significant
energy content below the cut-off frequency.
Let’s consider for example the case of a microwave power amplifier to be used
in a 4G base station. New communication standards such as LTE are almost all
based on OFDM modulations. This kind of modulations, which allows to obtain a
high spectral efficiency in terms of (bit/s)/Hz, have a high peak-to-average power
ratio (PAPR). As a consequence, a LTE modulated signal viewed in the time
domain resembles a irregularly pulsed RF signal. Even if in theory the signal has
101
5. TRANSIENT RESPONSE CHARACTERIZATION
energy only in a bandwidth around the RF carrier frequency, due to inevitably
non-linearities in the PA, the device is stimulated also by the baseband replica
of the modulated signal which corresponds to its envelop. This could have a
significant energy content also below the cut-off frequency of dispersive phenomena
leading to added distortion by long-term memory effects.
In this Chapter, the measurement of the dynamic drain current response of
GaN devices under pulsed voltage excitation is therefore exploited to study the
behaviour below the cut-off frequency of dispersive phenomena.
This is relevant because it allows, for instance, to compare different technologies
or different processing techniques and materials. Moreover, a pulsed bias voltages
characterization represents in a realistic way the working condition for many
applications. This is the case for Radars but also for communication standards
where a time domain duplexing of the uplink and downlink channels is adopted
(i.e. LTE-TDD). Here the PA in the transceiver is switched on and off, or to a
low power consumption state, following the TDD timing defined in the standard.
To improve the efficiency of PAs, techniques like Envelope Tracking are being
explored [1]. Also in this case the power supply to the devices in the PA is
dynamically changed with a potential excitation of memory effects [2, 3].
The transient response of the drain current gives also some indication on the
time constants involved. This kind of information is useful in the development
and optimization of behavioural models [4–6] that are used for instance in the
linearisation of power amplifiers.
Moreover, results of pulsed characterization are well suited to be used in the
calibration of parameters of TCAD physic-based models of devices.
The setup developed for the transient current characterization with pulsed voltage
excitation is described in Section 5.2 and some verification measurements on
resistor and LDMOS transistor are presented in Section 5.3. Results obtained
pulsing in different ways an AlGaN/GaN device are then analyzed in Section 5.4.
In Section 5.5, it is shown how it is possible to model the current transient response
by means of exponential decay functions. The technique is then used in Section 5.6
to compare different devices. Finally, in Section 5.7 are presented some results of
a pulsed RF characterization that shows how long term memory effects can affect
102
5.2. Setup description
also RF performances with a dynamic behaviour similar to the one measured on
the drain current with pulsed drain voltage excitation.
This work was carried out at Chalmers University of Technology during my
stay as a visiting Ph.D. student.
5.2
Setup description
The block diagram of the measurement setup used in this work is shown in
Fig. 5.1. Although the configuration is similar to the one used in conventional
pulsed characterization setups, the ability to fine control all the details of the
measurement and the use of the digital sampling oscilloscope allows to explore
new characterization methods. With commercial setups [7] for instance only the
final pulsed IV characteristic is obtained while with this setup it is otherwise
possible to study the whole time domain response of the drain current and not
only the peak current inside pulses.
An HP85120A K43 pulser module is used for the generation of drain voltage pulses. This instrument has a low output impedance and is able to generate
voltage pulses up to 40 V, both positive and negative with respect to a base
Oscilloscope
HP8130A
pulse generator
HP85120A K43
pulser
DUT
Power supply
Figure 5.1: Block diagram of pulsed measurement setup.
103
5. TRANSIENT RESPONSE CHARACTERIZATION
voltage. Low and high pulses voltage levels are provided by two programmable
DC power supplies (Agilent 6625A DC) which are also used to directly bias the
gate of the DUT when only drain voltage pulses are applied.
One output channel of a HP8130A pulse generator is used as a master trigger
for the HP85120A K43 while the second output channel can be used for pulsing
directly the gate voltage when needed.
The drain current is measured with a Tektronix TCP202 current probe. This
wideband probe is able to measure the current from DC up to 50 MHz. On the
gate side is connected also a Tektronix CT-2 Current Transformer. This allows
only the measurement of AC currents and has a high-pass frequency response
with a lower cut-off frequency of 1.2 kHz. This probe is thus only used to monitor
any eventual abnormal behaviour of the device. For instance, if the transistor
under test has a high gate leakage current it will be clear from this monitoring.
A Tektronix TDS7104 Oscilloscope, with a maximum sampling rate of 10 GS/s,
is used as the acquisition system and is triggered directly by the HP8130A. Current
probes and high impedance voltage probes, used to monitor the applied voltage
pulses, are thus connected to the four input channels of the scope.
All the instruments are controlled and synchronized by a Matlab program
which allows also to set all the measurement parameters like the starting bias
point, pulses lengths and period, number of averages, etc..
Before selecting the HP85120A K43 other pulser were also evaluated. In
fact the quality of generated pulses varies greatly from instrument to instrument.
Different pulser were compared doing a campaign of test measurements on resistors.
Voltage pulses generated by the HP85120A K43 have almost no ringing both
inside and after pulses. As will be shown, the absence of ringing after pulses is
important to be able to correctly interpret the current transient. An example
of generated drain voltage pulses of different amplitudes is shown in Fig. 5.2a
and 5.2b.
The rise time of the pulses generated by the HP85120A K43 has been measured
to be around 100 ns. Almost all the energy of pulses is thus well below 20 MHz (see
Eq.(4.13)) which has been setted as the input bandwidth of the scope channels.
In fact it has been verified with measurements on resistors that reducing the
acquisition bandwidth to 20 MHz does not affect pulses waveforms compared
to measurement made with the scope full analog bandwidth of 1 GHz. Instead,
104
5.3. Verification measurements
(a)
(b)
Figure 5.2: Example of drain voltage pulses of different amplitudes from a 15 V
base voltage. Period 1 ms, pulse length 10 µs, duty cycle 1 % (a); Zoom in same
pulses (b).
reducing the system bandwidth gives the advantage of considerably reducing the
measurement noise.
With this setup the whole current (I(t) = I0 + i(t)) and voltage (V (t) =
V0 + v(t)) waveforms are measured. As already explained, scopes have a limited
DC accuracy and could present a small DC offset error. Moreover, also the current
probe could have a small and constant offset. To compensate for this, before the
actual pulsed measurement, the DC amplitude on the four channels is acquired
while a DC 0 V is applied. After the measurement all the data is corrected by
subtracting this offset.
Another important aspect to consider is the synchronization of gate and drain
pulses. For this the output of gate and drain pulser are directly connected to the
scope input channels and from the controlling software is then possible to adjust
the relative delay between the two signals until a correct alignment is verified on
the scope.
5.3
Verification measurements
As a first test to verify the setup, the measurement procedure and data postprocessing, some experiments were conducted applying voltage pulses on resistors.
The parameters of the measurement like the base voltage, pulse width, pulse
period, etc. are the same that are used later for the characterization of GaN
105
26
24
22
20
18
16
14
Current (mA)
Current (mA)
5. TRANSIENT RESPONSE CHARACTERIZATION
0
200
400 600
Time (µs)
800
(a)
26
24
22
20
18
16
14
-5
0
5
10
Time (µs)
15
(b)
Figure 5.3: Measured current on resistor for different amplitudes of voltage pulses.
Pulse width 10 µs, period 1 ms (a); Zoom in same pulses (b).
devices.
As an example in Fig. 5.3 is shown the acquired pulsed current on a resistor
(this has been measured by means of a high precision Keytley 2400 SMU). The
voltage pulses are the same shown in Fig. 5.2 with a base voltage of 15 V and
maximum amplitudes from 16 V up to 25 V in steps of 1 V. The current presents
some ringing at the beginning and ending of the pulse due to multiple reflections
between the load and the pulser. This limits the minimum pulse width that is
possible to use with this setup to approximately 500 ns. This is comparable to the
capabilities of commonly available commercial systems but with the important
advantage of being able to acquire the whole time-domain waveforms.
In Fig. 5.4a is shown the extracted pulsed IV characteristic of the resistor with
a linear least square fitting of the measured data and in Fig. 5.4b the calculated
resistance for every amplitude compared to the fitted value.
Other tests were conducted comparing the pulsed IV output characteristic
obtained with the setup to the static IV measured by means of an Agilent 4156
Precision Semiconductor Parameter Analyzer. In Fig. 5.5 are shown the timedomain drain current responses of a Laterally Diffused Metal Oxide Semiconductor
(LDMOS) transistor with a periphery of 3 × 100 µm pulsing the drain voltage
down to 0 V (blue) and up to 25 V (red) from a bias point of VG0 = 3.7 V,
VD0 = 15 V (ID0 = 12 mA). The output pulsed IV characteristic extracted from
these measurements is shown in Fig. 5.6 superimposed on the corresponding static
IV demonstrating a good agreement. LDMOS technology presents almost no
106
M
Microwave Pow
Applicat
5.4. Device characterization
Calculated Resistance (Ω)
Peak Current (mA)
26
24
22
20
18
16
14
16
18 20 22 24
Peak Voltage (V)
980
Candida
979
Daniel Ni
978
977
976
975
16
Tutor:
18 20 22 24
Peak Voltage (V)
(a) Resistor pulsed IV characteristic with(b) Calculated resistance for every peak voltProf. Fabio Filicori
least square fitting.
age and least square fitting.
Tutor:
Prof. Fabio
trapping phenomena and due to the low dissipated power the pulsed and static
Ph.D. Cou
Ph.D.
Course
Coordinator:
characteristics are coincident. As a consequence
of the low
output conductance
of
this device, the pulsed current amplitude forProf.
small voltages
variations
from the
Prof. Alessa
Alessandro
Vanelli-Coralli
bias point in Fig. 5.5 is small.
5.4
Device characterization
In this work, instead to try to extract a complete pulsed IV characteristic, the
aim is to study the effects that dispersive phenomena could have in a Final
working
condition similar to the one found in typical power amplifier applications and to
compare different devices and technologies.
For this, it has been decided to characterize devices along a hypothetical
load-line similar to the one that could be used in a Class-AB power amplifier.
As shown schematically in Fig. 5.7 devices are therefore biased with a DC drain
current of approximately 10 % to 20 % of the IDSS maximum current determined
from the static IV characteristic for VG = 0 V at the knee. From the bias condition
appropriate gate and drain voltage pulses are then applied in order to follow the
load-line. Considering for instance Gallium Nitride HEMTs, is thus necessary
to simultaneously apply positive gate voltage pulses and negative drain voltage
pulses with respect to the bias to reach the knee region, i.e. V̂G > VG0 , V̂D < VD0 .
Instead, the opposite is true to reach the pinch-off region at high drain voltages:
V̂G < VG0 , V̂D > VD0 .
107
Examinatio
Department
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5. TRANSIENT RESPONSE CHARACTERIZATION
Tele
Drain Current (mA)
12
10
8
6
4
Non
0
-20
0
20
40
60
80
100
Tutor:Mo
Time (µs)
Prof. Fabio F
Figure 5.5: LDMOS (W = 300 µm): time-domain drain pulsed current responses
M
at V = 3.7 V for lower (blue) and higher (red) amplitudes of drain voltage pulses
2
G0
from VD0 = 15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Cour
Prof. Alessan
Drain Current (mA)
100
80
60
40
20
0
0
5
10
15
Drain Voltage (V)
20
25
Tutor:
Prof. Fabio F
Figure 5.6: LDMOS (W = 300 µm): output DC-IV characteristic for VG from
2.5 V to 6.7 V in steps of 0.6 V. Superimposed extracted pulsed characteristic at
VG0 = 3.7 V for lower (blue) and higher (red) drain voltages than bias (green).
Ph.D. Cours
Prof. Alessan
108
5.4. Device characterization
Figure 5.7: Class AB load-line.
As shown in Chapter 4 the state of traps is dependent on both gate and drain
voltages although the drain has a bigger influence. To separate the two effects
is therefore also interesting to study the drain current transient response with a
fixed gate voltage and pulsing only the drain voltage to lower and higher levels
with respect to the bias, i.e. VG = VG0 , V̂D < VD0 and V̂D > VD0 .
The results of this experiment on a AlGaN/GaN HEMT with a gate length
of 0.25 µm and a periphery of 2 × 50 µm are shown1 in Figures 5.8 and 5.9. The device is biased at VG0 = −2.8 V , VD0 = 15 V with a corresponding ID0 = 14.5 mA
(≈ 18 % of IDSS ) and is mounted on a metal carrier to guarantee good thermal
conduction. Drain voltage pulses have a period of 1 ms and a width of 10 µs.
Comparing the drain current responses for voltage pulses with peak amplitudes
from 14 V to 0 V in steps of 1 V in Fig. 5.8 with the current responses for voltage
pulses with peak amplitudes from 16 V to 25 V in Fig. 5.9 it is evident how the
two behaviour are quite different. No particular transient is observed pulsing
to lower voltages while pulsing to higher V̂D the current has a deep reduction
after the pulse with a long recovery transient. This reduction gets bigger as the
reached peak voltage increases and at the same time the mean value of the current
calculated on the period decreases. This asymmetric behaviour is in agreement
with the results presented in Chapter 4 obtained with a different measurement
setup and for other AlGaN/GaN devices. In this case, however, longer pulses
1
In following Figures it has been chosen to always show all (and the same) period to make
it easier to visually compare and appreciate the difference of the transient response between
different experiments/devices.
109
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5. TRANSIENT RESPONSE CHARACTERIZATION
Drain Current (mA)
15
10
5
0
0
200
400
600
Time (µs)
800
Tutor:
Prof. Fabio F
Figure 5.8: GaN HEMT (W = 2 × 50 µm): drain current for drain only voltage
pulses with peak amplitudes from 14 V to 0 V in steps of 1 V starting from
VG0 = −2.8 V , VD0 = 15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Cou
Prof. Alessan
and periods are used with a stronger excitation of dispersive phenomena which
manifest clearly the effect on the drain current. It has also to be noted how this
behaviour is totally absent in the case of the LDMOS transistor shown in Fig. 5.5
(red lines) whit similar current and voltage levels.
The asymmetry is explainable supposing again that capture and emission time
constants of trap states are very different [8]. Capturing time constants τC are
very short, probably shorter than ns because, as shown in Chap. 4, even with
pulses of the order of 50 ns it is possible to measure a change in the mean value
of the drain current. Emission is otherwise much slower with time constants
τE in the order of tens of µs or even longer as we will see. When a positive
drain voltage pulse is applied, the free carriers in the device are captured almost
instantaneously; when the pulse excitation is then removed the carriers captured
by trap states are emitted back with long time constant as is evident from Fig. 5.9.
When otherwise the voltage pulse is negative with respect to the bias, already
captured carriers don’t have enough time to be emitted. After the pulse, the
state of traps is thus the same as the bias state, with no change in the drain current.
The current reduction that is observed inside pulses of Fig. 5.11 can be attributed to self heating. The pulse length of 10 µs could be enough to cause a
slight increase of the channel temperature. A similar but opposite behaviour is
110
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5.4. Device characterization
Drain Current (mA)
18
17
16
15
14
13
0
200
400
600
Time (µs)
800
Tutor:
Prof. Fabio Filico
Figure 5.9: GaN HEMT (W = 2 × 50 µm): drain current for drain only voltage
pulses with peak amplitudes from 16 V to 25 V in steps of 1 V starting from
VG0 = −2.8 V , VD0 = 15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Course C
Alessandro
In fact, in the pulsesProf.
of
seen in Fig. 5.10, with a slight increase of the current.
Fig. 5.11 for V̂D > VD0 , both the effects of self heating and carriers capture by trap
states could be present. The transient current response after pulses is otherwise
not explainable by means of thermal effects. These should have a symmetric
effect, with a similar but opposite behaviour in the cases of self heating (pulsing
to higher voltages) and cooling (pulsing to lower voltages).
To verify further the influence of the drain voltage and to reach also the
extremes of the hypothetical class AB load line, other experiments were conducted
on the same device. Results obtained starting from the same bias point as before
but pulsing simultaneously the gate to 0 V (channel fully open) and the drain to
peak amplitudes from 14 V to 0 V are shown in Fig. 5.12: no transient is present
after pulses. Pulsing otherwise the gate down to −5.5 V (pinch off) and the drain
to peak amplitudes from 16 V to 25 V, the current response presents again a long
transient as shown in Fig. 5.13. This proves further how this behaviour is a strong
function of the increase in the drain voltage with respect to the bias and how this
is not a thermal effect.
The extracted pulsed characteristic for VG0 = −2.8 V is shown in Fig. 5.14
superimposed to the static IV. Dashed lines were added to show the change of
slope of the pulsed characteristic on the left and on the right of the bias point. In
the same figure is reported also the extracted pulsed characteristic when V̂G = 0 V
111
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5. TRANSIENT RESPONSE CHARACTERIZATION
Tel
Drain Current (mA)
15
14
13
12
Non
11
-20
-10
0
10
20
30
Tutor:Mo
Time (µs)
Prof. Fabio F
Figure 5.10: GaN HEMT (W = 2 × 50 µm): drain current for drain only voltage
M
pulses with peak amplitudes from 14 V to 9 V in steps of 1 V starting from
VG0 = −2.8 V , VD0 = 15 V. Pulse width 10 µs, period 1 ms. Detail of current
response inside pulses.
Ph.D.
Cour
Prof. Alessan
Drain Current (mA)
18
17
16
15
14
-20
-10
0
10
Time (µs)
20
30
Tutor:
Prof. Fabio F
Figure 5.11: GaN HEMT (W = 2 × 50 µm): drain current for drain only voltage
pulses with peak amplitudes from 16 V to 25 V in steps of 1 V starting from
VG0 = −2.8 V , VD0 = 15 V. Pulse width 10 µs, period 1 ms. Detail of current
response inside pulses.
Ph.D.
Cour
Prof. Alessan
112
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5.4. Device characterization
Drain Current (mA)
80
60
40
20
Nonlin
0
0
200
400
600
800
Tutor:Mode
Time (µs)
Prof. Fabio Filico
Figure 5.12: GaN HEMT (W = 2 × 50 µm): drain current for gate voltage pulsed
Mic
to 0 V and drain peak amplitudes from 14 V to 0 V in steps of 1 V starting from
VG0 = −2.8 V , VD0 = 15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Course C
Prof. Alessandro
Drain Current (mA)
16
12
8
4
0
0
200
400
600
Time (µs)
800
Tutor:
Prof. Fabio Filico
Figure 5.13: GaN HEMT (W = 2 × 50 µm): drain current for gate voltage pulsed
to −5.5 V (pinch-off) and drain peak amplitudes from 16 V to 25 V in steps of 1 V
starting from VG0 = −2.8 V , VD0 = 15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Course C
Prof. Alessandro
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Drain Current (mA)
5. TRANSIENT RESPONSE CHARACTERIZATION
80
60
40
20
0
0
5
10
15
Drain Voltage (V)
20
25
Tutor:
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Figure 5.14: GaN HEMT (W = 2 × 50 µm): static DC-IV output characteristic for
VG from 0 V to −4 V in steps of 0.4 V (black lines). Superimposed extracted pulsed
characteristic for VG0 = −2.8 V: V̂D < VD0 (blue) and V̂D > VD0 (red). Dashed
lines to put into evidence change of slope around bias point. Extracted pulsed
Cour
characteristic for V̂G = 0 V and V̂D < VD0 (purple). Bias point VG0 = −2.8Ph.D.
V,
VD0 = 15 V (green).
Prof. Alessan
and V̂D < VD0 (same measurements shown in Fig. 5.12) and as expected it is
higher than the static DC-IV characteristic.
5.5
Transient modelling
In theory more than one time constant, each associated with different trap states,
could be present in the current recovery transient after voltage pulses when
VG = VG0 , V̂D > VD0 . However, as a first approximation, the transient can be
modelled with a single time constant exponential decay function of the form:
t
I(t) = B − S e− τ
(5.1)
− τt
= A + S(1 − e
)
(5.2)
where τ is the time constant, B is the final value of the transient (or equivalently
the base value before the next pulse), S is the step in current after the pulse and
A is the starting value of the transient (B = A + S). Parameters are schematically
represented in Fig. 5.15.
An example of measured and fitted transient for different pulses amplitudes
114
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5.5. Transient modelling
Drain Current
ID0
S
B
A
0
0
T
Time
Tutor:
Prof. Fabio Fil
Figure 5.15: Schematic representation of transient current response with fitting
parameters.
Ph.D. Course
Prof. Alessand
is reported in Fig. 5.16 for an AlGaN/GaN 2 × 50 µm device. Parameters of
equation (5.1) have been extracted through nonlinear least-squares curve fitting
optimization. These parameters are a function of the peak voltage amplitude as
shown in Fig. 5.17 and the relations seems to be almost linear. In particular, in
Fig. 5.17b is shown the percentage change of S in relation to the base B current
as a function of the peak voltage, this can be approximated as
S = kSB (V̂D − VD0 )
B %
(5.3)
As the peak voltage amplitude increases, there is a reduction both in the mean
value and in the base value of the current compared to the bias current ID0 without
pulses, as shown in Fig. 5.9 and Fig. 5.11. The percentage reduction (Fig. 5.17a)
can be approximated as a linear function of the peak voltage:
B = 100 + kBB (V̂D − VD0 )
ID0 %
(5.4)
Also the extracted time constant τ changes in a linear way, as shown in Fig. 5.17c
and again can be approximated linearly as
τ = kτ (V̂D − VD0 )
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(5.5)
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Drain Current (mA)
5. TRANSIENT RESPONSE CHARACTERIZATION
11
10
9
Measurements
Exponential fit
8
0
0.2
0.4
0.6
Time (ms)
0.8
1
Tutor:
Prof. Fabio F
Figure 5.16: commercial GaN device C1 (4 × 50 µs): time-domain current for peak
drain voltage amplitudes from 16 V to 25 V in steps of 1 V. Drain bias voltage
15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Cour
Alessan
Parameters kBB , kSB and kτ , extracted by linear least square fit, are reported in
Prof.
Table 5.1 and the corresponding linear approximations are shown in Fig. 5.17.
kBB
(%/V)
kSB
(%/V)
kτ
(µs/V)
−0.60
2.43
56.53
Table 5.1: Extracted parameters for linear approximation of peak drain voltage
dependence of exponential fitting parameters.
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5.5. Transient modelling
Step/Base (%)
25
98
96
94
16
18
20
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20
15
10
5
0
24
16
18
20
22
Tutor:
V̂d (V)
Prof. Fabio Filicori
V̂d (V)
(a)
(b)
24
Tutor:
Prof. Fabio F
600
500
Ph.D. Course Coordinator:
Ph.D. Cour
Prof. Alessandro Vanelli-Coralli
Prof. AlessanD
400
τ (µs)
Base/ID0 (%)
100
300
200
100
0
16
18
20
22
24
V̂d (V)
(c)
Tutor:
Final Examination
Prof. Fabio Filicori
Figure 5.17: Extracted parameters
Ph.D. Course Coordinat
Prof. Alessandro Vanelli-Co
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5. TRANSIENT RESPONSE CHARACTERIZATION
5.6
Devices comparison
Transient current responses similar to the ones shown in the previous Section
have been verified on many different GaN devices. In this Section, the results of
a comparison of six AlGaN/GaN HEMT devices of same gate length (0.25 µm)
and periphery (2 × 50 µm) is presented. All the transistors are from the Chalmers
University foundry [9] but are from different generations and therefore there
is some difference in used materials and processing steps. All the devices are
passivated. The time-domain current responses of the six devices are shown in
Fig. 5.18 for peak drain voltage amplitudes from 16 V up to 25 V, starting from
a 15 V drain bias voltage. Gate voltage is setted in order to have ID0 ≈ 15 % of
IDSS . Devices characteristics and bias points are reported in Table 5.2.
With this characterization it is possible to extract many informations. For
instance, looking at the amplitude inside pulses it is possible to infer that device
D1 has a higher output conductance.
The same experiment has also been repeated for an AlGaN/GaN HEMT device
(0.25 µm, 4 × 50 µm) from a commercial vendor and results are shown in Fig. 5.19.
The current reduction after the pulse is even bigger in this case with a slower
recovery of the current.
To compare devices, the transient of the current after pulses has been fitted with
an exponential decay function for all peak drain voltage amplitudes as described
in Section 5.5. Extracted parameters as a function of the drain voltage are shown
in Fig. 5.20. Devices D1, D2, D3, D4 and D5 have similar time constants while
Device
D1
D2
D3
D4
D5
D6
C1
Peif.(µm) IDSS (mA)
2 × 50
2 × 50
2 × 50
2 × 50
2 × 50
2 × 50
4 × 50
80
85
78
66
43
85
210
Vp.off (V)
−3.4
−3.8
−2.8
−3.0
−2.2
−3.4
−4.0
VG0 (V) VD0 (V) ID0 (mA) %IDSS
−2.8
−3.2
−2.0
−2.3
−1.6
−2.8
−3.2
15
15
15
15
15
15
15
14.8
11.8
10.0
8.5
5.8
11.1
30.0
18
14
13
13
13
13
14
Table 5.2: GaN devices comparison: characteristics and starting bias points for
pulsed characterization.
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5.6. Devices comparison
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Drain Current (mA)
18
15
D1
17
D2
14
13
16
13
11
15
12
10
14
11
9
13
0
200 400 600 800
10
D3
12
0
200 400 600 800
0
200 400 600 800
Drain Current (mA)
9
D4
11
10
9
8
7
0
200 400 600 800
D5
8
7
11
6
10
5
9
4
Time (µs)
D6
12
8
0
200 400 600 800
0
Time (µs)
200 400 600 800
Time (µs)
Nonlin
Mode
Mic
Figure 5.18: GaN devices (D1 to D6) comparison: time-domain current for peak
drain voltage amplitudes from 16 V to 25 V in steps of 1 V. Drain bias voltage
15 V. Pulse width 10 µs, period 1 ms.
Drain Current (mA)
40
C1
35
30
25
20
0
200
400
600
Time (µs)
800
Tutor:
Prof. Fabio Filico
Figure 5.19: commercial GaN device C1 (4 × 50 µs): time-domain current for peak
drain voltage amplitudes from 16 V to 25 V in steps of 1 V. Drain bias voltage
15 V. Pulse width 10 µs, period 1 ms.
Ph.D. Course C
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5. TRANSIENT RESPONSE CHARACTERIZATION
D6 and C1 present clearly much longer time constants. Analogous considerations
can be made for the step reduction of the current after voltage pulses. In this
case devices C1 and D6 show a considerable reduction, up to 25 % of the drain
current. This could be explained by a higher density of trap states. Instead, it has
been verified that the reduction of the base current compared to the static DC
bias value (Fig. 5.20a) is mainly influenced by the period of the pulsed voltage
excitation used. This has been done comparing results of experiments conducted
on the same device but with different temporal parameters for drain voltage pulses.
In fact, if the period is long enough, the current can recover almost completely to
the bias value. This, however, shows how in addition to a dynamic variation, also
a shift on the current, that depends on the dynamics of applied signals, is present.
It has also to be noted that for some devices a single time constant function is
not enough to model accurately the transient. In these cases could be interesting
to try to adopt more advanced methods and algorithms for the fitting of multiple
time constants exponential decay functions [10]. In principle by applying inverse
Laplace transform methods, similarly to what is done in some Deep Level Transient
Spectroscopy techniques [11], could also be possible to extract a continuous
spectrum of time constants.
120
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5.6. Devices comparison
25
Nonlinear
CandidaC
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Microwav
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D1
95
Step/Base (%)
Base/ID0 (%)
100
D1
D2
D3
D4
D5
90
D6
D2
20
D3
D4
D5
15
D6
C1
10
5
C1
16
18
20
22
0
24
16
18
20
22
24
Tutor:
V̂d (V)
Prof. Fabio
(b)Filicori
V̂d (V)
(a)
Tutor:
Prof. Fabio F
800
D1
D2
Ph.D. Cour
Ph.D. Course Coordinator:
Prof. AlessanD
Prof. Alessandro Vanelli-Coralli
D3
600
D4
τ (µs)
D5
D6
400
C1
200
0
16
18
20
V̂d (V)
(c)
22
24
Tutor:
Final Examination
Prof. Fabio Filicori
Figure 5.20: GaN devices (D1-D6,C1) comparison: extracted parameters as a
function of the peak drain voltage.
Ph.D. Course Coordinat
Prof. Alessandro Vanelli-Co
Final E
121
5. TRANSIENT RESPONSE CHARACTERIZATION
5.7
Pulsed RF characterization
The long term memory effects measured on the drain current, as shown in previous
Sections, are affecting also RF performances. To demonstrate this a pulsed RF
characterization has been carried out by means of a large signal measurement
setup developed at Chalmers University of Technology [12]. The idea is to apply
at the input of the device a pulsed modulated RF signal with temporal parameters
(i.e. T and τ ) similar to the ones used for the pulsed IV characterization and to
measure the time-domain gain and output power. This allows to verify if also
these present some memory effect.
The schematic of the setup, that is based on a MT4463 Maury Microwave/NMDG
Large Signal Network Analyzer (LSNA), is shown in Fig. 5.21. The LSNA allows
to measure harmonics of incident and reflected waves at the DUT reference plane,
from 600 MHz up to 50 GHz. Thanks to the calibration both the absolute amplitude and phase relation of waves are known [13]. When used in modulation
mode, the LSNA is also capable of measuring modulated signals with a periodic
modulation. Depending on the instrument settings a number of sideband frequencies are measured around each harmonic of the fundamental which corresponds to
the carrier frequency of the test signal. From incident and reflected waves is then
possible to directly calculate the input and output power and thus the gain in the
time domain for the whole length of a modulation period.
The amplitude of the source RF carrier is modulated by a vector modulator
which is synchronized with the LSNA sampler [12] and is controlled in similar way
LSNA
DUT
50
Figure 5.21: Block diagram of pulsed RF measurement setup.
122
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5.7. Pulsed RF characterization
0
0
T
Time
Tutor:
Prof. Fabio Fi
Figure 5.22: Schematic representation of pulsed input signal. Envelope in blue.
as done in [14]. The pulsed modulated signal is then amplified and applied to the Ph.D. Cours
gate of the device. A schematic representation of the signal that is pulsed between Prof. Alessand
a low and high power is shown in Fig. 5.22. On the output a passive tuner is used
to present an opportune load impedance to the device at the carrier frequency.
Before the measurement the tuner is characterized with the LSNA replacing the
DUT with a Thru. During the pulsed characterization the current on the DC
path of the bias tee is also monitored with a wideband current probe connected
to an oscilloscope.
To reproduce realistic working conditions of a class-AB power amplifier an
opportune bias point is selected and the load impedance is chosen for maximum
output power. This is done performing a load-pull measurement with a CW signal
at the carrier frequency.
A commercial AlGaN/GaN device with a periphery of 8 × 50 µm has been characterized in this way. The selected bias point is VD0 = 20 V, VG0 = −2.3 V, with a
corresponding quiescent current ID0 = 44 mA (≈ 15 % of IDSS = 288 mA). The
optimum reflection coefficient for maximum output power has been found to be
GL = 0.4 + j0.4 which correspond to the load impedance ZL = 65.64 + j77. In
Fig. 5.23 is reported the measured static characteristic of the device with the
loadline corresponding to <(ZL ) and the selected bias point.
The carrier frequency is 4 GHz and the pulse modulation has a period T = 1 ms
123
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5. TRANSIENT RESPONSE CHARACTERIZATION
0.3
0.2
0.1
0
0
5
10
15
20
Drain Voltage (V)
25
30
Tutor:
Prof. Fabio F
Figure 5.23: Commercial GaN device (8 × 50 µs): measured DC-IV characteristic
(black lines) and ideal resistive load line for maximum output power as determined
with load-pull measurements (blue). Class-AB bias point used for pulsed RF
characterization (green).
Ph.D. Cour
Prof. Alessan
and width τ = 10 µs (duty cycle δ = 1 %). In Fig. 5.24a is shown the time domain
source available power calculated from the a1 (t) wave as
Pav (dBm) = 10 log10
|a1 |2
100
+ 30
(5.6)
The measured time domain gain and drain current are shown in Fig. 5.24b and
Fig. 5.24c respectively. It is evident how in this case both the RF gain and the
drain current present a slow transient after the RF pulse. Inside the pulse the gain
is lower due to output power compression. The drain current inside the pulse is
instead higher, this is due to AC to DC nonlinear conversion. These measurements
confirm that dispersive effects due to traps manifest as long term memory also on
the RF device performances. This could be especially critical with high PAPR
burst modulated signals where this memory effect could lead to added distortion
and inter-symbol-interference.
5.8
Conclusions
In this Chapter, a transient drain current characterization setup has been presented
with some validation measurements on resistors and LDMOS device. The setup
124
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5.8. Conclusions
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CandidaC
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A
10
Gain (dB)
Pav (dBm)
18
5
17
16
0
0
200 400 600 800 1,000
200 400 600 800 1,000
Tutor: Time (µs)
Prof. Fabio
(b)Filicori
Time (µs)
(a)
Drain Current (mA)
0
Tutor:
Prof. Fabio F
70
60
Ph.D. CourD
Ph.D. Course Coordinator:
Prof. Alessan
Prof. Alessandro Vanelli-Coralli
50
40
30
0
200 400 600 800 1000
Time (µs)
(c)
Tutor:
Final Examination
Prof. Fabio Filicori
Figure 5.24: AlGaN/GaN HEMT: time-domain input available power envelope (a),
gain (b) and drain current (c) for a period of periodic pulsed RF excitation.
Ph.D. Course Coordinat
Prof.
Vanelli-Co
has
beenAlessandro
used to
allows to study an to compare traps effects on devices and
characterize the transient response of GaN HEMTs to pulsed voltages excitation. It
has been shown that pulsing from a class-AB bias point, the dynamic behaviour of
the current is highly dependent on the direction of applied pulses. The asymmetry
of the effect is due to the asymmetry in capture and emission time constants of
the traps. These traps are probably located in the GaN buffer or under the gate
but not on the surface being all measured devices passivated. The effect is present
also in commercial AlGaN/GaN devices. A simple exponential model of the
transient after the pulse excitation is proposed. The fitting of measurements for
125
Final E
REFERENCES
different pulse voltage amplitudes shows how the time constant and the reduction
of current after pulses are linearly dependent on the peak drain voltage. The
method can be used to compare different devices and allow to extract parameters
that could be useful for the development of advanced models of devices. Finally,
a pulsed RF characterization setup has been presented. The setup has been used
to demonstrate that also a pulsed RF excitation is able to activate these traps
with detrimental effects on RF performances. In fact, traps introduce long-term
memory effects that are an added source of distortion for power amplifiers. The
characterization presented here can be useful for the development of behavioural
models to be used in digital predistortion.
References
[1] K. Bumman, M. Junghwan, and K. Ildu, “Efficiently amplified,” Microwave
Magazine, IEEE, vol. 11, no. 5, pp. 87–100, Aug. 2010.
[2] J. Jeong, D. Kimball, M. Kwak, C. Hsia, P. Draxler, and P. Asbeck, “Wideband envelope tracking power amplifiers with reduced bandwidth power
supply waveforms and adaptive digital predistortion techniques,” Microwave
Theory and Techniques, IEEE Transactions on, vol. 57, no. 12, pp. 3307–3314,
Dec. 2009.
[3] P. Gilabert, G. Montoro, and P. Vizarreta, “Slew-rate and efficiency tradeoff in slow envelope tracking power amplifiers,” in Microwave Conference
(GeMiC), 2012 The 7th German, Mar. 2012, pp. 1–4.
[4] J. Pedro and S. Maas, “A comparative overview of microwave and wireless
power-amplifier behavioral modeling approaches,” Microwave Theory and
Techniques, IEEE Transactions on, vol. 53, no. 4, pp. 1150–1163, Apr. 2005.
[5] A. S. Tehrani, T. Eriksson, and C. Fager, “Modeling of long term memory
effects in RF power amplifiers with dynamic parameters,” in Microwave
Symposium Digest (MTT), 2012 IEEE MTT-S International, Jun. 2012, pp.
1–3.
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[6] H. Ku and J. Kenney, “Behavioral modeling of nonlinear RF power amplifiers considering memory effects,” Microwave Theory and Techniques, IEEE
Transactions on, vol. 51, no. 12, pp. 2495–2504, Dec. 2003.
[7] DIVA Dynamic IV Analyzer, User Manual, Accent, 2001.
[8] P. Roblin, D. Root, J. Verspecht, Y. Ko, and J. Teyssier, “New trends for
the nonlinear measurement and modeling of high-power RF transistors and
amplifiers with memory effects,” Microwave Theory and Techniques, IEEE
Transactions on, vol. 60, no. 6, pp. 1964–1978, Jun. 2012.
[9] M. Sudow, M. Fagerlind, M. Thorsell, K. Andersson, N. Billstrom, P.-A.
Nilsson, and N. Rorsman, “An AlGaN/GaN HEMT-Based microstrip MMIC
process for advanced transceiver design,” Microwave Theory and Techniques,
IEEE Transactions on, vol. 56, no. 8, pp. 1827–1833, Aug. 2008.
[10] A. A. Istratov and O. F. Vyvenko, “Exponential analysis in physical phenomena,” Review of Scientific Instruments, vol. 70, no. 2, pp. 1233–1257, Feb.
1999.
[11] L. Dobaczewski, A. R. Peaker, and K. B. Nielsen, “Laplace-transform deeplevel spectroscopy: The technique and its applications to the study of point
defects in semiconductors,” Journal of Applied Physics, vol. 96, no. 9, pp.
4689–4728, 2004.
[12] K. Andersson, M. Thorsell, G. Pailloncy, and F. Verbeyst, “Large-signal
waveform acquisition of pulsed signals,” in Microwave Conference (EuMC),
2011 41st European, Oct. 2011, pp. 910–913.
[13] J. Verspecht, “Large-signal network analysis,” Microwave Magazine, IEEE,
vol. 6, no. 4, pp. 82–92, Dec. 2005.
[14] M. Thorsell and K. Andersson, “Fast multiharmonic active load-pull system
with waveform measurement capabilities,” Microwave Theory and Techniques,
IEEE Transactions on, vol. 60, no. 1, pp. 149–157, Jan. 2012.
127
REFERENCES
128
Chapter 6
Conclusions
During the Ph.D. course I had the opportunity of carrying out research on different
but strongly linked topics; from device characterization, through the development
of instruments and models, to the design of circuits. This thesis tries to summarize
the work done during these three years.
The properties and the advantages offered by the AlGaN/GaN HEMT technology have been reviewed. The design and the measurements of some GaN-based
MMIC high power amplifiers have been presented. At high frequency the technology is able to offer an order of magnitude higher RF power density, higher
efficiency and bandwidth than other semiconductor technologies.
Despite this, the technology is not yet fully mature. Some problems related to
dispersive phenomena due to traps and thermal effects are still present. A better
understanding of these phenomena and how these can impact on performances
in real applications is needed. Some of these issues have been addressed through
new characterization techniques and instruments.
A nonlinear thermal resistance model and characterization procedure that
involves only multi-bias small-signal S-parameter and DC I/V measurements at
different base plate temperatures has been proposed.
Pulsed characteristics of devices are at the basis of many compact models
used for the design of high frequency nonlinear circuits. A new fully-calibrated
pulsed measurement setup that enables the use of very short pulses has been
presented and described in detail. The setup was used to characterize GaAs and
GaN devices and allowed to show the nonlinear and asymmetric behaviour of
traps.
The long-term memory effects of traps in GaN HEMTs can be an added source
129
6. CONCLUSIONS
of distortion for wideband modulated signals. The characterization of the transient
response of the drain current to pulsed voltages excitations can give new insight
into trapping and detrapping mechanisms. To this aim a measurement setup
has been developed. Obtained results show clearly that emission time constants
of the involved traps change with the peak of applied pulses. It has also been
demonstrated that these traps can impact RF performances.
These techniques can be used both for the development of more accurate
models of devices and to compare different technologies, materials and foundry
processes with the aim of further improving the technology.
6.1
Publications
The work presented in this thesis is based on the following publications and
on the research conducted as a visiting Ph.D. student at the Department of
Microtechnology and Nanoscience at Chalmers University of Technology - Sweden.
• A. Santarelli, R. Cignani, V. Di Giacomo, S. D’Angelo, D. Niessen, and
F. Filicori, “Large-signal characterization of GaN-based transistors for accurate nonlinear modelling of dispersive effects,” in Integrated Nonlinear
Microwave and Millimeter-Wave Circuits (INMMIC), 2010 Workshop on,
Apr. 2010, pp. 115–118
• A. Santarelli, V. Di Giacomo, R. Cignani, S. D”Angelo, D. Niessen, and
F. Filicori, “Nonlinear thermal resistance characterization for compact electrothermal GaN HEMT modelling,” in Microwave Integrated Circuits Conference (EuMIC), 2010 European, Sep. 2010, pp. 82–85
• A. Santarelli, R. Cignani, D. Niessen, S. D”Angelo, and F. Filicori, “Electrothermal characterization and compact modelling of GaN HEMTs for microwave applications,” in Riunione Annuale Gruppo Elettronica, Trani, Jul.
6–8, 2011
• A. Santarelli, R. Cignani, D. Niessen, S. D’Angelo, P. A. Traverso, and
F. Filicori, “Characterization of GaN and GaAs FETs through a new pulsed
measurement system,” in Microwave Integrated Circuits Conference (EuMIC), 2011 European, Oct. 2011, pp. 1–4
130
6.1. Publications
• A. Santarelli, R. Cignani, D. Niessen, P. A. Traverso, and F. Filicori, “New
pulsed measurement setup for GaN and GaAs FETs characterization,” International Journal of Microwave and Wireless Technologies, vol. 4, pp.
387–397, 5 2012
• C. Florian, R. Cignani, D. Niessen, and A. Santarelli, “A C-Band AlGaNGaN MMIC HPA for SAR,” Microwave and Wireless Components Letters,
IEEE, vol. 22, no. 9, pp. 471–473, Sep. 2012
• A. Santarelli, R. Cignani, G. Gibiino, D. Niessen, P. A. Traverso, C. Florian, C. Lanzieri, A. Nanni, D. Schreurs, and F. Filicori, “Nonlinear charge
trapping effects on pulsed I/V characteristics of gan FETs,” Microwave Integrated Circuits Conference (EuMIC), 2011 European, 2013, to be published
131
6. CONCLUSIONS
132
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