Semiconductors Microcontrollers 8-bit Microcomputers MN101E Series 8

Semiconductors Microcontrollers 8-bit Microcomputers MN101E Series 8

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.1

Overview

1.1.1

Overview

The MN101E series of 8-bit single-chip microcomputers (the memory expansion version of MN101C series) incorporate multiple types of peripheral functions. This chip series is well suited for camera,

VCR, MD, TV, CD, LD, printer, telephone, home automation, pager, air conditioner, PPC, fax machine, music instrument and other applications.

This LSI brings to embedded microcomputer applications flexible, optimized hardware configurations and a simple efficient instruction set. The MN101E30 series have an internal 928 KB (maximum) of

ROM and 8 KB (maximum) of RAM. Peripheral functions include 6 external interrupts, 30 internal interrupts including NMI, 9 timer counters, 6 sets of serial interfaces, A/D converter, D/A converter, LCD driver, watchdog timer, 2 sets of automatic data transfer, synchronous output function and buzzer output. The configuration of this microcomputer is well suited for application as a system controller in camera, timer selector for VCR, CD player, or minicomponent, and also suited for audio reproduction with a high-precision D/A converter.

With three oscillation system (high frequency: max. 20 MHz / low frequency: 32.768 kHz and PLL: frequency multiplier of high frequency) contained on the chip, the system clock can be switched to high frequency input (high speed mode), PLL input (PLL mode), or to low frequency input (low speed mode).

The system clock is generated by dividing the oscillation clock. The best operation clock for the system can be selected by switching its frequency by software. High speed mode has the normal mode based on fpll/2 which is half clock generated from an original oscillation and PLL, and the double speed mode based on fpll which is clock generated from an original oscillation without dividing.

A machine cycle (min. instructions execution) in the normal mode is 100 ns when fosc is 20 MHz (at the time that PLL is not used). A machine cycle in the double speed mode is 50 ns when fosc is 20 MHz. A machine cycle in the PLL mode is 50 ns (maximum).The package is 100-pin QFP, LQFP.

Publication date: October 2015

1

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.1.2

Product Summary

This manual describes the following models of the MN101E30 series. These products have identical functions, and their memory capacity and type are shown below.

Table:1.1.1 Product Summary

Model

MN101E30N

MN101E30R

MN101EF30R

ROM Size

508 KB

928 KB

928 KB

RAM Size

8 KB

8 KB

8 KB

Classification

Mask ROM version

Mask ROM version

Flash EEPROM version

Package

LQFP100-P-1414C

QFP100-P-1818B

QFP100-P-1818B

LQFP100-P-1414

QFP100-P-1818B

This manual is described with a focus on MN101E30N.

Publication date: October 2015

2

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.2

Hardware Functions

 Feature

- ROM Capacity: 508/928 KB

- RAM Capacity: 8 KB

- Package: 100pin LQFP (14 mm square, 0.5 mm pitch)

100pin QFP (18 mm square, 0.65 mm pitch)

- Machine Cycle:

High speed mode

0.05 ms/ 20 MHz (2.2 V to 5.5 V)

PLL mode

0.05

s/ 20 MHz (2.2 V to 5.5 V)

Low speed mode

62.5

s/16 kHz (2.2 V to 5.5 V)

- Clock Gear: Operation speed of system clock is variable by changing the frequency.

- Multiplied Clock: High-speed frequency clock (fosc) can be multiplied by 2, 3, 4, 5, 6, 8 and 10.

- Memory bank:

Data memory space is expanded by the bank system.

- Bank for the source address/Bank for the destination address.

- ROM correction: Correcting address designation: up to 7 addresses possible

- Operation Modes:

NORMAL mode ( High speed mode)

PLL mode

SLOW mode ( Low speed mode)

HALT mode

STOP mode

(The operation clock can be switched in each mode.)

- Operating Voltage: 2.2 V to 5.5 V

Publication date: October 2015

3

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

- Operating Temperature: -40

C to +85C

- Interrupt: 36 levels

<Watchdog timer>

- NMI-Watchdog timer overflow

<Timer interrupts>

- TM0IRQ-Timer 0 interrupt (8-bit timer)

- TM1IRQ-Timer 1 interrupt (8-bit timer)

- TM2IRQ-Timer 2 interrupt (8-bit timer)

- TM3IRQ-Timer 3 interrupt (8-bit timer)

- TM4IRQ-Timer 4 interrupt (8-bit timer)

- TM6IRQ-Timer 6 interrupt (8-bit timer)

- TBIRQ-Clock timer interrupt

- TM7IRQ-Timer 7 interrupt (16-bit timer)

- T7OC2IRQ- Timer 7 interrupt (16-bit timer)

- TM8IRQ-Timer 8 interrupt (16-bit timer)

- T8OC2IRQ- Timer 8 interrupt (16-bit timer)

- TM9IRQ-Timer 9 interrupt (16-bit timer)

- T9OC2IRQ- Timer 9 interrupt (16-bit timer)

<Serial interrupts>

- SC0TIRQ-Serial interface 0 interrupt

- SC0RIRQ-Serial interface 0 UART reception interrupt (peripheral function group interrupt)

- SC1TIRQ-Serial interface 1 interrupt

- SC1RIRQ-Serial interface 1 UART reception interrupt (peripheral function group interrupt)

- SC2TIRQ-Serial interface 2 interrupt

- SC2RIRQ-Serial interface 2 UART reception interrupt

- SC3TIRQ-Serial interface 3 interrupt

- SC3RIRQ-Serial interface 3 UART reception interrupt (peripheral function group interrupt)

- SC4TIRQ- Serial interface 4 interrupt

- SC4SIRQ- Serial interface 4 stop condition interrupt (peripheral function group interrupt)

- SC5TIRQ- Serial interface 5 interrupt (peripheral function group interrupt)

<A/D conversion end>

Publication date: October 2015

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

- ADIRQ-AD conversion end (peripheral function group interrupt)

<Automatic Transfer Controller interrupts>

- ATC0IRQ-ATC0 interrupt (peripheral function group interrupt)

- ATC1IRQ-ATC1 interrupt (peripheral function group interrupt)

<External interrupts> Edge selectable

- IRQ0:External interrupt (AC zero-cross detector, With/Without noise filter)

- IRQ1:External interrupt (AC zero-cross detector, With/Without noise filter)

- IRQ2:External interrupt (Both edges interrupt)

- IRQ3:External interrupt (Both edges interrupt)

- IRQ4:External interrupt (Both edges interrupt)

- IRQ5:External interrupt (Key scan interrupt only)

<Audio interrupts>

- Audio reproduction end interrupt

- Audio phrase end interrupt

- Timer Counter: 11 timers All timer counters generate interrupt

(10 can be operated independently)

- 8-bit timer for general use:

- 8-bit free-running timer:

5 sets

1 set

- Time base timer:

- 16-bit timer for general use:

- Simple 8-bit timer:

1 set

3 sets

1 set

Timer 0 (8-bit timer for general use)

- Square wave output (timer pulse output), added pulse(2-bit) system PWM output (can be output to large current pin TM0IOB), event count, remote control carrier output, simple pulse with measurement

- Clock source fpll, fpll/4, fpll/16, fpll/32, fpll/64, fpll/128, fs/2, fs/4, fs/8, fx, external clock,

TimerA output

- Real timer output control

Control the timer (PWM) output by the falling edge of external interrupt 0 (IRQ0) with the follow 3 value; “High”-fixed, “LOW”-fixed and “Hi-Z”-fixed

Timer 1 (8-bit timer for general use)

-Square wave output (timer pulse output), event count, 16-bit cascade connected (timer0, 1) timer synchronous output event

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

-Clock source fpll, fpll/4, fpll/16, fpll/32, fpll/64, fpll/128, fs/2, fs/4, fs/8, fx, external clock, TimerA output

Timer 2 (8-bit timer for general use)

- Square wave output (timer pulse output), added pulse(2-bit) system PWM output (can be output to large current pin TM2IOB), event count, simple pulse with measurement, 24-bit cascade connected (timer0, 1) timer synchronous output event

- Clock source fpll, fpll/4, fpll/16, fpll/32, fpll/64, fpll/128, fs/2, fs/4, fs/8, fx, external clock, TimerA output

- Real timer output control

Control the timer (PWM) output by the falling edge of external interrupt 0 (IRQ0) with the follow 3 value; “High”-fixed, “LOW”-fixed and “Hi-Z”-fixed

Timer 3 (8-bit timer for general use)

- Square wave output (timer pulse output), event count, remote control carrier output, 16bit cascade connected (timer2), 32-bit cascade connected (timer0, 1, 2)

- Clock source fpll, fpll/4, fpll/16, fpll/32, fpll/64, fpll/128, fs/2, fs/4, fs/8, fx, external clock, TimerA output

Timer 4 (8-bit timer for general use)

- Square wave output (timer pulse output), added pulse(2-bit) system PWM output, event count, serial transfer clock, simple pulse measurement

- Clock source fpll, fpll/4, fpll/16, fpll/32, fpll/64, fpll/128, fs/2, fs/4, fs/8, fx, external clock, TimerA output

Timer 6 (8-bit free-running timer, Time base timer)

8-bit free-running timer

- Clock source fpll, fpll/2

12

, fpll/2

13

, fs, fx, fx/2

12

, fx/2

13

Time base timer

- Interrupt generation cycle fpll/2

7

, fpll/2

8

, fpll/2

9

, fpll/2

10

, fpll/2

13

, fpll/2

15

, fx/2

7

, fx/2

8

, fx/2

9

, fx/2

10

, fx/2

13

, fx/2

15

Timer 7 (16-bit timer for general use)

- Clock source fpll, fpll/2, fpll/4, fpll/16, fs, fs/2, fs/4, fs/16

1/1, 1/2, 1/4, 1/16 of the external clock, TimerA output

- Hardware organization

Compare register with double buffer: 2 sets

Publication date: October 2015

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Input capture register:

Timer interrupt:

1 set

2 vectors

- Timer functions

Square wave output (Timer pulse output), High precision PWM output (Cycle/Duty continuous changeable), IGBT output (Cycle/Duty continuous changeable) can be output to large current pin TM7IOB

Timer synchronous output, event count, Input capture function (Both edges can be operated)

-Real timer output control

Control the timer (PWM) output by the falling edge of external interrupt 0 (IRQ0) with the follow 3 value; “High”-fixed, “LOW”-fixed and “Hi-Z”-fixed

Timer 8 (16-bit timer for general use)

-Clock source fpll, fpll/2, fpll/4, fpll/16, fs, fs/2, fs/4, fs/16

1/1, 1/2, 1/4, 1/16 of the external clock, TimerA output

-Hardware organization

Compare register with double buffer: 2 sets

Input capture register:

Timer interrupt:

1 set

2 vectors

-Timer functions

Square wave output (Timer pulse output), High precision PWM output (Cycle/Duty continuous changeable) can be output to large current pin TM8IOB, event count, pulse width measurement, input capture (Both edge available), 32-bit cascade connected

(Timer7, 8), 32-bit PWM output, Input capture is available at 32-bit cascade

Timer 9 (16-bit timer for general use)

-Clock source fpll, fpll/2, fpll/4, fpll/16, fs, fs/2, fs/4, fs/16, 1/1, 1/2, 1/4, 1/16 of the external clock

TimerA output

-Hardware organization

Compare register with double buffer: 2 sets

Input capture register:

Timer interrupt:

1 set

2 vectors

-Timer functions

Square wave output (Timer pulse output), High precision PWM output (Cycle/Duty continuous changeable) can be output to large current pin TM9IOB, event count, pulse width measurement, input capture (Both edge available)

-Real timer output control

Control the timer (PWM) output by the falling edge of external interrupt 0 (IRQ0) with the follow 3 value; “High”-fixed, “LOW”-fixed and “Hi-Z”-fixed

TimerA output (Simple timer counter A)

Clock output for peripheral function

Publication date: October 2015

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

- Watchdog timer

- Time-out cycle can be selected from fs/2

16

, fs/2

18

, fs/2

20

- On detection of errors, hard reset is done inside LSI.

- Synchronous output function

- Timer synchronous output, interrupt synchronous output Port 8 outputs the latched data, on the event timing of the synchronous output signal of timer 1, 2, or 7, or of the external interrupt 2 (IRQ2).

- Buzzer Output/Reverse Buzzer Ouput:

- Output frequency can be selected from fpll/2

9

,fpll/2

10

,fpll/2

11

,fpll/2

12

,fpll/2

13

, fpll/2

14

,fx/

2

3

,fx/2

4

.

- Remote Control Carrier Output:

- A remote control carrier output with duty cycle of 1/2 or 1/3 of timer 0 or timer 3 output are available.

- A/D Converter:

- D/A Converter:

10-bit x 12 channels

8-bit x 4 channels

- Data automatic transfer:2 systems

ATC0

Data is transferred automatically in all memory space

- External request/internal event request/software request

- Maximum transfer cycles are 255

- Support continuous serial transmission / reception.

- Burst transfer function (Urgent stop of interrupts is contained.)

ATC1

Data is transferred automatically in all memory space

- External request/internal event request/software request

- Maximum transfer cycles are 255

- Support continuous serial transmission / reception.

- Burst transfer function (Urgent stop of interrupts is contained.)

Publication date: October 2015

8

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

- Serial Interface: 6 channels

Serial 0 (Full duplex UART / Synchronous serial interface)

Synchronous serial interface

- Transfer clock source fpll/2, fpll/4, fpll/16, fpll/64, fs/2, fs/4, Timer0,1,2,3,4 and A output, external clock

- MSB/LSB can be selected as the first bit to be transferred. An arbitrate transfer size from 1 to 8 bits can be selected.

- Sequence transmission, reception or both are available.

Full duplex UART (Baud rate timer, Timer0,1,2,3,4 and A)

- Parity check, Overrun error / Framing error detection

- Transfer size 7 to 8 bits can be selected.

Serial 1 (Full duplex UART / Synchronous serial interface)

Synchronous serial interface

- Transfer clock source fpll/2, fpll/4, fpll/16, fpll/64, fs/2, fs/4, Timer0,1,2,3,4 and A output, external clock

- MSB/LSB can be selected as the first bit to be transferred. An arbitrate transfer size from 1 to 8 bits can be selected.

- Sequence transmission, reception or both are available.

Full duplex UART (Baud rate timer, Timer0,1,2,3,4 and A)

- Parity check, Overrun error / Framing error detection

- Transfer size 7 to 8 bits can be selected.

Serial 2 (Full duplex UART / Synchronous serial interface)

Synchronous serial interface

- Transfer clock source fpll/2, fpll/4, fpll/16, fpll/64, fs/2, fs/4, Timer0,1,2,3,4 and A output,external clock

- MSB/LSB can be selected as the first bit to be transferred. An arbitrate transfer size from 1 to 8 bits can be selected.

- Sequence transmission, reception or both are available.

Full duplex UART (Baud rate timer, Timer0,1,2,3,4 and A)

- Parity check, Overrun error / Framing error detection

- Transfer size 7 to 8 bits can be selected.

Serial 3 (Full duplex UART / Synchronous serial interface)

Synchronous serial interface

- Transfer clock source fpll/2, fpll/4, fpll/16, fpll/64, fs/2, fs/4, Timer0,1,2,3,4 and A output ,external clock

- MSB/LSB can be selected as the first bit to be transferred. An arbitrate transfer size from 1 to 8 bits can be selected.

Publication date: October 2015

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

- Sequence transmission, reception or both are available.

Full duplex UART (Baud rate timer, Timer0,1,2,3,4 and A)

- Parity check, Overrun error / Framing error detection

- Transfer size 7 to 8 bits can be selected.

Serial 4 (multi master I2C / Synchronous serial interface)

Synchronous serial interface

- Transfer clock source fpll/2, fpll/4, fpll/8, fpll/32, fs/2, fs/4, Timer0,1,2,3,4 and A output, external clock

- MSB/LSB can be selected as the first bit to be transferred. An arbitrate transfer size from 1 to 8 bits can be selected.

- Sequence transmission, reception or both are available.

Multi master I2C

- 7-bit of slave address can be set.

- General call communication mode handling

Serial 5

- IIC slave interface

- IIC high-speed transfer mode (communication speed: 400 kbps)

- 7-bit or 10-bit of slave address can be set.

- General call communication mode handling

- LED Driver: 8 pins (Push-pull structure)

- Automatic Reset

- LCD Driver: LCD driver pins

Segment output max. 55 pins (SEG0 to 54)

SEG0 to 54 can be switched to I/O ports by 1 pin

[Note:At reset, SEG0 to 54 are input ports.]

Common output pins:4 pins

COM0 to 3 can be switched to I/O ports by 1 pin

Display mode selection

Static

1/2 duty, 1/2 bias

1/3 duty, 1/3 bias

1/4 duty, 1/3 bias

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

LCD driver clock

- When the source clock is the main clock (fpll)

1/2

18

, 1/2

17

, 1/2

16

, 1/2

15

, 1/2

14

, 1/2

13

, 1/2

12

, 1/2

11

- When the source clock is the sub clock (fx)

1/2

9

, 1/2

8

, 1/2

7

, 1/2

6

- Timer0, 1, 2, 3, 4 and A output

LCD power supply

Use at V

DD5

 V

LC1

External supply voltage is input from V

LC1

, V

LC2

, V

LC3

pins or voltage applied to V

LC1 is divided by internal resistance and supplied to V

LC2

and V

LC3

pins.

- DAC for audio reproduction

Analog DAC input

PWM digital output

Continuous reproduction function

Repeat function (phrase repeat)

Volume control (2048 tone)

Sampling frequency: 8 to 44.1 kHz

- Port:

I/O ports

LED (large current) driver pins

LCD driver for segment

LCD driver for common serial interface pin

Timer I/O

Buzzer output

A/D input

External interrupt pin

LCD power

XI/XO

D/A output

Audio output

: 85 pins

: 8 pins

: 55 pins

: 4 pins

: 34 pins

: 28 pins

: 4 pins

: 12 pins

: 5 pins

: 3 pins

: 2 pins

: 4 pins

: 2 pins

Publication date: October 2015

11

Special pins

Operation mode input pins

: 10 pins

: 3 pin

Analog reference voltage input pins : 1 pin

Reset input pin : 1 pin

Oscillation pins

Power pins

: 2 pins

: 6 pins

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Publication date: October 2015

12

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.3

Pin Description

1.3.1

Pin configuration

SDA5A / NRE / SEG8 / P73

SCL5A / NCS / SEG7 / P74

TXD1B / SBO1B / A8 / SEG6 / P75

RXD1B / SBI1B / A9 / SEG5 / P76

SBT1B / A10 / SEG4 / P77

TM9OD0 / SDO0 / A11 / SEG3 / P80

TM9OD1 / SDO1 / A12 / SEG2 / P81

TM9OD2 / SDO2 / A13 / SEG1 / P82

TM9OD3 / SDO3 / A14 / SEG0 / P83

TM9OD4 / SDO4 / A15 / COM0 / P84

TM9OD5 / SDO5 / A16 / COM1 / P85

SDO6 / A17 / COM2 / P86

SDO7 / A18 / COM3 / P87

A19 / VLC3 / P92

NDK / VLC2 / P93

DA_C / VLC1 / P94

DA_D / P95

AVDD

DAI-DOUT

DAI-AOUT

AVSS

AN11 / PB3

AN10 / PB2

AN9 / PB1

AN8 / PB0

92

93

94

95

88

89

90

91

96

97

98

99

100

80

81

82

83

76

77

78

79

84

85

86

87

MN101E30N/E30R/EF30R

100 pin QFP/LQFP

(Top View)

32

31

30

29

36

35

34

33

28

27

26

42

41

40

39

38

37

46

45

44

43

50

49

48

47

P41 / SEG34 / SBI3B / RXD3B

P40 / SEG35 / SBO3B / TXD3B

P36 / SEG36

P35 / SEG37 / SBI4B

P34 / SEG38 / SBT4B / SCL4B

P33 / SEG39 / SBO4B / SDA4B

P32 / SEG40 / SBT2B

P31 / SEG41 / SBI2B / RXD2B

P30 / SEG42 / SBO2B / TXD2B

P16 / SEG43 / TM8IOC / NBUZZERB

P15 / SEG44 / TM7IOC / BUZZERB

P14 / SEG45 / TM4IOC

P13 / SEG46 / TM3IOC

P12 / SEG47 / TM1IOC

P11 / SEG48 / TM2IOC

P10 / SEG49 / TM0IOC / RMOUTC

P24 / SEG50 / IRQ4

P23 / SEG51 / IRQ3

P22 / SEG52 / IRQ2

P21 / SEG53 / IRQ1 / ACZ1

P20 / SEG54 / IRQ0/ ACZ0

P07 / LED7 / DA_A

P06 / LED6 / SBT3A

P05 / LED5 / SBI3A / RXD3A

P04 / LED4 / SBO3A / TXD3A

* N.C. (non-connection pin) in mask ROM version

Figure:1.3.1 Pin Configuration (MN101E30N/MN101E30R/MN101EF30R)

Mode

Object microcontroller

Activation area

Pin setting

NRST ATRST DMOD P01

Single chip mode

FLASH-ROM

MASK-ROM

Memory extend mode

FLASH-ROM

MASK-ROM

Micro controller rewriting mode (3) FLASH-ROM

D-wire communication mode(3) FLASH-ROM

MAIN

MAIN

BOOT

-

(1)

(1)

(1)

(2)

L or H

L or H

L

L

H

H

H

(2)

P02

Normal pin

Normal pin

Normal pin

Pull up(2) Pull up(2)

MMOD

L

L

H

L

Register setting

EXMEM flag

0

1

0

0

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MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Mode

Object microcontroller

Activation area

Pin setting

NRST ATRST DMOD P01

(1)The mode becomes fixed from the pin state in releasing NRST(L to H).

(2)This is controlled by a dedicated on-board programmer

(3)This mode becomes the rewriting mode only for Flash microcontroller.

Therefore does not exist in the Mask version (MN101E30N/E30R)

P02 MMOD

Register setting

EXMEM flag

1.3.2

Pin Specification

Table:1.3.1 Pin Specification

Pins

P00

P01

P02

P03

P04

P05

P06

P07

P10

P11

P12

P13

P14

P15

P16

P20

P21

P22

P23

P24

P27

Special Functions I/O

Direction

Control

Pin

Control

Functions Description

RXD1A SBI1A in/out P0DIR0 P0PLU0 RXD1A: UART1 reception data input SBI1A: Serial1 reception data output

LED0: LED driver pin 0 TM7IOB LED0

TXD1A SBO1A in/out P0DIR1 P0PLUD1

TM7IOB: Timer 7 input / output

TXD1A: UART1 transmission data output

SBO1A: Serial1 transmission data output

TM8IOB LED1

SBT1A TM9IOB in/out P0DIR2 P0PLUD2

TM8IOB: Timer 8 input / output

SBT1A: Serial 1 clock input / output

LED1: LED driving pin 1

TM9IOB: Timer 9 input / output

LED2 LED2: LED driving pin 2

RMOUTB TM0IOB in/out P0DIR3 P0PLUD3 RMOUTB: Remote control carrier output

TM2IOB LED3

LED4 SBO3A in/out P0DIR4 P0PLUD4

TM2IOB: Timer 2 input / output

LED4: LED driving pin 4

TM0IOB: Timer 0 input / output

LED3: LED driving pin 3

SBO3A: Serial3 transmission data output

TXD3A

LED5

TXD3A: UART3 transmission data output

SBI3A in/out P0DIR5 P0PLUD5 LED5: LED driving pin 5 SBI3A: Serial3 reception data output

RXD3A

LED6

LED7

SEG49

RMOUTC

RXD3A: UART3 reception data input

SBT3A in/out P0DIR6 P0PLUD6 LED6: LED driving pin 6

DA_A in/out P0DIR7 P0PLUD7 LED7: LED driving pin 7

TM0IOC in/out P1DIR0 P1PLUD0 SEG49: Segment49 output

RMOUTC: Remote control carrier output

TM2IOC in/out P1DIR1 P1PLUD1 SEG48: Segment48 output

SBT3A: Serial3 clock input / output

DA_A: Analog A output

TM0IOC: Timer0 input / output

SEG48

SEG47

SEG46

SEG45

SEG44

BUZZERB

SEG43

NBUZZERB

SEG54

TM1IOC in/out

TM3IOC in/out

TM4IOC in/out

TM7IOC in/out

P1DIR2

P1DIR3

P1DIR4

P1DIR5

P1PLUD2

P1PLUD3

P1PLUD4

P1PLUD5

SEG47: Segment47 output

SEG46: Segment46 output

SEG45: Segment45 output

SEG44: Segment44 output

BUZZERB: Buzzer output

TM8IOC in/out P1DIR6 P1PLUD6 SEG43: Segment43 output

IRQ0

NBUZZERB: Buzzer inversion output in/out P2DIR0 P2PLUD0 SEG54: Segment54 output

TM2IOC: Timer2 input / output

TM1IOC: Timer1 input / output

TM3IOC: Timer3 input / output

TM4IOC: Timer4 input / output

TM7IOC: Timer7 input / output

TM8IOC: Timer8 input / output

IRQ0: External interrupt0

ACZ0

SEG53

ACZ1

SEG52

SEG51

SEG50

NRST

IRQ1

IRQ2

IRQ3

IRQ4

ACZ0: Zero-cross detection input in/out P2DIR1 P2PLUD1 SEG53: Segment53 output

ACZ1: Zero-cross detection input in/out P2DIR2 P2PLUD2 SEG52: Segment52 output in/out P2DIR3 P2PLUD3 SEG51: Segment51 output in/out P2DIR4 P2PLUD4 SEG50: Segment50 output in NRST: Reset

IRQ1: External interrupt1

IRQ2: External interrupt2

IRQ3: External interrupt3

IRQ4: External interrupt4

Publication date: October 2015

14

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Pins

P30

P31

P32

P33

P34

P35

P36

P40

P41

P42

P43

P44

P45

P46

P47

P50

P51

P52

P53

P54

P55

P56

P57

Special Functions

SEG42

I/O

Direction

Control

Pin

Control

Functions Description

SBO2B in/out P3DIR0 P3PLUD0 SEG42: Segment42 output SBO2B: Serial2 transmission data output

TXD2B

SEG41

TXD2B: UART2 transmission data output

SBI2B in/out P3DIR1 P3PLUD1 SEG41: Segment41 output SBI2B: Serial2 reception data output

RXD2B

SEG40

SEG39

RXD2B: UART2 reception data input

SBT2B in/out P3DIR2 P3PLUD2 SEG40: Segment40 output

SBO4B in/out P3DIR3 P3PLUD3 SEG39: Segment39 output

SBT2B: Serial2 clock input / output

SBO4B: Serial4 transmission data output

SDA4B

SEG38

SCL4B

SEG37

SDA4B: IIC4 data input / output

SBT4B in/out P3DIR4 P3PLUD4 SEG38: Segment38 output

SCL4B: IIC4 clock input / output

SBI4B in/out P3DIR5 P3PLUD5 SEG37: Segment37 output

SBT4B: Serial4 clock input / output

SBI4B:Serial4 reception data output

SEG36

SEG35 in/out P3DIR6 P3PLUD6 SEG36: Segment36 output

SBO3B in/out P4DIR0 P4PLUD0 SEG35: Segment35 output SBO3B: Serial3 transmission data output

TXD3B

SEG34

TXD3B: UART3 transmission data output

SBI3B in/out P4DIR1 P4PLUD1 SEG34: Segment34 output SBI3B: Serial3 reception data output

RXD3B

SEG33

SEG32

RXD3B: UART3 reception data input

SBT3B in/out P4DIR2 P4PLUD2 SEG33: Segment33 output

SBO0B in/out P4DIR3 P4PLUD3 SEG32: Segment32 output

SBT3B: Serial3 clock input / output

SBO0B: Serial0 transmission data output

TXD0B

SEG31

TXD0B: UART0 transmission data output

SBI0B in/out P4DIR4 P4PLUD4 SEG31: Segment31 output SBI0B: Serial0 reception data output

RXD0B

SEG30

SEG29

SEG28

SEG20

D0

RXD0B: UART0 reception data input

SBT0B in/out P4DIR5 P4PLUD5 SEG30: Segment30 output

SDA5B in/out P4DIR6 P4PLUD6 SEG29: Segment29 output

SCL5B in/out P4DIR7 P4PLUD7 SEG28: Segment28 output

KEY0 in/out P5DIR0 P5PLUD0 SEG20: Segment20 output

SBO0A D0: Data input / output (bp0)

SBT0B: Serial0 clock input / output

SDA5B: IIC5 data input / output

SCL5B: IIC5 clock input / output

KEY0: KEY interrupt input0

SBO0A: Serial0 transmission data output

TXD0A

SEG21

D1

KEY1

SBI0A

TXD0A: UART0 reception data input in/out P5DIR1 P5PLUD1 SEG21: Segment21 output

D1:Data input / output (bp1)

KEY1: KEY interrupt input1

SBI0A: Serial0 reception data output

RXD0A

SEG22

D2

SEG23

D3

SEG24

D4

KEY2

SBT0A

KEY3

BUZZE

RA

KEY4

NBUZZE

RA

KEY5

RXD0A: UART0 transmission data output in/out P5DIR2 P5PLUD2 SEG22: Segment22 output

D2: Data input / output (bp2) in/out P5DIR3 P5PLUD3 SEG23: Segment23 output

D3: Data input / output (bp3) in/out P5DIR4 P5PLUD4 SEG24: Segment24 output

D4:Data input / output (bp4)

KEY2: KEY interrupt input2

SBT0A: Serial0 clock input / output

KEY3: KEY nterrupt input3

BUZZERA:Buzzer output

KEY4: KEY interrupt input4

NBUZZERA: Buzzer inversion output

KEY5: KEY interrupt input5 SEG25

D5

SEG26

D6

SEG27

D7

KEY6

KEY7 in/out P5DIR5 P5PLUD5 SEG25: Segment25 output

D5: Data input / output (bp5) in/out P5DIR6 P5PLUD6 SEG26: Segment26 output

D6:Data input / output (bp6) in/out P5DIR7 P5PLUD7 SEG27: Segment27 output

D7: Data input / output (bp7)

KEY6:KEY interrupt input6

KEY7: KEY interrupt input7

Publication date: October 2015

15

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Pins

P60

P61

P62

P63

P64

P65

P66

P67

P70

P71

P72

P73

P74

P75

P76

P77

P80

P81

P82

P83

P84

P85

P86

P87

Special Functions I/O

Direction

Control

Pin

Control

Functions Description

SEG19

SEG18

SEG17

TM1IOB

SEG16

TM3IOB

SEG15

DA_B

A0

A1

A2 in/out P6DIR0 P6PLUD0 SEG19: Segment19 output in/out P6DIR1 P6PLUD1 SEG18: Segment18 output in/out P6DIR2 P6PLUD2 SEG17: Segment17 output

TM1IOB: Timer1 input / output in/out P6DIR3 P6PLUD3 SEG16: Segment16 output

TM3IOB: Timer3 input / output in/out P6DIR4 P6PLUD4 SEG15: Segment15 output

DA_B: Analog B output

A0: Address output (bp0)

A1: Address output (bp1)

A2: Address output (bp2)

TM4IOB

SEG14

SBI4A

SEG13

SBO4A

SEG12

SBT4A

SEG11

SBO2A

SEG10

SBI2A

SEG9

SBT2A

SDA5A

SEG8

SCL5A

SEG7

TXD1B

A3

A4

SDA4A

A5

SCL4A

A6

TXD2A

A7

RXD2A

NWE

NRE

NCS

TM4IOB: Timer4 input / output in/out P6DIR5 P6PLUD5 SEG14: Segment14 output

SBI4A: Serial4 reception data output in/out P6DIR6 P6PLUD6 SEG13: Segment13 output in/out in/out

P6DIR7

P7DIR2

P6PLUD7

P7PLUD2

SBO4A: Serial4 transmission data output

SEG12: Segment12 output

SBT4A: Serial4 clockinput / output in/out P7DIR0 P7PLUD0 SEG11: Segment11 output

SBO2A: Serial2 transmission data output in/out P7DIR1 P7PLUD1 SEG10: Segment10 output in/out P7DIR3 P7PLUD3 SDA5A: IIC5 data input / output

SEG8: Segment8 output in/out P7DIR4 P7PLUD4 SCL5A: IIC5 clock input / output

SEG7: Segment7 output

A3: Address output (bp3)

A4: Address output (bp4)

SDA4A: IIC4 data input / output

A5: Address output (bp5)

SCL4A: IIC4 clock input / output

A6: Address output (bp6)

TXD2A: UART2 transmission data output

A7: Address output (bp7)

SBI2A: Serial2 reception data output RXD2A: UART2 reception data input

SEG9: Segment9 output

SBT2A: Serial2 clock input / output

NWE: Write enable signal

NRE: Read enable signal

NCS: Chip selection signal

A8

RXD1B

A9

SBT1B

SEG4

TM9OD0 SDO0

A11 SEG3

TM9OD1 SDO1

A12 SEG2

SBO1B in/out P7DIR5 P7PLUD5 TXD1B: UART1 transmission data output

SEG6 A8: Address output (bp8)

SBI1B in/out P7DIR6 P7PLUD6 RXD1B: UART1 reception data input SBI1B: Serial1 reception data output

SEG5

A10 in/out P7DIR7 P7PLUD7

A9: Address output (bp9)

SBT1B: Serial1 clock input / output

SEG5: Segment5 output

A10: Address output (bp10)

SEG4: Segment4 output

SBO1B: Serial1 transmission data output

SEG6: Segment6 output in/out in/out

P8DIR0

P8DIR1

P8PLU0

P8PLU1

TM9OD0: Timer9 output

A11: Address output (bp11)

TM9OD1: Timer9 output

A12: Address output (bp12)

SDO0: Timer synchronous output0

SEG3: Segment3 output

SDO1: Timer synchronous output1

SEG2: Segment2 output in/out P8DIR2 P8PLU2 TM9OD2 SDO2

A13 SEG1

TM9OD3 SDO3

A14 SEG0

TM9OD4 SDO4

A15 COM0

TM9OD5 SDO5

A16 COM1

A17 SDO6

COM2

SDO7

COM3

A18 in/out in/out in/out in/out in/out

P8DIR3

P8DIR4

P8DIR5

P8DIR6

P8DIR7

P8PLU3

P8PLU4

P8PLU5

P8PLU6

P8PLU7

TM9OD2: Timer9 output

A13: Address output (bp13)

TM9OD3: Timer9 output

A14: Address output (bp14)

TM9OD4: Timer9 output

A15: Address output (bp15)

TM9OD5: Timer9 output

A16: Address output (bp16)

SDO6: Timer synchronous output6

COM2:LCD common output

SDO7: Timer synchronous output7

COM3:LCD common output

SDO2: Timer synchronous output2

SEG1: Segment1 output

SDO3: Timer synchronous output3

SEG0: Segment0 output

SDO4: Timersynchronou soutput4

COM0: LCD common output

SDO5: Timer synchronous output5

COM1:LCD common output

A17: Address output (bp17)

A18: Address output (bp18)

Publication date: October 2015

16

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

P90

P91

P92

P93

P94

P95

PA0

Pins

PB0

PB1

PB2

PB3

DA1_

DOUT

DA1_

AOUT

PA1

PA2

PA3

PA4

PA5

PA6

PA7

DA1_AOUT

Special Functions I/O

Direction

Control

Pin

Control

Functions Description

XI

XO

A19

NDK

V

LC1

DA_D

RMOUTA

AN0

TM1IOA AN1

TM2IOA AN2

TM3IOA AN3

TM4IOA AN4

TM7IOA AN5

TM8IOA AN6

TM9IOA AN7

AN8

AN9

AN10

AN11

DA1_DOUT in out

P9DIR0

P9DIR1

P9PLU0

P9PLU1 in/out P9DIR2 P9PLU2

XI: Clock input pin

XO: Clock output pin

A19: Address output (bp19) V

LC3

V

LC2

DA_C

TM0IOA in/out P9DIR3 P9PLU3 NDK: Data acknowledge signal in/out P9DIR4 P9PLU4 in/out in/out

P9DIR5

PADIR0

P9PLU5

PAPLU0

V

LC1

:LCD power supply

DA_D: AnalogD output

RMOUTA:Remote control carrier output

AN0: Analog0 input in/out PADIR1 PAPLU1 in/out PADIR2 PAPLU2 in/out PADIR3 PAPLU3 in/out PADIR4 PAPLU4 in/out PADIR5 PAPLU5 in/out PADIR6 PAPLU6 in/out PADIR7 PAPLU7

TM1IOA: Timer1 input / output

TM2IOA: Timer2 input / output

TM3IOA: Timer3 input / output

TM4IOA: Timer4 input / output

TM7IOA: Timer7 input / output

TM8IOA: Timer8 input / output

TM9IOA: Timer9 input / output in/out PBDIR0 PBPLU0 AN8: Analog8 input in/out PBDIR1 PBPLU1 AN9: Analog9 input in/out PBDIR2 PBPLU2 AN10: Analog10 input in/out PBDIR3 PBPLU3 AN11: Analog11 input out Audio digital output

V

V

LC3

LC2

: LCD power supply

:LCD power supply

DA_C: AnalogC output

TM0IOA: Timer0 input / output

AN1: Analog1 input

AN2: Analog2 input

AN3: Analog3 input

AN4: Analog4 input

AN5: Analog5 input

AN6: Analog6 input

AN7: Analog7 input out Audio analog output

Publication date: October 2015

17

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.3.3

Pin Functions

Table:1.3.2 Pin Functions

OSC1

OSC2

XI

XO

NRST

ATRST

P00

P01

P02

P03

Name

V

SS

V

DD5

AV

DD

AV

SS

V

DD18

(Capacity

1.8 V)

V

DD

(Capacity

3.3 V)

P04

P05

P06

P07

NO

15

18

93

96

-

I/O Other Function Function

Power connect pins

Supply 2.2 V to 5.5 V to V

DD5

, 5.0 V to AV

DD

and 0 V to V

SS

and AV

SS

.

Description

19

20

16

17

14

13

-

-

Input

Output

Input

Output

P90

P91

Capacity connect pins

Capacity connect pins

Clock input pins

Clock output pins

Clock input pins

Clock output pins

For internal power circuit output stability, connect at least one bypass capacitor of 1 uF or larger between

V

DD18

and V ss

.

For internal power circuit output stability, connect at least one bypass capacitor of 1 uF or larger between

V

DD

and V ss

.

(Only Flash version)

Connect these oscillation pins to ceramic or crystal ocsillators for high-frequency clock operation.

If the clock is an external input, connect it to OSC1 and leave OSC2 open. The chip will not operate with an external clock when using either the STOP or

SLOW modes.

Connect these oscillation pins to crystal oscillators for low-frequency clock operation.

If the clock is an external input, connect it to XI and leave XO open. the chip will not operate with an external clock when using the STOP mode. If these pins are not used, connect XI to V

SS

and leave XO open.

12

11

22

23

24

25

26

27

28

29

Input input

I/O

P27

TXD1A,SBO1A,TM8IOB,LED1

SBT1A,TM9IOB,LED2

RMOUTB,TM0IOB,

TM2IOB,LED3

LED4,SBO3A,TXD3A

LED5,SBI3A,RXD3A

LED6,SBT3A

LED7,DA_A

Reset pin

[Active low]

Auto reset setting pins 2

RXD1A,SBI1A,TM7IOB,LED0 I/O port0

This pin resets the chip when power is turned on, is allocated as P27 and contains an internal pull-up resistor (Type. 50 k

. Setting this pin low initialize the internal state of the device.

Thereafter, setting the input to high releases the reset.

The hardware waits for the system clock to stabilize, then processes the reset interrupt.

Also, if “0” is written to P27 and the reset is initiated by software, a low level will be output. The output has an n-channel open-drain configuration. If a capacitor is to be inserted between NRST and V

SS

, it is recommended that a discharge diode be placed between

NRST and V

DD5

.

Input “H” to enable auto reset function and “L” to disable this function

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P0DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P0PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. (However, pull-up and pull-down resistors cannot be mixed.) Direct LED drive available at output. At reset, the input mode is selected and pull-up resistors are disabled (high impedance).

Publication date: October 2015

18

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

P20

P21

P22

P23

P24

Name

P10

P11

P12

P13

P14

P15

P16

NO I/O

39

40

41

35 I/O

36

37

38

Other Function

SEG49,TM0IOC,RMOUTC

SEG48,TM2IOC

SEG47,TM1IOC

SEG46,TM3IOC

SEG45,TM4IOC

SEG44,TM7IOC,BUZZERB

SEG43,TM8IOC,NBUZZERB

Function

I/O port1

30 I/O

31

32

33

34

SEG54,IRQ0,ACZ0

SEG53,IRQ1,ACZ1

SEG52,IRQ2

SEG51,IRQ3

SEG50,IRQ4

I/O port2

P27

P40

P41

P42

P43

P44

P45

P46

P47

P50

P51

P61

P62

P63

P64

P65

P66

P67

P52

P53

P54

P55

P56

P57

P60

P30

P31

P32

P33

P34

P35

P36

12 input

45

46

47

48

42 I/O

43

44

52

53

54

55

49 I/O

50

51

56

64 I/O

63

70

71

72

66

67

68

69

62

61

60

59

58

57

65 I/O

NRST

SEG42,SBO2B,TXD2B

SEG41,SBI2B,RXD2B

SEG40,SBT2B

SEG39,SBO4B,SDA4B

SEG38,SBT4B,SCL4B

SEG37,SBI4B

SEG36

I/O port2

I/O port3

SEG35,SBO3B,TXD3B

SEG34,SBI3B,RXD3B

SEG33,SBT3B

SEG32,SBO0B,TXD0B

SEG31,SBI0B,RXD0B

SEG30,SBT0B

SEG29,SDA5B

SEG28,SCL5B

SEG20,KEY0,D0,SBO0A,

TXD0A

SEG21,KEY1,D1,SBI0A,

RXD0A

SEG22,KEY2,D2,SBT0A

SEG23,KEY3,D3,BUZZERA

SEG24,KEY4,D4,NBUZZERA

SEG25,KEY5,D5

SEG26,KEY6,D6

SEG27,KEY7,D7

SEG19

SEG18,DA_B

SEG17,A0,TM1IOB

SEG16,A1,TM3IOB

SEG15,A2,TM4IOB

SEG14,A3,SBI4A

SEG13,A4,SBO4A,SDA4A

SEG12,A5,SBT4A,SCL4A

I/O port4

I/O port5

I/O port6

Description

7-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P1DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P1PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. A pullup/pull down can not be mixed. At reset, the input mode is selected and pull-up resistors are disabled

(high impedance).

5-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P2DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P2PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. (A pull-up/pull down can not be mixed.) At reset, the input mode is selected and pull-up resistors are disabled

(high impedance)

Port P27 has an N-channel open-drain configuration.

When “0” is written and the reset is initiated by software, a low level will be output.

7-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P3DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P3PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. (A pull-up/pull down can not be mixed.) At reset, the input mode is selected and pull-up resistors are disabled

(high impedance)

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P4DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P4PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. A pullup/pull down can not be mixed. At reset, the input mode is selected and pull-up resistors are disabled

(high impedance)

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P5DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P5PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. (A pull-up/pull down can not be mixed.) At reset, the input mode is selected and pull-up resistors are disabled

(high impedance)

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P6DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P6PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. (A pull-up/pull down can not be mixed.) At reset, the input mode is selected and pull-up resistors are disabled

(high impedance)

Publication date: October 2015

19

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Name

P82

P83

P84

P85

P86

P87

P90

P91

P92

P70

P71

P72

P73

P74

P75

P76

P77

P80

P81

P93

P94

P95

PA0

PA1

PA2

PA3

PA4

PA5

PA6

PA7

PB0

PB1

PB2

PB3

NO I/O

83

84

85

86

87

88

14 I/O

13

89

73 I/O

74

75

76

77

78

79

80

81 I/O

82

90

91

2

3

92

1

4

5

6

I/O

7

8

100 I/O

99

98

97

Other Function

SEG11,A6,SBO2A,TXD2A

SEG10,A7,SBI2A,RXD2A

SEG9,NWE,SBT2A

SEG8,SDA5A,NRE

SEG7,SCL5A,NCS

SEG6,TXD1B,SBO1B,A8

SEG5,RXD1B,SBI1B,A9

SEG4,SBT1B,A10

TM9OD0,SDO0,A11,SEG3

TM9OD1,SDO1,A12,SEG2

TM9OD2,SDO2,A13,SEG1

TM9OD3,SDO3,A14,SEG0

TM9OD4,SDO4,A15,COM0

TM9OD5,SDO5,A16,COM1

SDO6,A17,COM2

SDO7,A18,COM3

XI

XO

A19,V

LC3

NDK,V

LC2

DA_C,V

LC1

DA_D

RMOUTA,TM0IOA,AN0

TM1IOA,AN1

TM2IOA,AN2

TM3IOA,AN3

TM4IOA,AN4

TM7IOA,AN5

TM8IOA,AN6

TM9IOA,AN7

AN8

AN9

AN10

AN11

DA1_DOUT

DA1_AOUT

SBO0A

SBO0B

SBO1A

SBO1B

SBO2A

SBO2B

SBO3A

SBO3B

SBO4A

SBO4B

94

95

52

23

78

73

42

26

49

71

45

I/O

64 I/O P50,SEG20,KEY0,D0

P43,SEG32,TXD0B

TXD1A,TM8IOB,LED1,P01

TXD1B,A8,SEG6,P75

P70,SEG11,A6,TXD2A

P30,SEG42,TXD2B

P04,LED4,TXD3A

P40,SEG35,TXD3B

P66,SEG13,A4,SDA4A

P33,SEG39,SDA4B

Function

I/O port7

I/O port8

I/O port9

I/O portA

Description

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P7DIR register. A pull-up /pull-down resistor for each bit can be selected individually by the

P7PLUD register.

A pull-up/down resistor connection for each port can be selected individually by the SELUD register. (A pull-up/pull down can not be mixed.) At reset, the input mode is selected and pull-up resistors are disabled

(high impedance)

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P8DIR register. A pull-up resistor for each bit can be selected individually by the P8PLUD register.

At reset, the input mode is selected and pull-up resistors are disabled (high impedance)

7-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the P9DIR register. A pull-up resistor for each bit can be selected individually by the P8PLUD register.

At reset, the input mode is selected and pull-up resistors are disabled (high impedance)

8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the PADIR register. A pull-up resistor for each bit can be selected individually by the PAPLUD register.

At reset, the input mode is selected and pull-up resistors are disabled (high impedance)

I/O portB 8-bit CMOS tri-state I/O port.

Each bit can be set individually as either an input or output by the PBDIR register. A pull-up resistor for each bit can be selected individually by the PBPLUD register.

At reset, the input mode is selected and pull-up resistors are disabled (high impedance)

Audio output pins Special output pins for audio production function

These output “L” at reset.

Serial interface Transmission data output pins for serial interface 0 to transmission data output pins

4.

The output configuration, either CMOS push-pull or nchannel open-drain can be selected with the P0ODC,

P3ODC, P4ODC, P5ODC, P6ODC, P7ODC registers.

Pull-up resistor can be selected by the P0PLUD,

P3PLUD, P4PLUD, P5PLUD, P6PLUD and P7PLUD registers. Select the output mode at the P0DIR,

P3DIR, P4DIR, P5DIR, P6DIR and P7DIR registers and serial data output mode by serial mode register 1

(SC0MD1 to SC4MD1).

These can be used as normal I/O pins when the serial interface is not used.

Publication date: October 2015

20

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

RXD0A

RXD0B

RXD1A

RXD1B

RXD2A

RXD2B

RXD3A

RXD3B

SDA4A

SDA4B

SDA5A

SDA5B

Name

SBT0A

SBT0B

SBT1A

SBT1B

SBT2A

SBT2B

SBT3A

SBT3B

SBI0A

SBI0B

SBI1A

SBI1B

SBI2A

SBI2B

SBI3A

SBI3B

SBI4A

SBI4B

SBT4A

SBT4B

TXD0A

TXD0B

TXD1A

TXD1B

TXD2A

TXD2B

TXD3A

TXD3B

NO I/O Other Function Function Description

27

50

70

47

63 input P51,SEG21,KEY1,D1

53 P44,SEG31,RXD0B

22

79

74

43

RXD1A,TM7IOB,LED0,P00

RXD1B,A9,SEG5,P76

P71,SEG10,A7,RXD2A

P31,SEG41,RXD2B

P05,LED5,RXD3A

P41,SEG34,RXD3B

P65,SEG14,A3

P35,SEG37

Serial interface Reception data output pins for serial interface 0 to 4.

reception

A pull-up resistor can be selected with the P0ODC, data input pins

P3ODC, P4ODC, P5ODC, P6ODC, P7ODC registers.

Select the output mode at the P0DIR, P3DIR, P4DIR,

P5DIR, P6DIR and P7DIR registers and serial data output mode by serial mode register 1 (SC0MD1 to

SC4MD1).

These can be used as normal I/O pins when the serial interface is not used.

62

54

24

80

63

53

22

79

74

43

27

50

73

42

26

49

75

44

28

51

I/O input

P52,SEG22,KEY2,D2

P45,SEG30

TM9IOB,LED2,P02

A10,SEG4,P77

P72,SEG9,NWE

P32,SEG40

P06,LED6

P42,SEG33

P70,SEG11,A6,SBO2A

P30,SEG42,SBO2B

P04,LED4,SBO3A

P40,SEG35,SBO3B

P51,SEG21,KEY1,D1,SBI0A

P44,SEG31,SBI0B

SBI1A,TM7IOB,LED0,P00

SBI1B,A9,SEG5,P76

P71,SEG10,A7,SBI2A

P31,SEG41,SBI2B

P05,LED5,SBI3A

P41,SEG34,SBI3B

Serial interface Clock I/O pins for serial interface 0 to 4.

clock I/O pins

The output configuration, either CMOS push-pull or nchannel open-drain can be selected with the P0ODC,

P3ODC, P4ODC, P5ODC, P6ODC, P7ODC registers.

Pull-up resistor can be selected by the P0PLUD,

P3PLUD, P4PLUD, P5PLUD, P6PLUD and P7PLUD registers. Select the clock I/O with the P0DIR, P3DIR,

P4DIR, P5DIR, P6DIR and P7DIR registers and serial data output mode by serial mode register 1 (SC0MD1 to SC4MD1) according to the communication.

These can be used as normal I/O pins when the serial interface is not used.

72

46

P67,SEG12,A5,SCL4A

P34,SEG38,SCL4B

64 output P50,SEG20,KEY0,D0,SBO0A UART

52 P43,SEG32,SBO0B transmission data output pins

23 SBO1A,TM8IOB,LED1,P01

78 SBO1B,A8,SEG6,P75

UART reception data input pins

In the serial interface0 to 3 in UART mode, this pin is configured as the transmission data output pin.

The output configuration, either CMOS push-pull or nchannel open-drain can be selected with the P0ODC,

P3ODC, P4ODC, P5ODC, P7ODC registers.

Pull-up resistor can be selected by the P0PLUD,

P3PLUD, P4PLUD, P5PLUD and P7PLUD registers.

Select the output mode at the P0DIR, P3DIR, P4DIR,

P5DIR and P7DIR registers and serial data output mode by serial mode register 1 (SC0MD1 to

SC3MD1).

These can be used as normal I/O pins when the serial interface is not used.

In the serial interface0 to 3 in UART mode, this pin is configured as the reception data output pin.

Pull-up resistor can be selected by the P0PLUD,

P3PLUD, P4PLUD, P5PLUD and P7PLUD registers.

Select the output mode at the P0DIR, P3DIR, P4DIR,

P5DIR and P7DIR registers and serial data output mode by serial mode register 1 (SC0MD1 to

SC3MD1).

These can be used as normal I/O pins when the serial interface is not used.

71 I/O

45

76

55

P66,SEG13,A4,SBO4A

P33,SEG39,SBO4B

NRE,SEG8,P73

P46,SEG29

IIC data I/O pins In the serial interface4, 5 in IIC mode, this pin is configured as the data input / output pin.

For the output configuration, select n-channel opendrain with the P3ODC, P4ODC, P6ODC and P7ODC registers and pull-up resistors by the P3PLUD,

P4PLUD, P6PLUD and P7PLUD registers. Select the output mode at the P3DIR, P4DIR, P6DIR and P7DIR registers and serial data input / output mode by serial mode register 1 (SC4MD1, SC5MD1).

These can be used as normal I/O pins when the serial interface is not used.

Publication date: October 2015

21

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Name

SCL4A

SCL4B

SCL5A

SCL5B

TM0IOA

TM0IOB

TM0IOC

TM1IOA

TM1IOB

TM1IOC

TM2IOA

TM2IOB

TM2IOC

TM3IOA

TM3IOB

TM3IOC

TM4IOA

TM4IOB

TM4IOC

RMOUTA

RMOUTB

RMOUTC

BUZZERA

BUZZERB

NBUZZERA

NBUZZERB

38

5

69

39

25

36

4

68

1

25

35

2

67

37

3

1

25

35

NO I/O

72 I/O

46

77

56

61

40

60

41

I/O

I/O

I/O

Other Function

P67,SEG12,A5,SBT4A

P34,SEG38,SBT4B

NCS,SEG7,P74

P47,SEG28

Function

Event counter clock input pin, timer output and PWM signal output pin for 8-bit timer 0 to 4.

To use this pin as event clock input, configure this as input by P0DIR register, P1DIR register, P6DIR register and PADIR register. In the input mode, pull-up resistors can be selected by the P0PLUD register,

P1PLUD register, P6PLUD register and PAPLU register.

For timer output, PWM signal output, select the special function pin by port 0 output mode register, port 1 output mode register, port 6 output mode register and port A output mode register ((P0OMD, P1OMD,

P6OMD and PAOMD), and set to the output mode at

P0DIR register, P1DIR register and PADIR register.

These can be used as normal I/O pins when the timer

I/O is not used.

Description

IIC clock I/O pins In the serial interface4, 5 in IIC mode, this pin is configured as the clock input / output pin.

For the output configuration, select n-channel opendrain with the P3ODC, P4ODC, P6ODC and P7ODC registers and pull-up resistors by the P3PLUD,

P4PLUD, P6PLUD and P7PLUD registers. Select the output mode at the P3DIR, P4DIR, P6DIR and P7DIR registers and serial data input / output mode by serial mode register 1 (SC4MD1, SC5MD1).

These can be used as normal I/O pins when the serial interface is not used

Timer I/O pins RMOUTA,AN0,PA0

RMOUTB,TM2IOB,LED3,P03

P10,SEG49,RMOUTC

AN1,PA1

P62,SEG17,A0

P12,SEG47

AN2,PA2

RMOUTB,TM0IOB,LED3,P03

P11,SEG48

AN3,PA3

P63,SEG16,A1

P13,SEG46

AN4,PA4

P64,SEG15,A2

P14,SEG45

TM0IOA,AN0,PA0

TM0IOB,TM2IOB,LED3,P03

P10,SEG49,TM0IOC

P53,SEG23,KEY3,D3

P15,SEG44,TM7IOC

P54,SEG24,KEY4,D4

P16,SEG43,TM8IOC

Remote control Output pin for remote control transmission with a cartransmission rier signal.

For remote control carrier output, select the special signal output pins function pin by the port 0 output mode register, port 1 output mode register and port A output mode register

(P0OMD, P1OMD and PAOMD), and set to the output mode by the P0DIR register, P1DIR register and

PADIR register.

At the same time, select remote control carrier output by the remote control carrier output register.

These can be used as normal I/O pins when the buzzer output is not used.

Buzzer output Piezoelectric buzzer driving pin. Buzzer output available to port1, port5.

The driving frequency can be selected with the

DLYCTR register.

To select buzzer output for porrt1, port5, select the special function pin by the port 1 output mode register and port 5 output mode register (P1OMD and

P5OMD), and set to the output mode by the P1DIR register and P5DIR register.

At the same time, select buzzer output by the oscillation stabilization wait control register (DLYCTR).

These can be used as normal I/O pins when the buzzer output is not used.

Publication date: October 2015

22

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

DA_B

DA_C

DA_D

IRQ0

IRQ1

IRQ2

IRQ3

IRQ4

AN0

AN1

AN2

AN3

AN4

AN5

AN6

AN7

AN8

AN9

AN10

AN11

DA_A

TM9OD0

TM9OD1

TM9OD2

TM9OD3

TM9OD4

TM9OD5

SDO0

SDO1

SDO2

SDO3

SDO4

SDO5

SDO6

SDO7

V

REF+

Name

TM7IOA

TM7IOB

TM7IOC

TM8IOA

TM8IOB

TM8IOC

TM9IOA

TM9IOB

NO

6

22

40

7

23

41

8

24

I/O

I/O

Other Function

AN5,PA5

RXD1A,SBI1A,LED0,P00

P15,SEG44,BUZZERB

AN6,PA6

TXD1A,SBO1A,LED1,P01

P16,SEG43,NBUZZERB

AN7,PA7

SBT1A,LED2,P02

81 output SDO0,A11,SEG3,P80

82

83

84

85

86

SDO1,A12,SEG2,P81

SDO2,A13,SEG1,P82

SDO3,A14,SEG0,P83

SDO4,A15,COM0,P84

SDO5,A16,COM1,P85

81 output TM9OD0,A11,SEG3,P80

82 TM9OD1,A12,SEG2,P81

83

84

85

86

87

88

100 -

TM9OD2,A13,SEG1,P82

TM9OD3,A14,SEG0,P83

TM9OD4,A15,COM0,P84

TM9OD5,A16,COM1,P85

A17,COM2,P86

A18,COM3,P87

5

6

7

8

1

2

3

4 input RMOUTA,TM0IOA,PA0

TM1IOA,PA1

TM2IOA,PA2

TM3IOA,PA3

TM4IOA,PA4

TM7IOA,PA5

TM8IOA,PA6

TM9IOA,PA7

100

99

PB0

PB1

98

97

PB2

PB3

29 output P07,LED7

66

91

P61,SEG18

V

LC1

,P94

92 P95

30 input P20,SEG54

31

32

33

34

P21,SEG53,ACZ1

P22,SEG52

P23,SEG51

P24,SEG50

Function Description

Timer I/O pins Event counter clock input pin, timer output and PWM signal output pin for 16-bit timer7 and 8.

To use this pin as event clock input, configure this as input with the PADIR register. In the input mode, pullup resistors can be selected by P0PLU register,

P1PLU register and PAPLU register.

For timer output, PWM signal output, select the special function pin by the port 0 output mode register, port 1 output mode register and port A output mode register (P0OMD, P1OMD and PAOMD), and set to the output mode at P0DIR register, P1DIR register and PADIR register.

These can be used as normal I/O pins when not used as timer I/O pins.

Timer output pins Timer output and PWM signal output pin for 16-bit timer.

To select timer output and PWM signal output, select the special function pin by the P8OMD1 register, and set to the output mode at the P8DIR register.

These can be used as normal I/O pins when not used as timer I/O pins.

Synchronous output pins

8-bit synchronous output pins.

Synchronous output for each bit can be selected individually by the port 8 synchronous output control register (P8SYO). Set to the output mode by the P8DIR register.

These pins can be used as a normal I/O pins when not used for synchronous output pin.

+ power supply for A/D converter

Analog input pins Analog input pins for an 16-channel, 10-bit A/D converter.

When not used for analog input, these pins can be used as normal input pins.

Analog output pins

Reference power supply pins for the A/D converter.

Use this under the condition: 2.0 V

 V

REF+

 V

DD5

Analog output pins for an 4-channel, 8-bit A/D converter.

When not used for analog output, these pins can be used as normal I/O pins.

External interrupt External interrupt input pins.

input pins

The valid edge for IRQ0 to 4 can be selected with the

IRQnICR register.

IRQ1 has AC zero-cross detection function. IRQ1 can be set at both edges at pin voltage level.

When not used for interrupts, these can be used as normal input pins.

Publication date: October 2015

23

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A3

A4

A5

A6

A0

A1

A2

KEY0

KEY1

KEY2

KEY3

KEY4

KEY5

KEY6

KEY7

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

NWE

NRE

NCS

NDK

Name

ACZ1

ACZ0

NO

30

I/O Other Function

31 input P21,SEG53,IRQ1

P20,SEG54,IRQ0

Function

AC zero-cross detection input pins

Input pins for interrupt based on OR result of pin inputs.

These can be set to key input pins by 1-bit with the key interrupt control register (KEYT3_1IMD,

KEYT3_2IMD) and by 2-bit with the key interrupt control register (KEYT3_1IMD).

When not used for KEY input, these pins can be used as normal I/O pins.

Description

AC zero-cross detection input pin.

AC zero-cross detection output “H” when input level is mid-level and “L” otherwise.

ACZ input signal is connected to P20 input and IRQ0 interrupt circuit or P21 input and IRQ1 interrupt circuit.

When not used for AC zero-cross detection, these can be used as normal input pins.

62

61

60

64 input P50,SEG20,D0,SBO0A,

TXD0A

63 P51,SEG21,D1,SBI0A,

RXD0A

P52,SEG22,D2,SBT0A

P53,SEG23,D3,BUZZERA

P54,SEG24,D4,NBUZZERA

59

58

57

22 I/O

P55,SEG25,D5

P56,SEG26,D6

P57,SEG27,D7

RXD1A,SBI1A,TM7IOB,P00

23

24

25

TXD1A,SBO1A,TM8IOB,P01

SBT1A,TM9IOB,P02

26

27

28

29

RMOUTB,TM0IOB,TM2IOB,

P03

P04,SBO3A,TXD3A

P05,SBI3A,RXD3A

P06,SBT3A

P07,DA_A

75 output P72,SEG9,SBT2A

76

77

90 input

SDA5A,SEG8,P73

SCL5A,SEG7,P74

V

LC2

,P93

Key interrupt input pins

LED drive pins Large current output pins.

When not used for LED output, these pins can be used as normal I/O pins.

Write enable pins

[Active low]

Read enable pins

[Active low

Chip select pins

[Active low]

Data acknowledge pins [Active low]

Address pin

Memory control signal used when the memory area is expanded to the external of this LSI.

NWE is the strobe signal output for the write operation of the external memory and NRE is the strobe signal output for the read operation of the external memory

NCS is the chip selection signal outputs the external memory at the access.

NDK is the acknowledge signal that indicates close of access to the external memory.

A0-A19 is the address signal to the external memory.

D0-D7 is the data I/O signal to the external memory.

81

82

83

84

74

78

79

80

85

86

87

88

89

70

71

72

73

67 output P62,SEG17,TM1IOB

68

69

P63,SEG16,TM3IOB

P64,SEG15,TM4IOB

P65,SEG14,SBI4A

P66,SEG13,SBO4A,SDA4A

P67,SEG12,SBT4A,SCL4A

P70,SEG11,SBO2A,TXD2A

P71,SEG10,SBI2A,RXD2A

TXD1B,SBO1B,SEG6,P75

RXD1B,SBI1B,SEG5,P76

SBT1B,SEG4,P77

TM9OD0,SDO0,SEG3,P80

TM9OD1,SDO1,SEG2,P81

TM9OD2,SDO2,SEG1,P82

TM9OD3,SDO3,SEG0,P83

TM9OD4,SDO4,COM0,P84

TM9OD5,SDO5,COM1,P85

SDO6,COM2,P86

SDO7,COM3,P87

V

LC3

,P92 (Continue to next page)

Publication date: October 2015

24

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

SEG14

SEG15

SEG16

SEG17

SEG18

SEG19

SEG20

SEG21

SEG22

SEG23

SEG24

SEG25

SEG26

SEG27

SEG28

SEG29

SEG30

SEG31

SEG0

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

SEG7

SEG8

SEG9

SEG10

SEG11

SEG12

SEG13

D0

Name

D1

D2

D3

D4

D5

D6

D7

COM0

COM1

COM2

COM3

V

LC1

V

LC2

V

LC3

NO I/O Other Function Function

64

63

I/O P50,SEG20,KEY0,SBO0A,

TXD0A

P51,SEG21,KEY1,SBI0A,

RXD0A

62

61

60

59

P52,SEG22,KEY2,SBT0A

P53,SEG23,KEY3,BUZZERA

P54,SEG24,KEY4,NBUZZERA

P55,SEG25,KEY5

58

57

P56,SEG26,KEY6

P57,SEG27,KEY7

85 Output TM9OD4,SDO4,A15,P84

Data pin

LCD common output pins

86

87

88

91 -

TM9OD5,SDO5,A16,P85

SDO6,A17,P86

SDO7,A18,P87

SYSCLK,DA_C,P94 LCD power supply pins

90 NDK,P93

89 A19,P92

Description

(Continued from previous page)

These pins output common signal of required timing for LCD display.

Connect to the common pins of LCD display panel.

When the LCD functions are not used, these pins can be used as normal I/O port by the setting the LCD output control register LCCTR0.

Supply for LCD power. Apply 5.5

V

V

LC1

V

LC2

V

LC3

0 V.

When the internal voltage divider resistor is used,

V

LC1

=V

DD5

pin is selected as the reference voltage input pin.

When LCD is not used, V

LC1

to V

LC3

can be used as normal I/O pins with the setting of LCD output control register0 (LCCTR0).

These pins output segment signal of required timing for LCD display.

Connect to the segment pins of the LCD display panel.

When LCD display is turned off, V ss level is output.

These pins can be used as normal I/O pins with the setting of LCD output control register LCCTR1 to 7.

SEG can exchange segment pins and normal port by each bit.

58

57

56

63

62

61

60

59

55

54

53

67

66

65

64

70

69

68

74

73

72

71

79

78

77

76

75

84 output TM9OD3,SDO3,A14,P83

83 TM9OD2,SDO2,A13,P82

82

81

80

TM9OD1,SDO1,A12,P81

TM9OD0,SDO0,A11,P80

SBT1B,A10,P77

RXD1B,SBI1B,A9,P76

TXD1B,SBO1B,A8,P75

SCL5A,NCS,P74

SDA5A,NRE,P73

P72,NWE,SBT2A

P71,A7,SBI2A,RXD2A

P70,A6,SBO2A,TXD2A

P67,A5,SBT4A,SCL4A

P66,A4,SBO4A,SDA4A

P65,A3,SBI4A

P64,A2,TM4IOB

P63,A1,TM3IOB

P62,A0,TM1IOB

P61,DA_B

P60

P50,KEY0,D0,SBO0A,TXD0A

P51,KEY1,D1,SBI0A,RXD0A

P52,KEY2,D2,SBT0A

P53,KEY3,D3,BUZZERA

P54,KEY4,D4,NBUZZERA

P55,KEY5,D5

P56,KEY6,D6

P57,KEY7,D7

P47,SCL5B

P46,SDA5B

P45,SBT0B

P44,SBI0B,RXD0B

LCD segment output pinas

(Continue to next page)

Publication date: October 2015

25

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Name

SEG32

SEG33

SEG34

SEG35

SEG36

SEG37

SEG38

SEG39

SEG40

SEG41

SEG42

SEG43

SEG44

SEG45

SEG46

SEG47

SEG48

SEG49

SEG50

SEG51

SEG52

SEG53

SEG54

MMOD

DMOD

NO I/O

41

40

39

38

45

44

43

42

49

48

47

46

52

51

50

33

32

31

30

37

36

35

34

10 input

Other Function

P43,SBO0B,TXD0B

P42,SBT3B

P41,SBI3B,RXD3B

P40,SBO3B,TXD3B

P36

P35,SBI4B

P34,SBT4B,SCL4B

P33,SBO4B,SDA4B

P32,SBT2B

P31,SBI2B,RXD2B

P30,SBO2B,TXD2B

P16,TM8IOC,NBUZZERB

P15,TM7IOC,BUZZERB

P14,TM4IOC

P13,TM3IOC

P12,TM1IOC

P11,TM2IOC

P10,TM0IOC,RMOUTC

P24,IRQ4

P23,IRQ3

P22,IRQ2

P21,IRQ1,ACZ1

P20,IRQ0

21 input

Function

Memory mode switch input pins

Mode switch input pins

Set always to V

SS

.

Set always to V

DD5

.

Description

(Continued from previous page)

Publication date: October 2015

26

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.4

Block Diagram

1.4.1

Block Diagram

LED0, TM7IOB, SBI1A, RXD1A, P00

LED1, TM8IOB, SBO1A, TXD1A, P01

LED2, TM9IOB, SBT1A, P02

LED3, TM2IOB, TM0IOB, RMOUTB, P03

TXD3A, SBO3A, LED4, P04

RXD3A, SBI3A, LED5, P05

SBT3A, LED6, P06

DA_A, LED7, P07

RMOUTC, TM0IOC, SEG49, P10

TM2IOC, SEG48, P11

TM1IOC, SEG47, P12

TM3IOC, SEG46, P13

TM4IOC, SEG45, P14

BUZZERB, TM7IOC, SEG44, P15

NBUZZERB, TM8IOC, SEG43, P16

ACZ0, IRQ0, SEG54, P20

ACZ1, IRQ1, SEG53, P21

IRQ2, SEG52, P22

IRQ3, SEG51, P23

IRQ4, SEG50, P24

NRST, P27

TXD2B, SBO2B, SEG42, P30

RXD2B, SBI2B, SEG41, P31

SBT2B, SEG40, P32

SDA4B, SBO4B, SEG39, P33

SCL4B, SBT4B, SEG38, P34

SCL4B, SBI4B, SEG37, P35

SEG36, P36

TXD3B, SBO3B, SEG35, P40

RXD3B, SBI3B, SEG34, P41

SBT3B, SEG33, P42

TXD0B, SBO0B, SEG32, P43

RXD0B, SBI0B, SEG31, P44

SBT0B, SEG30, P45

SDA5B, SEG29, P46

SCL5B, SEG28, P47

Low-speed

Oscillator

Circuit

High-speed

Oscillator

Circuit

PLL

CPU

MN101E

High-precision

DAC

ROM

508 KB

RAM

8 KB

Audio Reproduction

8-bit Timer 0

8-bit Timer 1

8-bit Timer 2

Serial Interface 0

Serial Interface 1

8-bit Timer 3

8-bit Timer A

Time base timer6

16-bit Timer 7

Serial Interface 2

Serial Interface 3

Serial Interface 4

Serial Interface 5

16-bit Timer 8

16-bit Timer 9

External Interrupt

A/D Converter

PORT 5

PORT 6

LCD

Watchdog Timer

BUZZER

Data Automatic Transfer0, 1

D/A converter

PORT 7

DA1_AOUT

DA1_DOUT

PB3, AN11

PB2, AN10

PB1, AN9

PB0, AN8

PA7, TM9IOA, A9

PA6, TM8IOA, A8

PA5, TM7IOA, A7

PA4, TM4IOA, A4

PA3, TM3IOA, A3

PA2, TM2IOA, A2

PA1, TM1IOA, A1

PA0, RMOUTA, TM0IOA

P95, DA_D

P94, DA_C, V

LC1

P93, NDKK, V

LC2

P92, A19, V

LC3

P91, XO

P90, XI

P87, SDO7, A18, COM3

P86, SDO6, A17, COM2

P85, TM9OD5, SDO5, A16, COM1

P84, TM9OD4, SDO4, A15, COM0

P83, TM9OD3, SDO3, A14, SEG0

P82, TM9OD2, SDO2, A13, SEG1

P81, TM9OD1, SDO1, A12, SEG2

P80, TM9OD0, SDO0, A11, SEG3

Figure:1.4.1 Block Diagram

*

Depending on the models. See [[1.1.2 Product Summary]]

Publication date: October 2015

27

1.5

Electrical Characteristics

This LSI manual describes the standard specification.

Please ask our sales offices for the product specifications.

Model

Contents

MN101E30

Structure CMOS integrated circuit

Application General purpose

Function CMOS, 8-bit, single chip micro controller

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Publication date: October 2015

28

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.1

Absolute Maximum Ratings *2 *3

V

SS

= 0 V

Parameter Symbol Rating Unit

1

2

3

4

5

6

7

8

Power supply voltage

Capacity connection pin

*4

Input clamp current (ACZ)

Input pin voltage

Output pin voltage

I/O pin voltage

P0

V

DD5

V

DD18

V

DD

I

C

V

I

V

O

V

IO1

I

OL1

(peak)

-0.3 to +7.0

-0.3 to +2.5

-0.3 to +4.6

-500 to +500

-0.3 to V

DD5

+ 0.3

-0.3 to V

DD5

+ 0.3

-0.3 to V

DD5

30

+ 0.3

V

A

V

9 Peak power current

Other than

P0

I

OL2

(peak)

20

10

11

All pins

P0

I

OH

(peak)

I

OL1

(avg)

-10

20 mA

12

Average output current

*1

Other than

P0

I

OL2

(avg)

15

13 All pins

I

OH

(avg)

-5

14 Power dissipation

15 Operating ambient temperature

P

T

T opr

400

-40 to +85 mW

16 Storage temperature -55 to +125

C

T stg

*1 Applied to any 100 ms period.

*2 Connect approximate 1

F capacitor between V

DD18

/V

DD

power supply pin and the ground, and approximate 10-times capacitor connect to V

DD18

/V

DD

between V

DD5

power supply pin and the ground for the internal power supply stabilization.

*3 The absolute maximum ratings are the limit values beyond which the LSI may be damaged.

*4 Applied only in Flash version.

Publication date: October 2015

29

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.2

Operating Conditions

Parameter Symbol Condition

MIN

Power supply voltage *4

1

2

3

Power supply voltage

In not using

PLL

In using PLL

V

V

V

DD5-1

DD5-2

DD5-3 fosc

20 MHz

[Double speed mode: fs

 20

MHz]

4.0 MHz

 fosc  10 MHz

[Multiplied by 2 to 10: fs

 20

MHz] fx=32.768 kHz

[Normal mode: fs

fx/2]

[During STOP mode] 4 Voltage to maintain RAM data

V

DD5-4

Operating speed *5

5

6

Instruction execution time t c1 t c2

V

DD5

=2.2 V to 5.5 V

V

DD5

=2.2 V to 5.5 V

2.2

2.2

2.2

1.8

0.05

61

V

SS

= 0 V

Ta = -40

C to +85 C

Rating

Unit

TYP MAX

5.5

5.5

5.5

5.5

V

s

*4

*5 fosc: Input clock frequency to OSC1 pin.

fx: Input clock frequency to XI pin t c1

: In the case of OSC1 as CPU clock, or OSC1 multiplied by PLL as CPU clock.

t c2

: In the case of XI as CPU clock.

Use LCD power supply voltage with V

LC1

 V

DD5

.

Publication date: October 2015

30

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Parameter Symbol Condition

MIN

Crystal oscillator 1 Figure:1.5.1 [NORMAL mode]

7 Crystal frequency f xtal1

V

DD5

= within the operation power supply voltage

(Refer to the reference value of power supply voltage 1 to 3.)

8

9

External capacitors

C

11

C

12

10

Internal feedback resistor

R f10

V

DD5

=5.0 V

Crystal oscillator 2 Figure:1.5.2 [SLOW mode]

11

12

13

Crystal frequency

External capacitors f xtal2

C

21

C

22

V

DD5

=2.2 V to 5.5 V

14

Internal feedback resistor

R f20

V

DD5

=5.0 V

2.0

V

SS

= 0 V

Ta = -40

C to +85 C

Rating

Unit

TYP MAX

10

10

950

32.768

4

4

6

20 MHz pF k

 kHz pF

M

OSC1 fxtal1

R f10

OSC2

MN101E30N

C

12

C

11

Instruction cycle becomes clock frequency divided by 1/2

Built-in feedback resistor

Figure:1.5.1 Crystal oscillator 1

XI fxtal2

R f20

XO

MN101E30N

C

22

C21

Instruction cycle becomes clock frequency divided by 1/2

Built-in feedback resistor

Figure:1.5.2 Crystal oscillator 2

Connect external capacitors that suits the used pin. When crystal oscillator or ceramic oscillator is used, the frequency is changed depending on the condenser rate. Therefore, consult the manufacturer of the pin for the appropriate external capacitor.

..

..

Publication date: October 2015

31

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Parameter Symbol Condition

V

DD5

= 2.2 V to 5.5 V V

SS

= 0 V

Ta = -40

C to +85 C

Rating

Unit

MIN TYP MAX

External clock input 1 OSC1 (OSC2 is unconnected)

15 Clock frequency f

OSC1

16 High level pulse width *6 t wh1

17

18

Low level pulse width *6

Rising time *7 t wl1 t wr1

19 Falling time *7 t wf1

External clock input 2 XI (XO is unconnected)

Figure:1.5.3

Figure:1.5.3

1.0

22.5

22.5

0

0

20 Clock frequency f

OSC2

21 High level pulse width *6 t wh2

22 Low level pulse width *6

23 Rising time *7 t wl2 t wr2

Figure:1.5.4

0

24 Falling time *7 t wf2

Figure:1.5.4

0

*6 The clock duty rate in the standard mode should be 45 % to 55 %

*7

Rising time and falling time differ depending on oscillation frequency.

This is noted that the maximum value is a rough value, not a specified value.

Consult the oscillator manufacturer and perform matching tests for determining appropriate values.

32.768

4.5

4.5

20.0

5.0

5.0

20

20

MHz ns kHz

s ns

Publication date: October 2015

32

Publication date: October 2015 t wr1 t wh1 t wl1 t wf1 t wc1

Figure:1.5.3 OSC1 Timing Chart

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

0.9V

DD5

0.1V

DD5

0.9V

DD5

0.1V

DD5 t wr2 t wh2 t wl2 t wf2 t wc2

Figure:1.5.4 XI Timing Chart

33

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.3

DC Characteristics

Parameter Symbol Conditions

Power supply current *8 (NORMAL mode: fs=fosc/2 SLOW mode: fs=fx/2)

1

2

3

4

5

6

7

8

9

10

Power supply current

Supply current during HALT1 mode

Supply current during STOP mode

I

I

I

I

I

I

I

I

I

I

DD1

DD2

DD

DD4

DD5

DD6

DD7

DD8

DD9

DD10 fosc=20 MHz [Double-speed mode: fs=fosc]

V

DD5

=5 V (In not using PLL) fosc=4 MHz [Multiplied by 5: fs=20 MHz]

V

DD5

=5 V (In using PLL) fosc=8 MHz [Double-speed mode: fs=fosc]

V

DD5

=5 V (In not using PLL) fosc=4 MHz [Double-speed mode: fs=fosc]

V

DD5

=5 V (In not using PLL) fx=32.768 MHz, [fs=fx/2]

V

DD5

=3 V Ta=25

C fx=32.768 MHz, [fs=fx/2]

V

DD5

=3 V Ta=85

C fx=32.768 MHz V

DD5

Ta=25

C

=3 V fx=32.768 kHz V

DD5

Ta=85

C

=3 V

V

DD5

=5 V Ta=25

C

V

DD5

=5 V Ta=85

C

MIN

V

SS

=0 V

Ta=-40

C to +85 C

Rating

TYP

4 (9)

4 (10)

1.5 (5)

1 (3)

5 (60)

4 (6)

1 (2)

MAX

8 (18)

8 (20)

3 (9)

2 (6)

20 (120)

75 (200)

13 (18)

A

70 (80)

6 (7)

60 (60)

Unit mA

Publication date: October 2015

34

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

*8 Measured under condition without load. (pull-up / pull-down resistors are unconnected.)

• The supply current during operation, I

DD1

to I

DD4

are measured under the following conditions:

After all I/O pins are set to input mode and the oscillation is set to <NORMAL mode>, the

MMOD pin is at V

SS

level, the input pins are at V

DD5

level, and a 20 MHz square wave of

V

DD5

and V

SS

amplitudes is input to the OSC1 pin.

• The supply current during operation, I

DD5

and I

DD6

are measured under the following conditions:

After all I/O pins are set to input mode and the oscillation is set to <SLOW mode>, the MMOD pin is at V

SS

level, the input pins are at V

DD5

level, and a 32.768 kHz square wave of V

DD5

and V

SS amplitudes is input to the XI pin.

• The supply current during HALT1 mode, I

DD7

and I

DD8

are measured under the following conditions:

After all I/O pins are set to input mode and the oscillation is set to <HALT1 mode>, the input pins are at V

DD5

level, and an 32.768 kHz square wave of V

DD5

and V

SS

amplitudes is input to the XI pin.

• The supply current during STOP mode, I

DD9

and I

DD10

are measured under the following conditions:

After the oscillation is set to <STOP mode>, the MMOD pin is at V

SS

level, the input pins are at

V

DD5

level, and the OSC1 and XI pins are unconnected.

• The values in parentheses are for Flash version.

Publication date: October 2015

35

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

V

DD5

=2.2 V to 5.5 V V

SS

=0 V

Ta=-40

C to +85 C

Rating

Parameter Symbol Conditions

MIN TYP

Input pin 1 MMOD, DMOD, ATRST

11 Input high voltage

12 Input low voltage

13 Input leakage current

V

IH1

V

IL1

I

LK1

V

IN

=0 V to V

DD5

0.8V

DD5

0

I/O pin 2 P27 (NRST)

14 Input high voltage

15 Input low voltage

V

IH2

V

IL2

0.8V

DD5

0

16

19

Pull-up resistor

Input leakage current

R

RH1

10 50

I/O pin 3 P10 to P16, P20 to P24, P30 to P36, P40 to P47, P50 to P57, P60 to P67, P70 to P77

17 Input high voltage

V

IH3

0.8V

DD5

18 Input low voltage

V

IL3

0

I

LK2

V

DD5

=5.0V V

IN

=V

SS

Pull-up resistor ON

20

21

22

23

Pull-up resistor

Pull-down resistor

Output high voltage

Output low voltage

R

R

V

V

RH2

RH1

OH1

OL1

V

IN

=0 V to V

DD5

V

DD5

=5.0 V V

IN

=V

SS

Pull-up resistor ON

V

DD5

=5.0 V V

IN

=V

SS

Pull-down resistor ON

V

DD5

=5.0 V I

OH

=-0.5 mA

V

DD5

=5.0 V I

OL

=1.0 mA

10

10

4.5

50

50

MAX

V

DD

0.2V

DD5

2

V

DD5

0.15V

DD5

100

V

DD5

0.2V

DD5

2

100

100

0.5

Unit

V

A

V k

V

A k

V

Publication date: October 2015

36

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Parameter Symbol Conditions

I/O pin 4 P80 to P87, P90 to P95, PA0 to PA7, PB0 to PB3

24

25

26

Input high voltage

Input low voltage

Input leak current

V

IH4

V

IL4

I

LK3

27 Pull-up resistor

R

RH 3

V

IN

=0 V to V

DD5

V

DD5

=5.0 V V

IN

=V

SS

Pull-up resistor ON

28

29

Output high voltage

Output low voltage

V

OH2

V

OL2

V

DD5

=5.0 V I

OH

=0.5 mA

V

DD5

=5.0 V I

OL

=1.0 mA

I/O pin 5 P00 to P07

30 Input high voltage1

31

32

Input low voltage1

Input leak current

V

IH5

V

IL5

I

LK4

33

34

35

36

37

Pull-up resistor

Pull-down resistor

Output high voltage

Output low voltage1

Output low voltage2

R

R

V

V

V

RH4

RL 2

OH3

OL3

OL4

V

IN

=0 V to V

DD5

V

DD5

=5.0 V V

IN

=V

SS

Pull-up resistor ON

V

DD5

=5.0 V V

IN

=V

SS

Pull-down resistor ON

V

DD5

=5.0 V I

OH

=0.5 mA

V

DD5

=5.0 V I

OL

=1.0 mA

LED output OFF

V

DD5

=5.0 V I

OL

=15 mA

LED output ON

V

DD5

=2.2 V to 5.5 V V

SS

=0 V

Ta=-40

C to +85 C

MIN

Rating

TYP MAX

Unit

0.8V

DD5

0

50

V

DD5

0.2V

DD5

2

100

V

A k

10

4.5

V

0.5

0.8V

DD5

0

10

10

4.5

50

50

V

DD5

0.2V

DD5

2

V

A

100 k

100

0.5

1.0

V

Publication date: October 2015

37

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

V

DD5

=2.2 V to 5.5 V V

SS

=0 V

Ta=-40

C to +85 C

Rating

Unit Parameter Symbol Conditions

MIN

I/O pin 6 P20 (during used as ACZ) and P21 (during used as ACZ) are regulated at 5.0 V

38 Input high voltage1

V

DHH

4.5

39

40

Input high voltage2

Input low voltage1

V

DHL

V

DLH

Figure:1.5.5

1.5

41 Input low voltage2

42 Input clamp current

V

DLL

I

C3

V

IN

> V

DD5

, V

IN

< 0 V

Display output pin 1 COM0 to COM3 (At V

LC1

, V

SS

Voltage output) *9

43

Output high voltage

(In V

LC1

voltage output)

44

Output low voltage

(In V

SS

voltage output)

V

V

OCOMH

OCOML

V

V

DD5

DD5

=V

=V

LC1

LC1

=5.0 V I

=5.0 V I

COM

COM

= -10

=10

A

A

Display output pin 2 SEG0 to SEG54 (At V

LC1

, V

SS

Voltage output) *10

45

Output high voltage

(In V

LC1

voltage output)

V

OSEGH

V

DD5

=V

LC1

=5.0 V I

SEG

= -2

A

46

Output low voltage

(In V

SS

voltage output)

V

Display power pin 1 V

LC1

, V

LC2

, V

LC3

OSEGL

V

DD5

=V

LC1

=5.0 V I

SEG

=2

A

47

48

Internal dividing resistor

R

VL1

R

VL2

Ta=

25 C

*11

(Impedance between V

LC1 and V

SS

)

4.4

4.4

142.5

15

TYP

300

30

MAX

V

3.5

0.5

500 A

0.6

0.6

570

60

V

V k

*9 However, COM0 to COM3 are also used as P84 to P87.

*10 However, SEG0 to SEG54 are also used as P10 to P16, P20 to P24, P30 to P36, P40 to P47, P50 to P57, P60 to P67, P70 to

P77and P80 to 83.

*11 Summation of 3 resistors among V

LC1

and V

LC2

, V

LC2

and V

LC3

, V

LC3

and V

SS

Publication date: October 2015

38

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.4

A/C Converter Characteristics

Parameter

ACZ1 pin

1 Rising time

2 Falling time

Input 2

Symbol t rs t fs

trs

Conditions

Figure:1.5.5

tfs

MIN

V

DD5

=5.0 V V

SS

=0 V

Ta=-40

C to +85 C

Rating

Unit

TYP MAX

30

30

s

V

DD5

V

DHH

V

DLH

( Input )

Output 1

V

DHL

V

DLL

V

SS

( Output )

Figure:1.5.5 Operation of AC Zero-Cross Detection Circuit

Publication date: October 2015

39

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.5

A/D Converter Characteristics

Parameter Symbol Conditions

1 Resolution

2 Non-linearity error 1

3 Differential linearity error 1

4 Zero transition voltage

5

Full-scale transition voltage

6

A/D conversion time

7

8

9

Sampling time

10 Reference voltage

11 Analog input voltage

12

Analog input leakage current

13

Reference voltage pin input leakage current

14 Ladder resistance

V ref+

V

DD5

=5.0 V, V

SS

=0 V

V ref+

=5.0 V

T

AD

=800 ns *12

V

DD5

=5.0 V, V

SS

=0 V

V ref+

=5.0 V

T

AD

=800 ns *12

T

AD

=800 ns *12 fx=32.768 kHz

T

AD

=15.2

s *12

T

AD

=800 ns *12 fx=32.768 kHz

T

AD

=15.2

s *12

Note)

R

LADD

When channel is OFF

V

ADIN

=0 V to 5.0 V

When V

REF+

is OFF

V ss

V

REF+

V

DD5

V

DD5

=5.0 V

*12 T

AD

is A/D conversion clock cycle.

The values of 2 to 5 are guaranteed on the condition that V

DD5

=V ref+

=5 V, V

SS

=0 V.

Note) The voltage difference between V

REF+ and V

SS should be set to more than 2 V.

MIN

-30

4970

12.93

V

DD5

=5.0 V V

SS

=0 V

Ta=-40

C to +85 C

Rating

Unit

TYP MAX

10

±3

Bits

LSB

±3

10

4990

30

5030 mV

427.25

1.6

30.52

2.0

V

SS

V

V

DD5 ref+

2

s

V

A

15 40

5

80 k

The reference voltage input to V

REF+ pin should be used on the condition of 2.0 V

V

REF+



V

DD5

to avoid the malfunctions of microcomputer.

..

..

Publication date: October 2015

40

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.6

D/A Converter Characteristics

Parameter Symbol Conditions

1 Resolution

2 Reference voltage low level

D

AVSS

3 Reference voltage high level

D

AVDD

4

5

Zero scale output voltage

Full scale output voltage

V

ZS

V

FS

6

Analog output resistance

(Minimum reference resistance)

R

OAT

7 Non-linearity error

N

LE

8 Differential non-linearity error

D

NLE

9 Settling time

T

SET

V

DD5

=5.0 V, V

SS

=0 V

D7 to D0=ALL "L"

V

DD5

=5.0 V, V

SS

=0 V

D7 to D0=ALL "H"

V

DD5

=5.0 V, V

SS

=0 V

V

DD5

=5.0 V, V

SS

=0 V

External capacitor CL=15 pF

All bits are set to ON or OFF

MIN

-

V

SS

-0.05

V

DD5

=5.0 V V

SS

=0 V

Ta=25

C

Rating

Unit

TYP

-

-

-

MAX

8

V

DD5

Bits

0 0.05

V

4.93

5

-

-

-

4.98

10

± 2.0

± 2.0

1.5

5.03

15

± 3.0

± 3.0

3.0

k

LSB

s

Publication date: October 2015

41

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.7

Auto Reset Characteristics

Parameter Symbol Conditions

Power supply voltage

1 Operation voltage

Power supply voltage

2

Power supply detection level

3

Supply voltage change rate

Power supply current

4

Auto reset power consumption

V

V

RST

t/V

I

DD7

DD7

Auto reset is used

V

DD5

=5 V

V

DD5

=V

RST

to 5.5 V V

SS

=0 V

Ta=-40

C to +85 C

Rating

Unit

MIN TYP MAX

V

RST

5.5

V

3.7

250

4.5

V

s/V

220 330

A

Publication date: October 2015

42

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.8

Audio Output Characteristics

Parameter Symbol Conditions

V

DD5

=AV

DD

=5.5 V V

SS

=0 V

Ta=-40

C to +85 C

Rating

Unit

MIN TYP MAX

Output pin 7 DA1_AOUT

1

2

3

6

7

Power supply voltage

Signal-to-noise ratio

Dynamic range

Output voltage high level

Output voltage low level

AV

DD

AV

DD

=V

DD5

S/N

AV

DD

=5 V

(Note1)

D.R.

AV

DD

=5 V

(Note1)

4 Total harmonic distortion ratio THD+N

AV

DD

=5 V

(Note1)

5 Output impedance

R

AOUT

AV

DD

=5 V

Output pin 8 DA1_DOUT

V

OH2

V

OL2

V

DD5

=5.0 V I

OH

=-2 mA

V

DD5

=5.0 V I

OL

=2.0 mA

4.5

80

70

0.25

4.5

88

78

0.16

5.5

0.26

2.0

0.5

(Note1) This is the value sampling 1kHz SIN wave at 20kHz and recording with 16bit-PCM.

(Note2) H2,H3 and H4 are the output level at the measuring point on the audio charactoristic measuring curcuit(Figure:1.5.6).

V dB dB

% k

V

DA1_AOUT

AV

DD

AV

SS

HPM

Amplifier circuit

Measuring point

Figure:1.5.6 Audio Characteristic Measuring Circuit (a)

AV

DD

and V

DD5

should be at the same electric potential regardless of whether or not the audio production function is used.

Publication date: October 2015

43

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

HPM

93

ADACL

96

ADACR

+

220

ο

F

100

οϑ

3.5

Ω

HPOUTL

HPOUTR

Amplifier circuit

10 k

Ω

HPOUTL 1

ο

F

HPOUTR

1 k

Ω

-

+

1000 pF

2.7 k

Ω

0.22

ο

F

-

+

1000 pF

2.2 k

Ω

1.5 k

Ω

47 k

Ω

47 k

Ω

-

+

100 pF

100 pF

Measuring point

Figure:1.5.7 Audio Characteristic Measuring Circuit (b)

Publication date: October 2015

44

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.5.9

Flash EEPROM Program Condition

1

2

3

Item

Programming voltage level

Data retention period

Programming guarantee number times

Symbol

V

DD5-6

Thold

E

MAX

Condition

MIN

2.7

10

Rating

TYP MAX

5.5

Unit

V

Years

1000 Times

Publication date: October 2015

45

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

1.6

Package Dimension

Units: mm

Figure:1.6.1 Package Dimension (QFP100-P-1818B)

Sealing material:

Lead material :

Lead surface processing :

EPOXY resin

Cu alloy

Pd plating

The external dimensions of the package are subject to change. Before using this product, please obtain product specifications from the sales offices.

Publication date: October 2015

46

MN101E30N/E30R/EF30R

8-bit Single-chip Microcontroller

PubNo. 2163001-019E

Units: mm

Figure:1.6.2 Package Dimension (LQFP100)

The external dimensions of the package are subject to change. Before using this product, please obtain product specifications from the sales offices.

Publication date: October 2015

47

Request for your special attention and precautions in using the technical information and semiconductors described in this book

(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed.

(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book.

(3) The products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book.

Consult our sales staff in advance for information on the following applications:

Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body.

It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application.

(4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product

Standards in advance to make sure that the latest specifications satisfy your requirements.

(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions

(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment.

Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.

(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.

(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company.

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