NXP 8xC51MA2, 8xC51MB2, 8xC51MB2/02, 8xC51MC2

Philips Semiconductors

Extended Address Range Microcontroller

2 MEMORY ORGANIZATION

P87C51Mx2 User Manual

P87C51Mx2

2.1

PROGRAMMER’S MODELS AND MEMORY MAPS

The P87C51Mx2 retains all of the 80C51 memory spaces. Additional memory space has been added transparently as part of the means for allowing extended addressing. The basic memory spaces include code memory (which may be on-chip, off-chip, or both); external data memory; Special Function Registers; and internal data memory, which includes on-chip RAM, registers, and stack. Provision is made for internal data memory to be extended, allowing a larger processor stack.

The P87C51Mx2 programmer’s model and memory map is shown in Figure 3.

CODE

7F:FFFFh

Two 24-bit Universal Pointers

R7 R6 R5

R3 R2 R1

23-bit Program Counter

23-bit Extended Data Pointer

Two 16-bit DPTRs

16-bit Stack Pointer

HDATA

(includes XDATA)

7E:FFFFh

On-Chip and/or

Off-Chip

Code Memory

8 MB Code

Memory Space

PSW B A

EDATA

(includes DATA & IDATA)

Extended Data

Memory

(stack and indirect addressing)

4FFh

00:0000h

Extended SFRs

Special Function

Registers

(directly addressable)

IDATA

(includes DATA)

256 Byte On-Chip

Data Memory

(stack and indirect addressing)

100h

FFh

DATA

128 Byte On-Chip

Data Memory

(stack, direct and indirect addressing)

Four Register Banks

R0 - R7

Data Memory Space

(DATA, IDATA, EDATA)

80h

7Fh

00h

Off-Chip

Data Memory

XDATA

00:07FFh

00:06FFh

1792 Bytes On-Chip

Data Memory

(P87C51MC2)

XDATA

00:0300h

00:02FFh

768 Bytes On-Chip

Data Memory

(P87C51MB2)

00:0000h

8 MB - 64 KB External

Data Memory Space

(XDATA, HDATA)

Figure 3: P87C51MB2/C2 Programmer’s Model and Memory Map

5 Preliminary 2002 June 28