Detailed Description of Data Table Information. Allen-Bradley 1734 IJ, 1734 IK
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3-2 Encoder/Counter Module Input and Output Data
Rollover Value
Preset Value
Counter Control SS Value
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 0
32-bit value at which the counter is commanded to rollover
32-bit value the counter is to be set to when CP is asserted
0 0 0 0 0 VR CP CR
Detailed Description of
Data Table Information
Present Channel Data (Input Word 1)
This is a 32 bit unsigned long word value representing the current count of the 24 bit counter (configurations: count [0], x1 encoder [1],
x2 encoder [2], x4 encoder [4]) or the frequency (configurations:
period/rate [5], rate measurement [7]). The range of values is 0
≤
value
≤
0x00FFFFFF (16,777,215).
Stored/Accumulated Channel Data (Input Word 2)
This is a 32 bit unsigned long word value representing the stored count of the counter at the time of some specified event. In counter configurations (configurations: count [0], x1 encoder [1], x2 encoder
[2], x4 encoder [4]) without store modes selected, these words are not updated. With store modes selected, they are the stored value of the counter at the time of the specified event (ex: rising edge of Z input).
In period/rate [5] configurations, it is the total accumulation of unscaled Z pulses (i.e. if scaling is set to 128, after 128 Z pulses the accumulator will increase by 128 counts).
The maximum frequency that accumulation can follow in period/rate mode is 200Hz x scalar value (ex: 200Hz x 128 is 25kHz). Finally, in
rate measurement [7] configuration, it is the total number of pulses seen at the A input accumulated over each period as specified by the product of the time base x gate interval. The range of values occupy the entire 32 bit size from 0
≤
value
≤
0xFFFFFFFF (4,294,967,295).
Changing the configuration does not clear these words.
Module/Channel Status and Programming Error Codes (Input
Words 3 and 4)
Programming Error bit (PE) - If an incomplete, incorrect or conflicting set of configuration parameters are sent to the module, the
PE bit will be asserted and an error code will be placed in the
Programming Error Code word (assembly 68
16
). The module will not enter a normal operational state.
Publication 1734-UM006A-EN-P - August 2000
Encoder/Counter Module Input and Output Data 3-3
Bit definitions for the error code are:
E10:
Reserved
E9:
The decimal point position is outside of acceptable range.
E8:
Reserved
E7:
Reserved
E6:
A configuration was selected that requires the scalar and none was programmed OR Multiple scalars were selected.
E5:
The preset is out of range ( > 0x00FFFFFF).
E4:
A rollover of zero was programmed OR Rollover is out of range ( > 0x01000000).
E3:
A configuration requiring time base was selected and no gate interval was set OR Gate interval is out of range ( > 200) OR
Product of time base and gate interval is greater than 3 seconds.
E2:
A time base was entered that is not a multiple of 10 OR Time base is out of range ( > 3000, i.e. 3 seconds).
E1:
ZF/BF/AF were selected and no filter was programmed OR
Multiple filters were selected.
E0:
A reserved configuration/mode was programmed.
EEPROM Fault status bit (EF) - If a fault is detected with the
EEPROM during power up tests, this bit is asserted to 1. It indicates that the content of the EEPROM has been corrupted, most likely caused by loss of power during an executing write.
Not Ready status bit (NR) - Whenever power is applied to the module, the hardware must be initialized. During this time, the NR bit will be asserted and the green module status indicator will flash.
Z input Status (ZS) - This bit indicates the present status of the Z input (1 indicates Z is ON, 0 indicates Z is OFF). This bit is unaffected by Z Invert, ZI, in the Counter Configuration word.
B input Status (BS) - This bit indicates the present status of the B input (1 indicates B is ON, 0 indicates B is OFF).
A input Status (AS) - This bit indicates the present status of the A input (1 indicates A is ON, 0 indicates A is OFF).
C[1,0] Stored data count - This count cycles through [ 0 0 ], [ 0 1 ], [ 1
0 ], [ 1 1 ], [ 0 0 ]
…
Each time the stored/accumulated count words are updated, C[1,0] is incremented. This feature assumes the host’s sample rate (including network delay and program scan) is as fast or faster than the frequency of the event which updates C[1,0].
Publication 1734-UM006A-EN-P - August 2000
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