ADSP-21061 EZ-KIT Lite™ Evaluation System

ADSP-21061 EZ-KIT Lite™ Evaluation System

3.3.1. ADSP-21061 SHARC Processor Memory Map

The ADSP-21061 SHARC processor has 1M of internal SRAM that can be used for program or data storage. The configuration of on-chip SRAM is detailed in the ADSP-

2106x SHARC User’s Manual. Table 3-2 shows the memory map of the ADSP-21061 EZ-

KIT Lite.

The IMDW0 bit in the SYSCON register must be set to 1 to keep communication with the host. This bit determines whether data accesses made to internal memory block 0 are 40bit, three-column accesses (set = 1) or 32-bit, two-column accesses (cleared = 0). The monitor program requires three-column data accesses to memory block 0.

On reset, restart, and halt, the debug monitor kernel forces IMDW0 to 1 and IMDW1 to 0, but user code should also set these bits to ensure that it operates in the same way on both the simulator and the EZ-KIT Lite board. These settings affect data accesses only, not instruction fetches. Block 0 resides in three-column memory. If you are storing data in block 0, it must be in three-column format.

Table 3-2 Memory Map

0x0000 0000

0x0000 0100

0x0002 0000

0x0002 0000

0x0002 0000

0x0002 4000

0x0002 4000

0x0002 4000

0x0004 0000

0x0004 8000

End Address

0x0000 0FF

0x0001 ffff

0x0002 3FFF

0x0002 1fff

0x0002 3fff

0x0002 7fff

0x0002 5fff

0x0002 7fff

0x0004 7fff

0x0004 ffff




Block 0 Normal Word (32/48) Addresses

Block 0 48-bit word Addressing

Block 0 32-bit word Addressing

Block 1 Normal Word (32/48) Addresses

Block 1 48-bit word Addressing

Block 1 32-bit word Addressing

Block 0 Short word (16-bit) Addressing

Block 1 Short word (16-bit) Addressing

NOTE: Use caution when accessing the boot EPROM. The EPROM chip select (BMS) has the same limitations as MS0. EPROM’s larger than 128K x 8 have restricted access to their data below address 0x020000, and their data aliases to other memory locations.

The user program can access this data from these other locations.


Table 3-3 shows currently used memory locations on the EZ-KIT Lite board by the monitor. You may not use these locations in programs.

Table 3-3 Restricted Memory Space




Description Memory


Routine that will overwrite old monitor’s run-time header

(rth) with one from the new


0 seg_rsvd_rth Run-time header for new


0 seg_post POST routine of the Monitor

0 seg_jmp Jump Routines 0 seg_rsvd_pmco Kernel Code 0 seg_rsvd_pmda PM Data of the


0 seg_rsvd_dmda DM Data of the





























NOTE: In order for your program to work properly, your program must not overwrite any memory location utilized by the monitor.



4.1. Overview

This chapter describes how to load and run the demonstration programs supplied with the ADSP-

21061 EZ-KIT Lite board. The demos are designed to run on the VisualDSP++ Environment supplied on a CD-ROM that shipped with this product. For detailed information on the IDDE features and operation, see the VisualDSP++ 3.0 User’s Guide for ADSP-21xxx DSPs.

4.2. Starting the VisualDSP++ Environment

After the VisualDSP++ software and license have been installed, click the Windows Start menu.


Programs -> VisualDSP ->

VisualDSP++ Environment

from the Start menu.

From the Session menu, choose New Session. The New Session dialog box appears.

Configure the debug session as shown in Figure 4-1 and click OK.

Figure 4-1 Target Selection Dialog

A Target Message dialog box appears.


Figure 4-2 Target Message

Press the Reset button on the EZ-KIT Lite evaluation board.

After 5 seconds all the LEDs light up and then all of them turn off except the POWER LED.

Ensure that all LEDs turn off (except for the POWER LED) before you click OK.

During this delay, the POST test verifies operation of the UART. After the LEDs go dark,

Communication Successe” message will be displayed in Console window of IDDE.

The initialization completes and the disassembly window opens. The code in the disassembly window is the EZ-KIT Lite monitor program.

4.3. IDDE Debug Operation with the ADSP-21061 EZ-KIT Lite

The VisualDSP++ 3.0 User’s Guide for ADSP-21xxx DSPs contains most of the information you need to operate the VisualDSP++ IDDE with your EZ-KIT Lite evaluation board.

4.3.1. Loading Programs

Because you are loading programs to a hardware target through the serial port, the load process takes more time than loading using the simulator. Wait for the Load Complete message in the Output window before you attempt any debug activities.


To load a program:

From the File menu, choose Load. The Open a Processor Program dialog box appears.

Navigate to the folder in which the DSP executable file resides. The demos that are supplied with the EZ-KIT Lite are located in C:\Program Files\Analog


NOTE: All file directories assume a default installation.

Select the .dxe file and click Open. The file loads and the message Load Complete appears in the Output window when the load process has completed.

4.3.2. Registers and Memory

To see current values in registers, use the F12 key or the Window -> Refresh command.

• Values may not be changed while a user program is running.

• The current version of the VisualDSP++ IDDE does not let you view hardware stack information.

4.3.3. Setting Breakpoints and Stepping

• Breakpoints set in the last three instructions of a DO-loop are allowed, but cause improper IDDE operation.

• Breakpoints set after a delayed branch instruction and before the branch occurs cause improper IDDE operation.

• The single-step command steps through a delayed branch instruction and the last three instructions of a DO-loop.

• VisualDSP++ automatically inserts breakpoints at the function Main()and at the

_exit instruction when the Settings->Run To Main command is selected.

4.3.4. Resetting the EZ-KIT Lite Board

You can reset the EZ-KIT Lite board with the pushbutton switch on the board or with the

Debug -> Reset command in VisualDSP++. Both methods clear and reset the chip's memory and debug information, so you will need to reload any programs that were running. The Debug -> Restart command resets the processor; however, the processor retains all debug information and memory contents.

• Do not use the reset push button while the IDDE is open unless the IDDE requests you to press it.


NOTE: If a message in the VisualDSP++ IDDE Output window requests you to reset board, you must do the following to ensure proper download of the monitor from the PC:

1. From Session menu, choose Select Session.

2. Select your Monitor Debug session.

3. Follow on-screen dialog boxes.

4.4. Demonstration Program

As described in the previous sections, you can start the included EZ-KIT Lite demonstration programs from the File menu or from toolbar buttons. Each of the following sections describes what the demonstration programs do and how to run them.

4.4.1. Bandpass Filter Demo

This program demonstrates the effect of four bandpass filters against no filter on a codec input source or an internally-generated noise source. This demonstration starts with a talkthrough program, with the Input Source set to Codec and the Filter range set to None. The

AD1847 codec digitizes the analog input signal and transmits the data to the ADSP-21061

SHARC processor’s serial port. The ADSP-21061 SHARC processor reads data from the serial port and retransmits the data back to the codec. The codec converts the data to an analog signal that drives the output device. The sample rate for the digital data is 8 kHz.

You may change the filter range and source without changing the code:

To change the filter range:

1. From the Memory menu, choose Two Column. A two-column window appears.

2. Right click inside the Memory window and click Go To…

3. From the Go To Address dialog box, click Browse.

4. From the Browse Symbol dialog box double-click on the symbol filter. In the

Memory window you will now be at the address for filter.


Figure 4-3 Memory Window for Symbol ‘Filter’

The address that filter represents is right under the symbol name. In this case it is address 0x24025.

5. Change the value at this location to:

Table 4-1 Bandpass Filter Demo – Filter Ranges

Value @ Filter Address






Filter Range


Pass 328-448 Hz

Pass 521-710 Hz

Pass 825-1125 Hz

Pass 1308-1783 Hz

6. Hit run. (Note: the filter will change.)

To Change the source:

1. From the Memory menu, choose Two Column. A two-column window appears.

2. Right click inside the Memory window and click Go To…

3. From the Go To Address dialog box click on Browse.

4. From the Browse Symbol dialog box double click on the symbol source. In the

Memory window you will now be at the address for the filter.


Figure 4-4 Memory Window for Symbol ‘Source’

5. The address that source represents is right under the symbol name. In this case it is address 0x24026.

6. Change the value at this location to:

Table 4-2 Bandpass Filter Demo – Source Inputs

Value @ Source Address






7. When you change the source to Noise the ADSP-21061 SHARC processor supplies a fabricated noise source.

8. Hit run. (NOTE: Changes will occur.)

The C source code for this program is located in the Program Files\Analog

Devices\VisualDSP\21k\EZ-KITs\ADSP-21061\Demos\Bp directory.

NOTE: All directory paths are based on default installation.

4.4.2. Primes Demo

This program calculates the first twenty prime numbers. When the calculation is completed, you can view the results in the Expressions window:

Open an Expressions window from View -> Debug Window -> Expressions

Click inside the Expressions window so it is active and type the word primes inside the window. Then hit enter.

Now expand the primes by clicking on the plus sign next to the word primes.


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