ADSP-21061 EZ-KIT Lite™ Evaluation System

ADSP-21061 EZ-KIT Lite™ Evaluation System

Figure 4-5 Expressions Window for Primes Demo

The C source code for this program is located in the Program Files\Analog

Devices\VisualDSP\21k\EZ-KITs\ADSP-21061\Demos\primes directory.

4.4.3. Peter Gunn Demo

This program demonstrates the Karplus-Strong algorithm for simulating the sound of a

“plucked” string. The ADSP-21061 SHARC processor uses the algorithm to generate digital audio samples according to data that specifies the notes to be played. The audio samples are transmitted to the AD1847 codec over a serial port. The codec converts the data to an analog signal that drives the output device.

The demo is also contained in the boot PROM and executes when the power is first applied or when you press and release the RESET button.

The assembly source code for this program is located in the Program Files\Analog

Devices\VisualDSP\21k\EZ-KITs\ADSP-21061\Demos\gunn directory.

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4.4.4. Blink Demo

This simple program demonstrates how to use the ADSP-21061 SHARC processor’s builtin timer to toggle two LEDs on the EZ-KIT Lite board.

The C source code for this program is located in the Program Files\Analog

Devices\VisualDSP\21k\EZ-KITs\ADSP-21061\Demos\blink directory.

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5. WORKING WITH EZ-KIT LITE HARDWARE

5.1. Overview

This chapter describes the hardware characteristics of the ADSP-21061 EZ-KIT Lite board. It includes a description of the board’s major features and section that describes the user configurable items.

5.2. Board Layout

Figure 5-1 shows the layout of the ADSP-21061 EZ-KIT Lite board, which consists of a printed circuit board measuring 4.5 inches by 6.5 inches. Figure 5-1 highlights the locations of the major components described in the following sections.

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Figure 5-1 Major Components of the ADSP-21061 EZ-KIT Lite Rev. 2 Board

5.2.1. ADSP-21061 SHARC Processor

This is the ADSP-21061 SHARC processor, which operates at 40 MHz. The Pin 1 Index is located in the upper-right corner.

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5.2.2. Boot PROM

The boot PROM (U7) provides 8-bit program storage that can be loaded by the ADSP-

21061 SHARC processor at start-up. The socket mounted on this board is designed to accept EPROMs from 256K bits up to 8M bits. Jumpers JP1 through JP4 provide the necessary adjustments required to accommodate the different sizes of EPROM. When the

ADSP-21061 SHARC processor is configured for PROM booting, the first 256 instructions

(1536 bytes) are automatically loaded by the ADSP-21061 SHARC processor when reset is released.

The remaining program image must be loaded by the program that is installed in those first

256 instructions. The ldr21k utility can do this for you. Refer to the ADSP-2106x SHARC

User’s Manual for more information on program booting.

5.2.3. User Pushbutton Switches

For user input/control, there are eight pushbutton switches on the ADSP-21061 EZ-KIT

Lite board: RESET, FLAG 0-3, and IRQ 0-2.

• The RESET switch initiates a power-on reset to the DSP. There are no restrictions to when the switch can be used, so do not press the switch unless you want a complete DSP reset.

• The FLAG1 switch toggles the status of a flag pin (FLAG1) to the DSP. This lets you manually trigger the flag, providing an “event” while executing software.

• The IRQ1 switch sends an interrupt (IRQ1) to the DSP. This lets you manually cause this interrupt when executing a program. IRQ2 is shared with the UART, and IRQ0 is brought out to the expansion connector.

See “Flags” section in Chapter 3, for more information on interfacing to the pushbutton switches from DSP programs.

5.2.4. User LEDs

There are four LEDs on the ADSP-21061 EZ-KIT Lite board. Your DSP program can control them to indicate certain conditions in the software or to provide feedback. The

LEDs are controlled by processor FLAG outputs of the DSP and are labeled according to the flag that enables them.

5.2.4.1. Power LED

The Power LED, when on indicates that +5 VDC used by the DSP and digital circuitry is present.

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5.2.5. Expansion Port Connectors

There are seven expansion connector sites that provide the signals for adding optional custom hardware. The interface contains the ADSP-21061 SHARC processor bus as well as six link ports, a synchronous serial port, interrupts, flags, and various control signals.

Figure 5-2 Expansion Port Connectors

5.2.6. JTAG Connector (Emulator Port)

The JTAG header (Figure 5-2) is the connecting point for the JTAG emulator probe. Note that one pin is missing (Pin 3) to provide keying. The Pin 3 socket in the mating connector has a plug inserted at that location.

The ADSP-21061 EZ-KIT Lite board is shipped with two jumpers installed across Pins 7 &

8 and 9 & 10. Remove these jumpers before installing the JTAG probe. When the JTAG probe is removed, replace these jumpers to ensure that the ADSP-21061 SHARC processor initializes correctly on power-up.

The proper power up sequence is:

1. JTAG Emulator

2. ADSP-21061 EZ-KIT Lite board

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