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WM8235
PIN
47
48
49
50
51
52
53
54
55
56
NAME
AGND2
AVDD2
IN4
IN5
IN6
IN7
IN8
IN9
AVDD1
AGND1
TYPE
Supply
Supply
DESCRIPTION
Analogue ground
Analogue supply
Analogue input Analogue input 3
Analogue input Analogue input 4
Analogue input Analogue input 3
Analogue input
Analogue input 4
Analogue input Analogue input 5
Analogue input
Analogue input 6
Supply Analogue supply
Supply Analogue ground
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device.
Cirrus Logic tests its package types according to IPC/JEDEC J-STD-020 for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30
C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30
C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30
C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Analogue supply voltage: AVDD1-2, LDO1VDD-LDO2VDD, DBVDD
MIN
GND - 0.3V
MAX
GND + 5V
Analogue grounds: AGND1-3, LDO1GND-LDO2GND, DBGND
Analogue inputs (IN1-6)
Other Analogue pins
Digital I/O pins
Operating temperature range: T
A
Storage temperature prior to soldering
GND - 0.3V
GND - 0.3V
GND + 0.3V
AVDD + 0.3V
GND - 0.3V AVDD + 0.3V
GND - 0.3V AVDD + 0.3V
-40
C +85
30
C max / 85% RH max
C
-65
C +150
C
Storage temperature after soldering
Notes:
1.
2.
GND denotes the voltage of any ground pin.
AGND, LDOGND and DBGND pins are intended to be operated at the same potential. Differential voltages between these pins will degrade performance.
RECOMMENDED OPERATING CONDITIONS
CONDITION
Operating temperature range
Analogue Supply voltage
SYMBOL
T
A
AVDD1-2
LDO1VDD-
LDO2VDD
DBVDD
MIN
-40
2.97
TYP
3.3
MAX
85
3.63
UNITS
C
V
Rev 4.5
7
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Table of contents
- 1 DESCRIPTION
- 1 FEATURES
- 1 APPLICATIONS
- 2 BLOCK DIAGRAM
- 3 TABLE OF CONTENTS
- 5 PIN CONFIGURATION
- 5 ORDERING INFORMATION
- 6 PIN DESCRIPTION
- 7 ABSOLUTE MAXIMUM RATINGS
- 7 RECOMMENDED OPERATING CONDITIONS
- 8 ELECTRICAL CHARACTERISTICS
- 11 INTERNAL POWER ON RESET CIRCUIT
- 12 SIGNAL TIMING REQUIREMENTS
- 12 SERIAL CONTROL INTERFACE
- 12 DEVICE IDENTIFICATION
- 13 REGISTER WRITE
- 13 REGISTER READ-BACK
- 14 INPUT VIDEO SAMPLING
- 14 NON-CDS (S/H) MODE
- 14 CDS MODE
- 16 OUTPUT DATA TIMING (CMOS OUTPUT)
- 16 OUTPUT DATA TIMING (LVDS OUTPUT)
- 17 DEVICE DESCRIPTION
- 17 INTRODUCTION
- 17 RESET LEVEL CLAMPING (RLC)
- 19 CDS/NON-CDS PROCESSING
- 20 OFFSET ADJUST AND PROGRAMMABLE GAIN
- 20 ADC INPUT BLACK LEVEL ADJUST
- 21 OVERALL SIGNAL FLOW SUMMARY
- 22 ADC PGA BIAS CURRENT CONTROL
- 23 PLL DLL SETUP
- 25 OUTPUT DATA FORMAT
- 25 LVDS 10-BIT 5PAIR MODE
- 26 LVDS 16-BIT 5PAIR MODE
- 28 LVDS 10-BIT 3PAIR MODE
- 30 LVDS 16-BIT 3PAIR MODE
- 31 LVDS 12-BIT 4PAIR MODE
- 33 LVDS DATA OUTPUT ORDER
- 34 LVDS SYNCHRONOUS OUTPUT
- 35 CMOS OUTPUT MODE
- 35 CLOCK TIMING CONFIGURATION
- 37 SENSOR TIMING GENERATION
- 38 TG MASTER MODE OPERATION
- 38 TG SLAVE MODE OPERATION
- 39 TG PULSE AND TRIGGER DATA
- 40 TG PULSE
- 40 TRIGGER DATA
- 40 CHANNEL ID
- 43 TG MASK TIMING
- 44 TG CYCLE MODE
- 45 PROGRAMMABLE AUTOMATIC BLACK LEVEL CALIBRATION (BLC)
- 45 TARGET CODES
- 46 BLC SCENARIOS OF OPERATION
- 46 SCENARIO
- 49 AUTOMATIC GAIN CONTROL (AGC)
- 51 LINE-BY-LINE OPERATION
- 53 TEST PATTERN GENERATOR
- 55 REGISTER SETTING PROCEDURE
- 55 OVERALL
- 56 PLL/DLL CONFIGURATION
- 56 SAMPLING CONFIGURATION
- 57 CLAMP CONFIGURATION
- 57 VRLC CONFIGURATION
- 58 OFFSET DAC CONFIGURATION
- 59 PGA CONFIGURATION
- 61 TG CLOCK CONFIGURATION
- 62 TG PULSE CONFIGURATION
- 63 DATA OUTPUT CONFIGURATION
- 66 REGISTER MAP
- 71 EXTENDED PAGE REGISTERS
- 72 REGISTER BITS BY ADDRESS
- 148 APPLICATIONS INFORMATION
- 148 RECOMMENDED EXTERNAL COMPONENTS
- 149 RECOMMENDED EXTERNAL COMPONENT VALUES
- 150 PACKAGE DIMENSIONS
- 151 IMPORTANT NOTICE
- 152 REVISION HISTORY