CHAPTER 3 ADDRESSING
3.2 Addressing of Operand Address
The following methods are available to specify the register and memory (addressing) which undergo manipulation during instruction execution.
3.2.1 Direct addressing
[Function]
This addressing directly addresses a memory to be manipulated with immediate data in an instruction word.
[Operand format]
Operand addr16 Label or 16-bit immediate data
Description
[Description example]
MOV A, !FE00H; When setting !addr16 to FE00H
Instruction code 0 0 1 0 1 0 0 1 OP code
0 0 0 0 0 0 0 0 00H
1 1 1 1 1 1 1 0 FEH
[Illustration]
7 0
OP code addr16 (lower) addr16 (higher)
Memory
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CHAPTER 3 ADDRESSING
3.2.2 Short direct addressing
[Function]
This addressing directly addresses memory to be manipulated in the fixed space with the 8-bit data in an instruction word.
This addressing is applied to the 256-byte fixed space of FE20H to FF1FH. An internal high-speed RAM and special function registers (SFRs) are mapped at FE20H to FEFFH and FF00H to FF1FH, respectively.
The SFR area (FF00H-FF1FH) to which short direct addressing is applied constitutes only part of the overall
SFR area. In this area, ports that are frequently accessed in a program and a compare register of the timer/event counter are mapped, and these SFRs can be manipulated with a small number of bytes and clocks.
When 8-bit immediate data is 20H to FFH, bit 8 of an effective address is set to 0. When it is 00H to 1FH, bit 8 is set to 1. See Illustration below.
[Operand format]
Operand saddr saddrp
Description
Label or FE20H to FF1FH immediate data
Label or FE20H to FF1FH immediate data (even address only)
[Description example]
MOV FE30H, #50H; When setting saddr to FE30H and the immediate data to 50H
Instruction code 1 1 1 1 0 1 0 1 OP code
0 0 1 1 0 0 0 0 30H (saddr-offset)
0 1 0 1 0 0 0 0 50H (immediate data)
[Illustration]
7 0
OP code saddr-offset
Short direct memory
Effective address
15
1 1 1 1 1 1 1
8
α
When 8-bit immediate data is 20H to FFH,
α
= 0.
When 8-bit immediate data is 00H to 1FH,
α
= 1.
0
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CHAPTER 3 ADDRESSING
3.2.3 Special function register (SFR) addressing
[Function]
This addressing is to address special function registers (SFRs) mapped to the memory with the 8-bit immediate data in an instruction word.
This addressing is applied to the 240-byte spaces of FF00H to FFCFH and FFE0H to FFFFH. However, the
SFRs mapped at FF00H to FF1FH can also be accessed by means of short direct addressing.
[Operand format]
sfr
Operand
Special function register name
Description
[Description example]
MOV PM0, A; When selecting PM0 for sfr
Instruction code 1 1 1 0 0 1 1 1
0 0 1 0 0 0 0 0
[Illustration]
7 0
OP code sfr-offset
SFR
Effective address
15
1 1 1 1 1 1 1 1
8 7
0
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CHAPTER 3 ADDRESSING
3.2.4 Register addressing
[Function]
This addressing is to access a general-purpose register by specifying it as an operand. The general-purpose register to be accessed is specified with a register specification code in an instruction code or function name.
Register addressing is carried out when an instruction with the following operand format is executed. When an
8-bit register is specified, one of the eight registers is specified with 3 bits (register specification code) in the instruction code.
[Operand format]
r rp
Operand
X, A, C, B, E, D, L, H
AX, BC, DE, HL
Description
'r' and 'rp' can be described with absolute names (R0 to R7 and RP0 to RP3) as well as functional names (X, A,
C, B, E, D, L, H, AX, BC, DE, and HL).
[Description example]
MOV A, C; When selecting the C register for r
Instruction code 0 0 0 0 1 0 1 0
0 0 1 0 0 1 0 1
Register specification code
INCW DE; When selecting the DE register pair for rp
Instruction code 1 0 0 0 1 0 0 0
Register specification code
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CHAPTER 3 ADDRESSING
3.2.5 Register indirect addressing
[Function]
This addressing is to address memory using the contents of the special register pair as an operand. The register pair to be accessed is specified with the register pair specification code in an instruction code. This addressing can be carried out for the entire memory space.
[Operand format]
Operand
[DE], [HL]
[Description example]
MOV A, [DE]; When selecting register pair [DE]
Description
Instruction code 0 0 1 0 1 0 1 1
[Illustration]
DE
15 8 7
D
The contents of the specified memory address are transferred.
7 0
A
7
E
0
0
Memory address specified with register pair DE
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3.2.6 Based addressing
[Function]
This addressing is to address the memory by using the result of adding 8-bit immediate data to the contents of the base register, i.e., the HL register pair. The addition is performed by expanding the offset data as a positive number to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for the entire memory space.
[Operand format]
Operand
[HL + byte]
[Description example]
MOV A, [HL+10H]; When setting “byte” to 10H
Description
Instruction code 0 0 1 0 1 1 0 1
0 0 0 1 0 0 0 0
3.2.7 Stack addressing
[Function]
This addressing is to indirectly address the stack area with the stack pointer (SP) contents.
This addressing method is automatically employed when the PUSH, POP, subroutine call, or RETURN instructions is executed or when the register is saved/restored upon generation of an interrupt request.
Stack addressing can address the internal high-speed RAM area only.
[Description example]
In the case of PUSH DE
Instruction code 1 0 1 0 1 0 1 0
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CHAPTER 4 INSTRUCTION SET
This chapter lists the instruction set of the 78K/0S Series. The instructions are common to all 78K/0S Series products.
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