650 kHz /1.3 MHz Step-Up PWM DC-to-DC Switching Converters / ADP1612

650 kHz /1.3 MHz Step-Up PWM DC-to-DC Switching Converters / ADP1612

Data Sheet

APPLICATIONS INFORMATION

ADIsimPower DESIGN TOOL

The ADP1612/ADP1613 are supported by ADIsimPower design tool set. ADIsimPower is a collection of tools that produce complete power designs optimized for a specific design goal.

The tools enable the user to generate a full schematic, bill of materials, and calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and all real external components. For more information about ADIsimPower design tools, refer to www.analog.com/ADIsimPower . The tool set is available from this website, and users can also request an unpopulated board through the tool.

SETTING THE OUTPUT VOLTAGE

The ADP1612/ADP1613 feature an adjustable output voltage range of V

IN

to 20 V. The output voltage is set by the resistor

voltage divider, R1 and R2, (see Figure 34) from the output

voltage (V

OUT

) to the 1.235 V feedback input at FB. Use the following equation to determine the output voltage:

V

OUT

= 1.235 × (1 + R1/R2) (1)

Choose R1 based on the following equation:

R1

=

R2

×

V

OUT

1

1 .

235

.

235

(2)

INDUCTOR SELECTION

The inductor is an essential part of the step-up switching converter. It stores energy during the on time of the power switch, and transfers that energy to the output through the output rectifier during the off time. To balance the tradeoffs between small inductor current ripple and efficiency, inductance values in the range of 4.7 µH to 22 µH are recommended.

In general, lower inductance values have higher saturation current and lower series resistance for a given physical size.

However, lower inductance results in a higher peak current that can lead to reduced efficiency and greater input and/or output ripple and noise. A peak-to-peak inductor ripple current close to 30% of the maximum dc input current typically yields an optimal compromise.

For determining the inductor ripple current in continuous operation, the input (V

IN

) and output (V

OUT

) voltages determine the switch duty cycle (D) by the following equation:

D

=

V

OUT

V

OUT

V

IN

(3)

ADP1612/ADP1613

Using the duty cycle and switching frequency, f

SW

, determine the on time by the following equation:

t

ON

=

D f

SW

(4)

The inductor ripple current (∆I

L

) in steady state is calculated by

I

L

=

V

IN

×

L t

ON

(5)

Solve for the inductance value (L) by the following equation:

L

=

V

IN

×

I

L t

ON

(6)

Ensure that the peak inductor current (the maximum input current plus half the inductor ripple current) is below the rated saturation current of the inductor. Likewise, make sure that the maximum rated rms current of the inductor is greater than the maximum dc input current to the regulator.

For CCM duty cycles greater than 50% that occur with input voltages less than one-half the output voltage, slope compensation is required to maintain stability of the current-mode regulator. For stable current-mode operation, ensure that the selected inductance is equal to or greater than the minimum calculated inductance, L

MIN

, for the application parameters in the following equation:

L

>

L

MIN

=

(

V

OUT

2 .

7

×

2

×

f

SW

V

IN

)

(7)

Inductors smaller than the 4.7 µH to 22 µH recommended range can be used as long as Equation 7 is satisfied for the given application. For input/output combinations that approach the

90% maximum duty cycle, doubling the inductor is recom-

mended to ensure stable operation. Table 5 suggests a series

of inductors for use with the ADP1612/ADP1613.

Table 5. Suggested Inductors

Manufacturer Part Series

Sumida CMD4D11

CDRH4D28CNP

Coilcraft

CDRH5D18NP

CDRH6D26HPNP

DO3308P

DO3316P

Toko

Würth

Elektronik

Dimensions

L × W × H (mm)

5.8 × 4.4 × 1.2

5.1 × 5.1 × 3.0

6.0 × 6.0 × 2.0

7.0 × 7.0 × 2.8

12.95 × 9.4 × 3.0

12.95 × 9.4 × 5.21

D52LC

D62LCB

D63LCB

WE-TPC

5.2 × 5.2 × 2.0

6.2 × 6.3 × 2.0

6.2 × 6.3 × 3.5

Assorted

WE-PD, PD2, PD3, PD4 Assorted

Rev. D | Page 13 of 28

ADP1612/ADP1613

CHOOSING THE INPUT AND OUTPUT CAPACITORS

The ADP1612/ADP1613 require input and output bypass capacitors to supply transient currents while maintaining constant input and output voltages. Use a low equivalent series resistance

(ESR), 10 µF or greater input capacitor to prevent noise at the

ADP1612/ADP1613 input. Place the capacitor between VIN and GND as close to the ADP1612/ADP1613 as possible.

Ceramic capacitors are preferred because of their low ESR characteristics. Alternatively, use a high value, medium ESR capacitor in parallel with a 0.1 µF low ESR capacitor as close to the ADP1612/ADP1613 as possible.

The output capacitor maintains the output voltage and supplies current to the load while the ADP1612/ADP1613 switch is on.

The value and characteristics of the output capacitor greatly affect the output voltage ripple and stability of the regulator. A low ESR ceramic dielectric capacitor is preferred. The output voltage ripple (∆V

OUT

) is calculated as follows:

V

OUT

=

Q

C

C

OUT

=

I

OUT

×

t

ON

C

OUT

(8) where:

Q

C

is the charge removed from the capacitor.

t

ON

is the on time of the switch.

C

OUT

is the output capacitance.

I

OUT

is the output load current.

t

ON

=

D f

SW

and

D

=

V

OUT

V

OUT

V

IN

(9)

(10)

Choose the output capacitor based on the following equation:

C

OUT

I

OUT f

SW

×

(

V

OUT

×

V

OUT

V

IN

× ∆

V

OUT

) (11)

Multilayer ceramic capacitors are recommended for this application.

DIODE SELECTION

The output rectifier conducts the inductor current to the output capacitor and load while the switch is off. For high efficiency, minimize the forward voltage drop of the diode. For this reason,

Schottky rectifiers are recommended. However, for high voltage, high temperature applications, where the Schottky rectifier reverse leakage current becomes significant and can degrade efficiency, use an ultrafast junction diode.

Data Sheet

Ensure that the diode is rated to handle the average output load current. Many diode manufacturers derate the current capability of the diode as a function of the duty cycle. Verify that the output diode is rated to handle the average output load current with the minimum duty cycle. The minimum duty cycle of the ADP1612/ADP1613 is

D

MIN

=

V

OUT

V

IN

(

MAX

)

V

OUT

(12) where V

IN(MAX)

is the maximum input voltage.

The following are suggested Schottky diode manufacturers:

• ON Semiconductor

• Diodes, Inc.

LOOP COMPENSATION

The ADP1612/ADP1613 use external components to compensate the regulator loop, allowing optimization of the loop dynamics for a given application.

The step-up converter produces an undesirable right-half plane zero in the regulation feedback loop. This requires compensating the regulator such that the crossover frequency occurs well below the frequency of the right-half plane zero. The right- half plane zero is determined by the following equation:

F

Z

(

RHP

)

=



V

IN

V

OUT



2

×

R

LOAD

2

π ×

L

(13) where:

F

Z

(RHP) is the right-half plane zero.

R

LOAD

is the equivalent load resistance or the output voltage divided by the load current.

To stabilize the regulator, ensure that the regulator crossover frequency is less than or equal to one-fifth of the right-half plane zero.

The regulator loop gain is

A

VL

=

V

FB

V

OUT

×

V

IN

V

OUT

×

G

MEA

×

R

OUT

||

Z

COMP

×

G

CS

×

Z

OUT

(14) where:

A

VL

is the loop gain.

V

FB

is the feedback regulation voltage, 1.235 V.

V

OUT

is the regulated output voltage.

V

IN

is the input voltage.

G

MEA

is the error amplifier transconductance gain.

R

OUT

is 125 MΩ.

Z

COMP

is the impedance of the series RC network from COMP to GND.

G

CS

is the current sense transconductance gain (the inductor current divided by the voltage at COMP), which is internally set by the ADP1612/ADP1613.

Z

OUT

is the impedance of the load in parallel with the output capacitor.

Rev. D | Page 14 of 28

Data Sheet

To determine the crossover frequency, it is important to note that, at that frequency, the compensation impedance (Z

COMP

) is dominated by a resistor, and the output impedance (Z

OUT

) is dominated by the impedance of an output capacitor. Therefore, when solving for the crossover frequency, the equation (by definition of the crossover frequency) is simplified to

A

VL

2

π ×

=

f

C

V

FB

V

OUT

1

×

C

×

OUT

V

IN

V

OUT

=

1

×

G

MEA

×

R

COMP

×

G

CS

×

(15)

f

where:

C

is the crossover frequency.

R

COMP

is the compensation resistor.

Solve for R

COMP

,

R

COMP

=

2

π ×

V

FB f

C

×

×

V

IN

C

OUT

×

G

×

(

MEA

V

OUT

×

G

CS

)

2

(16) where:

V

FB

= 1.235 V.

G

MEA

= 80 µA/V.

G

CS

= 13.4 A/V.

R

COMP

=

4746

×

f

C

×

C

OUT

V

IN

×

(

V

OUT

)

2

(17)

Once the compensation resistor is known, set the zero formed by the compensation capacitor and resistor to one-fourth of the crossover frequency, or

C

COMP

=

π ×

f

C

2

×

R

COMP

where C

COMP

is the compensation capacitor.

(18)

ERROR

AMPLIFIER

FB

2 g m

COMP

1

V

BG

R

COMP

C

COMP

C2

Figure 35. Compensation Components

ADP1612/ADP1613

The capacitor, C2, is chosen to cancel the zero introduced by output capacitance, ESR.

Solve for C2 as follows:

C2

=

ESR

×

C

OUT

R

COMP

(19)

For low ESR output capacitance such as with a ceramic capacitor, C2 is optional. For optimal transient performance,

R

COMP

and C

COMP

might need to be adjusted by observing the load transient response of the ADP1612/ADP1613. For most applications, the compensation resistor should be within the range of 4.7 kΩ to 100 kΩ and the compensation capacitor should be within the range of 100 pF to 3.3 nF.

SOFT START CAPACITOR

Upon startup (EN ≥ 1.6 V), the voltage at SS ramps up slowly by charging the soft start capacitor (C

SS

) with an internal 5 µA current source (I

SS

). As the soft start capacitor charges, it limits the peak current allowed by the part to prevent excessive overshoot at startup. The necessary soft start capacitor, C

SS

, for a specific overshoot and start-up time can be calculated for the maximum load condition when the part is at current limit by:

C

SS

=

I

SS

t

V

SS

(20) where:

I

SS

= 5 μA (typical).

V

SS

= 1.2 V.

Δt = startup time, at current limit.

If the applied load does not place the part at current limit, the necessary C

SS

will be smaller. A 33 nF soft start capacitor results in negligible input current overshoot at start up, and therefore is suitable for most applications. However, if an unusually large output capacitor is used, a longer soft start period is required to prevent input inrush current.

Conversely, if fast startup is a requirement, the soft start capacitor can be reduced or removed, allowing the

ADP1612/ADP1613 to start quickly, but allowing greater peak switch current.

Rev. D | Page 15 of 28

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