Intel Ethernet Controllers Timing Device Selection Guide
2.4
PHY devices are deployed for many different communication applications. Some PHYs contain
PLLs with marginal lock range and cannot tolerate the jitter inherent in data transmission clocked with a programmable oscillator. The American National Standards Institute (ANSI) X3.263-1995 standard test method for transmit jitter is not stringent enough to predict PLL-to-PLL lock failures, therefore, the use of programmable oscillators is generally not recommended.
Ceramic Resonator
Similar to a quartz crystal, a ceramic resonator is a piezoelectric device. A ceramic resonator typically carries a frequency tolerance of ±0.5%, – inadequate for use with Intel® Ethernet controllers, and therefore, should not be utilized.
3.0
Crystal Selection Parameters
All crystals used with Intel® Ethernet controllers are described as “AT-cut,” which refers to the angle at which the unit is sliced with respect to the long axis of the quartz stone.
Table 1 lists the crystal electrical parameters and provides suggested values for typical designs.
These parameters are described in the following subsections.
Table 1. Crystal Parameters
Parameter Suggested Value
Vibrational Mode
Nominal Frequency
Frequency Tolerance
Temperature Stability
Calibration Mode
Load Capacitance
Shunt Capacitance
Equivalent Series Resistance
Drive Level
Aging
Fundamental
25.000 MHz at 25° C (required)
• ±30 ppm recommended
• ±50 ppm across the entire operating temperature range
(required by IEEE specifications)
±100 ppm at 0° C to 70° C
Parallel
• 16 pF to 20 pF
• 18 pF for the 82541GI(EI) and 82547GI(EI)
6 pF maximum
• 50
Ω
maximum
• 20
Ω maximum for the 82541GI(EI) and 82547GI(EI)
0.5 mW maximum
±5 ppm per year maximum
Application Note (AP-419)
3
Intel Ethernet Controllers Timing Device Selection Guide
3.1
3.2
3.3
Vibrational Mode
Crystals in the above-referenced frequency range are available in both fundamental and third overtone. Unless there is a special need for third overtone, use fundamental mode crystals.
At any given operating frequency, third overtone crystals are thicker and more rugged than fundamental mode crystals. Third overtone crystals are more suitable for use in military or harsh industrial environments. Third overtone crystals require a trap circuit (extra capacitor and inductor) in the load circuitry to suppress fundamental mode oscillation as the circuit powers up. Selecting values for these components is beyond the scope of this document.
Nominal Frequency
Intel® Ethernet controllers use a crystal frequency of 25.000 MHz. The 25 MHz input is used to generate a 125 MHz transmit clock for 100BASE-TX and 1000BASE-TX operation – 10 MHz and
20 MHz transmit clocks, for 10BASE-T operation.
Frequency Tolerance
The frequency tolerance for an Ethernet physical layer device is dictated by the IEEE 802.3 specification as ±50 parts per million (ppm). This measurement is referenced to a standard temperature of 25° C. Intel recommends a frequency tolerance of ±30 ppm.
3.4
Temperature Stability and Environmental Requirements
Temperature stability is a standard measure of how the oscillation frequency varies over the full operational temperature range (and beyond). Several optional temperature ranges are currently available, including -40° C to +85° C for industrial environments. Some vendors separate operating temperatures from temperature stability. Manufacturers may also list temperature stability as 50 ppm in their data sheets.
Note:
Crystals also carry other specifications for storage temperature, shock resistance, and reflow solder conditions. Crystal vendors should be consulted early in the design cycle to discuss the application and its environmental requirements.
3.5
Calibration Mode
The terms “series-resonant” and “parallel-resonant” are often used to describe crystal oscillator circuits. Specifying parallel mode is critical to determining how the crystal frequency is calibrated at the factory.
A crystal specified and tested as series resonant oscillates without problem in a parallel-resonant circuit, but the frequency is higher than nominal by several hundred parts per million. The purpose of adding load capacitors to a crystal oscillator circuit is to establish resonance at a frequency higher than the crystal’s inherent series resonant frequency.
4
Application Note (AP-419)
Intel Ethernet Controllers Timing Device Selection Guide
Figure 1 illustrates a simplified schematic of the 82551QM’s oscillator circuit. Note that 8254x
controllers are similar. The crystal and the capacitors form a feedback element for the internal inverting amplifier. This combination is called parallel-resonant, because it has positive reactance at the selected frequency. In other words, the crystal behaves like an inductor in a parallel LC circuit. Oscillators with piezoelectric feedback elements are also known as “Pierce” oscillators.
Figure 1. 82551QM Oscillator Circuit
C1
22pF
5%
Pin X1
Y1
25 MHz
Pin X2
C2
22pF
5%
3.6
Load Capacitance
The formula for crystal load capacitance is as follows:
C
L
=
(
(
C
1
⋅
C
2
C
1 +
C
2
)
)
+
C stray
where C1 = C2 = 22 pF (as suggested in most Intel reference designs) and C stray
= allowance for additional capacitance in pads, traces and the chip carrier within the Ethernet controller package
An allowance of 3 pF to 7 pF accounts for lumped stray capacitance. The calculated load capacitance is 16 pF with an estimated stray capacitance of about 5 pF.
Individual stray capacitance components can be estimated and added. For example, surface mount pads for the load capacitors add approximately 2.5 pF in parallel to each capacitor. This technique is especially useful if Y1, C1 and C2 must be placed farther than approximately one-half (0.5) inch from the controller. It is worth noting that thin circuit boards generally have higher stray capacitance than thick circuit boards.
Standard capacitor loads used by crystal manufacturers include 16 pF, 18 pF and 20 pF. Any of these values will generally operate with the controller. However, a difference of several picofarads between the calibrated load and the actual load will pull the oscillator slightly off frequency.
Application Note (AP-419)
5
Intel Ethernet Controllers Timing Device Selection Guide
3.7
The oscillator frequency should be measured with a precision frequency counter where possible.
The 8255x Fast Ethernet controller has a FLA [16]/CLK25 signal output for this purpose. The load specification or values of C1 and C2 should be fine tuned for the design. As the actual capacitance load increases, the oscillator frequency decreases.
Note:
C1 and C2 may vary by as much as 5% (approximately 1 pF) from their nominal values.
Shunt Capacitance
The shunt capacitance parameter is relatively unimportant compared to load capacitance. Shunt capacitance represents the effect of the crystal’s mechanical holder and contacts. The shunt capacitance should equal a maximum of 6 pF (7 pF is also acceptable).
3.8
Equivalent Series Resistance
Equivalent Series Resistance (ESR) is the real component of the crystal’s impedance at the calibration frequency, which the inverting amplifier’s loop gain must overcome. ESR varies inversely with frequency for a given crystal family. The lower the ESR, the faster the crystal starts up. Use crystals with an ESR value of 50
Ω
or better.
Note:
Check the specific controller documentation carefully; some devices may have tighter ESR requirements. For example, Intel recommends that 82541GI/EI and 82547GI/EI devices use crystals with an ESR value of 20
Ω
or less.
3.9
Drive Level
Drive level refers to power dissipation in use. The allowable drive level for a Surface Mounted
Technology (SMT) crystal is less than its through-hole counterpart, because surface mount crystals are typically made from narrow, rectangular AT strips, rather than circular AT quartz blanks.
Some crystal data sheets list crystals with a maximum drive level of 1 mW. However, Intel®
Ethernet controllers drive crystals to a level less than the suggested 0.5 mW value. This parameter does not have much value for on-chip oscillator use.
3.10
Aging
Aging is a permanent change in frequency (and resistance) occurring over time. This parameter is most important in its first year because new crystals age faster than old crystals. Use crystals with a maximum of ±5 ppm per year aging.
6
Application Note (AP-419)