Analog Devices SHARC
Manuals and User Guides for Analog Devices SHARC. We found 4 manuals for free downloads Application Notes, Manual, Application Note, User manual
Below you will find brief information for SHARC. This document discusses the process of booting a SHARC processor through its link port, which is a special feature that facilitates communication between SHARC processors. Learn how the link port booting mode differs from other modes and how to handle the link control register (LCTL) during the booting process.
Key Features
Link port booting
LCTL control register
DMA transfer
Master device
Slave SHARC
Unique booting methods
Software handling of hardware issues
Step-by-step example
Pages: 8 Analog Devices SHARC Application Notes
Brand: Analog Devices Category: Networking Size: 264 KB
Languages: English
Open manualOther manuals and documents
Frequently Answers and Questions
How does link port booting differ from other SHARC booting modes?
Link port booting uses a dedicated link control register (LCTL) for configuration, while other modes rely on DMAC6. LCTL is ignored initially but becomes active after the first 256 words are transferred, leading to unique complications in the process.
What are the hardware issues associated with link port booting?
The hardware-dependent decay time of the LACK signal must be accounted for. LACK is used by the link port to hold off data transfers when not ready. If the transmitter samples LACK before it decays to a 0 logic level, data loss can occur. To address this, a polling process is used to dynamically determine the decay time.
What is the purpose of the link port boot loader kernel?
The link port boot loader kernel is a 256-word program executed by the slave SHARC that enables handshaking with the master SHARC to ensure the proper reception of the remaining boot code.
advertisement