User's Guide | Measurement Specialties PCI-2513 User`s guide

PCI-2513

User's Guide

Document Revision 6, December, 2010

© Copyright 2010, Measurement Computing Corporation

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HM PCI-2513.doc 3

Table of Contents

Preface

About this User's Guide ....................................................................................................................... 6

What you will learn from this user's guide ......................................................................................................... 6

Conventions in this user's guide ......................................................................................................................... 6

Where to find more information ......................................................................................................................... 6

Chapter 1

Introducing the PCI-2513 ...................................................................................................................... 7

Overview: PCI-2513 features ............................................................................................................................. 7

Software features ................................................................................................................................................ 7

Chapter 2

Installing the PCI-2513 .......................................................................................................................... 8

What comes with your PCI-2513 shipment? ...................................................................................................... 8

Hardware .......................................................................................................................................................................... 8

Optional components ........................................................................................................................................................ 8

Additional documentation ................................................................................................................................................. 9

Unpacking the PCI-2513 .................................................................................................................................... 9

Installing the software ........................................................................................................................................ 9

Installing the PCI-2513 ....................................................................................................................................... 9

Configuring the hardware ................................................................................................................................. 10

Connecting the board for I/O operations .......................................................................................................... 10

Connectors and cables......................................................................................................................................................10

Connector pinout..............................................................................................................................................................11

Cabling ............................................................................................................................................................. 11

Field wiring and signal termination .................................................................................................................................12

Installing multiple boards ................................................................................................................................. 12

Chapter 3

Functional Details ............................................................................................................................... 13

PCI-2513 block diagram ................................................................................................................................... 13

Synchronous I/O – mixing analog, digital, and counter scanning .................................................................... 13

Bus mastering DMA ......................................................................................................................................... 14

Analog input ..................................................................................................................................................... 14

Analog input scanning .....................................................................................................................................................14

Digital I/O ......................................................................................................................................................... 15

Digital input scanning ......................................................................................................................................................15

Digital outputs and pattern generation .............................................................................................................................15

Triggering ......................................................................................................................................................... 15

Hardware analog triggering .............................................................................................................................................15

Digital triggering..............................................................................................................................................................16

Software-based triggering ................................................................................................................................................16

Stop trigger modes ...........................................................................................................................................................17

Pre-triggering and post-triggering modes ........................................................................................................................17

Counter inputs .................................................................................................................................................. 17

Mapped channels .............................................................................................................................................................18

Counter modes .................................................................................................................................................................18

Debounce modes ..............................................................................................................................................................19

Encoder mode ..................................................................................................................................................................22

Timer outputs .................................................................................................................................................... 26

Example: Timer outputs ...................................................................................................................................................27

4

PCI-2513 User's Guide

Using detection setpoints for output control ..................................................................................................... 27

What are detection setpoints? ..........................................................................................................................................27

Setpoint configuration overview ......................................................................................................................................27

Setpoint configuration ......................................................................................................................................................29

Using the setpoint status register......................................................................................................................................30

Examples of control outputs ............................................................................................................................................30

Detection setpoint details .................................................................................................................................................32

FIRSTPORTC or timer update latency ............................................................................................................................33

Chapter 4

Calibrating the PCI-2513 ..................................................................................................................... 35

Chapter 5

Specifications ...................................................................................................................................... 36

Analog input ..................................................................................................................................................... 36

Accuracy ..........................................................................................................................................................................36

Digital input / output ......................................................................................................................................... 37

Counters ............................................................................................................................................................ 37

Input sequencer ................................................................................................................................................. 38

Frequency/pulse generators .............................................................................................................................. 38

Trigger sources and modes ............................................................................................................................... 39

Power consumption .......................................................................................................................................... 39

PCI compatibility .............................................................................................................................................. 39

Environmental .................................................................................................................................................. 39

Mechanical ....................................................................................................................................................... 40

Main connector and pinout ............................................................................................................................... 40

Declaration of Conformity .................................................................................................................. 42

5

Preface

About this User's Guide

What you will learn from this user's guide

This user's guide explains how to install, configure, and use the PCI-2513 so that you get the most out of its analog input, digital I/O, and counter/timer I/O features.

This user's guide also refers you to related documents available on our web site and to technical support resources.

Conventions in this user's guide

For more information on …

Text presented in a box signifies additional information and helpful hints related to the subject matter you are reading.

Caution! Shaded caution statements present information to help you avoid injuring yourself and others, damaging your hardware, or losing your data.

bold text

italic text

Bold text is used for the names of objects on the screen, such as buttons, text boxes, and check boxes.

Italic text is used for the names of manuals and help topic titles, and to emphasize a word or phrase.

Where to find more information

For additional information relevant to the operation of your hardware, refer to the Documents subdirectory where you installed the MCC DAQ software (C:\Program Files\Measurement Computing\DAQ by default), or search for your device on our website at www.mccdaq.com

.

6

Chapter 1

Introducing the PCI-2513

Overview: PCI-2513 features

The PCI-2513 is supported under popular Microsoft

®

Windows

®

operating systems.

The PCI-2513 provides either eight differential or 16 single-ended analog inputs with 16-bit resolution. It offers seven software-selectable analog input ranges of ±10 V, ±5 V, ±2 V, ±1 V, ±0.5 V, ±0.2 V, and ±0.1V.

The board has 24 high-speed lines of digital I/O, two timer outputs, and four 32-bit counters. It provides up to

12 MHz scanning on all digital input lines.

You can operate all analog I/O, digital I/O, and counter/timer I/O synchronously and simultaneously.

Software features

For information on the features of InstaCal and the other software included with the PCI-2511, refer to the

Quick Start Guide that shipped with your board.

7

Installing the PCI-2513

What comes with your PCI-2513 shipment?

As you unpack your PCI-2513, verify that the following components are included.

Hardware

 PCI-2513

Chapter 2

Optional components

Cables and signal conditioning accessories that are compatible with the PCI-2513 are not included with PCI-

2513 orders, and must be ordered separately.

If you ordered any of the following products with your board, they should be included with your shipment.

 Cables

CA-68-3R CA-68-3S (3-feet) and CA-68-6S (6-feet)

 Signal conditioning accessories

MCC provides signal termination products for use with the PCI-2513. Refer to " Field wiring and signal termination

" on page 12 for a compatible accessory products.

8

PCI-2513 User's Guide Installing the PCI-2513

Additional documentation

In addition to this hardware user's guide, you should also receive the Quick Start Guide (available in PDF at www.mccdaq.com/PDFmanuals/DAQ-Software-Quick-Start.pdf

). This booklet supplies a brief description of the software you received with your PCI-2513 and information regarding installation of that software. Please read this booklet completely before installing any software or hardware.

Unpacking the PCI-2513

As with any electronic device, take care while handling to avoid damage from static electricity. Before removing the PCI-2513 from its packaging, ground yourself using a wrist strap or by simply touching the computer chassis or other grounded object to eliminate any stored static charge.

If any components are missing or damaged, notify Measurement Computing Corporation immediately by phone, fax, or e-mail:

 Phone: 508-946-5100 and follow the instructions for reaching Tech Support.

 Fax: 508-946-9500 to the attention of Tech Support

 Email: [email protected]

Installing the software

Refer to the Quick Start Guide for instructions on installing the software on the Measurement Computing Data

Acquisition Software CD. This booklet is available in PDF at www.mccdaq.com/PDFmanuals/DAQ-Software-

Quick-Start.pdf

.

Installing the PCI-2513

The PCI-2513 board is completely plug-and-play. There are no switches or jumpers to set on the board.

Configuration is controlled by your system's BIOS.

Before you install the PCI-2513 …

Enable Bus Mastering DMA: For a PCI-2513 to operate properly, you must enable Bus Mastering DMA on the PCI slot where you will install the board. Make sure that your computer can perform Bus Mastering DMA for the applicable PCI slot. Some computers have BIOS settings that enable and disable Bus Mastering DMA. If your computer has this BIOS option, make sure you enable Bus Mastering DMA on the appropriate PCI slot.

Refer to your PC Owner's Manual for additional information regarding your PC and enabling Bus Mastering

DMA for PCI slots.

Install the MCC DAQ software: The driver needed to run your PCI-2513 is installed with the MCC DAQ software. Therefore, you need to install the MCC DAQ software before you install your board. Refer to the

Quick Start Guide for instructions on installing the software.

To install your PCI-2513, follow the steps below.

1. Turn the computer off, open it up, and insert the board into an available PCI slot that has Bus Mastering

DMA enabled.

2. Close the computer and turn it on.

When you connect the PCI-2513 to a computer for the first time, a dialog opens when the operating system detects the device. The information file for this board should have already been loaded onto your PC when you installed the Measurement Computing Data Acquisition Software CD supplied with your board, and should be detected automatically by Windows. If you have not installed this software, cancel the dialog and install it now.

9


3. To test your installation and configure your board, run the InstaCal utility installed in the previous section.

Refer to the Quick Start Guide shipped with the board for information on how to initially set up and load

InstaCal.

If your board has been powered-off for more than 10 minutes, allow your computer to warm up for at least

30 minutes before acquiring data. This warm-up period is required in order for the board to achieve its rated accuracy. The high speed components used on the board generate heat, and it takes this amount of time for a board to reach steady state if it has been powered off for a significant amount of time.

Configuring the hardware

All hardware configuration options on the PCI-2513 are software-controlled. You can select some of the configuration options using InstaCal, such as the analog input configuration (16 single-ended or eight differential channels), and the edge used for pacing when using an external clock. Once selected, any program that uses the Universal Library initializes the hardware according to these selections.

Information on signal connections

General information regarding signal connection and configuration is available in the Guide to Signal

Connections. This document is available on our web site at www.mccdaq.com/signals/signals.pdf

).

Connecting the board for I/O operations

Connectors and cables

The table below lists the board connectors, applicable cables, and compatible accessory products for the PCI-

2513.

Connector type

Compatible cables (for the 68-pin

SCSI connector)

Compatible accessory products

Board connectors, cables, and compatible hardware

68-pin standard "SCSI TYPE III" female connector

HDMI connector (targeted for future expansion)

CA-68-3R — 68-pin ribbon cable; 3 feet.

CA-68-3S — 68-pin shielded round cable; 3 feet.


TB-100 terminal connector

RM-TB-100

10


Connector pinout

16-channel single-ended mode pinout

(8-channel differential signals in parentheses)

Signal name Pin Pin Signal name

ACH0 (ACH0 HI) 68 34 ACH8 (ACH0 LO)

AGND 67 33 ACH1 (ACH1 HI)

ACH9 (ACH1 LO) 66 32 AGND




SGND 62 28 ACH4 (ACH4 HI)






NC 56 22 N/C

NC 55 21 N/C

NEGREF (reserved for self-calibration) 54 20 POSREF (reserved for self-calibration)

GND 53 19 +5V

A1 52 18 A0

A3 51 17 A2

A5 50 16 A4

A7 49 15 A6

B1 48 14 B0

B3 47 13 B2

B5 46 12 B4

B7 45 11 B6

C1 44 10 C0

C3 43 9

C5 42 8

C7 41 7

GND 40 6

C2

C4

C6

TTL TRG

CNT1 39 5

CNT3 38 4

TMR1 37 3

GND 36 2

GND 35 1

PCI slot ↓

CNT0

CNT2

TMR0

XAPCR

XDPCR

Cabling

Use a CA-68-3R 68-pin ribbon expansion cable ( Figure 1 ), or a CA-68-3S (3-foot) or CA-68-6S (6-foot) 68-pin

shielded expansion cable ( Figure 2 ) to connect signals to the PCI-2513 board.)

34 68

34 68

1 35

The stripe identifies pin # 1

Figure 1. CA-68-3R cable

11

1 35


34 68

Installing the PCI-2513

34 68

1 35

1 35

Figure 2. CA-68-3S and CA-68-6S cable

Field wiring and signal termination

You can use the following MCC screw terminal boards to terminate field signals and route them into the

PCI-2513 board using the CA-68-3R, CA-68-3S, or CA-68-6S cable:



TB-100 : Termination board with screw terminals.



RM-TB-100 : 19-inch rack mount kit for the TB-100 termination board.

Details on these products are available on our web site at www.mccdaq.com/products/screw_terminal_bnc.aspx# .

Installing multiple boards

PCI-2513 features can be replicated up to four times, as up to four boards can be installed in a single host PC.

The serial number on each PCI-2513 distinguishes one from another. You can operate multiple PCI-2513 boards synchronously. To do this, set up one PCI-2513 with the pacer pin you want to use (XAPCR or XDPCR) configured for output. Set up the PCI-2513 boards you want to synchronize to this board with the pacer pin you want to use (XAPCR or XDPCR) configured for input. Wire the pacer pin configured for output to each of the pacer input pins that you want to synchronize.

12

Chapter 3

Functional Details

This chapter contains detailed information on all of the features available from the board, including:

 a block diagram of board functions

 information on how to use the signals generated by the board

 diagrams of signals using default or conventional board settings

PCI-2513 block diagram

Figure 3 is a simplified block diagram of the PCI-2513. This board provides all of the functional elements

shown in the figure.

Figure 3. PCI-2513 functional block diagram

Synchronous I/O – mixing analog, digital, and counter scanning

The PCI-2513 can read analog, digital, and counter inputs, while generating digital pattern outputs at the same time. Digital and counter inputs do not affect the overall A/D rate because these inputs use no time slot in the scanning sequencer.

For example, one analog input channel can be scanned at the full 1 MHz A/D rate along with digital and counter input channels. Each analog channel can have a different gain, and counter and digital channels do not need additional scanning bandwidth as long as there is at least one analog channel in the scan group.

13

PCI-2513 User's Guide Functional Details

Digital input channel sampling is not done during the "dead time" of the scan period where no analog sampling is being done either.

The ability to scan digital and counter channels along with analog channels provides for a more deterministic collection of data.

Bus mastering DMA

The PCI-2513 supports bus mastering DMA. With multiple DMA channels, analog, digital, and counter input data, as well as digital output data, can flow between the PC and the PCI-2513 without consuming valuable

CPU time. The driver supplied with the PCI-2513 automatically uses bus mastering DMA to efficiently conduct

I/O from the PC to the PCI-2513.

Analog input

The PCI-2513 has a 16-bit, 1-MHz A/D coupled with 16 single-ended or eight differential analog inputs. Seven software programmable ranges provide inputs from ±10 V to ±100 mV full scale.

Analog input scanning

The PCI-2513 has several scanning modes to address various applications. You can load the 512-location scan buffer with any combination of analog input channels. All analog input channels in the scan buffer are measured sequentially at 1 µs per channel by default.

For example, in the fastest mode, with 1 µs settling time for the acquisition of each channel, a single analog channel can be scanned continuously at 1 MS/s; two analog channels can be scanned at 500 kS/s each; 16 analog input channels can be scanned at 62.5 kS/s.

Settling time

For most applications, leave the settling time at its default of 1 µs.

However, if you are scanning multiple channels, and one or more channels are connected to a high-impedance source, you may get better results by increasing the settling time. Remember that increasing the settling reduces the maximum acquisition rate.

You can set the settling time to 1 µs, 5 µs, 10 µs, or 1 ms.

Example: Analog channel scanning of voltage inputs

Figure 4 shows a simple acquisition. The scan is programmed pre-acquisition and is made up of six analog

channels (Ch0, Ch1, Ch3, Ch4, Ch6, Ch7). Each of these analog channels can have a different gain. The acquisition is triggered and the samples stream to the PC via DMA. Using the default settling time, each analog channel requires one microsecond of scan time—therefore the scan period can be no shorter than 6 µs for this example. The scan period can be made much longer than 6 µs—up to 1 second. The maximum scan frequency is 1 divided by 6 µs, or 166,666 Hz.

14


Figure 4. Analog channel scan of voltage inputs example

Digital I/O

Twenty-four TTL-level digital I/O lines are included in each PCI-2513. You can program digital I/O in 8-bit

groups as either inputs or outputs and scan them in several modes (see " Digital input scanning " below). You can

access input ports asynchronously from the PC at any time, including when a scanned acquisition is occurring.

Digital input scanning

Digital input ports can be read asynchronously before, during, or after an analog input scan.

Digital input ports can be part of the scan group and scanned along with analog input channels. Two synchronous modes are supported when digital inputs are scanned along with analog inputs.

In both modes, adding digital input scans has no affect on the analog scan rate limitations.

If no analog inputs are being scanned, the digital inputs can be scanned at up to 12 MHz.

Digital outputs and pattern generation

Digital outputs can be updated asynchronously at anytime before, during, or after an acquisition. You can use two of the 8-bit ports to generate a digital pattern at up to 12 MHz. The PCI-2513 supports digital pattern generation with bus mastering DMA. The digital pattern can be read from PC RAM.

Digital pattern generation is clocked using an internal clock. The on-board programmable clock generates updates ranging from once every 1 second to 1 MHz, independent of any acquisition rate.

Triggering

Triggering can be the most critical aspect of a data acquisition application. The PCI-2513 supports the following trigger modes to accommodate certain measurement situations.

Hardware analog triggering

The PCI-2513 uses true analog triggering in which the trigger level you program sets an analog DAC, which is then compared in hardware to the analog input level on the selected channel. This guarantees an analog trigger latency that is less than 1 µs.

You can select any analog channel as the trigger channel, but the selected channel must be the first channel in the scan. You can program the trigger level, the rising or falling edge, and hysteresis.

15


A note on the hardware analog level trigger and comparator change state

When analog input voltage starts near the trigger level, and you are performing a rising or falling hardware analog level trigger, the analog level comparator may have already tripped before the sweep was enabled. If this is the case, the circuit waits for the comparator to change state. However, since the comparator has already changed state, the circuit does not see the transition.

To resolve this problem, do the following:

1. Set the analog level trigger to the threshold you want.

2. Apply an analog input signal that is more than 2.5% of the full-scale range away from the desired

threshold. This ensures that the comparator is in the proper state at the beginning of the acquisition.

3. Bring the analog input signal toward the desired threshold. When the input signal is at the threshold

(± some tolerance) the sweep will be triggered.

4. Before re-arming the trigger, move the analog input signal to a level that is more than 2.5% of the full-scale range away from the desired threshold.

For example, if you are using the ±2 V full-scale range (gain = 5), and you want to trigger at +1 V on the rising edge, you would set the analog input voltage to a start value that is less than +0.9 V (1 V – (2 V * 2 * 2.5%)).

Digital triggering

A separate digital trigger input line is provided (TTL TRG), allowing TTL-level triggering with latencies guaranteed to be less than 1 µs. You can program both of the logic levels (1 or 0) and the rising or falling edge for the discrete digital trigger input.

Software-based triggering

The three software-based trigger modes differ from hardware analog triggering and digital triggering because the readings—analog, digital, or counter—are checked by the PC in order to detect the trigger event.

Analog triggering

You can select any analog channel in the scan as the trigger channel. You can program the trigger level, the rising or falling edge, and hysteresis.

Pattern triggering

You can select any scanned digital input channel pattern to trigger an acquisition, including the ability to mask or ignore specific bits.

Counter triggering

You can program triggering to occur when one of the counters meets or exceeds a set value, or is within a range of values. You can program any of the included counter channels as the trigger source.

Software-based triggering usually results in a long period of inactivity between the trigger condition being detected and the data being acquired. However, the PCI-2513 avoids this situation by using pre-trigger data.

When software-based-triggering is used, and the PC detects the trigger condition—which may be thousands of readings after the actual occurrence of the signal—the PCI-2513 driver automatically looks back to the location in memory where the actual trigger-causing measurement occurred, and presents the acquired data that begins at the point where the trigger-causing measurement occurs. The maximum inactive period in this mode equals one scan period.

16


Set pre-trigger > 0 when using counter as trigger source

When using a counter for a trigger source, you should use a pre-trigger with a value of at least 1. Since all counters start at zero with the first scan, there is no valid reference in regard to rising or falling edge. Setting a pre-trigger to 1 or more ensures that a valid reference value is present, and that the first trigger will be legitimate.

Stop trigger modes

You can use any of the software trigger modes explained previously to stop an acquisition.

For example, you can program an acquisition to begin on one event—such as a voltage level—and then stop on another event—such as a digital pattern.

Pre-triggering and post-triggering modes

The PCI-2513 supports four modes of pre-triggering and post-triggering, providing a wide-variety of options to accommodate any measurement requirement.

When using pre-trigger, you must use software-based triggering to initiate an acquisition.

No pre-trigger, post-trigger stop event

In this simple mode, data acquisition starts when the trigger is received, and the acquisition stops when the stoptrigger event is received.

Fixed pre-trigger with post-trigger stop event

In this mode, you set the number of pre-trigger readings to acquire. The acquisition continues until a stoptrigger event occurs.

No pre-trigger, infinite post-trigger

In this mode, no pre-trigger data is acquired. Instead, data is acquired beginning with the trigger event, and is terminated when you issue a command to halt the acquisition.

Fixed pre-trigger with infinite post-trigger

You set the amount of pre-trigger data to acquire. Then, the system continues to acquire data until the program issues a command to halt acquisition.

Counter inputs

Four 32-bit counters are built into the PCI-2513. Each counter accepts frequency inputs up to 20 MHz.

PCI-2513 counter channels can be configured as standard counters or as multi-axis quadrature encoders.

The counters can concurrently monitor time periods, frequencies, pulses, and other event driven incremental occurrences directly from pulse-generators, limit switches, proximity switches, and magnetic pick-ups.

Counter inputs can be read asynchronously under program control, or synchronously as part of an analog or digital scan group.

17


When reading synchronously, all counters are set to zero at the start of an acquisition. When reading asynchronously, counters may be cleared on each read, count up continually, or count until the 16 bit or 32 bit limit has been reached. See counter mode descriptions below.

Figure 5. Typical PCI-2513 counter channel

Mapped channels

A mapped channel is one of four counter input signals that can get multiplexed into a counter module. The mapped channel can participate with the counter's input signal by gating the counter, latching the counter, and so on. The four possible choices for the mapped channel are the four counter input signals (post-debounce).

A mapped channel can be used to:

 gate the counter

 decrement the counter

 latch to current count to the count register

Usually, all counter outputs are latched at the beginning of each scan within the acquisition. However, you can use a second channel—known as the mapped channel—to latch the counter output.

Counter modes

A counter can be asynchronously read with or without clear on read. The asynchronous read-signals strobe when the lower 16-bits of the counter are read by software. The software can read the counter's high 16-bits some time later after reading the lower 16-bits. The full 32-bit result reflects the timing of the first asynchronous read strobe.

Totalize mode

The Totalize mode allows basic use of a 32-bit counter. While in this mode, the channel's input can only increment the counter upward. When used as a 16-bit counter (counter low), one channel can be scanned at the

12 MHz rate. When used as a 32-bit counter (counter high), two sample times are used to return the full 32-bit result. Therefore a 32-bit counter can only be sampled at a 6 MHz maximum rate. If you only want the upper 16 bits of a 32-bit counter, then you can acquire that upper word at the 12 MHz rate.

The counter counts up and does not clear on every new sample. However, it does clear at the start of a new scan command.

The counter rolls over on the 16-bit (counter low) boundary, or on the 32-bit (counter high) boundary.

Clear on read mode

The counter counts up and is cleared after each read. By default, the counter counts up and only clears the counter at the start of a new scan command. The final value of the counter —the value just before it was cleared—is latched and returned to the PCI-2513.

18


Stop at the top mode

The counter stops at the top of its count. The top of the count is FFFF hex (65,535) for the 16-bit mode, and

FFFFFFFF hex (4,294,967,295) for the 32-bit mode.

32-bit or 16-bit

Sets the counter type to either 16-bits or 32-bits . The type of counter only matters if the counter is using the stop at the top mode—otherwise, this option is ignored.

Latch on map

Sets the signal on the mapped counter input to latch the count.

By default, the start of scan signal—a signal internal to the PCI-2513 pulses once every scan period to indicate the start of a scan group—latches the count, so the count is updated each time a scan is started.

Gating "on" mode

Sets the gating option to "on" for the mapped channel, enabling the mapped channel to gate the counter.

Any counter can be gated by the mapped channel. When the mapped channel is high, the counter is enabled.

When the mapped channel is low, the counter is disabled (but holds the count value). The mapped channel can be any counter input channel other than the counter being gated.

Decrement "on" mode

Sets the counter decrement option to "on" for the mapped channel. The input channel for the counter increments the counter, and you can use the mapped channel to decrement the counter.

Debounce modes

Each channel's output can be debounced with 16 programmable debounce times from 500 ns to 25.5 ms. The debounce circuitry eliminates switch-induced transients typically associated with electro-mechanical devices including relays, proximity switches, and encoders.

There are two debounce modes, as well as a debounce bypass, as shown in Figure 6. In addition, the signal from

the buffer can be inverted before it enters the debounce circuitry. The inverter is used to make the input risingedge or falling-edge sensitive.

Edge selection is available with or without debounce. In this case the debounce time setting is ignored and the input signal goes straight from the inverter or inverter bypass to the counter module.

There are 16 different debounce times. In either debounce mode, the debounce time selected determines how fast the signal can change and still be recognized.

The two debounce modes are trigger after stable and trigger before stable. A discussion of the two modes follows.

19


Figure 6. Debounce model block diagram

Trigger after stable mode

In the trigger after stable mode, the output of the debounce module does not change state until a period of stability has been achieved. This means that the input has an edge, and then must be stable for a period of time equal to the debounce time.

Figure 7. Debounce module

– trigger after stable mode

The following time periods (T1 through T5) pertain to Figure 7 . In trigger after stable mode, the input signal to

the debounce module is required to have a period of stability after an incoming edge, in order for that edge to be accepted (passed through to the counter module.) The debounce time for this example is equal to T2 and T5.

 T1 – In the example above, the input signal goes high at the beginning of time period T1, but never stays high for a period of time equal to the debounce time setting (equal to T2 for this example.)

 T2 – At the end of time period T2, the input signal has transitioned high and stayed there for the required amount of time—therefore the output transitions high. If the input signal does not stabilize in the high state long enough, no transition would have appeared on the output and the entire disturbance on the input would have been rejected.

 T3 – During time period T3, the input signal remained steady. No change in output is seen.

 T4 – During time period T4, the input signal has more disturbances and does not stabilize in any state long enough. No change in the output is seen.

 T5 – At the end of time period T5, the input signal has transitioned low and stayed there for the required amount of time—therefore the output goes low.

Trigger before stable mode

In the trigger before stable mode, the output of the debounce module immediately changes state, but will not change state again until a period of stability has passed. For this reason the mode can be used to detect glitches.

Figure 8. Debounce module

– Trigger before stable mode

20


The following time periods (T1 through T6) pertain to the above drawing.

 T1 – In the illustrated example, the input signal is low for the debounce time (equal to T1); therefore when the input edge arrives at the end of time period T1, it is accepted and the output (of the debounce module) goes high. Note that a period of stability must precede the edge in order for the edge to be accepted.

 T2 – During time period T2, the input signal is not stable for a length of time equal to T1 (the debounce time setting for this example.) Therefore, the output stays "high" and does not change state during time period T2.

 T3 – During time period T3, the input signal is stable for a time period equal to T1, meeting the debounce requirement. The output is held at the high state. This is the same state as the input.

 T4 – At anytime during time period T4, the input can change state. When this happens, the output will also change state. At the end of time period T4, the input changes state, going low, and the output follows this action [by going low].

 T5 – During time period T5, the input signal again has disturbances that cause the input to not meet the debounce time requirement. The output does not change state.

 T6 – After time period T6, the input signal has been stable for the debounce time and therefore any edge on the input after time period T6 is immediately reflected in the output of the debounce module.

Debounce mode comparisons

Figure 9 shows how the two modes interpret the same input signal, which exhibits glitches. Notice that the

trigger before stable mode recognizes more glitches than the trigger after stable mode. Use the bypass option to achieve maximum glitch recognition.

Figure 9. Example of two debounce modes interpreting the same signal

Debounce times should be set according to the amount of instability expected in the input signal. Setting a debounce time that is too short may result in unwanted glitches clocking the counter. Setting a debounce time too long may result in an input signal being rejected entirely. Some experimentation may be required to find the appropriate debounce time for a particular application.

To see the effects of different debounce time settings, simply view the analog waveform along with the counter output. This can be done by connecting the source to an analog input.

Use trigger before stable mode when the input signal has groups of glitches and each group is to be counted as one. The trigger before stable mode recognizes and counts the first glitch within a group but rejects the subsequent glitches within the group if the debounce time is set accordingly. The debounce time should be set to encompass one entire group of glitches as shown in the following diagram.

21


Figure 10.Optimal debounce time for trigger before stable mode

Trigger after stable mode behaves more like a traditional debounce function: rejecting glitches and only passing state transitions after a required period of stability. Trigger after stable mode is used with electro-mechanical devices like encoders and mechanical switches to reject switch bounce and disturbances due to a vibrating encoder that is not otherwise moving. The debounce time should be set short enough to accept the desired input

pulse but longer than the period of the undesired disturbance as shown in Figure 11.

Figure 11. Optimal debounce time for trigger after stable mode

Encoder mode

Rotary shaft encoders are frequently used with CNC equipment, metal-working machines, packaging equipment, elevators, valve control systems, and in a multitude of other applications in which rotary shafts are involved.

The encoder mode allows the PCI-2513 to make use of data from optical incremental quadrature encoders. In encoder mode, the PCI-2513 accepts single-ended inputs. When reading phase A, phase B, and index Z signals, the PCI-2513 provides positioning, direction, and velocity data.

The PCI-2513 can receive input from up to two encoders.

The PCI-2513 supports quadrature encoders with a 16-bit (counter low) or a 32-bit (counter high) counter,

20 MHz frequency, and X1, X2, and X4 count modes. With only phase A and phase B signals, two channels are supported; with phase A, phase B, and index Z signals, 1 channel is supported. Each input can be debounced from 500 ns to 25.5 ms (total of 16 selections) to eliminate extraneous noise or switch induced transients.

Encoder input signals must be within -5 V to +10 V and the switching threshold is TTL (1.3V).

22


Quadrature encoders generally have three outputs: A, B, and Z. The A and B signals are pulse trains driven by an optical sensor inside the encoder. As the encoder shaft rotates, a laminated optical shield rotates inside the encoder. The shield has three concentric circular patterns of alternating opaque and transparent windows through which an LED shines. There is one LED and one phototransistor for each of the concentric circular patterns. One phototransistor produces the A signal, another phototransistor produces the B signal and the last phototransistor produces the Z signal. The concentric pattern for A has 512 window pairs (or 1024, 4096, etc.)

When using a counter for a trigger source, use a pre-trigger with a value of at least 1. Since all counters start at zero with the initial scan, there is no valid reference in regard to rising or falling edge. Setting a pre-trigger to

1 or more ensures that a valid reference value is present, and that the first trigger is legitimate.

The concentric pattern for B has the same number of window pairs as A—except that the entire pattern is rotated by 1/4 of a window-pair. Thus the B signal is always 90° out of phase from the A signal. The A and B signals pulse 512 times (or 1024, 4096, etc.) per complete rotation of the encoder.

The concentric pattern for the Z signal has only one transparent window and therefore pulses only once per complete rotation. Representative signals are shown in the following figure.

A

B

Z

Figure 12. Representation of quadrature encoder outputs: A, B, and Z

As the encoder rotates, the A (or B) signal indicates the distance the encoder has traveled. The frequency of A

(or B) indicates the velocity of rotation of the encoder. If the Z signal is used to zero a counter (that is clocked by A) then that counter gives the number of pulses the encoder has rotated from its reference. The Z signal is a reference marker for the encoder. It should be noted that when the encoder is rotating clockwise (as viewed from the back), A leads B and when the encoder is rotating counterclockwise, A lags behind B. If the counter direction control logic is such that the counter counts upward when A leads B and counts downward when

A lags B, then the counter gives direction control as well as distance from the reference.

23


Maximizing encoder accuracy

If there are 512 pulses on A, the encoder position is accurate to within 360°/512.

For a position accuracy of 360°/1024, count both rising edges on A and falling edges on A.

You get maximum accuracy when counting rising and falling edges on A and on B (since B also has 512 pulses.) This gives a position accuracy of 360°/2048.

These different modes are known as X1, X2, and X4.

Connecting the PCI-2513 to an encoder

You can use up to two encoders with each PCI-2513 in your acquisition system. Each A and B signal can be made as a single-ended connection with respect to common ground.

Differential applications are not supported.

For single-ended applications:

 Connect signals A, B, and Z to the counter inputs on the PCI-2513.

 Connect each encoder ground to GND.

You can also connect external pull-up resistors to the PCI-2513 counter input terminal blocks by placing a pullup resistor between any input channel and the encoder power supply. Choose a pull-up resistor value based on the encoder's output drive capability and the input impedance of the PCI-2513. Lower values of pull-up resistors cause less distortion, but also cause the encoder's output driver to pull down with more current.

Connecting external pull-up resistors to the PCI-2513

For open-collector outputs, you can connect external pull-up resistors to the PCI-2513's counter input terminal blocks. You can place a pull-up resistor between any input channel and the provided +5 V power supply.

Choose a pull-up resistor value based on the encoder's output drive capability and the input impedance of the

PCI-2513. Lower values of pull-up resistors cause less distortion but also cause the encoder's output driver to pull down with more current.

Wiring to one encoder

: Figure 13 shows the connections for one encoder to a 68-pin SCSI connector on a PCI-

2513. The "A" signal must be connected to an even-numbered channel and the associated "B" signal must be connected to the next [higher] odd-numbered channel. For example, if "A" were connected to CTR0, "B" would be connected to CTR1.

Figure 13. Encoder connections to pins on the SCSI connector*

* Connections can instead be made to the associated screw-terminals of a connected TB-100 terminal connector option.

24


The "A" signal must be connected to an even-numbered channel and the associated "B" signal must be connected to the next higher odd-numbered channel. For example, if "A" were connected to counter 0, then "B" would be connected to counter 1.

If the encoder stops rotating, but is vibrating (due to it being mounted to a machine), you can use the debounce feature to eliminate false edges. Choose an appropriate debounce time and apply it to each encoder channel.

Refer to the Debounce modes section in the Functional Details chapter in this manual for additional information regarding debounce times.

You can get the relative position and velocity from the encoder. However, during an acquisition, you cannot get data that is relative to the Z-position until the encoder locates the Z-reference.

Note that the number of Z-reference crossings can be tabulated. If the encoder was turning in only one direction, then the Z-reference crossings equal the number of complete revolutions. This means that the data streaming to the PC is relative position, period = 1/velocity, and revolutions.

A typical acquisition might take six readings off of the PCI-2513 as illustrated below. The user determines the scan rate and the number of scans to take.

Figure 14. PCI-2513 acquisition of six readings per scan

Note : Digital channels do not take up analog channel scan time.

In general, the output of each channel’s counter is latched at the beginning of each scan period (called the start-

of-scan.) Every time the PCI-2513 receives a start-of-scan signal, the counter values are latched and are available to the PCI-2513.

The PCI-2513 clears all counter channels at the beginning of the acquisition. This means that the values returned during scan period 1 are always zero. The values returned during scan period 2 reflect what happened during scan period 1.

The scan period defines the timing resolution for the PCI-2513. If you need a higher timing resolution, shorten the scan period.

Wiring for two encoders: Figure 15 shows the single-ended connections for two encoders. Differential connections do not apply.

25


+5 VDC, pin 19

Ground (to Digital Common)

Pin 35, 36, or 40

Counter 0 (CNT0), pin 5

–

To Encoder #1 “A”

Counter 1 (CNT1), pin 39 –

To Encoder #1 “B”

Functional Details


To Encoder #2 “A”


To Encoder #2 “B”

Encoder #1 Encoder #2

Figure 15. Two encoders connected to pins on the SCSI connector*

* Connections can instead be made to the associated screw-terminals of a connected TB-100 terminal connector option.

Each signal (A, B) can be connected as a single-ended connection with respect to the common digital ground

(GND). Both encoders can draw their power from the +5 V power output (pin 19) on the 68-pin SCSI connector.

Connect each encoder’s power input to +5 V power. Connect the return to digital common (GND) on the same connector. Make sure that the current output spec is not violated.

With the encoders connected in this manner, there is no relative positioning information available on encoder #1 or #2 since there is no Z signal connection for either. Therefore only distance traveled and velocity can be measured for each encoder.

Timer outputs

Two 16-bit timer outputs are built into the PCI-2513. Each timer is capable of generating a different square wave with a programmable frequency in the range of 16 Hz to 1 MHz.

Figure 16. Typical PCI-2513 timer channel

26


Example: Timer outputs

Timer outputs are programmable square waves. The period of the square wave can be as short as 1 us or as long as 65535 µs. The table below lists some examples.

Timer output frequency examples

Divisor

1

100

1000

10000

65535

Timer output frequency

1 MHz

10 kHz

1 kHz

100 Hz

15.259 Hz

The two timer outputs can generate different square waves. The timer outputs can be updated asynchronously at any time.

Using detection setpoints for output control

What are detection setpoints?

With the PCI-2513's setpoint configuration feature, you can configure up to 16 detection setpoints associated with channels in a scan group. Each setpoint can update the following, allowing for real-time control based on acquisition data:

 FIRSTPORTC digital output port with a data byte and mask byte

 timers

Setpoint configuration overview

You can program each detection setpoint as one of the following:

 Single point referenced – Above, below, or equal to the defined setpoint.

 Window (dual point) referenced – Inside or outside the window.

 Window (dual point) referenced, hysteresis mode – Outside the window high forces one output (designated

Output 2; outside the window low-forces another output, designated as Output 1).

A digital detect signal is used to indicate when a signal condition is True or False—for example, whether or not the signal has met the defined criteria. The detect signals can be part of the scan group and can be measured as any other input channel, thus allowing real time data analysis during an acquisition.

The detection module looks at the 16-bit data being returned on a channel and generates another signal for each channel with a setpoint applied (Detect1 for Channel 1, Detect2 for Channel 2, and so on). These signals serve as data markers for each channel's data. It does not matter whether that data is volts, counts, or timing.

27


A channel's detect signal shows a rising edge and is True (1) when the channel's data meets the setpoint criteria.

The detect signal shows a falling edge and is False (0) when the channel's data does not meet the setpoint

criteria. The True and False states for each setpoint criteria are explained in the " Using the setpoint status register" section on page 30.

Criteria

– input signal is equal to X

Compare X to:

Limit A or Limit B

Window* (nonhysteresis mode)

Window*

(hysteresis mode)

Setpoint definition (choose one)

 Equal to A (X = A)

 Below A (X < A)

 Above B (X > B)

 Inside (B < X < A)

 Outside: B > X; or, X > A

 Above A (X > A)

 Below (B X < B) (Both conditions are checked

when in hysteresis mode

Action - driven by condition

Update conditions:

True only:

 If True, then output value 1

 If False, then perform no action

True and False :


 If False, then output value 2

True only


 If False, then perform no action

True and False


 If False, then output value 2

Hysteresis mode (forced update)

 If X > A is True, then output value 2 until X < B is True, then output value 1.

 If X < B is True, then output value 1 until X > A is True, then output value 2.

This is saying:

(a) If the input signal is outside the window high , then output value 2 until the signal goes outside the window low, and

(b) if the signal is outside the window low , then output value 1 until the signal goes outside the window high . There is no change to the detect signal while within the window.

The detect signal has the timing resolution of the scan period as seen in the diagram below. The detect signal can change no faster than the scan frequency (1/scan period.)

Figure 17. Example diagram of detection signals for channels 1, 2, and 3

Each channel in the scan group can have one detection setpoint. There can be no more than 16 total setpoints total applied to channels within a scan group.

28


Detection setpoints act on 16-bit data only. Since the PCI-2513 has 32-bit counters, data is returned 16-bits at a time. The lower word, the higher word, or both lower and higher words can be part of the scan group. Each counter input channel can have one detection setpoint for the counter's lower 16-bit value and one detection setpoint for the counter's higher 16-bit value.

Setpoint configuration

You program all setpoints as part of the pre-acquisition setup, similar to setting up an external trigger. Since each setpoint acts on 16-bit data, each has two 16-bit compare values: a high limit (limit A) and a low limit

(limit B). These limits define the setpoint window.

There are several possible conditions (criteria) and effectively three update modes, as explained in the following configuration summary.

Set high limit

You can set the 16-bit high limit (limit A) when configuring the PCI-2513 through software.

Set low limit

You can set the 16-bit low limit (limit B) when configuring the PCI-2513 through software.

Set criteria

 Inside window: Signal is below 16-bit high limit and above 16-bit low limit.

 Outside window: Signal is above 16-bit high limit, or below 16-bit low limit.

 Greater than value: Signal is above 16-bit low limit, so 16-bit high limit is not used.

 Less than value: Signal is below 16-bit high limit, so 16-bit low limit is not used.

 Equal to value: Signal is equal to 16-bit high limit, and limit B is not used.

The equal to mode is intended for use when the counter or digital input channels are the source channel.

You should only use the equal to16-bit high limit (limit A) mode with counter or digital input channels as the channel source. If you want similar functionality for analog channels, then use the inside window mode

 Hysteresis mode: Outside the window, high forces output 2 until an outside the window low condition exists, then output 1 is forced. Output 1 continues until an outside the window high condition exists. The cycle repeats as long as the acquisition is running in hysteresis mode.

Set output channel

 None

 Update FIRSTPORTC

 Update timerx

Update modes

 Update on True only

 Update on True and False

Set values for output

 FIRSTPORTC* value, or timer value when input meets criteria.

 FIRSTPORTC* value, or timer value when input does not meet criteria.

* By default, FIRSTPORTC comes up as a digital input. You may want to initialize FIRSTPORTC to a known state before running the input scan to detect the setpoints.

When using setpoints with triggers other than immediate, hardware analog, or TLL, the setpoint criteria evaluation begins immediately upon arming the acquisition.

29


Using the setpoint status register

You can use the setpoint status register to check the current state of the 16 possible setpoints. In the register,

Setpoint 0 is the least-significant bit and Setpoint 15 is the most-significant bit. Each setpoint is assigned a value of 0 or 1.

 A value of 0 indicates that the setpoint criteria is not met—in other words, the condition is False.

 A value of 1 indicates that the criteria has been met—in other words, the condition is True.

In the following example, the criteria for setpoints 0, 1, and 4 is satisfied (True), but the criteria for the other 13 setpoints has not been met.

Setpoint #

True ( 1 )

False (

0

)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1

<<< Most significant bit Least significant bit >>>

From the above table we have 10011 binary, or 19 decimal, derived as follows:

 Setpoint 0, having a True state, shows 1, giving us decimal 1.



For proper operation, the setpoint status register must be the last channel in the scan list.

Examples of control outputs

Detecting on analog input and FIRSTPORTC updates

Update mode: Update on True and False

Criteria: Channel 4: inside window

Channel 4 is programmed with reference to two setpoints (limit A and limit B) which define a window for that channel.

Channel Condition Action

4

State of detect signal

True Within window (between limit A and limit B) for channel 4

False

When Channel 4's analog input voltage is within the window, update FIRSTPORTC with 70h.

When the above stated condition is False (channel 4 analog input voltage is outside the window), update

FIRSTPORTC with 30h.

Figure 18. Analog inputs with setpoints update on True and False

30


You can program control outputs programmed on each setpoint, and use the detection for channel 4 to update the FIRSTPORTC digital output port with one value (70 h in the example) when the analog input voltage is within the shaded region and a different value when the analog input voltage is outside the shaded region (30 h in the example).

Detection on an analog input, timer output updates

Update Mode: Update on True and False

Criteria Used: Inside window

The figure below shows how a setpoint can be used to update a timer output. Channel 3 is an analog input channel. A setpoint is applied using update on True and False, with a criteria of inside-the-window, where the signal value is inside the window when simultaneously less than Limit A but greater than Limit B.

Whenever the channel 3 analog input voltage is inside the setpoint window (condition True), Timer0 is updated with one value; and whenever the channel 3 analog input voltage is outside the setpoint window (condition

False) timer0 will be updated with a second output value.

Figure 19. Timer output update on True and False

Using the hysteresis function

Update mode: N/A, the hysteresis option has a forced update built into the function

Criteria used: Window criteria for above and below the set limits

The figure below shows analog input Channel 3 with a setpoint which defines two 16-bit limits, Limit A (High) and Limit B (Low). These are being applied in the hysteresis mode and FIRSTPORTC is updated accordingly.

In this example, Channel 3's analog input voltage is being used to update FIRSTPORTC as follows:

 When outside the window, low (below limit B) FIRSTPORTC is updated with 30 h. This update remains in effect until the analog input voltage goes above Limit A.

 When outside the window, high (above limit A), FIRSTPORTC is updated with 30 h. This update remains in effect until the analog input signal falls below limit B. At that time we are again outside the limit "low" and the update process repeats itself.

Hysteresis mode can also be done with a timer output, instead of a FIRSTPORTC digital output port.

31


Figure 20. Channel 3 in hysteresis mode

Detecting setpoints on a totalizing counter

In the following figure, Channel 1 is a counter in totalize mode. Two setpoints define a point of change for

Detect 1 as the counter counts upward. The detect output is high when inside the window (greater than Limit B

(the low limit) but less than Limit A (the high limit).

In this case, the Channel 1 setpoint is defined for the 16 lower bits of channel 1's 32-bit value. The

FIRSTPORTC digital output port could be updated on a True condition (the rising edge of the detection signal).

Alternatively, timer outputs could be updated with a value.

At this point you can update FIRSTPORTC or DACs

Figure 21. Channel 1 in totalizing counter mode, inside the window setpoint

Detection setpoint details

Controlling digital and timer outputs

You can program each setpoint with an 8-bit digital output byte and corresponding 8-bit mask byte. When the setpoint criteria is met, the FIRSTPORTC digital output port can be updated with the given byte and mask. Any setpoint can also be programmed with a timer update value.

32


In hysteresis mode, each setpoint has two forced update values. Each update value can drive one timer or the

FIRSTPORTC digital output port. In hysteresis mode, the outputs do not change when the input values are

inside the window. There is one update value that gets applied when the input values are less than the window and a different update value that gets applied when the input values are greater than the window.

Update on True and False uses two update values. The update values can drive FIRSTPORTC or timer outputs.

FIRSTPORTC digital outputs can be updated immediately upon setpoint detection.

FIRSTPORTC or timer update latency

Setpoints allow timers or FIRSTPORTC digital outputs to update very quickly. Exactly how fast an output can update is determined by these factors:

 scan rate

 synchronous sampling mode

 type of output to be updated

For example, you set an acquisition to have a scan rate of 100 kHz, which means each scan period is 10 µs.

Within the scan period you sample six analog input channels. These are shown in the following figure as channels 1 through 6. The ADC conversion occurs at the beginning of each channel's 1 µs time block.

FIRSTPORTC

Figure 22. Example of FIRSTPORTC latency

By applying a setpoint on analog input channel 2, that setpoint gets evaluated every 10 µs with respect to the sampled data for channel 2.

Due to the pipelined architecture of the analog-to-digital converter system, the setpoint cannot be evaluated until 2 µs after the ADC conversion. In the example above, the FIRSTPORTC digital output port can be updated no sooner than 2 µs after channel 2 has been sampled, or 3 µs after the start of the scan. This 2 µs delay is due to the pipelined ADC architecture. The setpoint is evaluated 2 µs after the ADC conversion and then

FIRSTPORTC can be updated immediately.

The detection circuit works on data that is put into the acquisition stream at the scan rate. This data is acquired according to the pre-acquisition setup (scan group, scan period, etc.) and returned to the PC. Counters are latched into the acquisition stream at the beginning of every scan. The actual counters may be counting much faster than the scan rate, and therefore only every 10 th

, 100 th

, or n th

count shows up in the acquisition data.

As a result, you can set a small detection window on a totalizing counter channel and have the detection setpoint

"stepped over" since the scan period was too long. Even though the counter value stepped into and out of the detection window, the actual values going back to the PC may not. This is true no matter what mode the counter channel is in.

33


When setting a detection window, keep a scan period in mind. This applies to analog inputs and counter inputs.

Quickly changing analog input voltages can step over a setpoint window if not sampled often enough.

There are three possible solutions for overcoming this problem:

 Shorten the scan period to give more timing resolution on the counter values or analog values.

 Widen the setpoint window by increasing limit A, and/or lowering limit B.

 A combination of both solutions (1 and 2) could be made.

34

Chapter 4

Calibrating the PCI-2513

Every range of a PCI-2513 device is calibrated at the factory using a digital NIST traceable calibration method.

This method works by storing a correction factor for each range on the unit at the time of calibration. For analog inputs, the user can adjust the calibration of the board while it is installed in the acquisition system. This does not destroy the factory calibration supplied with the board. This is accomplished by having two distinct calibration tables in the PCI-2513 on-board EPROM—one which contains the factory calibration, and the other which is available for field calibration.

You can perform field calibration automatically in seconds with InstaCal and without the use of external hardware or instruments.

Field calibration derives its traceability through an on-board reference which has a stability of 0.005% per year.

Note that a two-year calibration period is recommended for PCI-2513 boards.

You should calibrate the PCI-2513 using InstaCal after the board has fully warmed up. The recommended warm-up time is 30 minutes. For best results, calibrate the board immediately before making critical measurements. The high resolution analog components on the board are somewhat sensitive to temperature.

Pre-measurement calibration ensures that your board is operating at optimum calibration values.

35

Chapter 5

Specifications

All specifications are subject to change without notice.

Typical for 25 °C unless otherwise specified.

Specifications in italic text are guaranteed by design.

Analog input

A/D converter type

Resolution

Number of channels

Input ranges (SW programmable)

Maximum sample rate

Nonlinearity (integral)

Nonlinearity (differential)

A/D pacing

Trigger sources and modes

Data transfer

Configuration memory

Maximum usable input voltage

+ common mode voltage (CMV + V in

)

Signal to noise and distortion

Total harmonic distortion

Calibration

CMRR @ 60 Hz

Bias current

Input impedance

Absolute maximum input voltage

Table 1. Analog input specifications

Successive approximation

16 bits

16 single-ended/8 differential, software-selectable

Bipolar: ±10 V, ±5 V, ±2 V, ±1 V , ±0.5 V, ±0.2 V, ±0.1 V

1 MHz

±2 LSB maximum

±1 LSB maximum

Onboard input scan clock, external source (XAPCR)

Refer to Table 7

DMA

Programmable I/O

Range: ±10 V, ±5 V

10.5 V maximum

Range: ±2 V, ±1 V, ±0.5 V, ±0.2 V, ±0.1 V

6.0 V maximum

72 dB typical for ±10 V range, 1 kHz fundamental

–80 dB typical for ±10 V range, 1 kHz fundamental

Auto-calibration, calibration factors for each range stored on the board in non-volatile RAM.

–70 dB typical DC to 1 kHz

40 pA typical (0 °C to 35°C)

10 MΩ single-ended, 20 MΩ differential

±30 V

Accuracy

Table 2. Analog input accuracy specifications

Voltage range Accuracy

±(% of reading + % range)

23 °C ±10 °C, 1 year

Temperature coefficient

±(ppm of reading + ppm range)/°C

Noise (cts

RMS)

–10 V to 10 V

–5 V to 5 V

–2 V to 2 V

–1 V to 1 V

–500 mV to 500 mV

–200 mV to 200 mV

–100 mV to 100 mV

Note 1:

Note 1

0.031% + 0.008%

0.031% + 0.009%

0.031% + 0.010%

0.031% + 0.02%

0.031% + 0.04%

0.036% + 0.075%

0.042% + 0.15%

14 + 8

14 + 9

14 +10

14 + 12

14 +18

14 +12

14 +18

Specifications assume differential input single-channel scan, 1 MHz scan rate, unfiltered,

CMV=0.0 V, 30 minute warm-up, exclusive of noise.

1.5

2.0

1.6

2.5

4.0

5.0

9.0

Note 2

36

PCI-2513 User's Guide Specifications

Note 2: Noise reflects 10,000 samples at 1 MHz, typical, differential short, using CA-68-3S cable.

Digital input / output

Table 3. Digital input/output specifications

Number of I/O

Ports

Input scanning mode

Configuration

Input protection

Input high

Input low

Output high

Output low

24

Three banks of eight.

Each port is programmable as input or output

Asynchronous, under program control at any time relative to input scanning

10 kΩ pull-up to +5 V, 20 pf to analog common

±15 kV ESD clamp diodes

+2.0 V to +5.0 V

0 to 0.8 V

>2.0 V

<0.8 V

Output current

Digital input pacing

Digital output pacing

Output 12 mA per pin, 200 mA total continuous

Onboard clock, external input scan clock (XAPCR)

Four programmable sources:

 Onboard output scan clock, independent of input scan clock

 Onboard input scan clock

 External output scan clock (XDPCR), independent of external input scan clock (XAPCR)

 External input scan clock (XAPCR)

Digital input trigger sources and modes

Refer to Table 7

Digital output trigger sources Start of input scan

Data transfer

Sampling/update rate

Pattern generation output

DMA

12 MHz maximum

Two of the 8-bit ports can be configured for 16-bit pattern generation. The pattern can also be updated synchronously with an acquisition at up to 12 MHz.

Counters

Counter inputs can be scanned based on an internal programmable timer or an external clock source.

Channels

Resolution

Input frequency

Input signal range

Input characteristics

Trigger level

Minimum pulse width

De bounce times

Time-base accuracy

Counter read pacer

Trigger sources and modes

Programmable mode

Counter mode options

Table 4. Counter specifications

Four independent

32 bits

20 MHz maximum

–5 V to 10 V

10 k pull-up, ±15 kV ESD protection

TTL

25 ns high, 25 ns low

16 selections from 500 ns to 25.5 ms, positive or negative edge sensitive, glitch detect mode or debounce mode

30 ppm (0 °C to 50 °C)

Onboard input scan clock, external input scan clock (XAPCR)

Refer to Table 7

Counter

Totalize, clear on read, rollover, stop at all Fs, 16- or 32-bit, any other channel can gate the counter

37


Input sequencer

Analog, digital, and counter inputs can be scanned based on either an internal programmable timer or an external clock source.

Table 5. Input sequencer specifications

Scan clock sources: two ( Note 3 )

Programmable parameters per scan

Internal:

 Analog channels from 1 µs to 1 sec in 20.83 ns steps

 Digital channels and counters from 83.33 ns to 1 sec in 20.83 ns steps

External. TTL-level input (XAPCR):

 Analog channels down to 1 µs minimum

 Digital channels and counters down to 83 ns minimum

 Programmable channels (random order)

 Programmable gain

Depth 512 locations

Onboard channel-to-channel scan rate

 Analog: 1 MHz maximum

External input scan clock (XAPCR) maximum rate

 Digital: 12 MHz if no analog channels are enabled, 1 MHz with analog channels enabled

 Analog: 1MHz

 Digital: 12 MHz if no analog channels are enabled, 1 MHz with analog channels enabled

Clock signal range

 Logical zero: 0 V to 0.8 V

 Logical one: 2.4 V to 5.0 V

Minimum pulse width 50 ns high, 50 ns low

Note 3: The maximum scan clock rate is the inverse of the minimum scan period. The minimum scan period is equal to 1 µs times the number of analog channels. If a scan contains only digital channels then the minimum scan period is 83 ns times the number of digital channels.

Frequency/pulse generators

Channels

Output waveform

Output rate

High-level output voltage

Low-level output voltage

Table 6. Frequency/pulse generator specifications

2 x 16-bit

Square wave

1 MHz base rate divided by 1 to 65535 (programmable)

2.0 V minimum @ –1.0 mA, 2.9 V minimum @ –400 µA

0.4 V maximum @ 400 µA

38


Trigger sources and modes

Input scan trigger sources

Input scan triggering modes

Table 7. Trigger sources and modes

 Single channel analog hardware trigger

 Single channel analog software trigger

 External-single channel digital trigger (TTL TRG input)

 Digital pattern trigger

 Counter/totalizer trigger

Single channel analog hardware trigger: The first analog input channel in the scan is the analog trigger channel.

 Input signal range: –10 V to +10 V maximum

 Trigger level: Programmable (12-bit resolution)

 Latency: 350 ns typical

 Accuracy: ±0.5% of reading, ±2 mV offset maximum

 Noise: 2 mV RMS typical

Single channel analog software trigger: The first analog input channel in the scan is the analog trigger channel.

 Input signal range: Anywhere within range of the trigger channel

 Trigger level: Programmable (16-bit resolution)

 Latency: One scan period (maximum)

External-single channel digital trigger (TTL trigger input):

 Input signal range: –15 V to +15 V maximum

 Trigger level: TTL-level sensitive

 Minimum pulse width: 50 ns high, 50 ns low

 Latency: One scan period maximum

 Digital pattern triggering: 8-bit or 16-bit pattern triggering on any of the digital ports. Programmable for trigger on equal, not equal, above, or below a value.

Individual bits can be masked for "don’t care" condition.

 Latency: One scan period, max

 Counter/totalizer triggering: Counter/totalizer inputs can trigger an acquisition.

User can select to trigger on a frequency or on total counts that are equal, not equal, above, or below a value, or within/outside of a window rising/falling edge.

 Latency: One scan period, maximum

Power consumption

Power consumption (per board)

Table 8. Power consumption specifications

3 W

PCI compatibility

Table 9. PCI compatibility specifications

PCI r2.2 compliant, universal 3.3 V/5 V signaling support, compatible with PCI-X PCI bus

Environmental

Operating temperature range

Storage temperature range

Relative humidity

Table 10. Environmental specifications

0 °C to +60 °C

–40 °C to +80 °C

0 to 95% non-condensing

39


Mechanical

Vibration

Dimensions

Weight

Table 11. Mechanical specifications

MIL STD 810E cat 1 and 10

165 mm (W) x 15 mm (D) x 108 mm (H) (6.5‖ x 0.6‖ x 4.2‖)

160 g (0.35 lbs)

Main connector and pinout

Table 12. Main connector specifications

Connector type

Compatible cables (for the 68-pin

SCSI connector)

Compatible accessory products

68-pin standard "SCSI TYPE III" female connector

HDMI connector (targeted for future expansion)

CA-68-3R — 68-pin ribbon cable; 3 feet.



TB-100 termination board with screw terminals

RM-TB-100, 19-inch rack mount kit for TB-100

Table 13. 16-channel single-ended pinout

Pin Function

68 ACH0

67 AGND

66 ACH9

65 ACH2

64 AGND

63 ACH11

62 SGND (low level sense

– not for general use)

61 ACH12

60 ACH5

59 AGND

58 ACH14

57 ACH7

56 NC

55 NC

54 NEGREF (reserved for self-calibration)

53 GND

52 A1

51 A3

50 A5

49 A7

48 B1

47 B3

46 B5

45 B7

44 C1

43 C3

42 C5

41 C7

40 GND

39 CNT1

38 CNT3

37 TMR1

36 GND

35 GND

Pin Function

6

5

4

3

10

9

8

7

2

1

18

17

16

15

14

13

12

11

26

25

24

23

22

21

20

19

34

33

32

31

30

29

28

27

ACH8

ACH1

AGND

ACH10

ACH3

AGND

ACH4

AGND

ACH13

ACH6

AGND

ACH15

NC

NC

POSREF (reserved for self-calibration)

+5 V (refer to Note 4 )

A0

A2

A4

A6

B0

B2

B4

B6

C0

C2

C4

C6

TTL TRG

CNT0

CNT2

TMR0

XAPCR (input scan clock)

XDPCR (output scan clock)

Specifications

40


Pin Function

68 ACH0 HI

67 AGND

66 ACH1 LO

65 ACH2 HI

64 AGND

63 ACH3 LO

62 SGND (low level sense – not for general use)

61 ACH4 LO

60 ACH5 HI

59 AGND

58 ACH6 LO

57 ACH7 HI

56 NC

55 NC

54 NEGREF (reserved for self-calibration)

53 GND

52 A1

51 A3

50 A5

49 A7

48 B1

47 B3

46 B5

45 B7

44 C1

43 C3

42 C5

41 C7

40 GND

39 CNT1

38 CNT3

37 TMR1

36 GND

35 GND

Note 4: 5 V output, up to 500 mA.

Table 14. 8-channel differential pinout

Pin Function

26

25

24

23

22

21

20

19

18

17

34

33

32

31

30

29

28

27

16

15

6

5

4

3

2

1

14

13

12

11

10

9

8

7

ACH0 LO

ACH1 HI

AGND

ACH2 LO

ACH3 HI

AGND

ACH4 HI

AGND

ACH5 LO

ACH6 HI

AGND

ACH7 LO

NC

NC

POSREF (reserved for self-calibration)

+5 V (refer to Note 4 )

A0

A2

A4

A6

B0

B2

B4

B6

C0

C2

C4

C6

TTL TRG

CNT0

CNT2

TMR0

XAPCR (input scan clock)

XDPCR (output scan clock)

Specifications

41

Declaration of Conformity

Manufacturer:

Address:

Category:

Measurement Computing Corporation

10 Commerce Way

Suite 1008

Norton, MA 02766

USA

Information technology equipment.

Measurement Computing Corporation declares under sole responsibility that the product

PCI-2513

to which this declaration relates is in conformity with the relevant provisions of the following standards or other documents:

EC EMC Directive 2004/108/EC: Electromagnetic Compatibility, EN 61326-1:2006, (IEC 61326-1:2005)

Emissions: Group 1, Class A

 EN 55022 (1990)/CISPR 22: Radiated and Conducted emissions.

Immunity: EN61326-1:2006, (IEC 61326-1:2005)

 IEC 61000-4-2 (2001): Electrostatic Discharge immunity.

 IEC 61000-4-3 (2002): Radiated Electromagnetic Field immunity.

 IEC 61000-4-4 (2004): Electric Fast Transient Burst immunity.

 IEC 61000-4-5 (2001): Surge immunity.

 IEC 61000-4-6 (2003): Radio Frequency Common Mode immunity.

To maintain the safety, emission, and immunity standards of this declaration, the following conditions must be met.

 Part CA-68-3S or CA-68-6S must be properly installed.

 The host computer, peripheral equipment, power sources, and expansion hardware must be CE compliant.

 All I/O cables must be shielded, with the shields connected to CHASSIS ground stud.

 I/O cables must be less than 3 meters (9.75 feet) in length.

 The host computer must be properly grounded.

 Equipment must be operated in a controlled electromagnetic environment as defined by Standards EN

61326-1:2006, or IEC 61326-1:2005.

Note: Data acquisition equipment may exhibit noise or increased offsets when exposed to high RF fields

(>1V/m) or transients.

Declaration of Conformity based on tests conducted by Smith Electronics, Inc., Cleveland, OH 44141, USA in

December, 2005. Test records are outlined in Smith Electronics Test Report ―Daqboard 3000 with PDQ30

Expansion Module‖. Further testing was conducted by Chomerics Test Services, Woburn, MA. 01801, USA in

January, 2009. Test records are outlined in Chomerics Test report #EMI5250.09.

We hereby declare that the equipment specified conforms to the above Directives and Standards.

Carl Haapaoja, Director of Quality Assurance

Measurement Computing Corporation

10 Commerce Way

Suite 1008

Norton, Massachusetts 02766

(508) 946-5100

Fax: (508) 946-9500

E-mail: [email protected] www.mccdaq.com

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