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VadaTech AMC72X
User’s Manual
April 11, 2014
Version 2.1.0
THE POWER OF VISION
VadaTech AMC72X User’s Manual
Copyright
© 2014 VadaTech Incorporated
All rights reserved
VadaTech and the globe image are trademarks of VadaTech Incorporated.
All other product or service names mentioned in this document are the property of their respective owners.
Notice
While reasonable efforts have been made to assure the accuracy of this document,
VadaTech, Inc. assumes no liability resulting from any omissions in this document or from the use of the information obtained herein. VadaTech reserves the right to revise this document and to make changes periodically and the content hereof without obligation of
VadaTech to notify any person of such revision or changes.
Electronic versions of this material may be read online, downloaded for personal use, or referenced in another document as a URL to the VadaTech Incorporated Web site. The text itself may not be published commercially in print or electronic form, edited, translated, or otherwise altered without the permission of VadaTech, Inc.
It is possible that this publication may contain reference to or information about VadaTech products (machines and programs), programming, or services that are not available in your country. Such references or information must not be construed to mean that VadaTech intends to announce such products, programming, or services in your country.
Trademarks
The VadaTech, Inc name and logo are registered trademarks of VadaTech Incorporated in the U.S.A. All other product or service names mentioned in this document are the property of their respective owners.
© 2014, VadaTech Incorporated. Printed in the U.S.A., All Rights Reserved.
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Revision History
Doc
Rev
1.0.0
1.2.0
1.3.0
1.4.0
1.5.0
1.6.0
1.7.0
1.8.0
1.9.0
2.0.0
2.1.0
Description of Change
Document Created
Updated Serial over lan
Added network device mapping section
Updated Default Switch Settings
Updated Network boot (PXE) configuration instructions
Added instructions for AMI AFU BIOS upgrade
Updated Linux software section
Changed SW3-4 default to Off ( On-Board Clock )
Added Graceful shutdown section
Updated with AMC725 related information
Added VNC server support
Revision Date
3/26/2013
4/20/2013
5/20/2013
6/14/2013
6/19/2013
6/26/2013
8/22/2013
2/01/2014
4/11/2014
04/30/2014
08/09/2014
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Table of Contents
XAUI Ports (only applicable to AMC721 and AMC723) ............................................... 18
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Figures
Figure 9: Temperature Sensor Location (Bottom Side of AMC72X Board) (X=0, 1, 2, and 3)
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Tables
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1 Overview
The AMC72X are Processor AMC (PrAMC) modules in a single or double-width (based on model), mid or full-height AdvancedMC (AMC) form factor based on the Intel® next generation Core i Processor (Gladden) with Cave Creek PCH
This document describes the VadaTech AMC72X boards and their use as a development platform.
This boards feature:
Intel Gladden processor options for 1, 2 or 4 cores
Core speed options ranging from 1 GHz to 2GHz
Options for 4GB, 8GB, or 16GB of DDR3 ECC memory (dual slot/single controller)
PCIe, SRIO or XAUI to the backplane fabric 4-7 and 8-11
Four 1GbE ports o Two dedicated as 1000Base-X AMC Port 0 and Port 1 o Two dedicated as ETH0 and ETH1 front 10/100/1000Base-T ports
SD card slot on-board for file system storage (USB2244)
8MB of boot flash memory standard (AT25DF321A)
Dual SATA Ports to AMC Port 2 and Port 3
Dual USB on the front panel
Real-time Clock with battery backup
RS-232 serial console on the front panel
On-board AMC MMC IPMI management controller
Serial Over LAN (SOL) – Gladden console via the MMC IPMI Ethernet on one of four 1GbE Ports (software configurable from CLI)
Hardware random number generator for enhanced SOL cryptographic security
1.1 Applicable Products
VadaTech AMC720
VadaTech AMC721
VadaTech AMC722
VadaTech AMC723
VadaTech AMC725
1.2 Document References
PICMG AMC.0 (base) standard
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1.3
PICMG AMC.1 (PCIe) standard
PICMG AMC.2 (Ethernet) standard
PICMG AMC.4 (SRIO) standard
VadaTech AMC72X Datasheet
Acronyms Used in this Document
Acronym
AMC
ATCA
BSP
CPU
DDR
DIP
ECC
GB
GbE
GHz
GND
IPMI
LED
MAC
MHz
MMC
PCIe
PrAMC
SHLD
USB
uTCA
XAUI
Description
Advanced Mezzanine Card
Advanced Telephony Computing Architecture
Board Support Package
Central Processing Unit
Double Data Rate
Dual In-line Package
Error Correction Coding
Gigabyte
Gigabit Ethernet
Gigahertz
Ground
Intelligent Platform Management Interface
Light Emitting Diode
Media Access Controller
Megahertz
Module Management Controller
Peripheral Component Interconnect Express
Processor AMC
Shield
Universal Serial Bus
Micro Telephony Computing Architecture
10 Gigabit Media Independent Interface
Table 1: Acronyms
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2 Hardware Overview
2.1 Block Diagram
1000Base-X
(AMC Port 0)
1000Base-X
(AMC Port 1)
SATA 0
(AMC Port 2)
SATA 1
(AMC Port 3)
CaveCreek
Configuration
EEPROM
SPI
GbE PHY
(ETH0)
GbE PHY
(ETH1)
MDIO
SGMII SGMII MDIO
DDR3
Cave Creek PCH
USB
10/100/1000Base-T
10/100/1000Base-T
Two Ranks of DDR3 up to
16Gb
Gbe0-3 Link/Act LEDs
SD Card
Socket
SD Card
Controller
UART0
UART1
Dual Usb
LED
SOL Mux 1 UART
DMI x4
PCIE x8
Gladden Processor
1/2/4 Cores
I2C
UART
(SOL)
ETH0 RJ45
ETH1 RJ45
RJ45 LEDs 4x
SD LED
CPU RS-232
USB Port
USB Port
PCIE x8
AMC Lanes 4-7
(PCIe, XAUI or
SRIO x4 options)
AMC Lanes 8-11
(PCIe, XAUI or
SRIO x4 options)
Fabric Controller
(Present for XAUI/SRIO
Options)
SPI
CPLD
SOL Mux 2
UART
(SOL)
BIOS EEPROM
LEDs
I2C
Geographic
Address
Enable
IPMI MMC
(with Power /
Sensors)
UART
I/O
Figure 1: AMC72X (applicable to X=0, 1, 2, and 3) Block Diagram
Fabric LEDs (Optional)
Random
Number
Generator
IPMI RS-232
IPMI Status LEDs
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2.2 Board Layout
Figure 2: AMC72X Top Layout (front to the left) (X=0, 1, 2, and 3)
RTC Battery
SW2
SW5
J4
SW6
SW3
SW4
SD Card Socket
Figure 3: AMC72X Bottom Layout (front to the left) (X=0, 1, 2, and 3)
DIP Switches SW2, SW3, and SW4 are common to all AMC72X boards, switches 5 and 6 are applicable only for AMC722.
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2.3
VadaTech AMC72X User’s Manual
SWITCHES
SW2
SW3
SW4
SW5
SW6
DESCRIPTION
IPMI Related Functions
Misc Configuration Switches
Misc Configuration Switches
SRIO Ports 4-7 Options
SRIO Ports 8-11 Options
Table 2: AMC72X Switch configurations
Front Panel Layouts
Figure 4: AMC720 Front Panel
Figure 5: AMC721 Front Panel
Figure 6: AMC722 Front Panel
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Figure 7: AMC723 Front Panel
Figure 8: AMC725 Front Panel
2.4 Temperature Sensors
There are four temperature sensors on AMC72X boards. Figure 9 shows the location of
temperature sensor on a typical AMC72X board.
Figure 9: Temperature Sensor Location (Bottom Side of AMC72X Board) (X=0, 1, 2, and 3)
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3 IPMI Management Interface
The AMC72X has an IPMI Module Management Controller (MMC) which manages the LEDs, module hot-swap handle, e-keying and port status, etc.
The behavior of the IPMI LEDs is as follows:
LED OFF
Blue Card active
Red No Fault
Green No management power
Amber Normal
ON
OK to remove
Payload Power Fault
Management power OK
Payload power OK
Firmware upgrade
BLINK
Hot-swap/power transitioning
N/A
Management power OK
Payload power not expected
N/A
Table 3: AMC LED Behavior
NOTE: The card should only be removed from the chassis when the AMC Blue LED is solid ON.
To insert the card to the chassis, place the card into the carrier’s guide rails and push on the front panel firmly until it is fully seated into the connector. If the card does not go fully in, do not force it and instead remove it and check for proper orientation or obstructions. Once fully inserted the Blue LED should go to solid ON while the Green LED should start blinking.
Then push in the handle to latch the card into the carrier, the Blue LED should blink for a time and then go solid OFF while the Green LED goes solid ON.
To remove the card, pull out the hot-swap handle until it stops to unlatch the card from the carrier (but do not pull hard enough to remove the card itself yet). The Blue LED should blink for a time and then go solid ON. Once it does, pull the hot-swap handle straight out firmly to remove the card from the carrier.
The AMC72X also has an “IPMI RS-232” connector which enables a serial connection to the
IPMI MMC CPU. A VadaTech serial cable assembly is available for connecting to this port which converts the Micro USB form factor into a DB9 connector (VadaTech P/N CBL-
DB9MUSB1).
This port operates with 115200-8N1-NOFLOW settings, and the port is pinned out as follows:
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1
2
3
Pin
Open
Receive
Transmit
Signal
4
5
Open
Signal GND
SHLD Chassis GND
Table 4: IPMI RS232 connector pin-out
WARNING: Please take care not to plug USB devices into the “IPMI RS-232” port as there may be a risk of damage. Even though the connector accepts Micro-USB cables, this port is not electrically compatible with USB devices.
3.1 IPMI Internal 10/100 Ethernet
The MMC makes use of CaveCreek PCH Manageability Capability to configure Management
Port over one of four 1GbE ports for SOL traffic. This Ethernet port is managed by the MMC and is not accessible to the customer directly. The customer can make use of it indirectly however by using the Serial Over LAN (SOL) functionality of the MMC.
Please refer to the VadaTech MMC and IPMC RMCP and SOL Guide.
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4 DIP Switch Settings
The AMC72X products contain numerous DIP switches which will be pre-set by the factory.
Some switch settings may need to be changed by the customer in order to match their desired configuration. Factory default settings are marked as blue.
4.1.1 IPMI Related functions
SW2[1:3] control IPMI related functions and are primarily intended for VadaTech use.
Switch OFF ON
SW2-1 Factory Default Reserved
SW2-2 Factory Default Reserved
SW2-3 Factory Default Reserved
Table 5: SW2 settings
NOTE: Please do not change the factory default settings unless instructed by VadaTech.
4.1.2 Write Protection Switches
SW2[4] and SW3[1:2] control write protection of various programmable parts available on the board.
Switch Description
SW2-4 SD Card Write-Protect
OFF ON
Write-Protected Writeable
SW3-1 SPI Flash 0 Write-Protect Writeable
SW3-2 SPI Flash 1 Write-Protect Writeable
Write-Protected
Write-Protected
Table 6: Write Protection Switch Settings
4.1.3 Board Configuration Switches
SW3[3:4] and SW4 control board relative features which are generic for all AMC72X boards.
Switch Description
SW3-3 Don’t reboot system on second try.
OFF
Reboot After
Second
Timeout
SW3-4 PCIe Ref Clock Source On-Board
Clock
ON
No Reboot
After Second
Timeout
Backplane
Fabric Clock
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SW4-1 RTC Reset
SW4-2 Secondary RTC Reset
SW4-3 7-Seg DisplayMode
Normal State Reset
Asserted
Normal State Reset
Asserted
Bios Post
Code x8
Power State
Mode
Dual x4 SW4-4 PCIe Port Bifurcation
Strap
Table 7: Board Configuration Switch Settings
Note: SW4-4 is available only on AMC720 since only that board has PCIe on Ports 4-11 and
can be configured as dual x4 or single x8 link. Refer to Section IPMI E-Keying Configuration
for the steps to configure the module e-keying records for the respective configuration.
4.1.4 SRIO Configuration Switches
SW5 and SW6 are used to configure SRIO on AMC722 ports 4-7 and 8-11.
NOTE: Since both switch SW5 and SW6 settings have exactly the same meaning this section will cover switch configuration only for SW5 keeping in mind that SW6 has the same purpose and applies for second SRIO port.
Switch
SW5-1
SW5-2
SW5-3
Description
Boot from
EEPROM Strap
Boot from SRIO
OFF
Disabled
After Software sets
SRBOOT_CMPL bit
ON
Enabled
After
Fundamental
Reset
SRIO Host
SW5-8
SRIO Host/Slave
Control
Reserved
SRIO Slave
Factory Default
Table 8: SRIO Configuration Switch Settings
Reserved
SW5[3:4]
ON-ON
ON-OFF
Result
BASE_ID = 0xFE
LAR_BASE_ID = 0x00FE
BASE_ID = All Ones
LAR_BASE_ID = All Ones
Table 9: SRIO Base Device ID Control Switch Settings
SW5[5:7]
OFF-OFF-OFF
OFF-OFF-ON
OFF-ON-OFF
ON-OFF-ON
Result
5.0Gbaud
2.5Gbaud
1.25Gbaud
3.125Gbaud
Table 10: SRIO Speed Settings
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5 Gladden Interface
5.1 Serial Console Port
The AMC72X front panel includes a “CPU RS-232” connector which enables a serial console connection to the CPU using Serial Port 0 exported by CaveCreek PCH. Output redirection to the serial port is configured using BIOS configuration menu. A VadaTech serial cable assembly is available for connecting to this port which converts the Micro USB form factor into a DB9 connector (VadaTech P/N CBL-DB9MUSB1).
This port operates with 9600-8N1-NOFLOW settings; the port is pinned as follows:
1
Pin Signal
2
3
4
Open
Receive
Transmit
Open
5 Signal GND
SHLD Chassis GND
Table 11: CPU RS232 connector pin-out
WARNING: Please take care not to plug USB devices into the “CPU RS-232” port as there may be a risk of damage. Even though the connector accepts Micro-USB cables, this port is not electrically compatible with USB devices.
NOTE: This RS-232 port is not available during the time that a Serial Over LAN (SOL) session is active to the board using Serial Port 0 since during that time the Serial Port 0 is automatically switched away from the front panel and is connected to the MMC so that it can convey the serial traffic via
Ethernet.
5.2 USB Ports
The AMC72X front panel includes two USB ports. USB Ports are connected to the CaveCreek
USB Ports 0 and 1. A USB device may be attached to this port for expansion.
1
Pin
2
3
+5V
D-
D+
Signal
4
5
Open
Signal GND
SHLD Chassis GND
Table 12: USB port pin-out
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5.3 1GbE Ports
There are two 10/100/1000Base-T (copper) Ethernet ports available on the front panel.
ETH0 and ETH1 are attached to the CaveCreek 1GbE ports 2 and 3 via two 88E1114 PHYs.
Dedicated 1000Base-X Ports are connected to CaveCreek 1GbE Ports 0 and 1 and then to
AMC Ports 0 and 1.
The LEDs on the RJ45 ports on the front panel replicate the state of four 1Gbe ports exported by CaveCreek. The LEDs for those ports are defined as follows:
LED
Green
ON
GbE2 Linked
Orange GbE0 linked
OFF
GbE2 not linked
GbE0 not linked
Table 13: ETH0 LEDs
BLINK
GbE2 Activity
GbE0 Activity
LED
Green
ON
GbE3 Linked
Orange GbE1 linked
OFF
GbE3 not linked
GbE1 not linked
Table 14: ETH1 LEDs
BLINK
GbE3 Activity
GbE1 Activity
5.4 XAUI Ports (only applicable to AMC721 and AMC723)
Depending on the board model, there are up to two available XAUI ports on the backplane.
AMC721 provides XAUI ports on AMC 4-7 and AMC 8-11, while AMC723 only provides a single XAUI port on AMC 8-11.
The LEDs on the front panel on both of these AMC modules provide indication of Link and
Activity for the available ports per the following table:
A
LED
L
ON n/a
Corresponding port linked
OFF
No activity
Corresponding port not linked
Table 15: 10GbE LEDs
BLINK
Activity n/a
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5.5 SRIO Ports (only applicable to AMC722)
AMC722 provides dual SRIO x4 interface on backplane lanes 4-7 and 8-11. Since the SRIO interface is available via a PCIe-to-SRIO Bridge, front panel LEDs reflect the current state of both sides of the bridge, hence the SRIO and PCIE LEDs above ETH 1 connector.
Such LEDs are defined as follows:
BLINK LED
SRIO
0/1
PCIE
0/1
ON
Corresponding SRIO port detected reset
Corresponding PCIe port detected Hot
Reset
OFF
Normal Function
Normal Function
Table 16: SRIO Bridge LEDs n/a n/a
5.6 SD Card Socket
The AMC72X board includes a Micro SD card socket. This socket connects to the Gladden by way of a USB2244 USB SD media controller chip. This SD card is typically used to hold the kernel and root file-system. This socket has a front panel LED associated with it as follows:
LED
SD
Color ON OFF BLINK
Green n/a No activity Activity
Table 17: SD Card LED
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5.7 CaveCreek EEPROM
An AT25128B EEPROM is provided on the CaveCreek EEPROM port. This EEPROM is delivered with factory programmed image which contains default PCIe configuration space and CaveCreek GbE register settings. This EEPROM can be customized using Intel EEPROM
Image Creation Tool (EICT). To flash the EEPROM image use Intel eepdate tool.
5.8 DDR3 SO-DIMMs
The board comes pre-loaded with either 4GB, 8GB, or 16GB of DDR3 memory with ECC depending on ordering option “B”. The memory is carried on VadaTech proprietary SO-
DIMMs and inserted in slots J2 and J3 on the board. The software uses the SO-DIMM’s SPD
EEPROMs to determine the size and type of memory.
Slot TWSI0 SPD
EEPROM
J2
J3
Chip Data
Select
*DDR_DIMM0_CS0
*DDR_DIMM0_CS1
*DDR_DIMM1_CS0
*DDR_DIMM1_CS1
Width
64-bit + 8-bit ECC
Table 18: DDR3 SO-DIMM mapping
“1010010”
“1010001”
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5.9 Ethernet PHY Addressing
The AMC72X board includes two 1GbE PHYs.
PHY Address
0x01
0x02
Type
88E1114
88E1114
Port
1GbE ETH0
1GbE ETH1
Table 19: Gladden Ethernet PHY Addressing
NOTE: The backplane 1GbE ports and XAUI ports (if applicable) do not have a PHY; 1GbE ports are connected from CaveCreek PCH chip to the backplane without going through a PHY.
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6 Software
The AMC72x comes pre-configured with AMI Aptio BIOS installed in the SPI flash devices, and Fedora installed in the on-board micro SD card.
6.1 BIOS
The BIOS is AMI Aptio version 4.6.5.4; it is based on the Intel Stargo Customer Reference
Board with modifications to support the AMC72x hardware.
Setup Menu
After a power cycle or reset, the BIOS will present a welcome screen via the PCH serial port.
Pressing the Del key causes the Setup Menu to be displayed. From Setup the customer may modify the BIOS settings as needed; for example the Boot menu is used to modify the boot device order.
Updating the BIOS
The Intel Flash Programming Tool, FPT is used to re-flash the BIOS firmware. Another option is to use the AMI AFU utility to re-flash the BIOS with a new image. Versions for DOS,
Windows, and EFI are available to download from AMI.
Here are the steps on how to re-flash BIOS using AMI AFU tool:
1. Download AMI AFU utility from the link above and extract on host PC
2. Go to amflash/Aptio/AFUEFI
3. Go to 32 or 64 depending on CPU
4. Open the archive file and copy .efi file to USB Flash Disk
5. Download upgrade image from Vadatech on following link username: customer password: amc72xvt@72
6. Disconnect USB Flash from host PC and connect to AMC72X
7. Select EFI shell from BIOS boot menu and boot to EFI
8. USB Flash should show up as fs0
9. Enter fs0: command to open USB Flash
10. Use following command to upgrade bios:
<efi_file_name.efi> <bios_file_name> /P
11. After upgrade is done, power cycle the board
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Network Boot (PXE)
To enable booting via the network (PXE boot) following steps should be performed:
1. Enter BIOS
2. Go to Advanced/Network Stack
3. Enable Network stack and make sure that Ipv4 PXE Support and Ipv6 PXE Support are enabled
4. Save changes and exit
5. Power cycle the board and enter BIOS
6. Go to Boot menu
7. Enter CSM Parameters submenu
8. Set Launch PXE OpROM poli to [Legacy first]
9. Save changes and exit
10. Power cycle the board and enter BIOS
11. Go to Boot menu
12. If your NBP (Network Bootstrap Program) does not support UEFI and Legacy mode is preferred then perform following steps a) Go to Network Device BBS Priorities b) You should see following devices
IBA GE Slot 0101 v1350 (AMC port 0)
IBA GE Slot 0102 v1350 (AMC port 1)
IBA GE Slot 0103 v1350 (Front port 0)
IBA GE Slot 0104 v1350 (Front port 1) c) Set Boot Option #1 the device which is connected to the network which has
PXE server d) Exit submenu
13. Under Boot Option Priorities choose IBA GE Slot 010X v1350 if preferred to use legacy mode, or one of UEFI devices below, depending on which port is connected to the network with PXE server
UEFI: IP4 Intel(R) DH8900CC Series Gigabit Backplane Network Connection (AMC port 0)
UEFI: IP6 Intel(R) DH8900CC Series Gigabit Backplane Network Connection (AMC port 0)
UEFI: IP4 Intel(R) DH8900CC Series Gigabit Backplane Network Connection (AMC port 1)
UEFI: IP6 Intel(R) DH8900CC Series Gigabit Backplane Network Connection (AMC port 1)
UEFI: IP4 Intel(R) DH8900CC Series Gigabit Network Connection (Front port 0)
UEFI: IP6 Intel(R) DH8900CC Series Gigabit Network Connection (Front port 0)
UEFI: IP4 Intel(R) DH8900CC Series Gigabit Network Connection (Front port 1)
UEFI: IP6 Intel(R) DH8900CC Series Gigabit Network Connection (Front port 1)
14. Save changes and exit
After reboot AMC72X will try to locate PXE server and try to boot from it if present.
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Boot Devices
To modify the boot device order, select the Boot tab and scroll down to Boot Option
Priorities. Select the Boot Option number and change it by selecting from the list in the dialog box.
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6.2 Linux
The AMC72x comes pre-programmed with Fedora installed in the on-board SD card. Linux includes many different commands and features, which cannot all be described here.
Additional documentation resources can be found on-line at fedoraproject.org and on other
Linux resource site.
Logging In
The PCH serial port is used to log-in to Linux using the 9600 8N1 settings. At the log-in prompt you should see the following:
Fedora release 18 (Spherical Cow)
Kernel 3.9.4-200.fc18.x86_64-vt on an x86_64 (/dev/ttyS0) localhost login: root
Password: rootroot
Log-in as root using the password as shown above. You may change the root password after logging-in.
Network Device Mapping
The AMC72x family devices have four 4 GbE interfaces 2 of them routed to front Ethernet ports, two of them routed to AMC Ports 0 and 1. XAUI ports are present on AMC Ports 4-7 and 8-11 depending on particular product. For more information refer to tables below.
Interface eth0 eth1 eth2 eth3
Default IP Address
192.168.40.212
Type
GbE
Port
AMC Port 0
192.168.41.212
192.168.1.199
192.168.2.199
GbE
GbE
GbE
AMC Port 1
Front Port 0
Front Port 1
Table 20: AMC720 and AMC722 Network Device Mapping
Interface eth0 eth1 eth2 eth3 eth4 eth5
Default IP Address
192.168.42.212
192.168.43.212
192.168.40.212
Type
XAUI
XAUI
Port
AMC Ports 4-7
AMC Ports 8-11
AMC Port 0 GbE
192.168.41.212
192.168.1.199
192.168.2.199
GbE
GbE
GbE
Table 21: AMC721 Network Device Mapping
AMC Port 1
Front Port 0
Front Port 1
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Interface eth0 eth1 eth2 eth3 eth4 eth5
Default IP Address
192.168.42.212
N/A
192.168.40.212
192.168.41.212
192.168.1.199
192.168.2.199
Type
XAUI
N/A
GbE
GbE
GbE
GbE
Port
AMC Ports 8-11
Not Connected
AMC Port 0
AMC Port 1
Front Port 0
Front Port 1
Table 22: AMC723 Network Device Mapping
NOTE: Only first 10GbE port is connected to AMC Ports. Second port is unconnected and shows up as a dummy port in Linux. It cannot be used.
VNC Server
The Linux GUI can be accessed remotely over the network since there is a VNC server installed in the
Linux. The server is preconfigured and ready to use, but it is off by default. Use the command bellow to start VNC server:
# vncserver :1 -geometry 800x600 -depth 24
The following command stops VNC server:
# vncserver -kill :1
The password for VNC server is same as password for root user.
6.3 Graceful Shutdown Support
Graceful shutdown provides a way of gracefully shutting down the OS running on the board once payload deactivation request from uTCA Carrier is received due to explicit deactivation command or AMC handle opened.
Graceful shutdown a result of cooperation of different components of AMC design which are described below:
1. IPMI Controller supports a. OEM IPMI commands which allow the user to enable/disable graceful shutdown support b. Read the Quiesced state of the AMC to determine whether AMC deactivation has been requested by uTCA Carrier Manager c. Monitor of CPU power state to detect system shutdown completion
2. Hardware support a. I2C path to payload CPU which enables OS communication to IPMI Controller
3. Application running on OS side a. Performs AMC Quiesced state monitoring through i2c using OEM IPMI commands and gracefully shuts down the OS once deactivation is requested by uTCA Carrier Manager.
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NOTE: OS side Graceful shutdown support is OS specific and the user should implement its own way of shutting down the board using provided interface and OEM IPMI commands.
Vadatech has the Graceful shutdown support in place for Fedora Linux available on SD Card shipped with the board.
6.3.1 Implementing Graceful Shutdown
In order to implement graceful shutdown support in the OS following stuff is required:
1. Driver to be able to communicate on payload i2c bus
2. Interface for sending IPMI packets over i2c bus
By default IPMI controller is initialized with graceful shutdown support disabled allowing proper operation of operating systems which do not implement graceful shutdown.
After OS starts graceful shutdown support should be enabled by the software using IPMI
“Set Graceful Shutdown” OEM command.
After enabling graceful shutdown the software should continuously monitor Quiesced state of the AMC by issuing IPMI “Get Quiesced State” OEM command.
Once AMC goes to “Quiesce In Progress” state the software should start OS shutdown. IPMI controller will monitor CPU power state and will report that payload has been turned off to uTCA carrier once CPU goes to power down state.
Name
Set Graceful Shutdown 0x2e
NetFn
Get Quiesced State 0x2e
Cmd
0x37
Input Data byte[0] = 0x32 byte[1] = 0x5d byte[2] = 0x00 byte[3] = value
value:
0 - Disable
1 - Enable
0x38 byte[0] = 0x32 byte[1] = 0x5d byte[2] = 0x00
Output Data byte[0] = IPMI CompCode byte[1] = 0x32 byte[2] = 0x5d byte[3] = 0x00 byte[0] = IPMI CompCode byte[1] = 0x32 byte[2] = 0x5d byte[3] = 0x00 byte[4] = value
value:
0 - Not Quiesced
1 - Quiesce in Progress
2 - Quiesced
Table 23: Graceful Shutdown IPMI OEM Commands
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7 IPMI E-Keying Configuration
An AMC E-Keying menu is available via the IPMI RS-232 port for AMC720 and AMC722. This e-keying configuration is already performed at the factory to match the ordering options of the board. However, this menu can be accessed if desired to turn on/off sets of backplane e-keying records for the GbE, PCIe, SRIO and SATA ports.
To use the menu system simply follow the on-screen directions to enable/disable the various sets of e-keying records. When a set of records is enabled it will have an asterisk next to it and when it is disabled it will not have the asterisk.
After configuring e-keying please remove and reinsert the card to ensure that the carrier manager correctly re-reads the contents of the e-keying records.
Following tables map switch settings to suggested e-keying configuration.
SW4-4 Active E-Keying options
OFF
ON
1, 2, 3, 5, 6, 7
1, 2, 3, 4, 6, 7
Result
PCIe x8
PCIe Dual x4
Table 24: AMC720 E-Keying Configuration
SW5[5:7]
OFF-OFF-OFF
OFF-OFF-ON
OFF-ON-OFF
ON-OFF-ON
Active E-Keying options
1, 2, 3, 7, 11, 12
1, 2, 5, 9, 11, 12
1, 2, 6, 10, 11, 12
1, 2, 4, 8, 11, 12
Table 25: AMC722 E-Keying Configuration
Result
5.0Gbaud
2.5Gbaud
1.25Gbaud
3.125Gbaud
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8 Serial Over Lan (SOL)
The Serial Over Lan function can redirect the CPU RS-232 serial ports into an SOL network session. When using serial0 as SOL serial port software will redirect the port from front panel to SOL session. This allows for straightforward remote access to the CPU console serial port without the need for having an RS-232 cable connected to the serial port.
CaveCreek exports two serial ports ( serial0 and serial1 ). Configuration command is available on IPMI RS-232 port to select serial port for SOL using plser command.
One of four 1GbE ports can be configured as a management port to direct SOL traffic. This option is software configurable and can be modified using mgtport command to select one of two backplane ports ( back0 and back1 ) or one of two front panel ports ( front0 and front1 ) as management port.
A separate manual is available describing additional functionality. Please refer to the
VadaTech MMC and IPMC RMCP and SOL Guide.
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9 Factory Setup
9.1 Initial Factory Setup
The MAC addresses for the board should already be configured by VadaTech during manufacturing. Take care not to erase CaveCreek EEPROM so as not to lose the globally unique MAC addresses that have been assigned.
In the factory these MAC addresses are assigned as follows:
1) TARGET: Boot DOS using bootable USB Flash Stick
2) PC: Reserve 5 MAC addresses from the VadaTech MAC pool for each 1Gbe ports
plus 1 port for IPMI/SOL Management traffic
3) TARGET: Use eeupdate
tool to set MAC addresses.
NOTE: Management port will automatically assign itself 5 th reserved MAC address.
NOTE: The board must be power-cycled or reset after setting the MAC address before it will take effect.
For AMC721 and AMC723 same steps should be performed to update MAC addresses on
XAUI ports.
9.2 Writing the Factory Default SD Card Contents
An image is provided in the BSP release package to restore the default SD Card contents.
Writing this image to an SD Card will entirely wipe out the contents of the SD Card.
WARNING: Use care to specify the correct /dev/sd device under Linux as using the wrong device could result in wiping out the contents of your PC’s hard drive! USE EXTREME
CAUTION WHEN PERFORMING THESE STEPS AND ENSURE THAT YOU UNDERSTAND WHAT
IS ABOUT TO HAPPEN BEFORE MOVING ON…
1) Linux PC: Insert the SD Card from the AMC72X into an SD Card reader on your Linux PC.
2) Linux PC: Determine which device Linux has assigned to the SD Card. Your hard drive is probably /dev/sda so DON’T use that one or your will wipe out your hard drive. The SD
Card will usually be /dev/sdb or /dev/sdc, etc depending on how many hard drives are already in your system. Note that this assignment may change over time as you add/remove hard drives or memory cards from your system so it is important to check each time.
3) Linux PC: dd if=amc72 X _sd_card_ Y gb.img of=/dev/sd Z
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NOTE: X specifies the exact product form AMC72X family. Specify Y as the density of the SD card. Specify Z as the identifier of the SD Card as assigned by Linux. Do not specify any numeric suffix as the image is a full disk image and includes multiple partitions. It should be written to the raw drive device not a partition device.
Expect the copying process to take around a half an hour.
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10 AMC725 Specific Changes
The AMC725 is the latest in AMC72x series of Processor AMCs. This section describes the key differences between the AMC725 from AMC720, 1, 2, and 3.
10.1 Block Diagram
LED
SATA
SATA
Quad USB
PCIe X8
Dual SATA
Opt.
Dual SSD
RAID
Opt.
Dual SSD
RAID
PCH
PCIe
X16
PCIe Switch
RJ45
RJ45
Dual USB
PCIe
X16
Intel
Xeon E3
4 Core / 8MB
Port 0-1 Dual
GbE
Port 2-3 Dual
SATA
Port 4-11
PCIe X4 or X8
IPMB
PCIe to SATA
PCIe X2
FLASH (BIOS)
Up to 32GB
FLASH
Graphics
PCIe X4 MAC/PHY i82599
DVI
SFP+
SFP+
DDR-III w/ ECC up to 16GB
RS-232
RS-232
Hardware Random
Number Generator
(RNG)
IPMI Controller
Figure 10: AMC725 Block Diagram
10.2 Summary
The summary of key differences in AMC725 compared to the other AMC72x devices are:
AMC725 is a double-width, mid-height Advanced Mezzanine Card, with options for full-height.
AMC725 has a built-in graphics controller, routed to the front panel through the DVI-I connector
Support for two SATA disk drives (one on the baseboard and other on an optional daughter board)
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AMC725 supports additional peripherals and interfaces compared to other AMC72x device and to support these additional features a PCIe Gen 3 switch is used
Ports 4 to 11 on AMC725 are routed from the PCIe Gen 3 switch to the backplane connectors
From the PCIe Gen3 Switch: o PCIe x16 to PCH o PCIe x16 to CPU o PCIe x8 to RTM connector o PCIe x1 to Graphics controller o PCIe x2 to SATA controller, which controls the Ports 2 and 3
The 10GbE NIC on AMC725 is routed to the front panel through dual SFP+ connectors
µRTM Connector provides the following interfaces: o 4x USB from PCH o PCIe x8 from PCIe Gen3 Switch o 2x SATA ports o 2x PCIe reference clocks
10.3 Switches and Sensors
The location on switches and temperature sensors on AMC725 are shown below.
SW2
3
4
1
2
ON
3
4
1
2
ON
3
4
1
2
ON
SW4
SW3
AMC725 PCB – Top side
Temp Sensor 1
Figure 11: AMC725 PCB Top Side
Temp Sensor 2
(air intake)
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Temp Sensor 3
(air out)
AMC725 PCB – Bottom side
Temp Sensor 4
Figure 12: AMC725 PCB Bottom Side
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