3.19.LCD Controller (STN & TFT). Digi ConnectCore 9P 9750 Module 16MB SDRAM, 32MB Flash

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3.19.LCD Controller (STN & TFT). Digi ConnectCore 9P 9750 Module 16MB SDRAM, 32MB Flash | Manualzz

Module A9M9750_2

3.19. LCD Controller (STN & TFT)

An LCD interface for STN or TFT LCD’s is provided with up to 24 data lines and

6 control lines. Usage for LCD disables serial ports C, D and most GPIOs.

The module provides the full LCD interface: 24 data lines LCCD0..23

(GPIO24..47) and 6 control lines GPIO18..23.

This interface allows connection of most TFT and STN monchrome and color

LCDs. Details see NS9750 hardware user manual.

3.20. Serial EEPROM for storing Configuration Parameters

The nonvolatile storage of parameters like MAC address etc. is supported with a serial 8Kx8 EEPROM (24LC64 or similar) connected to the I²C bus at device address 0xA0, 0xA1.

3.21. RTC

An RTC (MAXIM/DALLAS DS1337 in µSOP8 case) on the module is connected to the I²C bus (device address 0xD0, 0xD1). It has its own 32.768KHz clock crystal. Power is taken from 3.3V when provided, otherwise from V

RTC

fed by an external battery. An interrupt line (GPIO13) is connected to the RTC; it can be opened by depopulating a resistor.

3.22. JTAG, Boundary Scan

NS9750 support JTAG and boundary scan with the signals TCK, TMS, TDI, TDO and TRST#. The signal RTCK is not connected to external. It is only used on the module for PCI arbiter selection.

Selection between normal mode and debug mode is done with the external signal DEBUG_EN# (HCONF0). Selection between ARM debug mode and boundary scan mode is done with the signal OCD_EN# (HCONF2). See table below:

DEBUG_EN#

1

OCD_EN# Mode

1 normal

Comments

36

DEBUG_EN#

1

0

0

Module A9M9750_2

OCD_EN#

0

1

0

Mode not recommended

ARM debug

Boundary Scan

Comments

Boundary Scan possible here too, but TRST# is connected with SRST#, system may hang

37

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Frequently Answers and Questions

What is the default configuration of the PCI Arbiter?
External PCI Arbiter.
How can I boot the device from SPI?
Set the RESET_D BOOTDS pin to 0.
How can I boot the device from Flash/ROM?
Set the RESET_D BOOTDS pin to 1.
What is the default configuration of the Chip Select Multiplexer?
CS1LEP is active low, CS1 is used for NAND Flash.
Can I use CS0 for NOR Flash?
Yes, by setting the CS0SEL pin to 0.
What is the default configuration of the Byte Lane Multiplexer?
BL1LP is active low, BL1 is used for SDRAM.
Can I use BL0 for the NAND Flash?
Yes, by setting the BL0SEL pin to 0.

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