VIA Technologies EPIA-M920-10E User manual


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VIA Technologies EPIA-M920-10E User manual | Manualzz
USER MANUAL
EPIA-M920
Mini-ITX embedded board
1.04-06182013-175200
Copyright
Copyright © 2013 VIA Technologies Incorporated. All rights reserved.
No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language,
in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise without the prior written
permission of VIA Technologies, Incorporated.
Trademarks
All trademarks are the property of their respective holders.
Disclaimer
No license is granted, implied or otherwise, under any patent or patent rights of VIA Technologies. VIA Technologies makes no
warranties, implied or otherwise, in regard to this document and to the products described in this document. The information
provided in this document is believed to be accurate and reliable as of the publication date of this document. However, VIA
Technologies assumes no responsibility for the use or misuse of the information (including use or connection of extra
device/equipment/add-on card) in this document and for any patent infringements that may arise from the use of this document.
The information and product specifications within this document are subject to change at any time, without notice and without
obligation to notify any person of such change.
VIA Technologies, Inc. reserves the right the make changes to the products described in this manual at any time without prior
notice.
Regulatory Compliance
FCCFCC-A Radio Frequency Interference Statement
This equipment has been tested and found to comply with the limits for a class A digital device, pursuant to part 15 of the FCC
rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a
commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in
accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a
residential area is likely to cause harmful interference, in which case the user will be required to correct the interference at his
personal expense.
Notice 1
The changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
Notice 2
Shielded interface cables and A.C. power cord, if any, must be used in order to comply with the emission limits.
Notice 3
The product described in this document is designed for general use, VIA Technologies assumes no responsibility for the conflicts
or damages arising from incompatibility of the product. Check compatibility issue with your local sales representatives before
placing an order.
Tested To Comply
With FCC Standards
FOR HOME OR OFFICE USE
Battery Recycling and Disposal
Only use the appropriate battery specified for this product.
Do not re-use, recharge, or reheat an old battery.
Do not attempt to force open the battery.
Do not discard used batteries with regular trash.
Discard used batteries according to local regulations.
Safety Precautions
Always read the safety instructions carefully.
Keep this User's Manual for future reference.
All cautions and warnings on the equipment should be noted.
Keep this equipment away from humidity.
Lay this equipment on a reliable flat surface before setting it up.
Make sure the voltage of the power source and adjust properly 110/220V before connecting
the equipment to the power inlet.
Place the power cord in such a way that people cannot step on it.
Always unplug the power cord before inserting any add-on card or module.
If any of the following situations arises, get the equipment checked by authorized service
personnel:
The power cord or plug is damaged.
Liquid has penetrated into the equipment.
The equipment has been exposed to moisture.
The equipment has not worked well or you cannot get it work according to User's Manual.
The equipment has dropped and damaged.
The equipment has obvious sign of breakage.
Do not leave this equipment in an environment unconditioned or in a storage temperature
above 60°C (140°F). The equipment may be damaged.
Do not leave this equipment in direct sunlight.
Never pour any liquid into the opening. Liquid can cause damage or electrical shock.
Do not place anything over the power cord.
Do not cover the ventilation holes. The openings on the enclosure protect the equipment
from overheating
EPIAEPIA-M920 User Manual
Box Contents and Ordering Information
Model Number
EPIA-M920-10E
CPU Frequency
1.0GHz Eden™ X2
Description
Standard kit
1 x SATA cable
1 x I/O bracket
EPIA-M920-12Q
1.2GHz QuadCore
Standard kit
1 x SATA cable
1 x I/O bracket
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EPIAEPIA-M920 User Manual
Table of Contents
1.
Product Overview ................................................................
................................................................................................
................................................................ 1
1.1.
Key Features and Benefits........................................................................... 2
1.1.1.
VIA QuadCore /VIA Eden™ X2 Processor ......................................... 2
1.1.2.
VIA VX11H MSPIII Chipset.................................................................... 3
1.1.3.
Modular Expansion Options................................................................. 3
1.2.
Product Specifications................................................................................. 4
1.3.
Layout Diagram ............................................................................................. 7
1.4.
Product Dimensions..................................................................................... 2
1.5.
Height Distribution....................................................................................... 3
2.
I/O Interface................................
Interface................................................................
................................................................................................
..........................................................................
.......................................... 5
2.1.
External I/O Ports ......................................................................................... 5
2.1.1.
PS/2 Port.................................................................................................... 6
2.1.2.
HDMI® Port............................................................................................... 7
2.1.3.
COM Port.................................................................................................. 8
2.1.4.
RJ45 LAN port: Gigabit Ethernet ......................................................... 9
2.1.5.
Audio Ports............................................................................................. 10
2.1.6.
VGA Port................................................................................................. 11
2.1.7.
USB 2.0 Port ........................................................................................... 12
2.1.8.
USB 3.0 Port ........................................................................................... 13
2.2.
Onboard Connectors ................................................................................ 14
2.2.1.
ATX Power Connector......................................................................... 14
2.2.2.
LVDS panel connectors ....................................................................... 15
2.2.3.
LVDS Inverter Connector .................................................................... 18
2.2.4.
Digital I/O pin headers ........................................................................ 20
2.2.5.
External Thermal Resister.................................................................... 21
2.2.6.
Front Panel Pin Header ........................................................................ 22
2.2.7.
SMBus Pin Header................................................................................. 24
2.2.8.
CPU and System Fan Connectors ...................................................... 25
2.2.9.
SATA Connectors ................................................................................. 26
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EPIAEPIA-M920 User Manual
2.2.10.
2.2.11.
2.2.12.
2.2.13.
2.2.14.
2.2.15.
2.2.16.
2.2.17.
2.2.18.
2.2.19.
USB 2.0 Pin Headers............................................................................. 27
COM Pin Header for COM2~COM4 ................................................ 28
PS/2 Keyboard and Mouse Pin Header ............................................ 29
Front Audio Pin Header....................................................................... 30
SPI address select ................................................................................. 31
SPI Pin Header ....................................................................................... 32
LPC Pin Header ...................................................................................... 33
SPDIF Connector ................................................................................... 34
CMOS Battery Slot................................................................................ 35
USB3.0 Connector................................................................................. 36
3.
Jumpers ................................................................
................................................................................................
...............................................................................
............................................... 37
3.1.
Clear CMOS Jumper.................................................................................. 37
3.2.
SATA DOM Power Select Jumper ......................................................... 38
3.3.
COM1 and COM2 Voltage Select Jumper........................................... 39
3.4.
COM3 and COM4 Voltage Select Jumper........................................... 40
3.4.1.
VDD Power Select................................................................................ 41
3.5.
LVDS Jumper Settings ............................................................................... 42
4.
Expansion Slots ................................................................
................................................................................................
..................................................................
.................................. 43
4.1.
DDR3 Memory Slots .................................................................................. 43
4.1.1.
Installing a Memory Module .............................................................. 44
Figure 42: Locking the memory module ........................................................... 44
4.1.2.
Removing a Memory Module............................................................. 45
4.1.3.
PCI Express Slot .................................................................................... 46
5.
Hardware Installation
Installation ................................................................
........................................................................................
........................................................ 47
5.1.
Installing into a Chassis............................................................................. 47
5.1.1.
Suggested minimum chassis dimensions ......................................... 47
5.1.2.
Suggested minimum chassis height................................................... 48
5.1.3.
Suggested keepout areas .................................................................... 50
6.
BIOS Setup Utility ................................................................
..............................................................................................
.............................................................. 51
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EPIAEPIA-M920 User Manual
6.1.
6.2.
6.3.
6.4.
6.5.
6.5.1.
6.5.2.
6.5.3.
6.5.4.
6.5.5.
6.6.
6.6.1.
6.6.2.
6.6.3.
6.6.4.
6.6.5.
6.6.6.
6.6.7.
6.6.8.
6.7.
6.7.1.
6.7.2.
6.7.3.
6.7.4.
6.7.5.
6.7.6.
6.7.7.
6.8.
6.8.1.
6.8.2.
6.8.3.
6.9.
6.9.1.
Entering the BIOS Setup Utility............................................................... 51
Control Keys................................................................................................ 51
Navigating the BIOS Menus ..................................................................... 52
Getting Help................................................................................................ 52
Main Menu ................................................................................................... 53
BIOS Information................................................................................... 53
Memory Information ............................................................................. 53
System Language................................................................................... 53
System Date............................................................................................ 54
System Time ........................................................................................... 54
Advanced Settings ..................................................................................... 55
ACPI Settings.......................................................................................... 56
S5 RTC Wake Settings .......................................................................... 57
CPU Information .................................................................................... 58
SATA Configuration.............................................................................. 59
F71869 Super IO Configuration ......................................................... 60
F71869 H/W Monitor ........................................................................... 61
Clock Generator Configuration.......................................................... 62
On Board Configuration ...................................................................... 63
Chipset Settings .......................................................................................... 65
DRAM Configuration ............................................................................ 66
Video Configuration ............................................................................. 69
UART Configuration.............................................................................. 71
PMU_ACPI Configuration .................................................................... 72
HDAC Configuration ............................................................................ 74
SDIO_CR Configuration ....................................................................... 75
Others Configuration............................................................................ 77
Boot Settings ............................................................................................... 78
Boot Configuration................................................................................ 78
Boot Option Priorities .......................................................................... 79
Network Device BBS Priorities ........................................................... 79
Security Settings ......................................................................................... 80
Security Settings .................................................................................... 80
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EPIAEPIA-M920 User Manual
6.10.
Save & Exit Options ................................................................................... 82
6.10.1. Save Changes and Exit ......................................................................... 82
6.10.2. Discard Changes and Exit.................................................................... 82
6.10.3. Save Changes and Reset...................................................................... 82
6.10.4. Discard Changes and Reset................................................................. 83
6.10.5. Save Changes ......................................................................................... 83
6.10.6. Discard Changes.................................................................................... 83
6.10.7. VIA Networking Bootagent................................................................. 83
6.10.8. Launch EFI Shell from filesystem device ......................................... 83
7.
Driver Installation................................
Installation................................................................
...............................................................................................
............................................................... 85
7.1.
Microsoft Driver Support.......................................................................... 85
7.2.
Linux Driver Support.................................................................................. 85
Appendix A. Power Consumption Report................................
Report...............................................................
............................................................... 87
A.1. EPIA-M920 Rev. 2 DVT ATX POWER ............................................................ 87
A.1.1. Playing DVD – Power DVD 5.0 ............................................................... 87
A.1.2. Playing MP3-Media Player ........................................................................ 88
A.1.3. Running Network Application ................................................................. 88
A.1.4. IDLE................................................................................................................ 89
A.1.5. RUN Burn-in Test ........................................................................................ 89
A.1.6. S3.................................................................................................................... 90
A.1.7. S5.................................................................................................................... 90
A.1.8. EuP/ErP Enable S3 ...................................................................................... 91
A.1.9. EuP/ErP Enable S5 ...................................................................................... 91
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EPIAEPIA-M920 User Manual
Lists of Figures
Figure 1: Layout diagram of the EPIA-M920 mainboard (top view) ...................... 7
Figure 2: Mounting holes and dimensions of the EPIA-M920 mainboard............ 2
Figure 3: External I/O port dimensions of the EPIA-M920 mainboard ................. 2
Figure 4: Height distribution of the EPIA-M920 mainboard (for Quad Core
model) ................................................................................................................................. 3
Figure 5: Height distribution of the EPIA-M920 mainboard (for Dual Core
model) ................................................................................................................................. 4
Figure 6: External I/O ports............................................................................................. 5
Figure 7: PS/2 port pinout diagram ............................................................................... 6
Figure 8: HDMI® port pinout diagram........................................................................... 7
Figure 9: COM port pinout diagram.............................................................................. 8
Figure 10: Gigabit Ethernet port pinout diagram ....................................................... 9
Figure 11: Audio jack receptacle stack....................................................................... 10
Figure 12: VGA port pinout diagram .......................................................................... 11
Figure 13: USB port pinout diagram............................................................................ 12
Figure 14: USB 3.0 port pinout diagram..................................................................... 13
Figure 15: ATX power connector ................................................................................ 14
Figure 16: LVDS panel connector................................................................................ 15
Figure 17: LVDS Inverter connector ............................................................................ 18
Figure 18: Digital I/O pin headers ............................................................................... 20
Figure 19: External Thermal Resister........................................................................... 21
Figure 20: Front panel pin header ............................................................................... 22
Figure 21: SMBus pin header ........................................................................................ 24
Figure 22: CPU and System Fan connectors .............................................................. 25
Figure 23: SATA connectors ......................................................................................... 26
Figure 24: USB pin headers ........................................................................................... 27
Figure 25: COM pin headers......................................................................................... 28
Figure 26: PS/2 keyboard and mouse pin header .................................................... 29
Figure 27: Front audio pin header ............................................................................... 30
Figure 28: SPI address select ........................................................................................ 31
Figure 29: SPI pin header ............................................................................................... 32
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EPIAEPIA-M920 User Manual
Figure 30: LPC pin header.............................................................................................. 33
Figure 31: SPDIF connector ........................................................................................... 34
Figure 32: CMOS battery slot....................................................................................... 35
Figure 33: USB 3.0 connectors ..................................................................................... 36
Figure 34: CLEAR CMOS jumper ................................................................................. 37
Figure 35: SATA DOM voltage select jumper.......................................................... 38
Figure 36: COM1 and COM2 voltage select jumper .............................................. 39
Figure 37: COM3 and COM4 voltage select jumper .............................................. 40
Figure 38: VDD Power Select....................................................................................... 41
Figure 39: LVDS jumper settings .................................................................................. 42
Figure 40: DDR3 memory slots .................................................................................... 43
Figure 41: Inserting the memory module................................................................... 44
Figure 42: Locking the memory module .................................................................... 44
Figure 43: Disengaging the SODIMM locking clips ................................................. 45
Figure 44: Removing the memory module ................................................................ 45
Figure 45: PCI Express slot............................................................................................ 46
Figure 46: Suggested minimum chassis dimensions ................................................ 47
Figure 47: Suggested minimum internal chassis ceiling height (for dual core
model) ............................................................................................................................... 48
Figure 48: Suggested minimum internal chassis ceiling height (for quad core
model) ............................................................................................................................... 49
Figure 49: Suggested keepout areas ........................................................................... 50
Figure 50: Illustration of the Main menu screen....................................................... 53
Figure 51: Illustration of the Advanced Settings screen......................................... 55
Figure 52: Illustration of the ACPI Settings screen .................................................. 56
Figure 53: Illustration of S5 RTC Wake Settings screen.......................................... 57
Figure 54: Illustration of CPU Information screen.................................................... 58
Figure 55: Illustration of SATA Configuration screen ............................................. 59
Figure 56: Illustration of F71869 Super IO Configuration screen......................... 60
Figure 57: Illustration of F71869 H/W Monitor screen ........................................... 61
Figure 58: Illustration of Clock Generator Configuration screen ......................... 62
Figure 59: Illustration of On Board Configuration screen ...................................... 63
Figure 60: Illustration of Chipset Settings screen..................................................... 65
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EPIAEPIA-M920 User Manual
Figure 61: Illustration of DRAM Configuration screen ............................................ 66
Figure 62: Illustration of Video Configuration screen ............................................. 69
Figure 63: Illustration of UART Configuration screen ............................................. 71
Figure 64: Illustration of PMU_ACPI Configuration screen .................................... 72
Figure 65: Illustration of Other Control screen........................................................ 73
Figure 66: Illustration of HDAC Configuration screen ............................................ 74
Figure 67: Illustration of SDIO_CR Configuration screen....................................... 75
Figure 68: Illustration of Others Configuration screen ........................................... 77
Figure 69: Illustration of Boot Settings screen.......................................................... 78
Figure 70: Illustration of Security Settings screen.................................................... 80
Figure 71: Illustration of Save & Exit Options screen ............................................. 82
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EPIAEPIA-M920 User Manual
Lists of Tables
Table 1: PS/2 port pinout ................................................................................................ 6
Table 2: HDMI® port pinout ........................................................................................... 7
Table 3: COM port pinout .............................................................................................. 8
Table 4: Gigabit Ethernet port pinout .......................................................................... 9
Table 5: Gigabit Ethernet LED color definition .......................................................... 9
Table 6: Audio jack receptacle pinout....................................................................... 10
Table 7: VGA port pinout ............................................................................................. 11
Table 8: USB port pinout............................................................................................... 12
Table 9: USB 3.0 port pinout........................................................................................ 13
Table 10: ATX power connector pinout ................................................................... 14
Table 11: LVDS1 panel pinout..................................................................................... 16
Table 12: LVDS2 panel pinout..................................................................................... 17
Table 13: LVDS Inverter connector pinout................................................................ 19
Table 14: Digital I/O pin headers pinout................................................................... 20
Table 15: External thermal resister pinout................................................................ 21
Table 16: Front panel pin header pinout................................................................... 23
Table 17: SMBus pin header pinout............................................................................ 24
Table 18: CPU and System Fan connector pinouts ................................................. 25
Table 19: SATA connector pinouts............................................................................. 26
Table 20: USB pin header pinouts............................................................................... 27
Table 21: COM pin header pinout.............................................................................. 28
Table 22: PS/2 keyboard and mouse pin header pinout........................................ 29
Table 23: Front audio pin header pinout................................................................... 30
Table 24: SPI address select pinout............................................................................ 31
Table 25: SPI pin header pinout .................................................................................. 32
Table 26: LPC pin header pinout................................................................................. 33
Table 27: SPDIF connector pinout .............................................................................. 34
Table 28: CMOS battery slot pinout .......................................................................... 35
Table 29: USB 3.0 connector pinout........................................................................... 36
Table 30: CLEAR CMOS jumper settings................................................................... 37
Table 31: SATA DOM voltage select jumper settings ........................................... 38
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EPIAEPIA-M920 User Manual
Table 32: COM1 and COM2 voltage select jumper settings ............................... 39
Table 33: COM3 and COM4 voltage select jumper settings ............................... 40
Table 34: VDD Power Select pinout .......................................................................... 41
Table 35: LVDS jumper settings................................................................................... 42
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EPIAEPIA-M920 User Manual
1. Product Overview
The VIA EPIA-M920 Mini-ITX mainboard is a high performance native x86
mainboard designed mainly for embedded, POS, Kiosk, ATM and digital media
application. It can also be used for various domain applications such as
desktop PC, industrial PC, etc. The mainboard is based on the VIA VX11H
MSPIII (Media System Processor) chipset that features the VIA Chrome™ 640
DX11 with 2D/3D graphics and video accelerators for rich digital media
performance.
The VIA EPIA-M920 includes a powerful, secure, and efficient VIA Eden™ X2 /
VIA QuadCore processor. The VIA Eden ™ X2 processor includes the VIA
Padlock Security Engine, VIA CoolStream™ Architecture, VIA StepAhead™
Technology Suite, and VIA TwinTurbo™ technology. Whereas the VIA
QuadCore processor includes the VIA AES Security Engine, VIA CoolStream™
Architecture and VIA PowerSaver™ Technology.
The VIA EPIA-M920 has two 1333 MHz DDR3 SODIMM slots that support up
to 16 GB memory size. The VIA EPIA-M920 provides support for high fidelity
audio with its included VIA VT2021 High Definition Audio Codec. In addition
it supports two SATA 3Gb/s storage devices.
The VIA EPIA-M920 is compatible with a full range of Mini-ITX chassis as well
as FlexATX and MicroATX enclosures and power supplies. The VIA EPIAM920 is fully compatible with Microsoft® and Linux operating systems.
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EPIAEPIA-M920 User Manual
1.1. Key Features and Benefits
1.1.1. VIA QuadCore /VIA Eden™ X2 Processor
The VIA QuadCore is a 64-bit superscalar x86 quad core (Isaiah) processor
combine on two dies. It is based on advanced 40 nanometer process
technology packed into an ultra compact NanoBGA2 package measuring
21mm x 21mm. The VIA QuadCore processor delivers a superb performance
on multi-tasking, multimedia playback, productivity and internet browsing in a
low power budget.
The VIA Eden X2 is a 64-bit superscalar x86 dual core processor based on a
40 nanometer process technology. Packed into an ultra compact NanoBGA2
package (measuring 21mm x 21mm), it delivers an energy-efficient yet
powerful performance, with cool and quiet operation.
Note:
For Windows 7 and Windows Server 2008 R2 users only:
If encounter the issue such as the operating system recognize the VIA Dual-Core CPU as two processors
instead of one processor with two cores. Download and install the hotfix released by Microsoft to
address this issue. The downloadable hotfix is available at http://support.microsoft.com/kb/2502664
Both VIA QuadCore and Eden X2 processors are ideal for embedded system
applications such as industrial PCs, test machines, measuring equipment,
digital signage, medical PCs, monitoring systems, gaming machines, in-vehicle
entertainment, etc.
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EPIAEPIA-M920 User Manual
1.1.2. VIA VX11H MSPIII Chipset
The VIA VX11H is the fourth generation, highly integrated Media System
Processor which provides high quality digital video streaming and high
definition video playback. It features the VIA Chrome™ 640 DX11 2D/3D
graphics and video processor, High Definition video decoder and supports
DDR3 1333 controller and USB 3.0 interface.
The VIA VX11H offers superb-graphics performance, immersive visual
experience, and supports DirectX 11.0 that allows realistic 3D rendering and
increased visual acuity. It is also based on a highly sophisticated power
efficient architecture that enables such rich integration into a compact package.
1.1.3. Modular Expansion Options
The VIA EPIA-M920 ensures long-term usability with its support for industry
standard expansion options. Its support for legacy PCI expansion cards helps
to smooth and reduce the costs of transitioning to newer expansion
technologies. The VIA EPIA-M920 enables companies to slowly roll out
upgrades as necessary instead of having to replace everything all at once. This
ensures that companies using the EPIA-M920 obtain the maximum benefits
from its past investments in PCI expansion cards.
The VIA EPIA-M920 also includes a 4-Lane PCI Express 2.0 expansion slot that
provides protection against obsolescence.
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EPIAEPIA-M920 User Manual
1.2. Product Specifications
Processor
 VIA Nano X4 1.2GHz+ with fansink (27.5W)
 VIA Eden X2 1.0GHz+ fanless
 7 bit VID
Chipset
 VIA VX11H MSPIII 33 x 33mm
System Memory
 2 x DDR3 1333 SODIMM
 Supports up to 16 GB memory size
Note:
The real memory size may show less than 16GB due to some capacity are used for BIOS or other
functions.
VGA
™
 Integrated VIA Chrome 640 HD DX11 3D/2D graphics with MPEG2, WMV9/VC1,
H.264 decoding acceleration
Onboard Peripherals
 Serial ATA
2 SATA connectors
 Onboard LAN
2 x VIA VT6130 PCIe Gigabit Ethernet Controller
 Onboard Audio
VIA VT2021 High Definition Audio Codec
 Onboard Super I/
I/O
Fintek F71869E
Onboard I/O Connectors
 2 x USB 2.0 pin headers for 4 ports
 1 x USB3.0 pin header for 1 port
 2 x SATA connectors
 2 x SATA DOM Power selectors
 1 x Dual channel 18/24-bit LVDS (DVP, VT1636)
 1 x Single channel 18/24-bit LVDS (VX11H internal)
 2 x Backlight control connectors for inverter power and brightness control
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EPIAEPIA-M920 User Manual














1 x Front audio pin header (Line-out/MIC-in)
1 x PS/2 keyboard/mouse pin header
3 x RS232 pin header (2 from VX11H, configurable 5V/12V)
1 x LPC pin header
1 x SMBus pin header
1 x S/PDIF Out connector
1 x Digital I/O pin headers (GPI x 4, GPO x 4)
1 x Front panel pin header
2 x Smart Fan pin headers for CPU and System
1 x ATX power connector
1 x PCIex4 slot
1 x SD card (SDHC/SDXC)
1 x SPI
1 x Clear CMOS
Back Panel I/O
 1 x Serial port (powered with selectable 5V/12V) + VGA port
®
 2 x HDMI ports
 1 x GigaLAN port + 2 x USB3.0 ports
 1 x GigaLAN port + 2 x USB2.0 ports
 3 x Audio jacks: Line-in, Line-out and MIC-in
 2 x PS/2 KB/MS ports
I/O Bracket
 Standard
BIOS
 AMI BIOS ROM APTIO uEFI 4MB
Operating System
 Windows 7
 Windows Embedded Standard 7
 Windows Embedded POSReady 7
 Windows XP
 Windows Embedded Standard
 Linux
Power
 ATX Power connector
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EPIAEPIA-M920 User Manual
System Monitoring & Management
 Wake-on-LAN
 Keyboard Power-on
 Timer Power-on
 System power management
 AC power failure recovery
 Watch Dog Timer
Operating Conditions
 Operating Temperature
0°C up to 60°C
 Operating Humidity
0% ~ 95% (relative humidity; non-condensing)
Form Factor
 Mini-ITX (8-layer)
 17 cm x 17 cm
Compliance
 CE
 FCC
 BSMI
 RoHS
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EPIAEPIA-M920 User Manual
1.3. Layout Diagram
Figure 1: Layout diagram of the EPIAEPIA-M920 mainboard (top view)
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EPIAEPIA-M920 User Manual
Item
Description
1
PS/2 keyboard and mouse pin header (JKBMS)
2
SMBus pin header (SMBUS1)
3
Digital I/O pin headers (DIO1)
4
VDD Power Select jumper (J9)
5
COM4 pin header
6
Front panel pin header (F_PANEL)
7
LVDS1 power select jumper (J14)
8
LVDS2 power select jumper (J15)
9
LVDS inverter connectors (INVERTER2)
10
LVDS inverter connectors (INVERTER1)
11
LVDS connectors (LVDS2)
12
LVDS connectors (LVDS1)
13
COM3 pin header
14
LPC pin header (LPC1)
15
System fan connector (SYSFAN)
16
VIA VX11H chipset
17
Memory slots (SODIMM2)
18
Memory slots (SODIMM1)
19
ATX power supply connector (ATX_POWER2)
20
CPU fan Connector (CPUFAN)
21
VIA Nano X4/ VIA Eden X2 CPU
22
USB pin header (USB_1)
23
USB pin header (USB_2)
24
PCIE x4 slot
25
Front audio pin header (F_AUDIO1)
26
SPDIF connector (SPDIF1)
27
SATA connector (SATA1)
28
SATA connector (SATA2)
29
SATA DOM power select jumper (J12)
30
Clear CMOS jumper (J10)
31
CMOS battery socket (BAT1)
32
USB3.0 Connector (J8)
33
COM3 and COM4 Voltage Select Jumper (J13)
34
COM1 and COM2 Voltage Select Jumper (J11)
35
External Thermal Resister jumper (J7)
36
SPI1 pin header
37
SPI Address Select jumper (J6)
38
COM2 pin header
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EPIAEPIA-M920 User Manual
1.4. Product Dimensions
Figure 2: Mounting holes and
and dimensions of the EPIAEPIA-M920 mainboard
Unit: mm
Figure 3: External I/O port dimensions of the EPIAEPIA-M920 mainboard
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EPIAEPIA-M920 User Manual
1.5. Height Distribution
Figure 4: Height distribution of the EPIAEPIA-M920 mainboard (for Quad
Quad Core model)
model)
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EPIAEPIA-M920 User Manual
Figure 5: Height distribution of the EPIAEPIA-M920 mainboard (for Dual Core model)
model)
Note:
All other heights are under 21.00 mm.
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EPIAEPIA-M920 User Manual
2. I/O Interface
The VIA EPIA-M920 has a wide selection of interfaces integrated into the
board. It includes a selection of frequently used ports as part of the external
I/O coastline.
2.1. External I/O Ports
Figure 6: External I/O ports
Item
Description
1
PS/2 mouse port
2
HDMI1 port
3
HDMI2 port
4
COM1 port
5
Gigabit Ethernet ports
6
Line-in 3.5 mm TRS jack
7
Line-out 3.5 mm TRS jack
8
PS/2 keyboard port
9
VGA port
10
USB 3.0 ports
11
USB 2.0 ports
12
Microphone 3.5 mm TRS jack
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EPIAEPIA-M920 User Manual
2.1.1. PS/2 Port
The mainboard has two integrated PS/2 ports for keyboard and mouse. Each
port is using the 6-pin Mini-DIN connector. The color purple is used for a PS/2
keyboard while the color green is used for a PS/2 mouse. The pinout of the
PS/2 port are shown below.
Pin
Signal
1
Data
2
NC
3
Ground
4
+5V
5
Clock
6
NC
5
6
4
3
2
1
Table 1: PS/2 port pinout
Figure 7: PS/2 port pinout diagram
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EPIAEPIA-M920 User Manual
2.1.2. HDMI® Port
The integrated 19-pin HDMI® port uses an HDMI® Type A receptacle
connector as defined in the HDMI® specification. The HDMI® (High Definition
Multimedia Interface) port is for connecting the high definition video and
digital audio. It allows you to connect the digital video devices which utilize a
high definition video signal. The pinout of the HDMI® port is shown below.
Figure 8: HDMI® port pinout diagram
Pin
Signal
Pin
Signal
1
TX2+
2
Ground
3
TX2-
4
TX1+
5
Ground
6
TX1-
7
TX0+
8
Ground
9
TX0-
10
TXC+
11
Ground
12
TXC-
13
key
14
key
15
DDCSCL
16
DDCSDA
17
Ground
18
+5V
19
Hot Plug Detect
Table
Table 2: HDMI® port pinout
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EPIAEPIA-M920 User Manual
2.1.3. COM Port
The integrated 9-pin COM port uses a male DE-9 connector. The COM
(COM1) port supports the RS-232 standard. The pinout of the COM port is
shown below.
Figure 9: COM
COM port pinout diagram
Pin
Signal
Pin
Signal
1
DCD
6
DSR
2
RxD
7
RTS
3
TxD
8
CTS
4
DTR
9
RI
5
GND
Table 3: COM port pinout
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EPIAEPIA-M920 User Manual
2.1.4. RJ45 LAN port: Gigabit Ethernet
The integrated 8-pin Gigabit Ethernet port is using an 8 Position 8 Contact
(8P8C) receptacle connector (commonly referred to as RJ45). The pinout of
the Gigabit Ethernet port is shown below.
Pin
Signal
1
Signal pair 1+
2
Signal pair 1-
3
Signal pair 2+
4
Signal pair 3+
5
Signal pair 3-
6
Signal pair 2-
7
Signal pair 4+
8
Signal pair 4-
Table 4: Gigabit Ethernet port pinout
Figure 10:
10: Gigabit Ethernet port pinout diagram
There are two RJ-45 ports and each port has two individual LED indicators
located on the front side to show its Active/Link status and Speed status.
Link Off
Active LED
(Left LED on RJRJ-45 connector)
Link LED
(Right LED on RJRJ-45 connector)
Off
The LED is always On in Orange color
Speed_10Mbit
Flash in Green color
The LED is always On in Orange color
Speed_100Mbit
Flash in Green color
The LED is always On in Green color
Speed_1000Mbit
Flash in Green color
The LED is always On in Red color
Table 5: Gigabit Ethernet LED color definition
definition
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EPIAEPIA-M920 User Manual
2.1.5. Audio Ports
There are three audio jack receptacles integrated into a single stack on the I/O
coastline. Each receptacle can fit a 3.5 mm Tip Ring Sleeve (TRS) connector to
enable connections to Line-in, Line-out, and MIC-in.
Wiring
LineLine-in
LineLine-out
MICMIC-in
Tip
Left channel in
Left channel
Left channel
Ring
Right channel in
Right channel
Right channel
Sleeve
Ground
Ground
Ground
Table 6: Audio jack receptacle pinout
Figure 11:
11: Audio jack receptacle stack
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EPIAEPIA-M920 User Manual
2.1.6. VGA Port
The integrated 15-pin VGA port uses a female DE-15 connector. The VGA
port is for connecting to analog displays. The pinout of the VGA port is shown
below.
Figure 12:
12: VGA port pinout diagram
Pin
Signal
1
RED
2
GREEN
3
BLUE
4
NC
5
Ground
6
Ground
7
Ground
8
Ground
9
+5V
10
NC
11
NC
12
SDA
13
HSync
14
VSync
15
SCL
Table 7: VGA port pinout
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EPIAEPIA-M920 User Manual
2.1.7. USB 2.0 Port
There are two integrated USB 2.0 ports in EPIA-M920 mainboard. The USBinterface port gives complete Plug and Play and hot swap capability for
external devices and it complies with USB UHCI, rev. 2.0. Each USB port is
using the USB Type A receptacle connector. The pinout of the typical USB
port is shown below.
Pin
Signal
1
+5VSUS
2
Data-
3
Data+
4
Ground
Table 8: USB port pinout
Figure 13:
13: USB port pinout diagram
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EPIAEPIA-M920 User Manual
2.1.8. USB 3.0 Port
The EPIA-M920 mainboard provides two USB 3.0 ports, also known as
SuperSpeed USB. The USB 3.0 port has a maximum data transfer rate up to 5
Gbps and offers a backwards compatible with previous USB 2.0 specifications.
The USB 3.0 port is using the USB Type-A receptacle connector. The pinout of
the typical USB 3.0 port is shown below.
Figure 14:
14: USB 3.0 port pinout diagram
Pin
Signal
1
+5V
2
Data-
3
Data+
4
GND
5
Rx-
6
Rx+
7
GND
8
Tx-
9
Tx+
Table 9: USB 3.0 port pinout
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EPIAEPIA-M920 User Manual
2.2. Onboard Connectors
2.2.1. ATX Power Connector
The mainboard has a 20-pin ATX power connector onboard. The ATX power
connector is labeled as “ATX_POWER1”. The pinout of the ATX power
connector is shown below.
Figure 15:
15: ATX power connector
Pin
Signal
Pin
Signal
1
+3.3V
11
+3.3V
2
+3.3V
12
-12V
3
Ground
13
Ground
4
+5V
14
PS_ON
5
Ground
15
Ground
6
+5V
16
Ground
7
Ground
17
Ground
8
PW-OK
18
-5V
9
+5VSUS
19
+5V
10
+12V
20
+5V
Table 10:
10: ATX power connector pinout
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EPIAEPIA-M920 User Manual
2.2.2. LVDS panel connectors
The mainboard has two LVDS panel connectors: LVDS1 and LVDS2. LVDS1
connector is controlled by VIA VX11H chipset while the LVDS2 connector is
controlled by VT1636 LVDS transmitter.
Figure 16:
16: LVDS panel connector
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EPIAEPIA-M920 User Manual
Pin
Signal
Pin
Signal
M1
GND
2
PVDD1
1
NC
4
PVDD1
3
NC
6
GND
5
GND
8
GND
7
NC
10
-LD1C0
9
NC
12
+LD1C0
11
GND
14
GND
13
NC
16
-LD1C1
15
NC
18
+LD1C1
17
GND
20
GND
19
NC
22
-LD1C2
21
NC
24
+ LD1C2
23
GND
26
GND
25
NC
28
-LCLK1
27
NC
30
+ LCLK1
29
NC
32
GND
31
GND
34
-LD1C3
33
NC
36
+ LD1C3
35
NC
38
LVDSPCLK
37
NC
40
LPDSPD
39
NC
Table 11:
11: LVDS1 panel pinout
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EPIAEPIA-M920 User Manual
Pin
Signal
Pin
Signal
M1
GND
2
PVDD2
1
-A4_L
4
PVDD2
3
A4_L
6
GND
5
GND
8
GND
7
-A5_L
10
-A0_L
9
A5_L
12
A0_L
11
GND
14
GND
13
-A6_L
16
-A1_L
15
A6_L
18
A1_L
17
GND
20
GND
19
-CLK2_L
22
-A2_L
21
CLK2_L
24
A2_L
23
GND
26
GND
25
-A7_L
28
-CLK1_L
27
A7_L
30
CLK1_L
29
NC
32
GND
31
NC
34
-A3_L
33
NC
36
A3_L
35
NC
38
DVPSPCLK
37
NC
40
DVPSPD
39
NC
Table 12:
12: LVDS
LVDS2 panel pinout
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EPIAEPIA-M920 User Manual
2.2.3. LVDS Inverter Connector
The mainboard has two inverters for controlling the LVDS panel backlight and
brightness. INVERTER1 corresponds to the LVDS1 panel connector.
INVERTER2 corresponds to the LVDS2 panel connector.
Figure 17:
17: LVDS Inverter connector
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EPIAEPIA-M920 User Manual
Inverter 1
Inverter 2
Pin
Signal
Pin
Signal
1
INV1_12
1
IVDD2
2
INV1_12
2
IVDD2
3
BLON1
3
BAKLITE
4
VX11PWM_CTL1
4
VX11PWM_CTL2
5
BLON1
5
BAKLITE
6
BRIGHTNESS1_CTL1
6
BRIGHTNESS2_CTL2
7
GND
7
GND
8
GND
8
GND
Table 13:
13: LVDS Inverter connector pinout
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EPIAEPIA-M920 User Manual
2.2.4. Digital I/O pin headers
The mainboard includes one Digital I/O pin header that supports four GPO
and four GPI pins.
Figure 18:
18: Digital I/O pin headers
DIO 1
Pin
Signal
Pin
Signal
1
5V_DIO
2
12V_DIO
3
GPO_37
4
GPI_53
5
GPO_36
6
GPI_52
7
GPO_35
8
GPI_51
9
GPO_34
10
GPI_50
11
GND
Table 14:
14: Digital I/O pin headers pinout
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EPIAEPIA-M920 User Manual
2.2.5. External Thermal Resister
The mainboard supports a pin header (3-pin) that allows the connection of a
temperature sensor cable for detecting the system’s internal air temperature.
The temperature reading can be seen in the BIOS Setup Utility. The pin header
is labeled as “J7”. The pinout of the temperature sensor pin header is shown
below.
Figure 19:
19: External Thermal Resister
J7
Pin
Signal
1
TMPIN2
2
TMPIN2
3
HWMGND
Table 15:
15: External thermal resister pinout
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EPIAEPIA-M920 User Manual
2.2.6. Front Panel Pin Header
The front panel pin header consists of 15 pins in a 16-pin block. Pin 15 is
keyed. The front panel pin header is labeled as “F_PANEL1”. It provides access
to system LEDs, power, reset, system speaker and HDD LED. The pinout of the
front panel pin header is shown below.
Figure 20:
20: Front panel pin header
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EPIAEPIA-M920 User Manual
Pin
Signal
Pin
Signal
1
+5VDUAL
2
+3.3V
3
+5VDUAL
4
SATA_LED
5
PWR_LED
6
PWR_BTN
7
+5V
8
Ground
9
NC
10
-RST_SW
11
NC
12
Ground
13
SPEAK
14
+5V
15
—
16
-SLEEPLED
Table 16:
16: Front panel pin header pinout
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EPIAEPIA-M920 User Manual
2.2.7. SMBus Pin Header
The SMBus pin header consists of three pins that allow connecting the SMBus
devices. Devices communicate with a SMBus host and/or other SMBus devices
using the SMBus interface. It is labeled as “SMBUS”. The pinout of the SMBus
pin header is shown below.
Pin
Signal
1
SMBCK
2
SMBDT
3
Ground
Table 17:
17: SMBus pin header pinout
Figure 21:
21: SMBus pin header
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EPIAEPIA-M920 User Manual
2.2.8. CPU and System Fan Connectors
There are two fan connectors on board: one for the CPU and one for the
chassis. The fan connector for the CPU is labeled as “CPUFAN1” and the fan
connector for the system is labeled as “SYSFAN1”. The fans provide variable
fan speeds controlled by the BIOS. The pinout of the fan connectors is shown
below.
CPU fan (CPUFAN1)
Pin
Signal
1
F_I01
2
F_PWM1
3
Ground
System fan (SYSFAN1)
Pin
Signal
1
F_I02
2
F_PWM2
3
Ground
Table 18:
18: CPU and System Fan connector pinouts
pinouts
Figure 22:
22: CPU and System Fan connectors
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EPIAEPIA-M920 User Manual
2.2.9. SATA Connectors
The two SATA connectors on board can support up to 3 Gb/s transfer speeds.
The SATA connectors are labeled as “SATA1” and “SATA2”. The pinout of the
SATA connectors are shown below.
SATA1
Pin
Signal
1
Ground
2
STXP_0
3
STXN_0
4
Ground
5
SRXN_0
6
SRXP_0
7
SATA1_+5V
SATA2
Pin
Signal
1
Ground
2
STXP_1
3
STXN_1
4
Ground
5
SRXN_1
6
SRXP_1
7
SATA2_+5V
Table 19:
19: SATA connector
connector pinouts
Figure 23:
23: SATA connectors
Note:
If users want to use the SATA Disk-on-Module flash drive on the board, please use the SATA2 connector.
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EPIAEPIA-M920 User Manual
2.2.10.
USB 2.0 Pin Headers
The mainboard has two USB 2.0 pin header blocks that support up to four USB
2.0 ports. The pin header blocks are labeled as “USB_1”and “USB_2. The
pinout of the USB pin headers are shown below.
Figure 24:
24: USB pin headers
USB_1
USB_1
Pin
Signal
Pin
Signal
1
+5CDUAL
2
+5CDUAL
3
USBD_T1-
4
USBD_T0-
5
USBD_T1+
6
USBD_T0+
7
Ground
8
Ground
—
10
Ground
9
USB_2
USB_2
Pin
Signal
Pin
Signal
1
+5CDUAL
2
+5CDUAL
3
USBD_T3-
4
USBD_T2-
5
USBD_T3+
6
USBD_T2+
7
Ground
8
Ground
9
—
10
Ground
Table 20:
20: USB pin header
header pinouts
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EPIAEPIA-M920 User Manual
2.2.11.
COM Pin Header for COM2~COM4
There are a total of three COM pin headers on the mainboard. Each COM pin
header supports the RS-232 standard. The pin headers are labeled as “COM2”,
“COM3”, and “COM4”. All of the COM pin headers can support +5V or +12V.
The pinout of the COM pin headers are shown below.
Figure 25:
25: COM pin headers
Pin
Signal
Pin
Signal
1
COM_DCD
2
COM_RXD
3
COM_TXD
4
COM_DTR
5
Ground
6
COM_DSR
7
COM_RTS
8
COM_CTS
9
COM_RI
10
—
Table 21:
21: COM pin header pinout
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EPIAEPIA-M920 User Manual
2.2.12.
PS/2 Keyboard and Mouse Pin Header
The mainboard has a pin header for a PS/2 keyboard and mouse. The pin
header is labeled as “JKBMS”. The pinout of the pin header is shown below.
Figure 26:
26: PS/2
PS/2 keyboard and mouse pin header
Pin
Signal
Pin
Signal
1
VCCE
2
Ground
3
KBCK
4
KBDT
5
EKBCLK
6
EKBDATA
7
MSCK
8
MSDT
9
EMSCLK
10
EMSDATA
Table 22:
22: PS/2 keyboard and mouse pin header pinout
Note:
When the pin header is not in use, please short pin 3&5, pin 4&6, pin 7&9 and pin 8&10
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EPIAEPIA-M920 User Manual
2.2.13.
Front Audio Pin Header
In addition to the TRS audio jacks on the external I/O coastline, the mainboard
has a pin header for Line-Out and MIC-In. The pin header is labeled as
“F_AUDIO1”. The pinout of the pin header is shown below.
Figure 27:
27: Front audio pin header
Pin
Signal
Pin
Signal
1
MIC2IN_L
2
AGND
3
MIC2IN_R
4
AGND
5
HPOUTR
6
MIC2_JD
7
F_AUDIO_SENSE
8
—
9
HPOUTL
10
HPOUT_JD
Table 23:
23: Front audio pin header pinout
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EPIAEPIA-M920 User Manual
2.2.14.
SPI address select
The connector is labeled as “J6”. The pinout of the SPI address select is shown
below.
Figure 28:
28: SPI address select
Pin
Signal
1
MSPISS0
2
MSPISA
3
MSPISS1
Table 24:
24: SPI
SPI address select pinout
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EPIAEPIA-M920 User Manual
2.2.15.
SPI Pin Header
The mainboard has one 8-pin SPI pin header. The SPI (Serial Peripheral
Interface) pin-header is used to connect to the SPI BIOS programming fixture.
The pin header is labeled as “SPI1”. The pinout of the pin header is shown
below.
Figure 29:
29: SPI pin header
Pin
Signal
Pin
Signal
1
SPIVCC
2
Ground
3
MSPISA
4
MSPICLK
5
MSPIDI
6
MSPIDO
7
—
8
-PCIRST
Table 25:
25: SPI pin header pinout
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EPIAEPIA-M920 User Manual
2.2.16.
LPC Pin Header
The mainboard has one LPC pin header for connecting LPC devices. The pin
header is labeled as “LPC”. The pinout of the pin header is shown below.
Figure 30:
30: LPC pin header
Pin
Signal
Pin
Signal
1
LPCAD1
2
LPC33CLK
3
-LPCRST
4
Ground
5
LPCAD0
6
LPC48CLK
7
LPCAD2
8
-LPCFRAME
9
SERIRQ
10
LPCAD3
11
-LPCDRQ1
12
-EXTSMI
13
+5V
14
+3.3V
15
+5V
16
+3.3V
17
Ground
18
Ground
19
Ground
Table 26:
26: LPC pin header pinout
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EPIAEPIA-M920 User Manual
2.2.17.
SPDIF Connector
The mainboard has one 3-pin SPDIF (Sony Philips Digital Interface) connector.
The SPDIF output provides digital audio to external speakers or compressed
AC3 data to an external Dolby Digital Decoder. The connector is labeled as
“SPDIF”. The pinout of the connector is shown below.
Figure 31:
31: SPDIF connector
Pin
Signal
1
+5V
2
SPDIFO
3
GND
Table 27:
27: SPDIF connector pinout
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EPIAEPIA-M920 User Manual
2.2.18.
CMOS Battery Slot
The mainboard is equipped with a CMOS battery slot, which is compatible
with CR2032 coin batteries. The CMOS battery slot is labeled as “BAT2”.
When inserting a CR2032 coin battery, be sure that the positive side is facing
the locking clip.
Figure 32:
32: CMOS battery slot
Pin
Signal
1
Ground
2
+3V
Table
Table 28:
28: CMOS battery slot pinout
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EPIAEPIA-M920 User Manual
2.2.19.
USB3.0 Connector
The mainboard has onboard USB connector that enables additional USB 3.0
connector. The connector is labeled as “J8”. The pinout of the USB connector
is shown below.
Figure 33:
33: USB 3.0 connectors
Pin
Signal
Pin
1
-USBH OC8
2
Signal
USBSSRX_N2
3
USBSSRX_P2
4
GND
5
USBSSTX_N2
6
USBSSTX_P2
7
GND
8
USBHP_N8
9
USBHP_P8
10
_
11
_
12
_
13
GND
14
_
15
_
16
GND
17
_
18
_
19
+5VSUS
Table 29:
29: USB 3.0
3.0 connector pinout
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EPIAEPIA-M920 User Manual
3. Jumpers
3.1. Clear CMOS Jumper
The onboard CMOS RAM stores system configuration data and has an onboard
battery power supply. To reset the CMOS settings, set the jumper on pins 2
and 3 while the system is off. Return the jumper to pins 1 and 2 afterwards.
Setting the jumper while the system is on will damage the mainboard. The
default setting is on pins 1 and 2.
Figure 34:
34: CLEAR CMOS jumper
Setting
Pin 1
Pin 2
Pin 3
Regular (default)
On
On
Off
Clear CMOS
Off
On
On
Table 30:
30: CLEAR CMOS jumper settings
Note:
Except when clearing the RTC RAM, never remove the cap from the CLEAR_CMOS jumper default
position. Removing the cap will cause system boot failure. Avoid clearing the CMOS while the system
is on; it will damage the mainboard.
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EPIAEPIA-M920 User Manual
3.2. SATA DOM Power Select Jumper
The SATA connectors can be used to support Disk-on-Module flash drives.
The power for SATA DOM is controlled by the jumper labeled as “J12”.When
the jumpers are set, +5V will be delivered to the 7th pin of the SATA
connectors. The jumper settings are shown below.
Figure 35:
35: SATA DOM voltage select jumper
SATA1 Setting
Pin 2
Pin 4
DOM support
On
On
Pin 6
Off
Regular (default)
Off
On
On
Pin 5
SATA2 Setting
Pin 1
Pin 3
DOM support
On
On
Off
Regular (default)
Off
On
On
Table 31:
31: SATA DOM voltage select jumper settings
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EPIAEPIA-M920 User Manual
3.3. COM1 and COM2 Voltage Select Jumper
The voltage for COM1 and COM2 is controlled by the jumper labeled as
“J11”. The voltage can be either +5V or +12V. +5V is the default setting. The
odd pin numbers correspond to COM1. The even pin numbers correspond to
COM2. The jumper settings are shown below.
Figure 36:
36: COM1
COM1 and COM2
COM2 voltage select jumper
COM1 Setting
Pin 1
Pin 3
Pin 5
+5V (default)
On
On
Off
+12V
Off
On
On
COM2 Setting
Pin 2
Pin 4
Pin 6
+5V (default)
On
On
Off
+12V
Off
On
On
Table 32:
32: COM1
COM1 and COM2
COM2 voltage select jumper settings
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EPIAEPIA-M920 User Manual
3.4. COM3 and COM4 Voltage Select Jumper
The voltage for COM3 and COM4 is controlled by the jumper labeled as
“J13”. The voltage can be either +5V or +12V. +5V is the default setting. The
odd pin numbers correspond to COM3. The even pin numbers correspond to
COM4. The jumper settings are shown below.
Figure 37:
37: COM3
COM3 and COM4
COM4 voltage select jumper
COM3
COM3 Setting
Pin 2
Pin 4
Pin 6
+5V (default)
On
On
Off
+12V
Off
On
On
COM4
COM4 Setting
Pin 1
Pin 3
Pin 5
+5V (default)
On
On
Off
+12V
Off
On
On
Table 33:
33: COM3
COM3 and COM4
COM4 voltage select jumper settings
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EPIAEPIA-M920 User Manual
3.4.1. VDD Power Select
The connector is labeled as “J9”. The pinout of the VDD power select is
shown below.
Figure 38:
38: VDD Power Select
Pin
Signal
Signal
1
Ground
2
VDD_VSEL
3
MSPVID
Table 34:
34: VDD Power Select pinout
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3.5. LVDS Jumper Settings
The LVDS connectors and LVDS inverters can operate on different input
voltages. The mainboard has one jumper (J14) that controls the voltage
delivered to the LVDS1 panel connector and input voltage delivered to the
INVERTER1 connector. The mainboard has one jumper (J15) that controls the
voltage delivered to the LVDS2 panel connector and input voltage delivered
to the INVERTER2 connector.
Figure 39:
39: LVDS jumper settings
LVDS1 (J14)
LVDS2 (J15)
Inverter1 power
Pin 1
Pin 3
Pin 5
Inverter2 power
Pin 1
Pin 3
Pin 5
+12V (default)
On
On
Off
+12V (default)
On
On
Off
+5V
Off
On
On
+5V
Off
On
On
LVDS1 power
Pin 2
Pin 4
Pin 6
LVDS2 power
Pin 2
Pin 4
Pin 6
+3.3V (default)
On
On
Off
+3.3V (default)
On
On
Off
+5V
Off
On
On
+5V
Off
On
On
Table 35:
35: LVDS jumper settings
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4. Expansion Slots
4.1. DDR3 Memory Slots
The mainboard provides two DDR3 SODIMM memory slots. The memory slot
can accommodate up to 8 GB of 1333 MHz memory per slot. The memory
slots are labeled as “SODIMM1” and “SODIMM2”. The location of the DDR3
memory slots are shown below.
Figure 40:
40: DDR3 memory slots
slots
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4.1.1. Installing a Memory Module
Step 1
Disengage the locking clasps at both ends of the memory socket. Align the
notch on the bottom of the DDR3 memory module with the notch wedge in
the slot.
Figure 41:
41: Inserting the memory module
Step 2
Slide the DDR3 memory module into the side grooves and push the module
into the socket until the locking clasps snap into the closed position.
Figure 42:
42: Locking the memory module
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4.1.2. Removing a Memory Module
Step 1
Disengage the locking clasps at both ends of the memory socket.
Figure 43:
43: Disengaging the SODIMM locking clips
Step 2
When the locking clips have cleared, the SODIMM memory module will
automatically pop up. Remove the memory module.
Figure 44:
44: Removing the memory module
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4.1.3. PCI Express Slot
The PCI Express slot provides support for 4-lane cards. Due to the orientation
of the slot, a riser card module1 must be used. The location of the PCI Express
slot is shown below.
Figure 45:
45: PCI Express slot
Note:
1. The optional riser card module is PCIE-03. PCIE-03 is a combination riser card that connects to both
the PCI Express and PCI slots.
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5. Hardware Installation
5.1. Installing into a Chassis
The EPIA-M920 can be fitted into any chassis that has the mounting holes for
compatible with the standard Mini-ITX mounting hole locations. Additionally,
the chassis must meet the minimum height requirements for specified areas of
the mainboard. If a riser card module is being used, the chassis will need to
accommodate the additional space requirements.
5.1.1. Suggested minimum chassis dimensions
The figure below shows the suggested minimum space requirements that a
chassis should have in order to work well with the EPIA-M920.
Figure 46:
46: Suggested minimum chassis dimensions
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Each side of the mainboard should have a buffer zone from the internal wall
of the chassis. The side of the mainboard that accommodates the I/O coastline
should have a buffer of 1.00 mm. The side on the opposite end of the I/O
coastline should have a buffer of at least 5.00 mm. The two sides adjacent to
the I/O coastline should have at least a 10.00 mm buffer.
For the side that is close to the PCI slot, the buffer should be at least 100.00
mm if a riser card module will be used.
5.1.2. Suggested minimum chassis height
The figure below shows the suggested minimum height requirements for the
internal space of the chassis. It is not necessary for the internal ceiling to be
evenly flat. What is required is that the internal ceiling height must be strictly
observed for each section that is highlighted. The highest part of the ceiling
will be above the PCI slot.
Figure 47:
47: Suggested minimum internal chassis ceiling height (for dual core model)
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Figure 48:
48: Suggested minimum internal chassis ceiling height (for quad core model)
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5.1.3. Suggested keepout areas
The figure below shows the areas of the mainboard that is highly suggested to
leave unobstructed.
Figure 49:
49: Suggested keepout areas
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6. BIOS Setup Utility
6.1. Entering the BIOS Setup Utility
Power on the computer and press Delete during the beginning of the boot
sequence to enter the BIOS Setup Utility. If the entry point has passed, restart
the system and try again.
6.2. Control Keys
Up
Move up one row
Down
Move down one row
Left
Move to the left in the navigation bar
Right
Move to the right in the navigation bar
Enter
Access the highlighted item / Select the item
Esc
Jumps to the Exit screen or returns to the previous screen
Page up / +1
Increase the numeric value
Page down / -1
Decrease the numeric value
F1
General help2
F5
Restore the previous CMOS value
F7
Load optimized defaults
F10
Save all the changes and exit
Note:
1.
2.
Must be pressed using the 10-key pad.
The General help contents are only for the Status Page and Option Page setup menus.
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6.3. Navigating the BIOS Menus
The main menu displays all the BIOS setup categories. Use the <Left
Left>/<Right
Right>
Left
Right
and <Up
Up>/<Down
Down>
Up
Down arrow keys to select any item or sub-menu. Descriptions
of the selected/highlighted category are displayed at the bottom of the screen.
The small triangular arrowhead symbol next to a field indicates that a submenu is available (see figure below). Press <Enter
Enter>
Enter to display the sub-menu.
To exit the sub-menu, press <Esc
Esc>.
Esc
6.4. Getting Help
The BIOS Setup Utility provides a “General
General Help”
Help screen. This screen can be
accessed at any time by pressing F1.
F1 The help screen displays the keys for
using and navigating the BIOS Setup Utility. Press Esc to exit the help screen.
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6.5. Main Menu
The System Overview screen is the default screen that is shown when the
BIOS Setup Utility is launched. This screen can be accessed by traversing the
navigation bar to the “Main” label.
Figure 50:
50: Illustration of the Main menu screen
6.5.1. BIOS Information
The content in this section of the screen shows the information about the
vendor, the Core version, UEFI specification version, the project version and
date & time of the project build.
6.5.2. Memory Information
This section shows the amount of memory that is installed on the hardware
platform.
6.5.3. System Language
This option allows the user to configure the language that the user wants to
use.
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6.5.4. System Date
This section shows the current system date. Press Tab to traverse right and
Shift+Tab to traverse left through the month, day, and year segments. The +
and - keys on the number pad can be used to change the values. The weekday
name is automatically updated when the date is altered. The date format is
[Weekday, Month, Day, Year].
6.5.5. System Time
This section shows the current system time. Press Tab to traverse right and
Shift+Tab to traverse left through the hour, minute, and second segments. The
+ and - keys on the number pad can be used to change the values. The time
format is [Hour : Minute : Second].
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6.6. Advanced Settings
The Advanced Settings screen shows a list of categories that can provide
access to a sub-screen. Sub-screen links can be identified by the preceding
right-facing arrowhead.
Figure 51:
51: Illustration of the Advanced Settings screen
The Advanced Settings screen contains the following links:
ACPI Settings
S5 RTC Wake Settings
CPU Information
SATA Configuration
F71869 Super IO Configuration
F71869 H/W Monitor
Clock Generator Configuration
On Board Configuration
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6.6.1. ACPI Settings
ACPI grants the operating system direct control over system power
management. The ACPI Configuration screen can be used to set a number of
power management related functions.
Figure 52:
52: Illustration of the ACPI Settings screen
6.6.1.1. Enable Hibernation
Enables or Disables System ability to Hibernate (OS/S4 Sleep State). This
option may be not effective with some OS.
6.6.1.2. ACPI Sleep State
Select ACPI sleep state the system will enter when the SUSPEND button is
pressed. Available options are: Suspend Disabled/S1 only (CPU Stop
Clock)/S3 only (Suspend to RAM)/Both S1 and S3 available for OS to choose
from.
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6.6.2. S5 RTC Wake Settings
Enable system to wake from S5 using RTC alarm.
Figure 53:
53: Illustration of S5
S5 RTC Wake Settings screen
6.6.2.1. Wake system with Fixed Time
This feature has 2 options: Enable or Disable system wake on alarm event.
When enabled, system will wake on the hr:min:sec specified.
6.6.2.2. Wake system with Dynamic Time
This feature has 2 options: Enable or Disable system wake on alarm event.
When enabled, system will wake on the current time + increase minute(s).
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6.6.3. CPU Information
The CPU Information screen shows detailed information about the built-in
processor.
Figure 54:
54: Illustration of CPU Information screen
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6.6.4. SATA Configuration
The SATA Configuration screen allows the user to view and configure the
settings of the SATA configuration settings.
Figure 55:
55: Illustration of SATA Configuration screen
6.6.4.1. SATA Mode
This option allows the user to manually configure SATA controller for a
particular mode.
IDE Mode
Set this value to change the SATA to IDE mode.
AHCI Mode
Set this value to change the SATA to AHCI mode.
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6.6.5. F71869 Super IO Configuration
The F71869 Super IO Configuration screen allows the user to set system Super
IO Chip parameters.
Figure 56:
56: Illustration of F71869 Super IO Configuration screen
6.6.5.1. Serial Port 0 Configuration
Set parameters of Serial Port 0 (COMA).
6.6.5.1.1. Serial Port
This feature has 2 options: Enable or Disable Serial Port (COM).
6.6.5.2. Serial Port 1 Configuration
Configuration
Set parameters of Serial Port 1 (COMB)
6.6.5.2.1. Serial Port
This feature has 2 options: Enable or Disable Serial Port (COM).
6.6.5.2.2. Device Mode
Change the Serial Port mode. Select <High Speed> or <Normal Mode> mode.
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6.6.6. F71869 H/W Monitor
F71869 H/W Monitor shows Monitor hardware status.
Figure 57:
57: Illustration of F71869 H/W Monitor screen
6.6.6.1. CPU Smart Fan Configuration
CPU Smart Fan Configuration Setting
6.6.6.1.1. Smart Fan Support
This feature has 2 options: Enable or Disable Smart Fan.
6.6.6.2. System Smart Fan
Fan Configuration
System Smart Fan Configuration Setting
6.6.6.2.1. Smart Fan Support
This feature has 2 options: Enable or Disable Smart Fan.
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6.6.7. Clock Generator Configuration
The Clock Generator Configuration screen enables access to the Spread
Spectrum Setting feature.
Figure 58:
58: Illustration of Clock Generator Configuration screen
6.6.7.1. CPU Spread Spectrum
The Spread Spectrum Setting feature enables the BIOS to modulate the clock
frequencies originating from the mainboard. The settings are in percentages of
modulation. Higher percentages result in greater modulation of clock
frequencies. This feature has 3 options: Disable, +-0.25% and -0.5%.
6.6.7.2. PCIe Spread Spectrum
Select PCIe Spread Spectrum. This feature has 2 options: Disable and -0.5%.
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6.6.8. On Board Configuration
The OnBoard Device Configuration screen has the following features.
Figure 59:
59: Illustration of On Board Configuration screen
OnBoard Device Configurat
Configuration
6.6.8.1. OnBoard LAN Enable
The OnBoard LAN Enable feature determines whether the onboard LAN
controller will be used or not.
6.6.8.2. S5 Wakeup by PME#
The S5 Wakeup by PME# feature enables the BIOS to allow remote wake-up
from the S5 power off state through the PCI bus.
6.6.8.3. EuP/ErP Lot6 support
The EuP/ErP Lot6 Support feature enables the BIOS to reduce the power draw
to less than 1W when the system is in standby mode. This feature has two
options: enabled and disabled.
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6.6.8.4. 1CH LVDS Backlight Control
Backlight Control
The Backlight Control feature control by VX11H enables the user to control
the brightness of the 1CH LVDS backlight. This feature has six options.
Level
0%, 20%, 40%, 60%, 80% and 100%.
6.6.8.5. 2CH LVDS Backlight Control
Backlight Control
The Backlight Control feature control by VX11H enables the user to control
the brightness of the 2CH LVDS backlight. This feature has six options.
Level
0%, 20%, 40%, 60%, 80% and 100%.
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6.7. Chipset Settings
The Chipset Settings screen shows a list of categories that can provide access
to a sub-screen. Sub-screen links can be identified by the preceding rightfacing arrowhead.
Figure 60:
60: Illustration of Chipset Settings screen
The Chipset Settings screen contains the following links:
DRAM Configuration
Video Configuration
UART Configuration
PMU-ACPI Configuration
HDAC Configuration
SDIO_CR Configuration
Others Configuration
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6.7.1. DRAM Configuration
The DRAM Configuration screen has two features for controlling the system
DRAM. All other DRAM features are automated and cannot be accessed.
Figure 61:
61: Illustration of DRAM Configuration screen
6.7.1.1. DRAM Clock
The DRAM Clock option enables the user to determine how the BIOS handles
the memory clock frequency. The memory clock can either be dynamic or
static. This feature has eleven options.
By SPD
By SPD option enables the BIOS to select a compatible clock frequency for
the installed memory.
400 MHz
The 400 MHz option forces the BIOS to be fixed at 800 MHz for DDR3
memory modules.
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533 MHz
The 533 MHz option forces the BIOS to be fixed at 1066 MHz for DDR3
memory modules.
566 MHz
The 566 MHz option forces the BIOS to be fixed at 1132 MHz for DDR3
memory modules.
600 MHz
The 600 MHz option forces the BIOS to be fixed at 1200 MHz for DDR3
memory modules.
633 MHz
The 633 MHz option forces the BIOS to be fixed at 1266 MHz for DDR3
memory modules.
667 MHz
The 667 MHz option forces the BIOS to be fixed at 1334 MHz for DDR3
memory modules.
700 MHz
The 700 MHz option forces the BIOS to be fixed at 1400 MHz for DDR3
memory modules
733 MHz
The 733 MHz option forces the BIOS to be fixed at 1466 MHz for DDR3
memory modules
766 MHz
The 766 MHz option forces the BIOS to be fixed at 1532 MHz for DDR3
memory modules
800 MHz
The 800 MHz option forces the BIOS to be fixed at 1600 MHz for DDR3
memory modules
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6.7.1.2. VGA Share Memory (Frame
(Frame Buffer)
The VGA Share Memory feature enables the user to choose the amount of the
system memory to reserve for use by the integrated graphics controller. The
selections of memory amount that can be reserved are 256MB and 512MB.
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6.7.2. Video Configuration
The Video Configuration screen has features for controlling the integrated
graphics controller in the VX11H chipset.
Figure 62:
62: Illustration of Video Configuration screen
6.7.2.1. Dual VGA Enable
This feature has 2 options: Enable/Disable Dual VGA.
6.7.2.2. Primary Graphics Adapter
The Primary Graphics Adapter option enables the user to change the order in
which the BIOS seeks for a graphics adapter. There are three paths that can be
chosen.
PCIE & PCI -> UMA
UMA -> PCIE & PCI
6.7.2.3. Select Display Device Control
Control
Available selections are: Auto and Manual.
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6.7.2.4. Select Display Device 1 and 2
The Select Display Device feature enables the user to choose a specific
display interface. This feature has four options: CRT, LCD, LCD2, HDMI and
HDMI2. If both Select Display Device 1 and Select Display Device 2 are set to
the same interface, then any display device connected to the other interface
will not function. For example, if both Select Display 1 and 2 are set to CRT,
then no data will be sent to the LCD, LCD2, HDMI and HDMI2 port.
6.7.2.5. Panel Type
The Panel Type feature enables the user to specify the resolution of the display
being used with the system. The panel types are predefined in the VGA VBIOS.
Panel Type
Resolution
Panel Type
Resolution
00
640 x 480
08
800 x 480
01
800 x 600
09
1024 x 600
02
1024 x 768
10
1366 x 768
03
1280 x 768
11
1600 x 1200
04
1280 x 1024
12
1680 x 1050
05
1400 x 1050
13
1920 x 1200
06
1440 x 900
14
1920 x 1080
07
1280 x 800
15
1024 x 576
6.7.2.6. Panel Type2
The Panel Type feature enables the user to specify the resolution of display 2
being used with the system. The panel types are predefined in the VGA VBIOS.
Panel Type
Resolution
Panel Type
Resolution
00
640 x 480
08
800 x 480
01
800 x 600
09
1024 x 600
02
1024 x 768
10
1366 x 768
03
1280 x 768
11
1600 x 1200
04
1280 x 1024
12
1680 x 1050
05
1400 x 1050
13
1920 x 1200
06
1440 x 900
14
1920 x 1080
07
1280 x 800
15
1024 x 576
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6.7.3. UART Configuration
The UART Configuration screen allows the user to set UART configuration
parameters.
Figure 63:
63: Illustration of UART Configuration screen
6.7.3.1. UART 0 Enable
This feature has 2 options: Enable/Disable UART 0.
6.7.3.2. UART 1 Enable
This feature has 2 options: Enable/Disable UART 1.
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6.7.4. PMU_ACPI Configuration
The PMU_ACPI Configuration screen can be used to set a number of power
management related functions.
Figure 64:
64: Illustration of PMU_ACPI Configuration screen
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6.7.4.1. Other Control
Figure 65:
65: Illustration of Other
Other Control screen
6.7.4.1.1. AC Loss AutoAuto-restart
AC Loss Auto-restart defines how the system will respond after AC power has
been interrupted while the system is on. There are three options.
Power Off
The Power Off option keeps the system in an off state until the power button
is pressed again.
Power On
The Power On option restarts the system when the power has returned.
Last State
The Last State option restores the system to its previous state when the power
was interrupted.
6.7.4.1.2. USB S4 WakeUp
The USB S4 WakeUp enables the system to resume through the USB device
port from S4 state. There are two options: “Enabled” or “Disabled”.
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6.7.5. HDAC Configuration
HDAC Configuration Parameters.
Figure 66:
66: Illustration of HDAC Configuration screen
6.7.5.1. OnChip HDAC Device
Device
This feature has 2 options: Enable or Disable HDAC Control.
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6.7.6. SDIO_CR Configuration
The SDIO_CR Configuration screen can be used to set SDIO_CR configuration
parameters.
Figure 67:
67: Illustration of SDIO_CR
SDIO_CR Configuration screen
6.7.6.1.1. SDIO Host Controller
This feature has 2 options: Enable or Disable SDIO Host controller.
6.7.6.1.2. SDIO Specification Ver3.0 Support
This feature has 2 options: Enable or Disable SDIO Specification Ver3.0
Support.
6.7.6.1.3. Voltage Support 1.8v
This feature has 2 options: Enable or Disable Voltage Support 1.8v.
6.7.6.1.4. High Speed Support
This feature has 2 options: Enable or Disable High Speed Support.
6.7.6.1.5. Driver Type Select
Select Driver Type from Type A Type B, Type C and Type D.
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6.7.6.1.6. SDR50 Support
This feature has 2 options: Enable or Disable SDR50 Support.
6.7.6.1.7. SDR104 Support
This feature has 2 options: Enable or Disable SDR104 Support.
6.7.6.1.8. DDR50 Support
This feature has 2 options: Enable or Disable DDR50 Support.
6.7.6.1.9. SDR50 Tuning Enable
This feature has 2 options: Enable or Disable SDR50 Tuning Enable.
6.7.6.1.10. Timer Count for ReRe-Tuning
SDIO Timer Count for Re-Tuning. Available options are Re-Tuning Timer
Disabled/1 sec/2 sec/4 sec/8 sec/16 sec/32 sec/64 sec/128 sec/256 sec/512
sec/1024 sec/Get information from other source.
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6.7.7. Others Configuration
The Others Configuration screen can be used to set Watchdog Timer
Configuration and Keyboard/Mouse Wakeup Configuration.
Figure 68:
68: Illustration of Others Configuration screen
6.7.7.1. WATCHDOG Timer Enable
When this feature is enabled, an embedded timing device automatically
prompts corrective action upon system malfunction detection.
6.7.7.2. Keyboard/Mouse Wakeup Control
When this feature is enabled, pressing any key of the keyboard or moving the
mouse can wake up the system from suspend.
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6.8. Boot Settings
The Boot Settings screen has a single link that goes to the Boot Configuration,
Configuration,
and Boot Option Priority screens.
Figure 69:
69: Illustration of Boot Settings screen
6.8.1. Boot Configuration
The Boot Settings Configuration screen has several features that can be run
during the system boot sequence.
6.8.1.1. Setup Prompt Timeout
Number of seconds to wait for setup activation key. 65535(0xFFFF) means
indefinite waiting.
6.8.1.2. Bootup
BootupN
upNumLock State
Select the keyboard NumLock state from On and Off.
6.8.1.3. Display
Display Logo
The Display Logo feature hides all of the Power-on Self Test (POST) messages
during the boot sequence. Instead of the POST messages, the user will see an
OEM logo. This feature has two options: enabled and disabled
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6.8.2. Boot Option Priorities
The Boot Option Priorities screen lists all bootable devices.
6.8.2.1. Boot Option #1
Sets the system boot order. This feature has two options: VIA Networking
Bootagent/Disabled.
6.8.3. Network Device BBS Priorities
6.8.3.1. Launch PXE OpROM policy
Do not launch
Prevent the option for Legacy Network Device.
Legacy only
Allow the option for Legacy Network Device.
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6.9. Security Settings
The Security Settings screen provides a way to restrict access to the BIOS or
even the entire system.
Figure 70:
70: Illustration of
of Security Settings screen
6.9.1. Security Settings
6.9.1.1. Administrator Password / User Password
This option is for setting a password for accessing the BIOS setup utility.
When a password has been set, a password prompt will be displayed
whenever the BIOS setup utility is launched. This prevents an unauthorized
person from changing any part of the system configuration.
When a supervisor password is set, the Password Check option will be
unlocked.
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6.9.1.2. Password Check
This feature is compulsory when the Change Supervisor Password
Password option is set.
The user will have up to three chances to enter the correct password before
the BIOS forces the system to stop booting. If the user does not enter the
correct password, the keyboard will also lock up. The only way to get past
this is to do a hard reboot (i.e., use the system reset button or cut off the
power to the system). A soft reboot (i.e., Ctrl+Alt+Del) will not work
because the keyboard will be locked. This feature has two options.
Setup
The Setup option forces users to enter a password in order to access the BIOS
Setup Utility.
Always
The Always option forces users to enter a password in order to boot up the
system.
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6.10. Save & Exit Options
The Save & Exit Configuration screen has the following features:
Figure 71:
71: Illustration of Save & Exit Options screen
6.10.1.
Save Changes and Exit
Save all changes to the BIOS and exit the BIOS Setup Utility. The “F10” hotkey
can also be used to trigger this command.
6.10.2.
Discard Changes and Exit
Exit the BIOS Setup Utility without saving any changes. The “Esc” hotkey can
also be used to trigger this command.
6.10.3.
Save Changes and Reset
Save all changes to the BIOS and reboot the system. The new system
configuration parameters will take effect.
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6.10.4.
Discard Changes and Reset
This command reverts all changes to the settings that were in place when the
BIOS Setup Utility was launched. The “F7” hotkey can also be used to trigger
this command.
Save Options
6.10.5.
Save Changes
Save Changes done so far to any of the setup options.
6.10.6.
Discard Changes
This command reverts all changes to the settings that were in place when the
BIOS Setup Utility was launched.
Boot Override
6.10.7.
VIA Networking Bootagent
6.10.8.
Launch EFI Shell from filesystem device
Attempts to Launch EFI Shell application (Shellx64.efi) from one of the
available filesystem devices.
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7. Driver Installation
7.1. Microsoft Driver Support
The VIA EPIA-M920 mainboard is compatible with Microsoft operating systems.
The latest Windows drivers can be downloaded from the VIA Embedded
website at www.viaembedded.com.
For embedded operating systems, the related drivers can be found in the VIA
Embedded website at www.viaembedded.com.
7.2. Linux Driver Support
The VIA EPIA-M920 mainboard is highly compatible with many Linux
distributions.
Support and drivers are provided through various methods including:
Drivers provided by VIA (binary only). An ARCM or NDA/BSLA may be
asked in order to get the drivers, please contact our sales representative
to submit a request.
Using a driver built into a distribution package
Installing a third party driver (such as the ALSA driver from the
Advanced Linux Sound Architecture project for integrated audio)
For OEM clients and system integrators developing a product for long term
production, other code and resources may also be made available. Contact
VIA Embedded to submit a request.
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Appendix A.
Power Consumption Report
Power consumption tests were performed on the VIA EPIA-M920. The
following tables represent the breakdown of the voltage, amp and wattage
values while running common system applications.
A.1. EPIA-M920 Rev. 2 DVT ATX POWER
The tests were performed based on the following additional components:
CPU: CNQ 1.0G Dual-core (U4200E)
Memory: Transcend DDR3-1333 8GB
HDD: SATA 250G Hitachi
DVD: SONY
A.1.1. Playing DVD – Power DVD 5.0
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
3.102
0.198
0.614
Main Board +5V
4.812
1.566
7.536
Main Board 5VSB
4.771
0.853
4.070
Main Board +12V
11.579
1.079
12.494
Main Board Power Consumption
24.713
MEAN
Measured Voltage
Measured
Measured Amp.
Watts
Main Board +3.3V
3.042
0.184
0.560
Main Board +5V
4.715
1.277
6.021
Main Board 5VSB
4.700
0.845
3.972
Main Board +12V
11.484
0.647
7.430
Main Board Power Consumption
17.982
87
EPIAEPIA-M920 User Manual
A.1.2. Playing MP3-Media Player
MAX
Measured Voltage
Measured Amp.
Watts
Watts
Main Board +3.3V
3.150
0.198
0.624
Main Board +5V
4.873
0.961
4.683
Main Board 5VSB
4.806
0.868
4.172
Main Board +12V
11.652
1.149
13.388
Main Board Power Consumption
22.866
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
3.125
0.189
0.591
Main Board +5V
4.845
0.769
3.726
Main Board 5VSB
4.785
0.843
4.034
Main Board +12V
11.553
0.532
6.146
Main Board Power Consumption
14.496
A.1.3. Running Network Application
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
2.892
0.183
0.529
Main Board +5V
4.774
1.299
6.201
Main Board 5VSB
4.622
2.105
9.729
Main Board +12V
11.444
1.276
14.603
Main Board Power Consumption
31.063
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
2.812
0.161
0.453
Main Board +5V
4.715
1.099
5.182
Main Board 5VSB
4.602
2.097
9.650
Main Board +12V
11.283
1.206
13.607
Main Board Power Consumption
28.892
88
EPIAEPIA-M920 User Manual
A.1.4. IDLE
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
3.124
0.169
0.528
Main Board +5V
4.850
0.711
3.448
Main Board 5VSB
4.783
0.865
4.137
Main Board +12V
11.618
0.450
5.228
Main Board Power Consumption
13.342
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
3.097
0.167
0.517
Main Board +5V
4.834
0.698
3.374
Main Board 5VSB
4.763
0.841
4.006
Main Board +12V
11.504
0.438
5.039
Main Board Power Consumption
12.936
A.1.5. RUN Burn-in Test
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
3.304
0.186
0.615
Main Board +5V
4.719
2.021
9.537
Main Board 5VSB
4.690
0.991
4.648
Main Board +12V
11.489
1.397
16.050
Main Board Power Consumption
30.850
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
2.972
0.178
0.529
Main Board +5V
4.627
1.347
6.233
Main Board +12V
4.622
0.980
4.530
Main Board 5VSB
11.380
1.218
13.861
Main Board Power Consumption
25.152
89
EPIAEPIA-M920 User Manual
A.1.6. S3
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.045
0.427
2.154
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
2.154
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.033
0.408
2.053
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
2.053
A.1.7. S5
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.093
0.286
1.457
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
1.457
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.078
0.264
1.341
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
1.341
90
EPIAEPIA-M920 User Manual
A.1.8. EuP/ErP Enable S3
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.281
0.117
0.618
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
0.618
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.272
0.116
0.612
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
0.612
A.1.9. EuP/ErP Enable S5
MAX
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.410
0.043
0.233
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
0.233
MEAN
Measured Voltage
Measured Amp.
Watts
Main Board +3.3V
0.000
0.000
0.000
Main Board +5V
0.000
0.000
0.000
Main Board 5VSB
5.403
0.041
0.222
Main Board +12V
0.000
0.000
0.000
Main Board Power Consumption
0.222
91
Taiwan Headquarters
USA
Europe
1F, 531 Zhong-Zheng Road
Xindian District, New Taipei City 231,
Taiwan
940 Mission Court
Fremont, CA 94539
USA
In den Dauen 6
53117 Bonn
Germany
TEL: 886.2.2218.5452
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Email: [email protected]
TEL: 1.510.683.3300
FAX: 1.510.687.4654
Email: [email protected]
TEL: 49.228.688565.0
FAX: 49.228.688565.19
Email: [email protected]
China
Japan
Korea
Tsinghua Science Park Bldg. 7
No. 1 Zongguancun East Road
Haiden District, Beijing, 100084
China
3-15-7 Ebisu MT Bldg. 6F
Higashi, Shibuya-ku
Tokyo 150-0011
Japan
2F, Sangjin Bldg., 417
Dogok Dong, Gangnam-Gu
Seoul 135-854
South Korea
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Email: [email protected]
TEL: 82.2.571.2986
FAX: 82.2.571.2987
Email: [email protected]

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