SHARP MZ-800, MZ-1P16, MZ-1E20 Personal computer Service Manual

SHARP SERVICE MANUAL

CODE : OOZMZ8OOIIIIE

PERSONAL COMPUTER

MODEL MZ-800

MZ-1P16

MZ-1E20

Table of contents t,

2.

3.

Specification ..

Parts identification ..

Systemdiegram ..

4. Systemdescriplion ..

4·', Memorymep ..

4-2. CustomLSI .....

4-2-1. Memoryconlroller ...

4-2-2. VOcontroller ..

4-2-3. Clock generator end timing generator ..

4-2-4. Display address generator ...

4-2-5. Scroll control circuit .....

4·2·6. VRAMdeta inputloutpulcircuil ..

4-2-7. Register functions ....

4 -2-8. Pal1etcircuit .....

.

. 4

................................................... 6

..

9

9

9

. ....................... 12

.. ......... 12

.. .....

.........................................

13

15

4-2-9. CRTC register map •.

4-2-10. ROMconfigufation ...

4-3. 8255 Programmable Peripheral Interface ...

.. ........... 25

. ................................ 26

.. ............................................. 27

......... ................................ 27

4-4. 8253 Programmable Interval Timer ..

4-5. Printer interface ..

4-6. Programmable sound generator .•

.. ...... 31

. .................................................. 31

.................................................................. 34

4-7. Joystick .. . ........ 35

4-8.Systemswitchsetups ... . ..................................................... 35

5. Powersupply

MZ-1P16 .....

..... .. ......................................................... 35

. ................................................... 35

SHARP CORPORATION

1 SpedfIution

Dicpl'vmethod

Se'Mn.ndchl.KtIt

Ml-700 "'ItB

W.fJOO

8ItB

.CoIor t

I ;:' :::. .. .

8'lm.p ..... thod

- f -

I -

CG

...

, ,..

M!~7~moo.only

- Resolution

320 >e 200

PCGmalhocl

OP 320 >e 2OO

~~ >e 2OO

_I---

10<121

10<121

---~of18co1ort;

~ -

''''''''

180< '''', c:oIora

~0:010010

"'1t8

~h'ndling ­

~_Ienc:oc*

...,.

Se.Mn 900'.ochltac:t ...

"'coIofl ChOHn out of

1ScaIO,.

~ _+---+

Cen"onlclinterl_

==",~

=:!.~-dtofd

_ _

~keOfI8caIO"

~n~l~naISPllk"

~~

Cen"-Mitc:hldtaMl interl_

P\o!point ..

VI""'output

Joystick

RF , VIDEO

,AnalagRG8woth tI ••

Ml-820FI

I'ntlrlac.'

C%rInCOderIPALI

'ThI1'lfmlna',oldd fO<IheRGBllrmlnl'

AlAR, compatibll ijo'flitickdldlcatedl

~ ~

RS-232C OP

- - - - + TO'_ .

O'density

"'"' ...... "' ~""c:::"'2:::.:ii_

MZ-88,03

ATAAlcompat,bll

Joyllick

-o;;t;;;",,,ixp<lntlr

PlOt printer

W-1E19,MZ·1Fl1

MZ.'0'lcomPl~

:~'.:::",PI"~ _

Ml-1P18

St.ttu.SC£I011

2. Parts identification

Front view

I

Data recorder

~ilZ-800

Definable keys

Main keyboard

POWER lamp

Cursor control keys

DELETE and INSERT keys

Channel knob

(home TV channel selection)

BW/color select switch

Composite connector

RGB connector

Expantion slot

RESET switch

Power input

External printer output connector

EXT cassette jack

RF connector

(home TC cable connection)

Dip switch

Joystick connector

Volum!! control

MZ-1P16 power supply socket (+SV)

POWER switch

2

MZ-800

3. System diagram

MZ-1A18

AAMfile

MZ-1A25

Expansion RAM

MZ-1E19

MZ interface

MZ-1x17

MZ-1E20

1 U06 interfacing PWB

MZ-1U06

Expansion VO box

MZ-1P16

Plot printer

MZ-1D04

12", 8-tone, monochrome CAT

MZ-1D19

14", 18-color, AGBI, CAT

/I~ 0, 'J).oh ,

MZ-1E05

M FD interface

MZ-1F19

Single floppy disk drive

MZ-1T04

MZ-811 connection tape recorder

MZ-8BI03

AS-232C card

MZ-1F02

Dual MFD drive

MZ·1F11

MZ driver

MZ-1C30

Expansion cable

MZ-1C30

Expansion cable

MZ-SOP5(K)

SO-column, dot matrix printer 25.

/1~

JOYSTICK

ATAAI compatible

MZ-6F03

MZ blank media

MZ-2Z046

DISK BASIC

MZ-2Z047

CP/M

MZ-1F19

Single floppy disk drive

MZ-1F02

Dual MFD drive

3

4. System description

16 KB

Basic RAM, 64KB l

PPI

8255

I r---' l.

I

MZ-1P16 OP r - - -

-,

L _~

Plot printer

I l

,.--J

KEY

PlO

Z-80 PlO

CMT VF

MlSOP5K printer

Printer interface

CTC

8253 r----+----.J

Joystick interface

PSG

SN76489 RGBI

(ATARI compatible)

AMP CRTC

(Semi-cuslom) r --,

I

MZ-1R18 slol

I

I

(dedicated) I

L _ _ _ -.J

Expansion slot-l

VRAM

16 KB

Video r - -----,

I

VRAM

I 16 KB (OP)

L _ _ _ _ _

J

I

HZ-1R25 )

--~ o

o

0

TV

RS-232C

MZ-8BI03

MZ-1D19

[2]'

MFD MZ-1F02

4

MZ-800

MZ-800

4-1. Memory map

The MZ-800 has a different memory map depending on o

MZ-800 memory map

MZ-700 mode

FFFF"

MZ-800 mode the mode. To have compatibility with the MZ-700, it has two modes of the MZ-700 mode and MZ-800 mode.

EOOO

0000

COOO

~

~

AOOO

01000 - -

MAIN o-RAM

64K.

MAIN o-RAM

64 KB

O

I

D

I I

: : I n :

~ __ J L J

1

1

,.--,

I

I

: IIV) I

1

1 oJ

I

I

~

640 )( 200 mode 320 x 200 mode

4000

2000

1000

$0000

®

Power on (resel)

MZ-800 mode

MON. ROM

SI 000

CG.ROM

$2000

O-RAM r---,

~

~

ROM VRAM O-RAM VRAM

Memory map changes after initial program loading

@ At start of monitor

MZ-700 mode

$0000 r - - - - - - ,

MON. ROM

$1000 r - - - - - ;

©

Wril. 10 PeG from CG

MZ-7oo mode

$0000

$1000

MON. ROM

CG.ROM

$2000

NOTE: r--..,

1

: eX):

1

1

Item within dotted lin. represents an option unit

MZ·1R25

@ System operation

MZ-7oo & 800 modes

$0000

DRAM

$8000

V-RAM

(320x2oo mode)

LD A, 08H

OUT (CE), A

=>

SEooo

DRAM

SDOOO

SEooo

SE010

V-RAM

I<.!'Y. nM~K

MON. ROM

SFFFF

D-RAM

IN (EOH), A

=>

IN (El H), A

~

SCOOO

SDOOO

SEooo

SE010

V-RAM (CG)

V-RAM

MON. ROM

SFFFF

SFFFF

DRAM

MON. ROM

D-RAM

SFFFF L... _ _ _

• Memory map at power on is in the MZ-800 mode as in

®, but it changes to the MZ-700 mode by the monitor ROM when the monitor program starts. After transferring the CG data to the VRAM PCG area from the CG ROM at @, the memory map then returns to

®.

• When the system program is completed to load, the memory map goes into the MZ-700 mode if the system switch (SW1) is set to ON side. If set to OFF side, it changes to the MZ-800 mode, then the memory map as in @. During those changes, all memory spaces are composed of RAM and isolated from ROM and VRAM.

6

• Depression of the manual reset switch assumes memory map transition in order of

® ® ~ ~

®, similar as in the case of power on.

• However, depression of the reset switch in conjunction with the I CTRL I key assumes the memory map of

@ after being changed once to the MZ-700 or MZ-800 mode depending on the state of the system switch. In the case of the MZ-800 mode, it is set to the plane I.

IT (4-color mode) of the 320 x 200 mode.

MZ-800

Memory Sank Control

~

MODE

Function

-

MZ-7oo mode

SEl

MZ-SOO mode

-

SE2

MZ-7oo mode

SE3

MZ-SOO mode MZ-7oo mode

SE4

MZ-800 mode o SOOOO - S7FFF to DRAM. o Soooo - SFFFF o SEooo - SFFFF o SOOOO - $OFFF o $0000 - SFFFF o SEooo - SFFFF o SOOOO - $OFFF o SOOOO - $OFFF to DRAM. to DRAM. to

ROM. monitor to VRAM, key timer, and monitor ROM. to

ROM. monitor to

ROM. monitor to

ROM. monitor o Slooo - $CFFF o Slooo - SlFFF to DRAM to CG ROM. o Soooo - $FFFF o S2000 - $7FFF to VRAM, key and timer, and monitor ROM.

$Cooo - SDFFF to DRAM. o $8000 SBFFF to

(NOTE).

VRAM o SEooo - SFFFF to monitor

ROM.

0000

1000

2000

3000

4000

5000

6000

7000

8000

9000

Aooo

BOOO

COOO

EOOO

E070

Fooo

FFFF

Dooo

DRAM

I

I

L __ ..J

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

i - - l

,---,

I

I

I

I

I

I

I

I

I

I

I

MONITOR

ROM

MONITOR

ROM

I

I

I

' - - I 1 - - '

I I

I

MONITOR

I ROM

I I

I I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

DRAM

I

I

CG

ROM

DRAM

V RAM r-- - - -

I

I

I

I

I

I

I

I

I

I

I

I

I

V RAM V RAM

(NOTE)

DRAM

DRAM B

Area within dotted line does not involve change.

I KEY, TIMER

I

I

L _ _

J

I

MONITOR

I ROM

MONITOR

ROM

(NOTE): In the case of 320 x 200 mode, contents of $8000 - $9FFF are transferred, instead,

DEY, nMER

MONITOR

ROM

MONITOR

ROM

Power on or RESET input

----1 and those after $Aooo are transferred to DRAM.

7

MZ-800

~rt

MODE

Function

OUT (SE5) OUT (SEe) IN (SEO) IN (SE1)

MZ-700 mode MZ-800 mode MZ-700 mode MZ-800 mode MZ-700 mode MZ-800 mode MZ-700 mode MZ-800 mode o SDOOO - S7FFF o SEOOO - SFFFF o SDOOO - SFFFF o SEOOO - SFFFF o S1000 - S1FFF o S1000 - S1 FFF o S1000 - S1FFF o S1000 - S1 FFF prohibited. prohibited. returned to returned to toCG ROM. toCG ROM. returned to returned to the state before bited. prohithe state before bited. prohio SCOOO - SCFFF o toVRAM (PCG

RAM).

$8000 - SBFFF to

(NOTE).

VRAM the state bathe state fore CG was fore CG was set. set. bao SCOOO - SCFFF o $8000 - SBFFF to DRAM. to DRAM.

0000

1000

2000

3000

4000

8000

7000

8000

9000

Cooo

DOOO

Eooo

Fooo

FFFF

5000

Aooo

Booo

1

'1

I

r--l

I - - l

1 - - '

1--,

I

I I I

I

I I I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

1

1 I

I

I

I

1

,---,

1 - - ,

,---, r - - ,

I

ROM

I I

ROM

R Q8

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I I I I

B B

I

I

I

I I

I

I

I

I

I

I I

I I

I I

I I

I

I

I

1

I

I

I

I

1

1

V RAM

1

I

I

I

- - - -

DRAM

1

I

I

(NOTE)

Prohibited

Prohibited

State before prohibited

State before prohibited

1

I

V RAM

(CGRAM)

1

I

1

L __

I

-.l

I

I

I

I

I

I

I

I I

I I

I

I

L __

-.l L _ _

.J

I

I

I I

I

L __

I

J

8

MZ-800

4-2. Custom LSI

The custom LSI is a 100-pin single chip LSI on which the

MZ-800 memory controller (I/O controller) and CRT controller, etc. are contained.

4-2-1. Memory controller

Used for the control of the memory bank. Addressing of

DRAM, ROM, and VRAM is conducted by selection I/O address, $EO - $E6, using OUT or IN command.

4-2-2. 1/0 controller

In this I/O controller is created the select signal for assignment of MZ-800 internal device.

See Table-2 for relation of internal device vs I/O address.

I/O Signal address name

Device (I/O) Function

FF

FE

FD

FC

F2

CPR

Z80A

PlO (I/O)

Port B, printer data output

Port A, printer control and timer interrupt

Port B control (Mode 0)

Port A control (Mode 3)

F1

FO

FO

E6

1

EO

D7

D6

D5

D4

D3

D2

D1

DO

PSG PSG (0)

JOY

- -

- -

JOYSTICK (I)

- -

PSG output port

Joystick-2 input port

Joystick-1 input port

(0) Pallet write

(110)

C53 8253 (I/O)

KEY 8255 (110)

Memory bank control

Control port output

Counter-2

Counter-1

Counter-O

Control

Port C, cassette, etc.

Port B, key input

Port A, key strobe output

(NOTE): Mapped to E007 - E004 in the

MZ-700 mode.

(NOTE): Mapped to E003 - EOOO in the

MZ-700 mode.

CF

CE

CD

CC

- - -

0

I/O

0

0

CRTC register

$E008

- - -

I/O TEMP, HBLK input; and 8253 GO ON/OFF output for the MZ-700 mode only.

* When above I/O address is accessed, it makes 10WR active for OUT or lORD for IN command.

9

Note

MZ-800

27

28

- - - - - 0 - - -

29

--30

--

31

32

33

Pin

No.

1

2

3

I

4

19

20

I

CPU

5V

GND

ADO

I

ADF

DTO

I on

GND

VCC

Ground

Power supply

CPU MREQ signal

CPU RD signal

CPU WR signal

CPU RFSH signal RFSH

34 e----,.;-----

35

---36- --

37

~8 f------

39

1--

40

41

42

I---

IORQ

Ml

SEL1

CASB

INH5

VBLN

GND

VRAS

IJCli:S

-

0

0

0

0

0

0

I

I

CPU lORQ signal

CPU Ml signal

System RAM address multiplexer select signal

System RAM column address strobe signal

Inhibit bank (OUT $E5) select signal (uH" = Inhibit).

Vertical blanking signal

VRAM RAS control signal

VRAM CAS control signal

-

43

I

VADO

I 0 VRAM address signal (multiplexer output)

_._--

50

51

52

53

54

VAD7

VOE

VCC

GND

VRWR

-

-

0

0

VRAM output enable

Power supply

Ground

VRAM write signal

55

I

VAO

I 1/0 VRAM data bus (standard RAM)

62

--- 63--f--

VA7

I

VCO

I

I----

70 i ,--

--ii--

VC7

I-----

SBCR

--73--

-~---

I---RED

BLUE

----GREN

1-----

75

1-------

76

YITN

VSYN

1/0

0

0

-

0

0

0

0

0

VRAM data bus (option RAM)

Color sub-carrier wave

Video signal, red

Video signal, blue

Video signal, green

Brightness control signal

Vertical sync signal

77 f - - --

78

- - - - - -. ---

79

HSYN

GND

VCC -

Horizontal sync signal

-_

..

80

_---

81

-8-2-

CLKO

CROM

I

0

Clock input (17.7344 MHz)

ROM chip enable

KEY

---a3- f------NTpL

-- --------f----

~~=p~SD~ I

I

Test pin ("H" - test mode)

MZ-700/800 mode selection ("L"

C---

86

S7

- lOWR lORD

-------aa--

--------cR S

0

I

0

0

0

8255 chip enable

NTSC/PAL selection (PAL - "L")

1/0 $BO - $B4 chip enable

= MZ-700 mode)

Sum of CS and WR of 1/0 controlled by the custom IC

Sum of CS and RD of 1/0 controlled by the custom IC

SIO 89

90 f-- -----

91

92

93

94

95

96

97

1------g8

99

100

---

Signal name

---

MREO

RD

WR

RSTO

MNRT

PORT

WTGD

JOY

CPR

PSG

CKMS

53G

C53

TEMP

1/0

-

-

0

I

1/0

-

-

I

I

I

I

0

0

0

0

I

0

0

0

0

0

I

I

CPU clock (3.547 MHz)

Power supply

Ground

CPU address bus

CPU data bus

Functional description

1/0 $F4 $F7 chip enable

Reset output

Manual reset input

Power on reset input

Wait signal to CPU

Joystick chip enable

PlO chip select

76489 chip select

8253 musical interval clock

8253 musical interval ONIOFF gate signal

8253 chip enable

MZ-700 mode, $E800 tempo input

* Term "OPEN" represents the signal not used on the board.

10

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

OPEN

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

Negative logic

GND

GND

Negative logic

Negative logic

OPEN

OPEN

Negative logic

Negative logic

Negative logic

Open drain

Negative logic

Negative logic

Negative logic

Negative logic

I

MZ-800

Pin conflgur.tlon

TlM'

C&3 m ~G

CKMS

JOY

CIJR

IIOIIT IIISTO

MOO MNIfT SIC

CI"$ IOWR lORD MOO'

TEST

Mm

KEY

CJIIOM

GNO

ADO

AOl

AD'

AD7

...

AOO

AOA

ADO

ADC

AOO

AD'

OTO on

072

073

0"

0" on on

GNO

Custom LSI block diagram

""IIJ

WJr lO!SH lilT

VSYN SBCR

HSYN VBlN CKMS

[NHS

VJIA!"

GND

VADO VA02 VA04

VADJ

VAD6

VAOS VA07

CPU

CLKO

NTPL

ADO - F

DTO -7

,16

8

RD

WR

MREO

M1

10RO

RFSH

CROM

SEL1

CASB

INHS

CPR

KEY

C53

53G

JOY

PSG

CRS

SIO lORD

10WR

I

CPU

VF

Clock generator & timing generator

--1 •

Display address generator

CPU address

-

CONTROL t - -

CPU

DATA

.--

I )~ contro register

~

MPX

T

+ register~

I--

Scroll circuit

I

! t l

Memory controller

I--

----

110 controller

VRAM address controller

! r

MPX l

\IC4

VC,

VC2

VC.

\/CO

VA7

VAB

VAS

VM

VA3

VA2

VA1

VAD

.....

GNO

GNO .....

......

~TN

G"N

BlUE

•• 0 sac.

VC>

VCI vet;

WTGD

WAIT controller

1

VRAM

1

-I Timing control 1

8

VRAS

11

VCAS VRWR VADO-7

VROE

Vcc 2, 29, 52, 79, pin

GND 3, 28, 40, 53, 78 pin

PORT MNRT

RESET

I

-

-

Input

BUFF

Pallet circuit

Shift register

~

VRAM data 110 circuit

, 8

VAO-7

8

VCO-7

RSTO

MOD7

TEMP

RED

GREN

BLUE

YITN

1·

4-2-3. Clock generator and timing generator

Oscillation from the crystal oscillator is divided to create the CPU clock, horizontal sync, vertical sync, and display address control signals.

Since the low state of signal is used for NTPL (NTSCI

PAL selection) with the MZ-800, the CPU clock of

3.547 MHz is derived from the crystal frequency of

17.734 MHz by dividing it 1/5.

NTPl

1>-----'

CK32 (112)

001 (114)

To displ.-v .dd ..... generator

Clock generator and timing generator circuits

OTO-7

ICPU dala)

VSYN

MZ-800

4-2-4. Display address generator

1) Display address generation

• Display address increments from left to right as beginning from the home position at the upper left corner of the CRT screen (address $000). The first display line dominates address $000 through $027.

Because a screen frame consists of 200 rasters, the address at the right side of the bottom corner is as follows:

(200 x 40) - 1

=

7999

=

$1 F3F

• The address counter stops counting for a horizontal flyback line and stored in the address latch circuit.

When the horizontal flyback line terminates, the address latch output is preset in the address counter

(display address generator).

• Address is generated even while the vertical flyback line is active and it makes the counter reset before termination of the vertical flyback line.

2) Display address generation in the MZ-700 mode

• Because characters are displayed under the PCG method in the MZ-700 mode, address is generated for each character and the same address is used for displaying of one character. The 3-bit horizontal line counter is provided to count horizontal lines to generate the address (LCO - LC2) for selection of the character front.

Display address increments from left to right having the uppermost left corner of the screen for the home position.

Since 25 lines are used to develop displaying of characters composed of 8 x 8 dots, the address at the right of the bottom lines becomes $3EF.

3) Display address multiplexed with CPU address

• Address used to write data to the VRAM is latched in order to avoid CPU wait. Display modes of 640 dots and 320 dots are assigned by the mode switch

(DMD2).

• Display address is multiplexed with the VRAM write address in the timing of DISP which has the timing that the display address and CPU address may become a pseudo cycle steal.

IScroll regosted

, - - - - - , sw

Scroll control

SSA

IO,splay mode 'egoslll')

OM02 t > - - - - + - - - '

Display address generator block diagram

12

I

MZ-800

4-2-5. Scroll

1) Scrolling is possible for both horizontal and vertical directions by means of software offset.

The following four registers are use~ for scroll control. a. Scroll start address register: SSA (7-bit) b. Scroll end address register: SEA (7-bit) c. Scroll width register: SW = SEA-SSA (7-bit) d. Scroll offset register: SOF (10-bit)

(

!

I

I

4) Line scroll

SOF = $O~

Programming "SOF = $28" makes the display screen shifted eight lines up. Data on the highest line therefore shifted to the bottom line.

Programming "$28 ~ shifted eight lines down, and the line on the bottom moves to the highest line.

5) Screen split

Appropriate deviation of SSA. SEA, and SW permits to divide the screen into three sections of ®, ® and

©.

Though the section

® is permitted to scroll, sections

® and

© are not permitted to scroll.

See the figure to explain with.

SSA-.

SEA-.

@

®

©

SEA

I

+--__

I x y z

I l, ___ _

- - -

)

2) Control of scroll starts by the initialization of the scroll control register.

SSA = $0

SEA = $7D

SW = $7D

SOF = $0

3) Way of smooth scrolling

SOF = $0 ~

Programming "SOF = $5" makes the display screen shifted one line up.

The highest line (address: $0 - $27) is then assigned to the lowest line ($1 F18 -.: $1 F3F).

As normal scroll involves updating of the data for the lowest line, the data of address $1 F18 $1 F3F are updated.

SOF = $5 ~

By reducing the value of SOF by "5", it makes the screen shifted one line down.

Assume now that the top of the section

® is on the

5th line (40 raster) and the top of the section

© is on the 18th line (144 raster). Attention must be paid to the fact that values SSA and SEA are used for assigning lines. Scroll registers are set with the following values.

SSA = $19

SEA = $5A

SW = $41

SOF = $0

In this occasion, it needs to initialize the screen that has been displayed. "SOF = $5" must be programmed to scroll

® one line. Then, only the section

® is shifted up, and the highest line of

® moves to the bottom line of

®.

Programming "SOF = $A" makes it scrolled one more line.

SOF ~ SW

Scroll offset (SOF) should necessarily be within a range of the scroll width. Display is not assured with

SOF set greater than SW.

13

MZ-800

Scroll and and control circuit hardware

• Block diagram

Start address

Scroll width

SEA-SOF

10

DA(MA)

10

7 SEA

DA(MA)

7 c

SOF

Scroll offset

Scroll control register

SSA: Scroll start address

Increment of SSA: $5

Minimum value of SSA: $0

Maximum value of SSA: $78

MSB

N

6 5 4 3 2

SEA: Scroll end address

Increment of SEA: $5

Minimum value of SEA: $5

Maximum value of SEA: $70

LSB

LSB MSB

N

6 5 4 3 2

SW: Scroll width

Increment of SW: $5

Minimum value of SW: $5

Maximum value of SW: $70

Relation of SW. SEA. vs SSA

SW = SEA - SSA

SW> SSA

MSB LSB

N

6 5 4 3 2

S~

I

SOF: Scroll offset

Increment of SOF: $5

Minimum value of SOF: $0 (without offset)

Maximum value of SOF: $3E8

MSB

SOF 1

I

7 6 5 4 3

2

LSB

S~F

I

MSB

SOF

21 __________

1

9

LSB

S~F

1

Relation of display address. SEA. SSA. vs SOF

Display address

SSA

SEA

SOF m I k j i

SSA SSA SSA SSA SSA

6 5 4 3 2

SEA SEA SEA SEA SEA

6 5 4 3 2

SOF SOF SOF SOF SOF

9 8 7 6 5 h

SSA

1

SEA

1

SOF

4

S~A

I f

-

0

SEA I

S~F IS~F

3 2

I e

SOF

Screen left end address o Line

1 Line

2 Line

3 Line

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

0

I 1

0

1

0

0 d

I

I

S~F

I

I

c

0

0

0

0

0

0

8 Line

16 Line

24 Line

192 Line

0

0

0

0

0

0

0

0

0

0 1

0

1

0

0

1

1

0

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0 0 0 0 199 Line

Relation of SW vs SOF

SW> SOF

14 b

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0 a

First line

Second line

Second line

Twenty fifth line

MZ-800

Concept of the scroll control circuit

Scroll method

• Scrolling by means of VRAM address conversion.

Range of scroll

• y-axis programmable.

BASIC console command compatible

• x-axis fixed

Scroll sequence

• The scroll start address is termed "SSA" and end address "SEA".

• Execution of scroll, with offset given from the CPU.

• One line (line S) starting from SSA disappears from the display screen.

• A new line (line S') is added to SEA. Line S' is the same refresh memory as the line S. The contents of the memory was erased (nullified by the CPU) before the execution.

SS'/! ABCDE

1 23456

XYZ

ABC

1234 r--

Line S

Execution of scrolling by address conversion

• Scroll offset (SOF) is the count of lines which the CPU gives to the CRTC. For instance, the following must be observed to perform scrolling.

3-line scroll: SOF

3

= OF x 3

5-line scroll: SOF5 = OF x 5

And, to scroll one more line after 5-line scroll;

5-line scroll: SOF5' = SOF5 + OF = OF x 6

Display screen

000

SSA

SOF t - - - - ' ' - - - - - - - - - - - - - i

SEA 1-----1

A o

Scroll screen

OB

IF400 (FAOO)

SW

• Display address DA is the signal created in the CRTC display address generation circuit and arranged in their order from the upper left corner of the screen.

The bottom right address is 1 F400 in the 640 x 200 mode.

• Display memory address DMA represents the VRAM address corresponding to DA.

Since scroll is executed by means of address conversion, the order of DMA may not be the same as DA, necessarily.

• CPU address MA is the VRAM address that obtained from the CPU through the CRTC. To lighten burden on the CPU, a circuit is added to make order of DA identical to order of MA arrangement.

VRAM

~DMA

~

9876543

Fig-b Screen before scroll

-

SSA

ABCDE

XYZ

SEA

OPORSTU

9876543

Fig-c Line after scroll

A BC

I - -

Line S'

Fig-d Address conversion

15

4-2-6. VRAM data input/output circuit

1. Nothing intervenes for input and output of data in the case of the MZ-700 mode.

2. MZ-800 mode

• Write

Read data (RD) from the VRAM and write data (WD) from the CPU are subjected to logical operation accordi'1~ to the direction from the write format register (WF) and its result is written.

• Read

For plane read data from the VRAM, data to be read by the CPU are arranged in accordance with the direction of the read format register (RF).

11"'0 -1

~".n.

•. t. 11 )

\/eo -1 t PlIMII.IJJ,IV!

* Logic circuit

Read data from the VRAM and write data from the

CPU are subjected to logical operation (OR, XOR,

RESET, etc.) and its result is used for the write data.

MZ-800

As the PCG method is adopted for the MZ-700 mode, the text and ATB areas are actually mapped to $0000

- $OFFF. So, the VRAM address has the following relation with the display character position.

1 2 3 40

I

I

:1::

1

0001

1-1 ======t=a

I

I

I

I

I

I

I

I

I

I

251

03CO

I

I

I

I

I I

I -_-_~~~~

I

2) MZ-800 mode

As the bit map method is used for the MZ-800 mode, it is possible to four screens of 320 x 200 dots and two screens (maximum) of 640'x 200 data.

The cycle steal method is used for this mode. i) 320 x 200 dots

See separate page for the timing chart duing display and CPU read timing.

VRAM acee .. timing

1) MZ-700 mode

See separate page for display timing chart.

The VRAM is configured in the following manner in this instance.

VA vc

(option)

$0000

Not used

$2000

$3000

$3FFF

CG area

TEXT area

ATB area

Not used

What i. p.eudo cycle steal

With the MZ-800, the pseudo cycle steal method is adopted for VRAM accessing.

LOAO~ x:~~.

===:x

OISP. addr .. s u

X cpu address

X

OISP. add re ..

I--

OISP. clcle

I

CPU clcle

I

OISP. clcle

As shown in the figure, a next display data fetch and

CPU accessing are multiplexed during a display period.

Because accessing of the VRAM while characters are on display causes the screen to blink with the MZ-700 mode, it awaits for blinking to complete before accessing of the VRAM. But, with the cycle steal method it enhances faster screen processing as it enables to access the VRAM during a display period. Because it is not a complete cycle steal with the MZ-800 but timing is taken using a wait in order to synchronize with the CPU cycle for accessing from the CPU, it is therefore called

"pseudo cycle steal

H

•

16

•

MZ-800

MZ-700 MODE DISPLAY TIMING

56.3ns r=:

451ns

... 1

ClK

VRAS

~--------------~, ,

,'----

VCAS

VOE

''-_----'I

VAD 0-7

X X

COL.

X

ATB. adr.

X

ROW

X

COL.

X

DUMMY adr. •

X

'---'-'-'-''--''-'-----'

VAO -7 lOAD

(shift register) text adr. CG. adr.

-------

--~C=>>----<C=>>--------<C=>>------<c=>>-----

....

'

- - - - - ' text DATA ATB. DATA CG.DATA invalid DATA

....

,

_ - - -

MZ-SOO MODE (320

X

200 dot)

ClK

VRAS -.J

\

..

\

DISP. cycle

.1 ..

\

CPU cycle

VCAS \

VOE \

\

\

\

VADO -7

VCO -7

X

COL.

X

COL.

X

ROW

X

COL.

------

I (III) plane adr.

II (IV) plane adr.

CPU adr. latch DATA

C=>>-------<C=>>-------<C=>>---------<

I plane DATA II plane DATA CPU read DATA

VAO - 7

---------C=>-----<C=>>-----<C=>~----------~

III plane DATA

, ,

IV plane DATA CPU read DATA lOAD

•

17

MZ-800

1) 320 x 200 dots

See the figure below for VRAM configuration and

CRT character display position.

$0000

($1F3F )

$2000

VA

I

I

I

I

I

I

I

7999

0

1

2

I

I

40

Not used

0

1

2

I

I

I

I

I

I

I

I

I

7999

Not used

$3FFF

Plane I

Plane II

I

I

I

I

I

I

I

0

1

2 ve

(option)

0

1

2

I

I

I

I

I

I

I

>

Plane III

2 3

2

I

; I :

I

I

: I

I

I

2~

I

17960

(Raster) eRT display position

40 ---"DJ

~

I

----hd

7999

I

----

I

I

Plane IV

2) 640

X

200 dots

Because it operates in the cycle steal mode, two bytes of display data are fetched during one byte display cycle. (See the chart in separate page.)

See the figure below for VRAM configuration and

CRT character display position.

$0000

0

2

4

I

I

I

80

I

I

I

I

I

15988

$2000

Not used

1---, ---

3

5

:

79

I

I

I

I

I

I

15999 ($3F3F)

Not used

$3FFF

VA

(Plane I)

--,---

3

:,

I

I

I

I

I

I

I

I

I

I

I

I

0

2

4 ve

(option)

(Plane Ill)

2 o

80

2 3 4 80 I ' I ' t' I-~EJ

_ _

--l--H

200

I

I

"'-159-20--1---+-1

I

I

~:::::::::::::::::: i '''''

I eRT display position

•

18

MZ-800

VRAS

DISP. cycle

800 MODE (640

X

200 dot)

DISP. cycle -I· CPU cycle

\~--

__

-I·

\ ' - - - - -

VCAS

VOE

\'---~/ ''---~

\~-----------~

\'----,

,'-------/

VAD 0 - 7

VA 0 - 7 vc

0 - 7

LOAD

(sift register)

X'__ __ ----'X'__ __

'---;;~

N+1th adr.

'------C~

--,--_

~===N=+=-2th~ad-r.~~

-------~~~----~~~----~<==>~------------------~

I plane N th DATA I plane N+l th DATA cPU read DATA

----------~~~----~~~----~<==>~---------------~

III plane Nth DATA 1II plane N+ 1th DATA CPU read DATA

LJ

CPU and VRAM accessing

1. Accessing of the VRAM by the CPU is carried out in the cycle steal mode (MZ-800 mode only) during the flyback period of the display under the control of the

CRT controller.

2. Even when there is no accessing from the CPU in the

CPU cycle, such as VRAS, VCAS, VOE, etc. are outputted in the timing of the read cycle at all times.

3. Write to the VRAM is carried out after logical operation of the read and write data by means of the read-modify-write method. But, in the case of the 320 x 200, 16-color mode, data are written in two CPU cycles as there is a need of writing to Plane IV.

See separate paper for timing chart.

4. CPU wait

1) Write

• As there is a one-byte buffer in the CRT controller, write to the VRAM from the CPU is carried out through the buffer. But, actual write to the VRAM is

VRAS

-.J

~-

\ cpu cycle

<D

- I -

VCAS

~

V OE ~

VADO-7

CPU adr. latch DATA I. III plane

L-.J done by the CRT controller. Therefore, there would be no need of wait under almost any condition in the

MZ-800 mode.

• Even in the MZ-700 mode, wait is issued when there are more than two writes in a display period.

Display period

~r-.-----------1.l"

Flyback period

'--_____ _

HBLN

~:~~w:R-----LJ~<D~-----t-L----~®l--,~rl-,-:------

- - - - - - - - - - - - 4 , , \

WAIT

2) Read

Wait is issued along with the CPU write action both during displaying and flyback periods to perform reading operation in synchronization with the CPU cycle.

DISP. cycle

DISP. adr.

\

\ cpu cycle@ r

\~-----------

\

ROW

11. IV plane

X

VRWR

VA 0-7

VC 0,-7

----~CJ:J___{

I plane

)>--------<c=::)>-----c=>-~ read DATA write DATA

-----~ plane

)>---------<c=::)>-----c=>>-----QD---(

IV plane } - -

DISP. DATA

19

4-2-7. Register functions

VRAM configuration

• One or two chips of 16 KB VRAM are used.

• In the case of a single 16 KB VRAM chip, it handles

320 x 200 dots, 4 colors, or 640 x 200 dots 1 color.

• In the case of two 16 KB VRAM chips, it handles 320 x 200 dots, 16 colors, 640 x 200 dots, 4 colors, 320 x

200 dots, 4 colors, 2 frames, or 640 x 200 dots, 1 color, two frames.

*

Discussed next are about functions of the custom LSI.

There may be some restrictions because the standard version of the MZ-800 incorporates only one 16 KB

RAM.

Display mode register (OUT &HCE)

• It consists of four bits which are used to represent display method, resolution, and display screen (color plane) in combined way.

Display mode register (DMD)

• DMD 3, 2: Display method and resolution

DMD

3 o o

1

-----~--

1

2 o

Bit map, 320 x 200

I

Bit map,

64~~ I

1 -i

0 I MZ-700 mode

MZ-800

----------------+------------------------~~-----

1

I

Prohibited

• DMD 1, 0: Display screen designation

DMD DMD

1

0

0

1

320 x 200 640 x 200 I MZ-700

0

0 Frame A, Planes I and n

-~=

1 Frame B, Planes ID and IV Frame B, Plane ID (NOTE) Prohibited

0 Planes I, n, m, and IV Planes I, m

I

Prohibited

1 1 Prohibited

NOTE: 640 x 200, Plane B IS Plane m, not Plane n.

• With the MZ-800, DMD 1 ~ 0, DMD 0 = O.

Table-' VRAM configuration and display mode

VRAM

~:~~c~

VRAM configuration

_________ ___ ..

~_~______

Resolution

Display Display Color combination

I i

0010'

'"me

(NOTEI _ _ 3 2

DMD

__

'I

0

_I : ItIVTI'

1

320 x 200 140010<5,

F"mJ

I. n

I

0 0

1

0 I 0

16 KB f - - - -

32

~

___

8000

H ~_B_F_F_F

""'" I

I

11 j r-Ll

320 x 200 140010<5

(eme

B

1

KB _ _

H -=-~

G G G

;---1 ~-i -~

-t-------+--~t-

8000

BFFF

-VA-0--7

--vc-o-.,

-----llltl

I

F"me

T'

I

"

on vcr t

III

"

640 x 200

1'6

0010<5

I

F"me

+ n l~

~I. ~~-f

-

I

~o 1~+-;

0 l

0

+r~-

-- ---

_1_' r

~010' l:am~-____f--~---1-l-~~---~-

640 x 200

I

+.1.

4 colors Frame A I I. ill i

0 i 1 i 1 i 0

~-~-- --------------~~---------~

I

! ~0-2-c5-h-~r-nae-cs-te-r-s-t-II-8

0010<5

I-~ame

B

1 ill I 0 i

I i 1 I 0

! i,l i

1

1-------I ---1---1-----+----

!"me

A

+----:-

I

AGB

I

I

I, I

!

fo

I

I

I

:

T~ i;-

(NOTE) Except for the MZ-700 mode, actual display colors are produced by the pallet.

20

MZ-800

VRAM to CPU interface

• As the CRTC bus is completely separated from the

CPU bus, read and write of the VRAM is carried out through the CRTC. Therefore, interfacing with the

CPU is done via the read register or write register in the CRTC.

• VRAM access by the CRTC is done under the pseudo cycle steal mode.

• Not only read and write are for the accessing with the CPU, it permits to read multiple number of screen data logical operational results and to write the read-modify-write of the logical operational results for the data already written. So, it has two registers of the read format register and the write format register.

• It permits CPU access to the non-display plane in the display mode according to the BI A bit and it enables selection of data buffer and two screens, when the

32 KB VRAM is used. a) Read format register (RF) (OUT & CD)

IV

!

III

11

LSB MSB

I

SR~I:G r~",r'''~] ~A

I

* NOTE: Same as the bit B/A of the write format register.

• SRCH/S I NG

"0": Single color data read .....

Reads the data of the color plane, 1, IT, rn, or N, specified by "1 ".

NOTE: Only one item should be "1" out of I, IT, rn, and N. If it is "1" for more than two or non-existence of the VRAM may not assure the data read.

"1": Specified color search .....

"1" is retu rned for the bit of the color specified by

0/1 of I, IT, rn, and N.

NOTE: Depending on the display more, color combination is permitted for the bit combination of L IT, ID, N; ID, N; I, IT; I; and

ID. Bit combination otherwise will be disregarded.

(ex. For the 640 x 200, 4-color mode, combination becomes possible for I and

ID, and IT and N are disregarded.

• B/A

CPU access plane change

MZ-800

--->

"0": Frame A access .....

Accesses the frame A (planes I and IT for the 320 x 200, 4-color mode; plane I for the 640 x 200,

1-color mode).

"1": Frame B access .....

Accesses the (planes ID and N for the 320 x 200,

4-color mode; plane IT for the 640 x 200, 1-color mode).

• L IT, ID, N ..... Color plane designation.

I f

!

I

21

MZ-800

Table-2 Display mode vs read format register

Display mode SRCH/SING B/A IV m n

Function (NOTE)

--------------r---------------+--------+---------~----~----_+----_r----~--------------------__i o

320 x 200. o o

Plane I data read

4116 colors

Single color data read

640 x 200. o

Frame A: "0"

Frame B: "1" o o o Plane n data read

~--~-----+-----+----~----------------------o o o Plane m data read

1/4 colors o o o

Plane IV data read

-----------~--------------~---------~--------_+----_+----~----4_----+_--------------------~ x x o o T. n dot search

I, n dot search o x x o x x o T. n dot search

Specified color search

320 x 200.

4 colors

320 x 200.

16 colors x x o o o o o o o x o x x

L n dot search m.W dot search x o x x x m. W dot search m.

IV dot search x x m.

IV dot search o o o o o o o T.1f. m.

IVC dot search

L1f. m.

IVC dot search o T. n. m.

IV. dot search

I. n. m.

IV. dot search o o T. n. m.

IV. dot search

640 x 200.

1 color

1 c---

640 x 200.

4 colors

1

-----

-~-.---

MZ-700

(*): Refer to the display frame of Table-1.

0

0

1 x

0

NOTES:

•

Read for the non-existing VRAM are not assured .

• The above parameter has to be set up for the MZ-700 mode.

* B/A must be set to "0" for the standard MZ-800

(without MZ1 R25). x x x x x x x

1 x

0

1 x x

0

1

0

0

1

1

0 x x x x x x x

1 x

0

1

0

L n. m. IV. dot search

T. dot search x

1 I. dot search m. dot search x

0

1

0 m. dot search

T. m. dot search

L m. dot search

T. m. dot search

1 I. m. dot search

1 Data. ATB. CG area read

22

MZ-800 b) Write format register (WR) (OUT & CC) • WMD 0 - 2 .....

Selects the logical operational mode for readmodify-write .

• B/A (NOTE)

Standard MZ-800 ---> "0": Frame A access .....

Frame A is accessed for the display mode.

"1": Frame B access .....

Frame B is accessed for the display mode.

• I, Il, rn,

IV .....

Color plane designation

Write mode ' 2

-SINGLE-- . +0

WRITE

EXOR

OR

WMD

1

0

0

B/",: Color plane

IV ill IT 1

0 (*) 0/1

-~

0 / 1 -

Function [WD: Write data

VD : VRAM data

1

-----lc~~~I-;ne of;;1~WD, wri;--------o r

0-

--t

----t-- -

---j o I __

~ r-

1

-

~

11

Frame A: 0

01 Frame

I o~T, ~/~ +,1,'~/01,

-

,--

t---r-

OIl

I --;1

B: 1

:_~/~ .j,_~l_i_ 0~~0/1:

320 x 200, i

Color plane of "0": Fixed

4/16

640 x 200,

1/4 colors jcolor colors pl~~~--;:;-0Y-WD

<:BVO--------

,Color plane of "0": Fixed

I---~' ll~-:;~~;~~ ~:~~:::F~;

VD ______ _

RESET

REPLACE

PSET

MZ-700

,

1

I

0-1

0

-,1 o o

I

I

1 i

I

-~ 1

-Iu=i=r- "0--r

_ i

;;;;:-;oo@,

!

-;-:--~- -;-1o~1 ~~~-;;-~®~-!

:;;~~:~~';:f::~~,:::',:,O;--' r-~--. 0/~_+0/-1_·1i

_ x--~--~"li ~2~I:r~o~_~

(Character write to the graphic plane)

'L x

I,

0/1 ~ OIl OIl i OIl I. . ' I Color plane of "1": WD i

I , ,

16 colors

I x i_. 0 __

---l+I---x-i--lI----~--t~

!

0/~r~4~-=-;~

®,

I ___

~

__

J __

1

Calor plane of "0": Writes "0".

><....t~~><_l_~l-~~olor ~

I x

I x ,011 I x i OIl! 640 x 200, !

Calor plane of "X": Fixed to-~~_---

I x

I f--

1 ___ x

I

I

I

~

I

('F~::

OIl

~-t-~~

_9Q

11 i 0/1 i 0/

.<>'~J.-~-'

0/1 r-

- - 1 - -

~

x

I

OIl

I

, I

1 t'

132:

I OIl T;1 I

1 x

I

I

! x x

-i--

3~~

:o~:~s x 1

200

1 calor,

®,

,

®

- - - - r - - - - t - - - - - - -

1 iColorplaneof"l":WD.VD

-r-~rites

~<:<>Iors ~ co ors

1 only- bi.t "1

I Calor plane of "1": WD + VD

! i

Calor plane of "0": WD· VD

-------

~:-~-;-~~ i;;~pecific

Calor plane of "X": Fixed calor. x

__ +-_____ i x : OIl

I x I

OIl! 640 x 200,

11

! _

1I 1I

I

I 4

~?Iors

. o

0

I

0 I 0 I 0 I 1 I MZ-700 ' Writes WD into the DATA, ATB, and CG area.

(*) Refer to Table-l display frame

NOTES:

• Write for the non-existing VRAM are not assured.

• The above parameter has to be set up for the MZ-700 mode.

• BI A must be set to "0" for the standard version

MZ-800.

23

MZ-800 c) Example of CPU read/write access

• Shown next are access examples of REPLACE write,

PS ET write, and SEARCH read in the 320 x 200,

16-color mode.

As for display colors, Plane I corresponds to 8, IT to

R, ill to G, and IV to I.

V

R

A

M

Plane I (B) data

Bo

1

01 ° 1'1'1'1' i

Plane III (G) data

Plane 11 (R) data

COTo i

'1'

1

°R~

Display before write

CD

REPLACE write

• To develop light yellow characters on the graphic screen.

It develops the screen when a next CG patterns are written after setting the REPLACE mode and the light yellow color in the WF register.

WF register

Mode BlA Calor designation

~-O--o=r!]

, , --oJ:

Light yellow replace mode

So, the bit "1" of the write data becomes the color specified by WF and rest of others become RESET

(black).

Write data

I

(CG pattern) ,

°

° °

Display after write

V

R

A

M

Plane I

I ° 1

Plane III

Plane 11

10t'lol'[0]

, !

° I' I

Plane IV

1

I ,

1 ° I' I ° 1 ' 1 ° liJ 1 ° I' 1 ° 1 ' 1 ° I'

1

® PSET write

• To overlay a light yellow hatching over the graphic display screen of

CD.

WF register

Mode BlA Calor designation

'--1_, ___

Light yellow PSET mode

G R B

Write data °

I (B)

11 (RI

Display after write

V

R

A

M

IV(!) III (GI

1 ° I' I' I' I' I' 1 ° I' 1 ° I' 1 ° 1 ' 1 ° I'

1 I' 1

So, only the bit "1" of the write data becomes the color specified by WF in this mode, and rest of other colors do not change.

Read data

1 ° ° ° 0' I:

Only the bit of light yellow becomes ",",

@ SEARCH read

+

PS ET write

• To change light yellow in

® above to change to red

• The following data are set when the memory is read after setting the light yellow search mode in the RF register.

RF register

Mode BlA Calor designation

LI_,_IL-_----'-I_o_--'-I_, ____ o---'I :

Light yellow search

• When the above read data are read after setting the red PSET mode in the WR register.

...

<J

'"

" I

0

~

i~

"

'"

'"

'"

" u

~ 1 a:

~ j t

24

Now, a partial color change has been attained.

As in above, it enhances fast display change with less of

VRAM accessing by using various write modes.

MZ-800

4-2-8. Pallet

• As there are four 4-bit pallet registers provided inside the unit, it permits choice of R, G, B, and I combinations, and it enables to make choice of any desired two or four colors out of sixteen available colors.

However, in the 320 x 200, 16-color mode, choice of colors permitted to four kinds of colors output of sixteen.

• Only the conventional mode is applicable for the

MZ-700 mode without using pallet.

• Pallet is not applicable for the border color.

<Configuration>

DB;

DB,

DB,

DB,

0

~

~ f

Pallet enable

SWitch PLTO PLTl PLT2 PLT3

SW; Bo B, B,

SW,

So S,

Inpu! select Signal

Ro

G;

R,

G,

R,

G,

B,

R,

G,

~

~

3

0

B output

~I~~:;PUI

- - 0 :

R output

~~~~;~ut

---0

~

Plane III

SA output

01

~

- - 0 I

Plane 1\-

SA output

I

"-l.o-

I output

- - 0 :

A B

Output select Signal

320 )( 200,

SWQ, 1 Plane III 1\

SR output

<Pallet output and display mode>

• Shown next is the relation of the display mode, color plane data vs R, G, G, I outputs.

Display mode Display color

Pallet output select

A B

4 color

Frame A 4 colors out of Plane I Plane n

16 colors data data

<Pallet register write> (FO

H )

(FO

H)

MSB

OUT FO

H

I x S2

1) So - S2: Register section

Pallet enable

SW o•

SW, x

LSB

S, So S2

0 0 0

0

-~-

0

0 ,

,

- .

0

1 0

0 0 1

Register No.

.-

PLT 0

PLT'

PLT 2

PLT 3

SWo• SW,

- -

- -

2) Bi, Ri, Gi, li: Pallet write data

3) SWo, SW,:

With these switches, it is possible to make combination of Planes ill and N data in the 320 x 200,

16-color mode. Switches are used to assign pallets to four groups of colors.

(Plane ill data) = SWo, (Plane N data) = SW,

Only for the color information, the color information set by the pallet register are available as B, R, G, and

I outputs. For color information other than that, data in Plane I through Plane N are sent out as the B, R,

G, and I outputs.

(See example next.)

Output select

Output Output Output Output

A B o o

Bo 10 o B, R, G, I, o o

1 B3 o

Bo Go

I

10

320 x 200

16 colors

Frame B 4 colors out of Plane ID Plane IV

16 colors data data

(Ex.)

16 colors out of

16 colors

Plane I data

Plane IT data x o

1 B2 R2 G2 12 f - - - - + - - - - - + - - - 4 - - - - - -----+-----1

1 1 B3 R3 G3 13

~

0

0

Bo Ro Go 10

SW =

(PI ane o data ill

)

I

! I

SW

'

=

( )

!

I ~_~-~-ti-:-:-+--:-:-~-~-'~--::~

1 I 1 B3 R3

2

G3 I 13

~---------+--x-4-X-~-I--~-IT-+--ID---+-IV~

640

2 colors x

I

0_ x Bo Ro Go 10

Frame A 2 colors out of Plane I x

~---~-1-6-co-l-or-s~-+_-d-a-t-a-+_---+I'~--------~~-_+-B-,_~-R-,_4-G-,-+--I-,~

Frame B

2 colors out of Plane ID

16 colors data x 200

I x

1I

I

I x r---

I

O~i-x~--B-o_+-R-o-+_-G-o~~-lo~

I , x B, R, G, I,

0 0

I

Bo Ro Go 10

1 0 I B, R, G-,-+--I-,---I

4 colors -

4 colors out of Plane I

16 colors data

Plane ID data x

! 1

25

MZ-800

(Ex.)

An example of the pallet in use in the 320 x 200,

16-color mode

• Assume that the pallet register has been set to the following. l PL TO = Black

PLT1

=

Cyan

PLT2 = Red

PL T3 = Magenta

• When SWo is set to "0" and SW, to "0", the pallet is applied to four colors in group 1 (ill = 0, N = 0) and it results in the color as shown in

CD of the table right

(yellow to cyan).

• When SWo is set to "0" and SW, to "1", four colors of group 3 (ill = 0, N = 1) becomes the display color set by the pallet.

• Therefore, any color can be chosen out of 16 colors against four colors of color group selected by SW1 and SW2.

• For group other than selected by SWo and SW" the color that I N outputted on B, R, G, I is displayed. c.

'"

Cl

Plane data

I II ill N

Display color of

1- N ..... RGBI

0 0 0 0

~ c.

'"

Cl

1 0 0 0

0 1 0 0

1 1 0 0

Black

Blue

Red

Magenta

0 0 1 0

N c.

0

'" l5

1 0 1 0

0 1 1 0

1 1 1 0

Green

Cyan

Yellow

White

SWo = 0

SW, = 0

SWo = 0

SW, = 1

PLTO = Bleck

PLT1 =Cyen

PLT2

=

Red

PL T3 = Magenta

Black

+-

+-

+-

+-

+-

+-

+-

0 0 0 1

M a.

'"

0

Cl

1 0 0 1

1 0 1

1 1 0 1 c.

0

'"

..

0 0 1 1

1 0 1 1

0 1 1 1

1 1 1 1

Gray

Light blue

Light red

Light magenta

Light green

Light cyan

Light yellow

Light white

+-

+-

+-

+-

+-

+-

+-

+-

PLTO

= Gray

PLT1

=

~\~~t

PLT2

= ~~ht

PLT3 light

+-

+-

+-

....

+-

Border color

• As the CRTC has a 4-bit border color register, it permit to use any border color out of 16 colors.

• Border register (OUT 06CF

H )

MSB

BCOLI~

__

~ X~~ ~ X~~

LSB

~ R~I~_B~

• B, R, G, and I becomes "0" (black) when reset.

4-2-9. CRTC register map

• VRAM control

• Data display on the video screen

Control I/O address map

- -

H

(B)

1/0 address l

(C, *)

- - -

- - -

- - -

- - -

- -

- - - - - - - - -

--~-

01

02

03

04

05

06

07

~

CC

CD

CE

CE

CF

CF

CF

CF

CF

CF

CF

FD

IN/OUT

0

0

0

0

0

0

0

0

0

0

0

I

Write format register (WF)

Read format register (RF)

Display mode register (DMD)

Status read

Scroll offset register l (SOF1), 8 bits

Scroll offset register R (SOF2), 2 bits

Scroll width register (SW), 7 bits

Scroll start address register (SSA), 7 bits

Scroll end address register (SEA), 7 bits

Border color register (BCOl), 4 bits

Superimpose bit (07) (CKSW), 1 bit

Pallet register

26

Written by indirect

OUT command.

B register <0-7

QUT(C),A

MZ-800

4-2-10. ROM configuration

The MZ-700 monitor, character generator (eG), MZ-800 monitor, and IPL are implemented on a single chip of

16k x 8-bit ROM.

ROM add .... soooo

, . . - - - - - - - . $0000

MZ-700 monitor

$1000

CG

$2000

Mapping address

$3000

MZ-800

IPL & monitor

$3FFF

Not used

QD-IOCS

FD

$Eooo

$E010

$ESOO (start address)

IPL & monitor

QD command

$F400

BASIC 10CS

Version

$FFFO

SFFFF

4-3. 8255 Programmable Peripheral Interface

The 8255 has three pairs of 8-bit lID ports, each one can be assigned to input or output port by means of programming. A different mapping is established depending on the mode. In the MZ-700 mode, it is {In memory space, and in the MZ-800 mode, it is on lID space.

Port name (address)

PA

( 700 $EOOO )

800 $DO

PB

( 700 $EOOl )

800 $Dl

I

Pin No.

PAo

PA,

PA2

PA3

PA.

PAs

PA7

PBo

PB,

PB2

PB3

PB.

PBs

PB.

PB7

1-------

PC INOTE-'I

( 700 $E002 )

800 $D2

PCo

PC,

PC2

PC3

Pc.

PCs

PC.

PC7

--

( 700 $E003 )

800 $D3

- -

110

0

I

- -

I

Function Active state

H

H

H

H

L

L

L

I

}Keyb~'d ~'"

"mbe

Joystick-l strobe

Joystick-2 strobe

CRT cursor blink timer reset

L

0

0

0

0

I

I

I

I

Keyboard scan input

I

+-

I

L

L

- -

L

~TE-21

J

H

- -

- -

- -

Prohibits sound output of the 8253

Cassette write data

Disables timer interrupt

Rotates the cassette motor

Checks the cassette motor

Cassette read data

CRT cursor blink timer input

Vertical blink signal

- -

Control port

NOTE-l: Output data dependent on the bit set mode.

NOTE-2: Motor is controlled on and off by the rising edge of the signal.

27

MZ-800

From keyboard

Key data input pin

(a-p)

READ

MOTOR

MOTOR

ON

WRITE

To keyboard

VBlNK

556 OUT

Key data strobe

(10-p) lS

145

PC3

PCl

PCO

PA7

PC7

PC6

PC2

PC5

PC4

PA3

PA2

PAl

PAO

PBO

I

PB7

8255

07

I

DO

Al

AO

RESET a) Key scan

Ports PAD-PAa of the 8255 are connected via the

CD @ @ @

07

I

DO

Al

AO

RD

WR

KEY

55

RESET

LS145 decoder, and PSD-PS7 are connected to the key matrix directly.

@

@

Do

28

MZ-800

Key strobe is issued through PAo-PAl to ~can the key.

As it is supplied to the decoder, it makes one of outputs,

0-9, set low. It is then added to the key matrix to scan the line of the key depressed (vertical key matrix scan).

The line is in the low state, if it is in depression

(horizontal key matrix scan).

NOTE: In the ready for command state, PAo-PAl are normally repeats to be low state and the decoder outputs repeats to be high state. But, since the decoder is of an open collector type, it would not permit to check high and low state.

Decoder side

"H" Strobe signal

8255

PB side lJ ~ey switch

Example

8255 output PA, PA

2

PA, PAo

L H L L

Only the LS145 decoder output 4 (#5 pin) is in low state.

Because the connector (5) is in low state, key scan is permitted only for keys, A through H.

State of the 8255 input port B.

PB

7

PB. PBs PB. PB, PB

2

PB, PB o

L H H H L H H L

Above stata shows that keys, A, E, or

H, is in depression. b) Cassette control

The 8255 issues the cassette write data from PC, and

CASE 1

READ

EDGE read signal through PC5. The type of data (input, output) and its format are as follows:

READ

POINT

LONG

___ ~I I I

. I'

SHORT

~

READ POINT i

SHORT

(HIGH) 240,.S

(LOW) 278,.S

LONG

(HIGH) 470,.S

(LOW) 494,.S

READ POINT

379,.S

LONG represents the bit value "'" and SHORT the bit value "0". Data will be read at 368 microseconds after the signal rising edge. Data are recorded in repetition of

LONG and SHORT, and the same data are written twice.

SHORT (

10 seconds

220CO

TAPE

MARK

1

1-1. INFORMATION

BLOCK

128 bytes

LONG 40

SHORT 40

LONG

Check sum,

2 bytes

SHORT INFORMATION Check

1 256 BLOCK sum, bytes 128 bytes 2 bytes

1

SHORT

5 seconds

LONG LONG 11000

TAPE

MARK

1

LONG 20

SHORT 20

DATA BLOCK

Check sum

2 bytes

SHORT

1 256 bytes

LONG

DATA

BLOCK

Check sum,

2 bytes

1

LONG

29

MZ-800

See next for the contents of the information block.

Name

ATRB

NAME

SIZE

DTADR

EXADR

1 - - - -

COMNT

Byte count

1

17

2

2

2

104

Function

Attribute

File name (16 characters maximum)

File byte size

Loading address

Execution address

Comment Not used

Note

CR (OD) affixed

In order of low to high order

Rotation of the cassette (dedicated) is controlled by the

8255 and its peripheral circuits.

8255

PC.

PC3~--t.

ClR

Q~

To cassette r-~-~----MOTOR r-~-+~~~SENCE

If switch has not been ON on the cassette recorder side,

SENCE signal is in high state. When a switch (REW, FF, etc.) is pushed, it makes the signal turned low. It presets the D-FF and the motor starts to rotate with MOTOR in high state. With lock given to the D-FF through PC3, it permits on/off control of the motor. If a switch is pushed on the cassette recorder side, it permits examination of the motor operating state by means of Land PC4.

-

Repeated

SENCE

1-1---------,1,..---

MOTO~

®

. L

L...---'\\---t---""F:

======:;::1

=====*==~~~====*=====~:'\ :

rL

L

=

Execution No change ·PLA Y t " of load in MOTOR is command signal (PC4) displayed.

PLAY

SW ON

End of load

For use of other than MZ-800 cassette tape recorder type, it needs to short SENCE to GND, READ to

EXREAD, and WRITE to EXWRITE of the connector T-5.

Use of the cassette recorder of other kind may sometimes not permit proper loading and saving operation.

In such an event, adjust the volume and tone controls to find the optimum positions. To meet the opposite polarity of cassette tape recorder, there is a dip switch provided. Changing the switch position makes TPSW signal state changed so as to invert the signal waveform.

30

MZ-800

DD

I

DTO

AD1

ADO

RD

WR

C53

4-4. 8253 Programmable Interval Timer

The 8253 makes sound generated with the counter #0 and internal timer is operated with the counters #1 and

#2.

• Counter mode

#0 ..... Square waveform generator MODE3

#1 ..... Rate generator MODE2

#2 ..... Interrupt on terminal counter

(8255) PC2

INT

8253

D7 OUT 2

I

DO ClK 2

A1 OUT1

AO

ClK 1

RD

OUTO

WR ClK 0

CE GATE 0

HSYN

(PlO) PA4

(PSG) Audio· in

(8255) PCO

CKMS (1.10 MHz)

53G

• The counter #0 counts input pulse of 1.1 MHz, divided by the predetermined rate (musical score data) to generate sound. It is connected with the mixing audio amplifier through AUDIO-IN of the sound IC (76489AN).

This counter output is gated by PC of the 8255 port C, and the counter gate is controlled by 001 of $E008.

The counter #0 output is also used for interrupt control INTO and connected to A4 of the Z-80A PlO port A.

• The counter #1 counts pulse of 15.6 kHz and generated a pulse on OUT1 at every second. The counter

#2 counts pulses and makes OUT2 turned high.

OUT2 outputs becomes INT via the gate and is connected to INT of the CPU.

4-5. Printer interface

The Z-80A PlO is used for the printer interface. It has a pair of 8-bit 1/0 ports.

Data bus

1

Do

D,

D,

8!

Ds

Ds

D7

BlA

CID

PlO control

GE.

{

M1

10Ra fill

+5V

GND

Interrupt control

{

INT

IEO

78/'p

,''0 A c'

Pin configuration

7

Ao

A,

A,

Aa

A.

As

~

ARDY

ASTB pon A

B,

Ba

B3

B.

Bs

Bs

B7

E!HDYJ

BSTB f

Pon B

31

CID et

1/1

M1

Pin name

00-07

Pin No.

19,20,1

40,39,38

3,2

B/A 6

I/O

1/0

Signal name

Z80-CPU Data Bus

I Port B or A Select

'iORQ

Ri)

5 I Control or Date Select

4

25

37

I Chip Enable

I System Clock

I Machine Cycle One

36 I Input Output Request

35 I Read

IEI

I--------~---

-

IEO

24

22

I Interrupt Enable in

0 Interrupt Enable Out

MZ-800

Description

Bidirectional, 3-state, Z-80 CPU bus.

Data and command transfer between the Z-80 CPU and the

PlO is carried out through this data bus. Do is the least significant digit.

Port select signal.

Depending on the state of this signal, the port is specified through which data or command is transferred between the

Z-80 CPU and the PlO.

}H : Port B

L : Port A

Controlldata select signal.

Depending on the state of this signal, control port or data port is selected for the port assigned with B/A.

B/A

L

L

H

H

CID

L

H

L

H

Selected port

Port A data

Port A control

Port B data

Port B control

Chip enable signal.

A low on this line enables the PlO. Normally connected with the 1/0 address decoder output.

System clock

CPU clock 1/1 is usually used.

Connection with CPU M1 signal (Iow active).

The PlO attains synchronization with the CPU interrupt control logic by M1. The PlO will be reset when M1 is set low at least for a period of two clock cycles after turning iORQ and Fm high state.

Connection with CPU iORQ signal (Iow active).

This signal perform data transfer between the CPU and the

PlO in connection with B/A, CID, cr, and RD. If cr,

RJ), and iORQ are low, the data on the port selected by B/A are transferred to the CPU. If cr, iORQ are low, data or command is written through the port selected by B/A.

Connection with CPU RD signal (Iow active).

This signal controls the direction of data transfer between the CPU and the PlO in connection with B/A, CID, cr, and iORQ.

Interrupt daisy chain signal. The PlO will respond to the

INTA cycle of the CPU only when this signal is high.

Interrupt daisy chain signal. This signal is high only when

IEI is not high with the PlO having an interrupt request. It goes low when IEI is low or PlO is having an interrupt request.

32

MZ-800

Pin name

TNT

Ao-A,

ASTB

ARDY

Bo-B,

BSiB f----

BRDY

Pin No.

23

15-12

10- 7

16

18

27-34

17

21

1/0

0

1/0

I

0

1/0

I

0

I

Signal name

Interrupt Request

Port A Bus

Port A Strobe

Register A Ready

Port B Bus

Port B Strobe

Register B Ready

I

I

For the MZ-800 the PlO located on the 1/0 space, and address of ports performs the following:

$FC Port A control

33

Description

Connection with CPU INT signal.

A low on this line causes the PlO to place an interrupt request to the CPU. Because it is of an open drain type, it is possible to make INT of several peripheral LSI wired OR using the pullup resistance.

- -

Port A data bus.

Data transfer is carried out with the PlO and peripheral device via this bus. AD is the least significant digit.

I

I Port A strobe.

•

I Significance of this signal depends on the Port A operational mode.

1) Byte output mode : It indicates that the peripheral device has received data from the

PlO at a riding edge of this strobe.

I

I

I

I 2) Byte input mode : Peripheral device loads data in the

I

!

I

I

PlO port A input data register at a rising edge of this strobe.

3) Bidirectional mode : The contents of the port A output

I data register are outputted on

AO-A7 when the strobe is in low state.

~tmode

: Not used .

.. .. - ._._-------

I

I

I

I

I

I

I

Register A ready.

Significance of this signal depends ot! the state of the port A operational mode.

1) Byte output mode : Data are loaded in the port A data output register when this signal goes high, makes AO-A7 stable, and it indicates that data can be transferred to a peripheral device.

2) Byte input mode : A high on this line indicates that the port A data input register is not occupied so as to be ready for receiving of a next data into the data register.

3) Bidirectional mode : This signal is used to indicate that data has been ready in the port A output data register. Data will not be issued on AO-A7 in this mode,

4) Bit mode unless ASTB turns low.

: Not used.

Port B data bus.

Function of this bus is identical to AO-A7. But, it permits to drive a Darlington transistor as the bus can supply 1.5 V, 1.5 mA. BD is the least significant digit.

Port B strobe.

Function of this signal is identical to ASTB, except for the following:

I This signal is used to load data from a peripheral device into the port A input data register, when the port A is in the bidirectional mode.

Register B ready.

Function of this signal is identical to ARDY, except for the

I following:

This signal indicates that the port A input data register is unoccupied and is ready for receiving of a next data, when the port A is in the bidirectional mode.

$FD

$FE

$FF

Port B control

Port A data

Port B data

MZ-800 l

W u.

~

<{ t: e a..

Pin name

PAD

PA,

PA2

PA3

PA.

PA5

PAs

PA,

LL

U.

~ co t: e a..

PB.

PB,

PB2

PB3

PB.

PB5

PB.

PB,

1/0

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

Active

-

-

-

-

-

-

-

-

L

-

L

-

H

H

H

H

Signal name

RDA

STA

GND

GND

Function

A low on this line indicates that the printer data is ready to receive.

A low on this line informs the personal a paper depletion during status check.

IRT

RDP

An 8253 output used for interrupt.

Horizontal blanking signal used for interrupt.

Used for printer initialization.

Indicates the printer to receive data.

RD.

RD,

RD2

RD3

RD.

RD5

RD.

RD,

Printer data or control code to the printer.

Interfacing timing

CD @ ~

RDA

PBo - PB,

RDP

X

Eff~ctive

data

Personal computer.

Personal computer sends confirms that data to the

RDAis low. printer.

I

I

I

Direct the printer to receive data.

@

~~~~2~

I I

,

After conforming high state of

RDA. it makes

RDP forced low.

After the personal computer confirms that the printer is ready to receive data at (<D), the data is then sent to $FF port (PlO port B) at step (ID).

As reception of data is directed to the printer at step

(@), it makes RDP forced low at step (@) upon confirming that the printer received it (RDA=H). After this, it awaits until RDA goes from high to low before transfer of a next data. But, it is possible to transfer successive data by interrupting the CPU at a falling edge of RDA, since RDA is inputted to the RSTB input of the PlO, when in the port B mode O.

It is also possible to interrupt the CPU referring to Port A inputs. Though discussed above is the printer interface methlod for the MZ compatible printer types, there is the

Centronics compatible method for parallel interfacing of the printer. Since this method is basically the same as the MZ mode, except that signal polarity is opposite.

IRT

MZ specification c----

- - - - - - -

-

Signal name

'------------------

RDA (NOTE)

Active l

-----,--,.

"L"

"H" RDP

"H"

Centronics specification

Signal name Active

BUSY

STB

INPUT PRIME

"H"

"L"

"L"

NOTE: Though RDA is active low, it may be handled the same as high state of BUSY when considered in term of signal significance.

As shown in the figure above, it could be known that

RDP and IRT should be inverted in order to make connection with the Centronics compatible printer.

It can be attained by changing PRSW to high using the dip switch.

NOTE: When the MZ-800 dedicated printer is used, there may be such a case that proper operation is not attained due to different printing characters and control codes. It must be also noted that all MZ-800 characters can not be printed.

Besides, connection with a Centronics compatible printer may not be permitted hardware-wise, sometimes.

4-6. Programmable sound generator

The SN76489N is used for the programmable sound generator which is controlled by the I/O port $F2. It is write only. In order to permit smooth sound generation, timer interrupt is applied using the 8253. For the interrupt timer, the count 0 of the 8253 is used. The counter 0 is used for creation of sound steps in the

MZ-700 mode, but, it is used for the timer interrupt source of the PSG in the MZ-800 mode. Interrupt is controlled by PA5 of the PlO. it is, however, possible to mask the counter 0 output by PCO of the 8255, in order to prevent sound generation during interrupt.

34

MZ-800

4-7. Joystick

It permits connection of two ATARI compatible joysticks.

ADO

JOY

~

DT 0

DT 1

DT 2

DT 3

DT

4

DT 5

8255

PA4

,l

Gl G2

-<1-

~

FWD

!

"3

BACK

LEFT

4'

RIGHT

'7

TRGl

TRG2

V

LS365

I

4tWM

+ 5V

~GND

(Configuration of joystick-1)

Low active strobes are issued through PA4 (JOY1) of the

8255 and PA5 (JOY2) interrogate switch activation through inputs to $FO (JOY1) and $F1 (JOY2).

1 - - - ,

~--I---. I

SW

'-------~~~--~I~

L ___ .J

I

I

I

I

I

2SW type only

Configuration of ATARI compatible joystick

4-8. System switch setup

System switches are assigned as follows:

SW No.

I i

Function

I

I Setup method

+--------

----L------------

1

.

I

! MZ-700/MZ-8~ ""ct~':.""'_800 mod,

I

!

MZ printer with SW2

2

3

I

I i

MZJCentronics printer

I and SW3 at ON selection i

I

I

Centronics printer with

4

I

I

. . der polarity selection

SW2 and SW3 at OFF

I I

---,-----------4

I i

Ch,"",d.o" to ,"-

I d th e externa cassette recor er.

* Switch setups at the factory

SW1 ...... OFF (MZ-800 mode)

SW2 ...... ON

SW3 ...... ON

SW4 ...... ON

} (MZ dedicated printer)

5. Power supply

5-1. Block diagram

F

ACIN

Noise filter

Rectifierl filter

Power switching

CCP

Switching transformer

Pl

~ ~Sl

__

~---'

+5 V filter

P2

Drive circuit

High voltage

+5V

OV

Chassis

L---------------l

Control

35

MZ-800

5-2. Operational description

The block diagram of the power supply unit is shown above. It adopts the self-excitation ON/ON control method. First, the source supply is rectified through the noise filter and converted into direct current. As the dc current is applied to the switching transistor, it causes the transistor to start repeating ON and OFF. After the dc voltage is converted into high frequency pulse, it is added to the primary side of the main transformer which causes to induce voltage on the secondary side.

This high frequency pulse is then rectified and filtered to obtain the dc voltage of +5 volts. For control of output voltage, the output voltage is compared with the reference voltage and its error is detected in the control section. While the switching transistor is in the OFF cycle, it makes the photo cuppler PC1 active by the detecting signal of the control section for given period.

By adjusting control current of the drive circuit, it makes the out put stabilized.

5-3. Maintenance

Cleaning

Dust deposit inside the power supply unit may becomes the cause for overheat as it prevent heat dispersion, which results in damage in component. Stains on the fuse contact and connector contact may lead to contact failure. So, it has to be cleaned using soft cloth dampened with alcohol or dry soft cloth.

5-4. Problem determination and sequence

Follow the next procedure to find the cause of trouble.

(1) Avoid removing the board to check. But visually observe the board to check for open circuit line, burnt resistor, fuse, and semiconductor chips in the first place.

(2) If a defective item were found, it has to be replaced with the new one. But. care must also taken as there are possible defects in mUltiple number of components.

<tMZ1P16~

1. SPECIFICATION

Outline

The MZ-1 P16 is the external installation 4-color plot printer designed for use with the MZ-800 series personal computer. It can be fixed on the MZ-800 when the table is used.

Specification

Type name

Print method

Print speed

Printing size

MZ1P16

1, Black; 2, Blue; 3,

Green; 4, Red

10 characters average

(smallest letter)

80/40/26 digits

(software assigned)

Character set

Resolution

Power supply

115

0.2 mm

+5 V supplied from the

MZ-800 via the DC jack

Power consumption: 11 W

Physical dimensions: 162(W) x 133(D) x 59(H),

Weight excluding accessories.

1 kg (MZ-1P16)

Accessories Roll paper (1), ball point pen (one each of black, blue, green, red). paper holder (one each on side), paper shaft (1), paper guide (1)

Operating temperaturd

Storage

0 to +35 centigrades temperature -20 to +70 centigrades

Operating humidity 80%RH, maximum

36

MZ-800

2. INSTALLATION

(Fixing the printer)

1. Fix the printer unit on the table as shown in the figure.

(Place the printer in the arrow direction (D, lightly move in the arrow direction S, then secure it with screws.)

* It is also possible to use the printer free on the table without securing.

~/

/ r=

= = = = = = = l I

Screw for securing the printer

~

Connection procedure after the installation

(D Make sure that power is off to the MZ-800 and its peripheral units.

<ID

Remove the printer connector cover on the back side of the MZ-800.

@ Connect the data cable and the power supply cable of the unit with the printer connector and the 5 VDC jack of the MZ-800.

@ For connection of the printer connector, use the screws that had been at both ends of connector.

Rear side of the MZ-BOO

't la

A~~~\-Dat~able

\ .. ) \

\c

""0 onnector cover

Power supply cable

* When this unit is in use, set the MZ-800 printer dip switch to the MZ side.

37

MZ-800

3. OPERATION

3-1. Block diagram

Connector

H

H

Buffer

I - - r--

J

1\

\

\

Intelligent interfacing

LSI

,...

Control switches

{paper feed

Reset

Pen exchange

\

,

Drive array

I--

I--

~

stepping motor

I

~

,

Magnet drive circu it

,---

I--

I--

,

~ X-axis stepping motor

-

........

,

~ ,. Pen up! down

L_ magnet

Printer mechan ism

_J

I

3-1-1. At power on

At power on, more than 5V of pen up current is applied for a period of lOrns, plus 5 and minus Orns, to move the carriage 556 steps backward on the X-axis in order to initialize the colour position. As the carriage is held at the left margin after disengagement of the motor, it is then moved 30 steps forward on the X-axis, then stepped back

30 steps again to check if the colour position detector has been made. If not, it continues to move the carriage

30 steps forward on the X-axis, then return 30 steps to ensure the made condition.

3-1-2. Colour change_ operation

To change colour, the slider makes three reciprocating movements of 6mm (30 steps) at the left end of the X-axis to move the pen position one step. When the desired pen position is attained, it then returns to the home position.

Since the pen rotor makes a unidirectional rotation at the left end of the X-axis, and is locked within printable range, care must be exerted not to touch the rotor and the slider.

3-1-3. Pen exchange operation

A pen needs to be exchanged with a fresh one when it runs out of ink. In such an event, the pen is moved 485 steps forward on the X-axis from the home position with the used pen located on the top of the rotor, then take out the used pen, by pressing the pen release lever and exchange it with a fresh one.

3-1-4. Motor phase and rotating direction

The arrow head indicates the forward direction for both the

X-axis and Y-axis.

38

MZ-800

3-2. Pen exchange method

To remove pen, press the pen exchange button, when the slider is at the right handside, push the pen release lever.

Motor

To install the pen, push the tip of the pen through the ring of the return spring in the fIrst place, then push into the holder. Upon completion, ensure that the tip of the pen is engaged with the hole of the pen return spring.

If colour change is done when the pen is disengaged from the hole, it may cause improper rotation of the rotary holder as the slider makes contact with the pen. Do not try to rotate the rotary holder by hand when installing the pen during replacement of the pens.

3-3. Stepping motor driving Signal

• The X-axis stepping motor and the Y-axis stepping motor are driven by the two-phase magnet.

Stepping motor driving signal

Basic drive pulse

Phase A

Phase B

Phase C

Phase 0

Push the pen release lever n n n

I I " :

~il";

I

'

I ' , i ! i :

, I '

I

---[[Jr-!

-+--+--+-+-

I ,

Motor clock Hold period f-----i i--tMH

--1

It is more effective to save power to shut off current while the X and Y axis motors are at a halt. But, there may be a possible malfuction because of unsuppressed vibration, if the current is turned off with a normal pulse width. In order to prevent this, current is applied excessively for more than the given hold time (tMH = lms or more).

3-4. Colour position detector

The colour pOsition detector consists of a reed switch and a permanent magnet and it may cause malfunction owing to external vibration, and magnetic influence.

Especially, when deposit of alien matter or paper fragments is between the left end of the carriage and the frame this may result in a failure of the colour detect performance.

3-5. Character set

Input of an undefmed code up to $20 is ignored. Other undefmed codes are represented in hexadecimal notation using the pen in a next color position.

Pin configuration (top view)

TO

XTAL1

XTAL2

RESET

SS

INT

EA

RD

PSEN

WR

ALE

DBo

DB,

DB,

DB3

DB.

DBs

DB,

DB,

Vss

Pin Configuration

Vcc

T1

P27

P26

P25

P24

P17

P16

P15

P14

P13

P12

P11

P10

Voo

PROG

P23

P22

P21

P20

39

MZ-800

3-6. Colour plotter printer control LSI

Pin assignment

Symbol

Vss

Ground

Name

Main power

In/out

Connected to OY.

Connected to 5Y.

Function

Vcc

Voo

RD

-

WR

RESET

ALE

PSEN

Power

PROG

Plo ~P17

P2

0

Do - D7

To

Program

Port I

I

Port 2

1

I

Data bus

Test pin 0

Tl

INT

SS

EA

I Out

In

Connected to 5Y.

Not used.

Used as printer control signals.

Used for data input port from CPU.

Used for stepper motor control signals.

Input from pen change switch.

1

Test pin 1

I i

Interrupt input

1

I

I i

I i

Read signal

Write signal

!

Reset

Address latch enable

In

In

In

I

I

Out

In

Out

I

Program store enable

I Single step

External access

I Out

In

In

I

Input from paper feed switch.

Data transfer strobe MZ700 ... MZ 1 PO 1.

Not used.

Not used.

Used to initialize the processor.

I

I Not used.

I

Not used.

Not used.

Active when EA = OY.

Xl, Xl

Crystal inputs In

Pins used to attach the crystal oscillatQr or RC network to generate internal clock. However, external clock signal may be inputted through these pins.

40

· ,vIZ-800

3·7. Interfacing with the MZ·800

Fig. 1 shows the block diagram for connection with the printer. Fig. 2 shows its circuit description. Fig. 3 shows the timing chart.

Table of character set

D

!

E

E

F

8

9

A

B c

D

7

2

3

4

5

6

0

,

I i

1

I

I

I

! iw

Q! 1 A Q i

I i

!

0 i i

I

!G#3iC'S I

I l"lwlm i

El$4DT

I

I !'V!sl i

I l[8]x5EU

I

:u; i i

[]8x6FUI

I it::1 ~--7i

I i

I i r i

I

C 8iHX i ihid!';

I

') 91 I Yj

*~IJ2!

+ ;

I

I

I i 1'1

K I

'A--

I ' ibif1oi:

!

K [

!

C lA Xi viCi~ '~I-~~:-f--l

1-

, <

L'~

I

I eli

I : '

I~

=

NI JI I

I

Ir'iuiyi

I

I

I

I

I

3·8. Block diagram

Color position detector

0 0 - - - 1

X.axis stepping motor Buffer Transistor array

ARDP---I

ARDA - - - I

MPU

V.axls stepPing motor

Solenoid driver

PEN UP/Down

Solenoid

Functional Switches

PAPER FEED

PEN CHANGE

ARDA - - - . . . ,

The CPU sends data to the printer after confirming that

ARDA is in low state. Five micro seconds later, the strobe signal ARDP goes high. The CPU confirms that ARDA is in high state, ARDP is returned to a low state 14.5 micro seconds later.

,

______

~------

41 .

ARDP--------~--~

I

I

I

I

I

14.5' :

I

I'S

I

I

L

4. COlOR PLOTTER-PRINTER CONTROL CODES

4-1. Control codes used in the text mode

• Text code ($01)

Places the printer in the text mode.

• Graphic code ($02) ................................................ Same as the BASIC PMOOE statement.

Places the printer in the graphics mode.

• Line up ($03) .......................................................... Same as the BASIC PSKIP statement.

Moves the paper one line in the reverse direction. The line counter is decremented by 1.

• Pen test ($04) ......................................................... Same as the BASIC PTEST statement.

Writes the following patterns to start ink flowing from the pens, then sets scale = 1 (40 chr/line), colour =0.

Black Blue Green Red DODO

• Reduction scale ($09) + ($09) + ($09)

Reduces the scale from 1 to 0 (80 chr/line).

• Reduction cancel ($09) + ($09) + ($OB)

Enlarges the scale from 0 to 1 (40 chr/line).

• Line counter set ($09) + ($09) + (ASCIIh + (ASCIIh + (ASCII)o + ($00)

........................................................................... Same as the BASIC PTEST statement.

Specifies the number of lines per page as indicated by the 3 ASCII bytes code. The maximum number of lines per page is 255. Automatically set to 66 when the power is turned on or the system is reset.

• Line feed ($OA) ....................................................... Same as the BASIC PSKIP statement.

Moves the paper one line in the forward direction. The line counter is incremented by 1.

• Magnify scale ($OB)

Enlarges the scale from 2 to 1. (26 chr/line)

• Magnify scale ($OC)

Reduces the scale from 2 to 1 .

• Carriage return ($00)

Moves the carriage to the left side of the print area.

• Back space ($OE)

Moves the carriage one column to the left. This code is ignored when the carriage is at the left sfde of the print area.

• Form feed ($OF)

Moves the paper to the beginning of the next page and resets the line counter to O.

• Next colour ($10)

Changes the pen to the next colour.

4-2. Character scale

• The character scale is automatically set to 1 (40 chr/line) when the power is turned on. Afterwards, it can be changed by the control codes and commands.

• In the graphics mode, the scale can be changed within the range 0 to 63.

• The scale is set to 1 when the mode is switched from graphics to text.

42

MZ-800

MZ-800

4-3. Graphic mode commands

4-3-1. Command type

In the graphics mode, the computer can control the printer with the following commands.

The words in parentheses are BASIC statements which have the same functions as the graphics mode commands.

Command name

LINE TYPE

ALL INITIALIZE

HOME (PHONE)

A

H

Format

Lp (p=O to 15)

Function

Specifies the type of line (solid or dotted) and the dot pitch. p = 0 : solid line, p = I to 15 : dotted line

Places the printer in the text mode.

Lifts the pen and returns it to the origin (home position).

INITIALIZE (HSET)

DRAW (LINE)

I

Dx, y, ... , xn, yn

(999~x, y~999)

Sets the current pen location as the origin (x = 0, y=O).

Draws lines from the current pen location to coordinates (Xl. Yt), then to coordinates (X2, Y2), and so forth.

RE LA TIVE DRAW J.:lx, .:ly, ... , .:lxn, .:lyn Draws lines from the current pen location to reI a-

(RLINE) ( - 999 ~ 999) tive coordinates (.:lxI. .:lYt), then to relative coordinates (.:lx2, .:lY2) and so forth.

MOVE (MOVE) Mx, Y

(-999~x, y~999)

Lifts the pen and moves it to coordinates (x, y).

RELATIVE MOVE R.:lx, .:ly Lifts the pen and moves it to coordinates

(RMOVE) ( - 999 ~.:lx, .:ly ~ (.:lx, .:ly).

Cn (n=O to 3) Changes the pen colour to n. COLOR CHANGE

(PCOLOR)

SCALE SET

ALPHA ROTATE

PRINT

AXIS (AXIS)

Sn (n=O to 63)

Qn (n= 0 to 3)

PCtC2C3 ... cn (n = 00)

Xp, q, r (p=O or I)

(q = - 999 to 999)

(r = I to 255)

Specifies the character scale.

Specifies the direction in which characters are printed.

Prints characters.

Draws an X axis when p = I and a Y axis when p = O. q specifies the scale pitch and r specifies the number of scale marks to be drawn.

4-3-2. Command format

There are 5 types of command formats as shown below.

1. Command character only (without parameters)

A, H, I

2. Command character plus one parameter

L, C, S, Q

3. Command character plus pairs of parameters

D, J, M, R

" , " is used to separater parameters, and a CR code is used to end the parameter list.

4. Command plus character string p

The character string is terminated with a CR code.

5. Command plus three parameters

X

" , " is used to separate parameters.

43

1

CPU P.W.B. Lavout

2 3 4 5

MZ-800

,

MZ-800

7

• •

10 n

12

F

G

46

H o

E

2 3

Cassette Recorder

Caution of the Assembling

• Be sure

® and

® must be in exact position.

Otherwise tape data will be destroyed when "play" is done.

4 5

MZ-800

6

47

MZ-800

7 8

Cassette Recorder Circuit

9 10

"," Ht.,

J

,

------------------------------------·---·

,

11

,

,

.

. "

' [ ' 0

I

,

,

,

,

I Cl ,

L

__________ _____ _

____

_________________ __ ___ __ _ _______

J

,

"

'

-

~

.

~""

"

""

.• M,., .

TotIO"'O

.....

,~''''O.

,,, _ _ _ _ _

~J'( ' ''OO< o

'.U ____ '''''"'' G",

"CO" "'",

. . . . . . ., {

".

""

",.'RHV ....

Q.f·'

.

"

' '' '1C~

'''UO

oM","",

"

.

NOT",

, ALe """'A"':' VA l ~" ." ," "

, ,"""'_,

" ,,,,",,,eo

1 . "

J

Ac'

< .... ~CI,.~CI V"~(S

.""'OR, AR, '"

, VOL T ~G"

'~,,~ . ,

V

"'''''';Uft,O '

"

OM

A"

"~Tf

'N

""t~T

. ' •

'~D

, ' ' ' ' vC,U"" <,,"HO'

'0-'"

U'HSS O,,,,.w.,, ... <0,"

I~. TO" '" C" .....

~'~I~U" '

" 0

.

G"""""

~O S<G •• L

' .... 0''''''''01<, ' ND

C',""U,"

'"."CT

'0

C""CI

wnHOO'

~{"'C,

'0.

'

'''"Ov

"

,,~''

. . , .. ' ' ' ' ' '

' ''' ,"". O"Ee ' ",,,,,"'"

-----l:.-

.",,".,"

,.,,

'"

''''

Cassette Recorder Layout

1 2

•

B

c

o

E

F

G

H

MOTOR

ER ASE fl

EAD RIP HE

A

O

I

1

I

MZ-1P16 CIRCUIT

2

"

c .. z ( ..

3

I

4

I

5

MZ-800

6

I

,

"

M 5 1-' aO~OM

L _ _ _ _

-,

MZ·1P16 LAYOUT

N I064AC

•

-8 00 MZ-800

,

1

MZ-1E20 LAYOUT

9

•

,

,

JOY STICK LAYOUT

--

•

•

o

N1063R

• •

JOY, o

•

10

"

12

•

, c o

E

F

G

-

4 8

H

1 2

Power Supply Circuit

3

4

5 6 7 B 9 10 11 12

•

•

SDI

AC 240V

SWI

FI

T~OOmA

A. LI

L.l..l

ZOOS I o o

~CI

I I

01

RB1~1 or

1 J 481

.,

10/2W

C3 e7

1.u"U.V

r-

..

.' Lh.".I.

3300,F/400Y~

2

I et

I

,

••

lOO

Q3

2SC1213D c ,.

&800P

•

.,

I . .

1

A. TI

L..!..l

Z 0110

0"

882-004

A. PCI

L.ll

PC-511

L21

IDOlS

I

I

I

I

I

I

CONNECTOR

--,

ISV

I

I

I

I

I

1

1

IG

,

DC .,lAC K

G

sv

o

, .,

.

. '. .

- j e

8 c

F

G

H

•

49

rn

CPU Unit Exteriors

NO. PARTS CODE

1 CCOVH1002ACZB

2 OUNTG1412ACZZ

3 OUNTG1413ACZZ

4 OUNTK1418ACZZ

5 OUNTK1419ACZZ

6 OUNT 1409ACZZ

7 OUNT-1420ACZZ

8 DUNT-1421ACZZ

9 DUNT-1435ACZZ

10 GCOVH1002ACZZ

11 G F TAR 1019 AC Z Z

12 G F TAR 1025 AC Z Z

13 LCHSM1018ACZZ

14 P C U S S 1 0 0 2 A C Z Z

15 QCNCW1008AC03

16 QSW-K1031ACZZ

17 QTANS1002ACZZ

18 QTANS1003ACZZ

19 VSP0080P 608 N

20 X B BSC 3 0 PlO 000

21 XBPSM30P06KSO

22 XBPSM30P08KOO

23 XUPS030P10000

24 HBOGB1003ACZZ

25 GLEGG1020CCZZ

26 PGUMS1266CCZZ

27 LANGT1077ACZZ

28 LANGT1078ACZZ

29 QCNCM1056ACZZ

30 QCNW-I111ACZZ

31 QCNW-1112ACZZ

32 Q S W- Z 1 0 3 2 A C Z Z

33 XBPSM30P06KSO

34 GCOVH1009ACZB

35 GFTAR1021ACZB

36 HPNLC1004ACZB

37 X B BSC 3 0 P 0 6 0 0 0

PRICE NEW PART

RANK MARK RANK

0 AQ

AX

AX

0

0

**

BA

BS

BM

BM

BK

AB

AB

AC

AY

AA

AC

BH

AD

AD

AN

AA

AA

AA

AA

AC

AD

AA

AC

AC

AG

AK

AG

AM

N

N

N

N

N

C

C

B

E

E

E

D

-0

0

C

C

C

C

C

C

B

C

C

C

C

0

0

C

C

C

C

C

C

B

AA

AN

AE

AE

AA

C

0

0

0

C

DESCRIPTION

I/O Cover unit

Bottom cabinet

Top cabinet

CPU PWB Unit

Joy PWB Unit

Cassette unit

Power supply unit

RF Modulator (Europe except France)

RF Modulator (France only)

Aclyric cover lid for 26P connector lid for JOY connector

Main chassis

Speaker cushion

Connector

Key board unit

Ground terminal

Ground terminal

Speaker (P008P)

Screw (3X 10)

Screw (3X6KS)

Screw

Screw (3XlO)

"Sharp" badR:e

Rubber foot

Cushion for PWB fixing angle

Angle for PWB

Angle for PWB

Connector

Cable (15pin)

Ca ble (9pin)

Dip switch (4pin)

Screw 13 x 6KS)

I/O Cover lid

I/O Panel

Screw (3X6)

MZ800

.

- 1 -

MZ800 rn

CPU Unit Exteriors

- 2 -

[lJ

I/O Cabinet Unit

NO. PARTS CODE

1 C CAB B 1 0 1 8 A C Z B

2 GFTARI024ACZA

3 LCHSMIOIOACZZ

4 L H L D Z 1 0 0 5 A C Z Z

5 QCNW-I076ACZZ

6 X B BSC 3 0 P 0 6 0 0 0

7 X B P S D 3 0 PlO K S 0

8 X UPS D 3 0 P 0 8 0 0 0

PRICE NEW PART

RANK MARK RANK

AS

AF

D

D

AQ

AD

BA

AA

AB

AA

C

C

C

C

C

C

I/O Cabinet unit

Lid for slot

I/O Chassis

PWB 2uide

Ca ble with conector (for 44pin)

Screw (3X6)

Screw (3 X lOKS)

Screw (3X8)

DESCRIPTION

.

MZ800

I---------f---

- _ .

- 3 -

MZ800

[l]

CPU Board Unit

NO. PARTS CODE

1 LBSHZ2029SCZZ

2 QCNCM1009ACZB

3 QCNCM1009ACZi

4 QCNCM1009ACZL

5 QCNCM1009ACZO

6 QCNCM1010ACZZ

7 QCNCW1013ACZZ

8 QCNCM1038ACZZ

9 QCNCW1270CC2J

10 QJAKC1013CCZZ

11 QSOCZ6418ACZZ

12 QSOCZ6428ACZZ

13 QSOCZ6440ACZZ

14 QSW-P1009ACZZ

15 RCRS 1007 AC Z Z

16 RMPTCB102QCKB

17 RMPTC8103QCKB

18 RVR-B1450QCZZ

19 VCEAAU1AW107Q

20 VCEAAA1AW227M

21 VCEAAU1EW475Q

22 VCTYPU1EX223M

23 VCTYPU1EX333M

24 VCTYPU1EX473M

25 VH 065040-032

26 VH LH0080A/-1

27 VH LH0081A/-1

28 VH LM386N//-1

29 VH MB 8 14 1 6 1 2

30 VH NE556N// 1

31 VH UPD8255/ 1

32 VH 27128/AC85

33 VH 8 2 5 3 / / / / - 1

34 VS2SC458K// 1

35 VCCCPU1HH101J

36 VCEAAU1CW106Q

37 VCEAAA1CW226Q

38 VCEAAU1HW105Q

39 VCKYPU1HB102K

40 VCSATA1CE226M

41 VCSATA1CE336M

42 VCTYPU1EX103M

43 VCTYPU1NX104M

44 VHDDS1588L1-1

45 VHiCD4069B/-1

46 VHiM74LSOO/-1

47 VHiM74LS02/ 1

48 VHiM74LS04/ 1

49 VHiM74LS08/ 1

50 VHiM74LS125 1

51 VH'M74LS14/ 1

52 VH M74LS145 1

53 VH M74LS245-1

54 VH M74LS257-i

55 VH M74LS32/-1

56 VH M74LS365 1

57 VH M74LS74/ 1

58 VH M74LS86/-1

59 VH S N 7 4 L S 3 7 3 N

60 VH SN7417N/-1

61 VHiSN76489/-1

62 VHi4164-150-H

63 VRD-ST2EYOOOJ

64 VRD S T 2 E Y 1 0 0 J

65 VRD ST2EY101J

66 VRD ST2EY102J

67 VRD-ST2EY103J

68 VRD-ST2EY104J

69 VRD S T 2 E Y 1 2 2 J

70 VRD RV2EY152J

71 VRD ST2EY182J

72 VRD-ST2EY183J

73 VRD-ST2EY221J

74 VRD-ST2EY330J

75 VRD S T 2 E Y 3 3 1 J

76 VRD ST2EY332J

77 VRD S T 2 E Y 4 7 2 J

78 VRD S T 2 E Y 4 7 3 J

79 VRD ST2EY561J

80 VRD S T 2 E Y 6 8 3 J

AA

AA

AA

AA

AA

AA

AA

AA

AA

AA

AA

AA

AA

AA

AH

AM

AH

AM

AQ

AF

AF

AG

AF

AL

AG

AW

AZ

AA

AA

AA

AA

BA

AC

AB

AB

AB

AB

AA

AB

AB

AB

AB

AD

AE

AE

AE

AE

AE

AB

BT

AX

AW

AH

AZ

AH

AV

BP

PRICE NEW PART

RANK MARK RANK

AB

AA

C Bushing

C Connector (2pin)

AC

AC

AC

AF

AC

AM

AE

AC

AD

AE

AG

AF

AV

AD

AD

C

C

C

C

C

Connector (9pin)

Connector (15pin)

Connector for Recorder (For

C Connector (JAE 50P)

C Connector for Key

B Jack (for MIC) da

DESCRIPTION

Connector for Colour encoder (l2pin)

Connector for Power supply (For power supply) ta recorder)

C IC socket (18pin)

C IC socket (28pin)

C IC socket (40pin)

B Push switch (Reset)

B X-TAL (l7.7344MHz)

B Block resistor (1.0KOx 12 1/8W ±10%)

B Block resistor (lOKox8 1/8W +10%)

AE

AB

AC

AB

AB

AB

B Variable resistor

C Capacitor (lOV 100JJF 6.5~ x 10)

C Capacitor (lOWV 27JJF)

C Capacitor (25WV 4.7JJF)

C Capacitor (25WV 0.0221' F)

C Capacitor (25WV 0.033pF)

C Capacitor (25WV 0.047 pF)

B IC

B LSI (LH0080A)

B LSI (LH0081A)

B IC

B LSI (MB81416 12)

B IC (NE556N)

B LSI (UPD8255)

B P-ROM

B LSI (8253)

B Transistor (2SC458K)

C Capacitor (50WV 100pF)

C Capacitor (l6WV 10pF)

C Capacitor (16WV 22pF)

C Capacitor (50WV 1.0pF)

C Capacitor (50WV 1000pF)

C Capacitor (l6WV 22uF)

C Capacitor (16WV 33uF)

C Capacitor (25WV O.OlpF)

C Capacitor (12WV 0.10pF)

B Diode (OS 1 588L1)

B IC

B IC M74LSOO)

B IC M74LS02)

B IC M74LS04)

B IC M74LS08)

B IC M74LS125)

B IC M74LS14)

B IC

B IC (M74LS245P)

B IC (M74LS257P)

B IC (M74LS32)

B IC (M74LS365P)

B IC (M74LS74)

B IC (M74LS86P)

B IC (SN74LS373)

B IC (SN7417N)

B IC

B IC (4164

C Resistor 1/4W +5%)

C Resistor 1/4W 100 ±5%)

C Resistor 1/4W 1000 ±5%)

C Resistor 1/4W 1KO ±5%)

C Resistor (1/4W 10KO +5%)

C Resistor (l/4W 100KO +5%)

C Resistor (l/4W 1.2KO ±5%)

C Resistor (l/4W 1.5KO +5%1

C Resistor (1/4W 1.8KO +5%)

C Resistor (l/4W 18KO +5%)

C Resistor 1/4W 2200 +5%)

C Resistor 1/4W 330 +5%)

C Resistor 1/4W 3300 +5%)

C Resistor 1/4W 3.3KO +5%)

C Resistor 1/4W 4.7KO +5%)

C Resistor 1/4W 47KO ±5%:

C Carbon resistor (l/4W 5600 ±5%)

C Resistor (l/4W 68KO +5%)

- 4 -

[!]

Key Board Unit

NO. PARTS CODE

1 OCFD5799D//// AF

2 OCF3362A///// AB

3 OCF3363A///// AD

4 OCF6303A///// AC

5 OCF3357A///// AA

6 OCF4906A///// AX

7 OCF3361A///// AB

8 OCF3364A///// AA

9 OCF3364B///// AA

10 OCF3364C///// AA

11 OCF0711C///// AA

12 OCF4274A///// BE

13 OCF6387C///// BB

14 OCF1731F///// AF

15 OCF4988A///// AN

16 OCF4976A///// AC

17 XBTSD20P06000 AA

18 OCF4274B///// AT

19 OCF4274C///// AT

20 OCF4274D///// AD

21 OCF4274E///// °A T

22 OCF4274F///// AH

23 OCF4274G///// AK

24 OCF4274H///// AF

25 OCF4274J///// AH

26 OCF4274K///// AD

27 OCF4274L///// AH

28 OCFD5000D//// AG

PRICE NEW PART

RANK MARK RANK

N

N

N

N

N

N

N

N

N

N

N

N

N

C Space key

C Crank guide F

C Crank shaft A

C Key_ contact

C Guide tip

C Frame (NSH-1)

C Crank holder F

C Return spring for 60 key)

C Return spring

C Return spring

C Return spring

C Key top set A

E PWB W. Parts fa r shift key) for space key) for hart key)

B LED

C Flat cable

C Protector

C Screw

C Key top set B

C Key_ tQP set C

C Key top set D

C Key top set E

C Key top set F

C Key top set G

C Key top set H

C Kev top set J

C Key top set K

C Key top set L

C Blank key top

DESCRIPTION

MZ800

*

Key top unit

B UNIT (1-9, 0,

*, i, -, 1. \,Q, W, E)

C UNIT (M, N, V, C, X, Z, L, K, ], H, F, S, I, U, Y, T)

D UNIT (?)

E UNIT (R, 0, P, A, D, G, B,

@, c . ; , : , ) " , ., /, l)

F UNIT (GRAPH, CR, SHIFT)

G UNIT (Fl, F2, F3, F4, F5)

H UNIT (INST, DEL)

] UNIT (i,

-+,

~,+-)

K UNIT (ALPHA, CTRL)

L UNIT (ESC, TAB, ALPHA,SHFT) r--------,

,

~<

~

I

,

&o.. _ _ _ _ _ _ _ ~

- 5 -

15

MZ800

NO. PARTS CODE

1 pco VS 0181 V A Z Z

2 P CO VS 0215 P A Z Z

3 P Z E T i 002 1 P A Z Z

4 LBNDCOO08PAZZ

5 X B B SM 20 P 0 6 0 0 0

6 X B BSC 3 0 P 0 6 000

7 XBPSC30P06KOO

8 X B P S D 3 0 P 0 8 0 0 0

9 X B P S D 4 0 P 0 8 K S 0

10 X B P S C 3 0 P 0 6 K S 0

11 QFS COO 0 2 P A Z Z

12 Q F S H A 0 0 0 1 P A Z Z

13 DSOCN0344PAZZ

14 QJAKCOO04PAZZ

15 XNESD30-24000

16 R T R N ZOO 3 5 P A Z Z

17 R T R N Z 0 1 lOP A Z Z

18 R T R N ZOO 8 1 P A Z Z

19 RVR M0089PAlZ

20 VHDRB156///-1

21 RH i X 0 4 6 4 P A Z Z

22 VRD R U 2 EEl 5 2 J

23 VRD SC2EF180J

24 VRD S C 2 EFl 5 1 J

25 RC F Z 0 3 0 C P A Z Z

26 VRD R U 2 EEl 5 1 J

27 VRD-SC2EF272J

28 RC-QZ0023PAZZ

29 RR X ZOO 0 8 P A Z Z

30 VCEAAU1AM228M

31 VCEAAU2GM105M

32 VCEAAU2GM476Y

33 VCKYPU1HB682K

34 VCKYPU1NB204Z

35 V C K Y P U 3 D B 1 0 1 K

36 VCQYKU1HM102K

37 VCQYKU1HM333K

38 VCTYPG1CD104Z

39 VHDDFC05R//-1

40 V H D 1 S 2 0 7 6 A / - 1

41 VRD-ST3AF224J

42 VRS-PT3AB1ROJ

43 VRS PT 3 DB 683 J

44 VRW-KT3DC100K

45 VS2SC1213-DlA

46 PRDAR0143PAZZ

47 PRDAR0144PAZZ

48 VHDESAC8204-2

49 VS2SC3150// 1

50 VRD-RU2EE 1 0 1 J

51 VRD SC2EF332J

52 RH-PX0075PAZZ

53 QSW-COO03PAZZ

54 QSOCAOO03PAZZ

[[] Power Supply Unit

AA

AA

AA

AC

AC

AF

AE

AB

AA

AB

AE

AC

AB

AN

AK

AA

AA

AK

AK

AF

AA

AE

AA

AA

AD

AB

AC

AD

AH

AA

AB

AA

AA

AD

AA

AF

AD

AA

AE

AT

AH

AC

AG

AF

AA

AA

AG

AF

AE

AA

AA

AA

AA

AA

PRICE NEW PART

RANK MARK RANK

N

C

B

B

C

B

B

B

C

A

C

C

C

C

C

C

C

C

C

C

C

C

N

C

C

C

B

C

C

C

B

B

C

B

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

B

C

C

C

C

C

DESCRIPTION

Case (B)

Case~A~

Barrier

Wire band

Screw (2X6)

SCrew (For heat sink INLE"Q(3X6j

Screw (For switch)(3 X 6)

Screw (For heat sink)

Screw (4PX8S)

Screwi3P X 6S1

Fuse

Fuse holder (H 0011)

Connector (out put) W. Wire

Jack~For DC~

Nut (For heat sink)

Filter coil

Transformer

Filter

Va ria ble resistor Cl KO)

Diode

IC

Resistor (1/4W 1.5KO ±5%)

Resistor (1/4W 180 ±5%)

Resistor(1/4W 1500)

Capacitor

Resistor~1/4W 1500~

Resistor Cl/4W 2.7KO ±5%)

Capacitor (AC400V 3300pF)

Resistor

Capacitor (lOWV 2200uF)

Capacitor (400WV 1.0uF)

Capacitor (400WV 47 uF)

Capacitor (50WV 6800pF)

Capacitor (12WV 0.2OuF)

Capacitori2000WV 10QQEl

Capacitor(50WV 1000pF)

Capacitori50WV 0.03~F)

Capacitorj16WV O.lOEF}

Diode

Diode Cl S2076A - FEC)

Resistor Cl W 220KO ±5%)

Metal film resistor (1 W 10 + 5%)

Resistor j.2W 68KO + 10%}

Resistorj2W 100 +100/ol

Transistor

Heat sink

Heat sink

Diode

Transistor

Resistorjl/4W 100Ql

Resistorjl/4W 3.3KOl

Photo transi~tor

AC switch

AC inlet

[Fl ]

[L2!]

[Tl]

[Ll ]

[VR21]

[D1 ]

[IC21 ]

[R9]

[R8]

[R6]

[C2]

[R7]

[R22]

[Cl,5,6]

[R4]

[C2223]

[C7]

[C3]

[C12]

Ecg]

[ClO]

[C2l]

[C25]

[Cll]

[D2]

[D3]

[R3]

[R5]

[R2]

[R!]

[Q23]

[D21]

[01]

[R21]

[R23]

[PC1]

[SW!]

[SOl]

-.

- 6 -

[[] Power Supply Unit

54

53

1

MZ800

47 '

13

,

-

MZ800

[§J

Packing Parts

NO. PARTS CODE f-f--

14

15

16

17

7

8

9 la

11

12

13

1

2

3

4

5

6

18

19

20

21

22

QACCZ3321QCN1

QACCE3620QCZZ

QCNW-1065ACZZ

QCNW-1049ACZZ

TiNSM1294ACZZ

TiNSG1212ACZZ

T LAB Z 1 0 1 0 AC Z Z

T lAB Z 1 102 AC Z Z

SSAKA5004CCZZ

SSAKHOO13HCZZ

SPAKC1556ACZZ

SPAKC1552ACZZ

SPAKA1624ACZl

SPAKA1624ACZR

SPAKA1625ACZZ

SSAKHOO14HCZZ

SSAKA0231QCZZ

R T P E K 1 0 0 6 A C 8 4

T lAB Z 1 1 0 3 A C Z Z

T lAB E l l 1 9 A C Z Z

T lAB E l l 20 AC Z Z

TlABZ1009ACZC

T lAB SI 128 AC Z Z

PRICE NEW

RANK MARK

AL

AL

BA

AN

AC

BE

N

N

AD

AD

AA

AA

AQ

AQ

AH

AH

AM

AB

AA

BB

AA

AC

AC

AA

AB

N

N

N

N

N

PART

RANK

D

D

D

D

D

C

D

D

C

D

D

D

D

D

D

D

D

D

D

D

D

D

D

DESCRIPTION

AC cord (France only)

AC cord (Eurooe except France)

Cable for TV (France onlv)

Cable for TV (Eurooe except France)

Instruction manual (Supplement)

Instruction manual Basic (Europe except France seeg)

Function label

Graphic label

Poly bag (100 X 300llln)

Poly bag (260X400llln)

Packing case (France only)

Packing case (Europe except France)

Packing cushion L

Packing cushion R

Packinll sleeve (Accessories)

Poly bag (640 X 5001llR)

Poly bag (80 X 220 30U)

Master cassette tape

Label (DC 5V} label for tape (lZ016) label for tape (lZ013)

Label

Caution

-.-~

- - -

16

14

15

4

/ 1

1

6

EUROPE Ol\L Y EXCEPT :

/ FRA!\CE

~.

10

1/

& SF-Ea

: _ /7

'::-8

J..' 1--+++---17

13

~J

"'1"'-""

CASsETTE TAPE i' -

6

7

8

9

10

1

2

3

4

5 rn

Cassette Unit Exteriors

NO.

11

12

13

PRICE NEW PART

PARTS CODE

RANK MARK RANK o

B V 0 7 5 7 1 7 0 043 AA N D Tape mirror o

B V 6 6 1 1 8 200 0 2 AC N C Cassette lid sprinll o

B V 6 6 8 8 0 0 0 0 1 7 AT N D Cabinet ass'y o

B V 6 6 8 8 0 4 0 0 1 9 AL N D Cassette lid ass'y o

B V 6 6 8 8 2 2 0 0 1 5 AC N D Plate o

B V 9 7 1 0 2 6 0 4 1 4 AA o

B V 9 7 1 1 2 6 0 4 1 7 AA

C

C

Screw (P2.6X4 SN)

Screw (T2.6X4-SN) o

B V 9 7 1 8 2 6 0 5 1 1 AA N C Screw (P2.6X5-SN-S) o

B V 9 7 6 0 2 6 1 0 1 8 AA N C Screw (TP2.6XI0-SN-A) o

B V 6 6 8 0 0 1 0 0 0 5 BG N E Amp PWB unit o

B V 6 6 8 0 4 0 0 0 1 7 BP N E Mechanism ass'y o

B V 0 6 4 6 3 1 000 6 AA N C Lead wire clamp o

B V 6 6 8 5 4 0 000 1 AG N C Connector (9pin)

DESCRIPTION

MZ800

- -

--

.-

. _ -

-

.

.

__

..

-

-

4-----"'''''-

3 - - - - - - - - - /

5 - - - - - - - 1

11------ -

8

- 9 -

~--9

1 .. ----

12

~---------9

MZ800

[ID

Mechanism Unit (For Cassette)

NO. PARTS CODE DESCRIPTION

PRICE NEW PART

RANK MARK RANK

I OBV0210680007

2 o B V 0 2 I 128 0 0 0 6

3 o B V 0 2 2 2 8 3 000 I

4 o B V 0 4 4 0 8 0 0 0 0 4

5 o B V 0 5 6 0 6 9 0 0 0 4

6 o B V 0 5 6 0 8 0 0 0 0 9

7 o B V 0 5 609 5 0 0 0 5

8 o B V 0 6 3 0 1 2 1 009

9 o B V 0 6 3 0 2 2 0 0 0 9 la o B V 0 6 3 0 6 0 0 0 0 7

11 o B V 0 6 3 196 0 0 0 1

AN

AH

AW

AM

AD

AD

AD

AA

AA

AA

AA

N

N

N

N

N

N

N

B

B

B

B

B

B

B

C

C

C

C

Record -:j:llay back head

Erase head

Motor

Tape co unter

Counter

Ca psta n belt

Gear belt

EXT spring

EXT spring

EXT ~ing

EXT spring

12 o B V 0 6 3 1 9 8 2 0 0 9 AA

-

-

13 o B V 0 6 3 199 200 2 AA

--14 o B V 0 6 3 2 0 6 0 0 0 5 AA

15 o B V 0 6 3 2 0 7 0 0 0 8 AA l~t)O

B V 0 6 3 5 1 1 0 0 0 0

17 0 B V 06-3 6 9 7 3 0 0 2

-181 0 B V 5 6 2 4 1 5 0 0 0 3

IW+.!!..!!

V

0

6 5 3 3 8 0 0 0 9

20 0 B V 3 8 0 I 2 9 0 0 0 9

AA

AA

AF

AA

AC

N

N

N

N

C

C

C

C

C

C

C

C

EXT spring

EXT spring

EXT ~ing

EXT spring

COM spring

SPl spring

Sprin&. lead-wire ciamper

21 -2?i ! 0 B V 3 8 0 1 3 1 1 0 0 7

0 BV 3 8 0 1 3 2 1 0 0 0

AD

AC

C

C

Record lever

Play lever

23 0 B V 3 8 0 1 3 3 1 0 0 3 j4 r

AC

O-S: l l..80 134 1 006 AD N C F.F. lever

AA

N C

C

Rewind lever

Flywheel shaft supporter

1H~ ~~~H{~_U ~ ~ ~ ~

28 ,OB V 6 5 0 I 3 6 1 0 0 6

29rOj:i--':~6

5 0 1 3 7 2 0 0 0

AC

AB

AD

AC

N

N

N

C

C

C

C

Stop lever

Record switch sPIing

Flvwheel Base lock plate

C Safety lever

AB C Eject arm 300BV6501380001 filJi-~~H--~+:~! ~ ~

341TBv650-14j-looo

: AB

AB

AB

N

N

C

C

C

Stoll.arm

Reverse cue lever

Record lock lever

A E C Take-up arm set

3st-lfaT&-s(f14TooQTAF C Pinch roller base ass'y

-

36 lOB V 6 5 0 I 4 6 1 0 0 7

-37

AG lo-sv65

0 1 8 3 2 0 0 3 AC

3sro-sv65Ols-4ToosAC

3911J3:f656T 6 3 0 0 0 6 AB

40 i

0 B V 6 5 0 2 2 5 1 0 0 5 AD

N

C

C

C

C

C

6 Push switch base

Push s~ring

Stopper spring

Arm su~~rt A

Switch shaft N

:Ht~ ~+H~-; ~ ~ ~ ~ ~

43 . 0 B V 6 5 0 2 5 9 5 0 0 4

AK N

___ A F --t-N

Flywheel

Take- up reel base ass'y l~lrrt-Trrn ~ ~ ~ ~ i

AF

A B ___

AB

N C

C

C

Reel base ass'v A

Take-up gear

Take-llQ lever

46 ,OB V 6 5 0 2 7 5 2 0 0 1

_~?T~):i

V_

65T-Z::-f-Zo

0 0 2

48,OBV6502930005

A-F -N

49106-,r6502940008-

AA N

50 ra-B V 6 6 2 8 6 2 0 0 2 4

AG

A-F

AD

N

N

N

C

C

C

C

C

C

C

Clutch ass'y

Rewind arm ass'Y.

First foward arm ass':!,

Tension pick u~

Push button

5110 B V 6 6 6 1 0 5 0 0 0 8

~. ~ ~11f~~~J~+ ~ ~

H

~ ~

AG r--

AB

A A

__ 54 1 (LBX 6§ _~ L~jU!JLQ.2_

55 ' 0 B V 6 6 8 1 2 0 0 0 0 7 f-A S

AE

56

59-it _0_B_V __ L 6 8 2 7 0 0 0 0 5

57 ,OB V 9 7 1 0 2 0 0 2 5 4 AA j8_}QJLY_~_LLQ.1Jl_01._W--f-

A A

Q_E3 _'L~_7 __ L.Q.1.. QQ.4 1 6

60 i

0 B V 9 7 1 0 2 0 0 5 1 9

AG

AA

AA

AA ~g_E3"y 9 7 1 2 2 0 0 4 1 2

-*t~-~ ~ ~ H~ ~ ~ H 6

-(;4 OBV9760260811

__ AA

AA

AA

1l,OBV9870012005 i210-BV 9 8 7 4 0 0 2 0 0 4 j j r b--ifv9TI-To26004--

- ------t-

-i-----------

tA

AA

A

_AA_t

I i

~+.::~=------

--

- ---r----

- - - - - - - - - -

-l-

I

I

I

I r

I

N

N

N

N

N

N

N

N + g

I

C

C

C

C

C

C

C

C

C

C

--65lOEi V 9 7 9 9 0 2 4 0 0 6 N AA

&~-HS. V-J-~llJl.JJi~2...=b~

- -

67 0 B V 9 8 1 1 0 2 5 1 4 5 A A

-6S;-OBV98TI0301431 A A

j91-QJf~ ~_L~LQ_

iJL

1

U_-:-

:=MT-

70 0 B V 9 8 7 0 0 0 3 0 0 3 , A A,

N

=t C

C

C

I

C

C

C

C

C

C

C

C

Head base ass'v

Switch lever

EXT Spring

Mechanism chassis ass'y

Angle

Motor su~~ort

Screw (P2X2-SK)

Screw (P2X3-SN)

Screw (P2X4-SN)

Screw (P2X5-SN)

ScrewJ_l2X4 SN~

Screw(P2X4-SN-S)

Screw (P2XI0-SN)

Screw (Self tapp TP2.6X8-SN-A)

Screw (P2X4.7-SN)

E Tvpe ring (ZR1.5-SU)

E Type ring (ZR2.5-SU)

-~----------~~--

--

-~

- -

--

--

- -

- - - - - -

--

---------~-~~~~~-"--"

---~-~

!

E

T~~e rin: tZR3'-SU) lET e rin SW2-SN)

: Washer (W021060030SN)

----~-----------

--~-~----.----~

_________ ________

Washer W0210450ill ___ ~~ ~~

Washer {WP012036025)

----~~-----------~-----------

----------------~--~~

--

-10-

[ID

Mechanism Unit (For Cassette)

i~;

_ _ _ _ _ _ _

~~~--i--

-

1+!-

, r -

56 -~~-~-'~j

,

~

2:~~"

67 ~_35

~~,----17

~ ------4

49

51

2~ ck

,

~ ~

, 62

Jp

37

. $-34

I

&'

56

'~15 b'

~-65

' - - - - 5 9

4 0 - - - - ,

11.-..--55

- - - 6 2

6 0 ' - - - -

5 2 - -

6 6 - - - -

4 3 - - - - -

" --------:;;:T'--:-:

20'---~=__-

31

6 7 - - - - - - - - .

~~==-==-~ -=--==--=~~?----f{{

33 I

~ i

!

-.g~/?:~_i\il_~

26

Jl.

56-

--------~':3

7 ( \ h \ 60

--~

:: &.~ ..... .

59

::~

-11-

-~-44

~--73

L~---42

L - - - - 5

J~

Qf""

L - - - - - - 4 5

66 ti. 67

MZ800

[9J

PWB Unit (For Cassette)

NO. PARTS CODE

PRICE NEW PART

RANK MARK RANK

DESCRIPTION

1 o B V 0 3 6 4 1 8 0 0 0 2 AH B Slide SW

2 o B V 0 3 6 5 8 0 0 0 0 8

3

-A F N B Leaf SW o

B V 9 0 2 0 0 4 6 2 5 0 AF N B Transistor (2SC2120 Y)

B Diode 4 V HOD S 1 5 8 8 L 2 1

5

AB o

B V 9 1 103 4 0 0 0 8 AK N

6

7 o

B V 9 205 1 1 8 149 AA N C Resistor (R014018lJ 1800) o

B V 9 2 086 1 0 2 4 8 AA N o

B V 9 2 086 1 034 1 AA N

B IC (uPC1470P)

C Resistor (R016Tl 02JT 1 KO)

8

C Resistor (R016Tl03JT 10KO) o

B V 9 2 086 1 034 1 AA N C Resistor (ROI6Tl 03JT 10KO)

9 o B V 9 2 0 8 6 1 5 140 AA N C Resistor (ROI6TlSlJT lS00)

10 o B V 9 208 6 1 534 6

11

12 o B V 9 2 0 8 6 1 544 9 AA N C Resistor (ROI6TlS4JT lS0KO) o

B V 9 2 0 8 6 2 0 540 AA N C Resistor (ROI6T20SJT)

13 o B V 9 2 0 8 6 2 2 243 AA N C Resistor (R016T222JT 22KO)

14 o B V 9 2 086 2 2 346

15 o B V 9 2 0 8 6 2 2 449

16 o B V 9 2 0 8 627 145

17 o B V 9 2 0 8 6 3 3 144

AA

AA

AA

AA

AA

N

N

N

N

N

C Resistor (ROI6TlS3JT ISKO)

C Resistor (ROI6T223JT 22KO)

C Resistor{ROl6T224JT 220KOl

C Resistor (R016T271JT 27001

C Resistor (ROI6T331JT 3300)

18 o B V 9 2 0 864 7 048

19

AA N C Resistor (ROI6T470JT 470) o

B V 9 2 0 8 647 141 AA N C Resistor (ROI6T471JT 4700)

20 o B V 9 2 0 8 6 4 734 7 AA N C Resistor (ROI6T473JT 47KO)

21 o B V 9 2 0 8 6 5 6 040

22

AA N C Resistor (ROI6TS60JT S60) o

B V 9 2 0 8 6 5 6 246 AA N C Resistor (ROI6TS62JT S.6KO)

_23 o

B V 9 2 0 8 6 5 644 2 AA N C Resistor (ROI6TS64JT S60KO)

24 o B V 9 2 0 8 682 148 AA N C Resistor (ROI6T82lJT 8200)

25 o B V 9 2 0 8 6 8 224 1 AA

AC

N

N

C Resistor (ROI6TS22JT S.2KO)

C Resistor (RNPI4T20lJS 2000) _,26 o B V 9 2 2 7 1 2 0 142

27 o B V 9 2 5 0 3 4 7 046

-2"8

O'B V 92 98020 1 74

AB

AD

29 ~_V9318310250 AC

-30 o B V 9 3 1 8 3 4 7 3 5 9

31 o B V 9 3 4 9 0 1 0 1 6 1

AC

AD

N

N

N

N

N

C Resistor (RS08AB3A470J 470 1 W)

C Variable resistor (POSH3C201N 2000)

C Capacitor (C04SXl EI02K)

C Capacitor (C04SXIE473K)

C Capacitor (CE04WOJI0IMU)

-----¥OBV9349022063 AC C Capacitor (CE04WOJ220MU) c----

34

35

1---~6

37

AD o

B V 9 3 4 9 2 100 6 0 AC o

B V 9 3 4 9 5 0 1 061 AC o

B V 9 3 495 1 0 960 AC

N C Capacitor (CE04WOJ470MU)

C Capacitor (CE04WICI00MU)

C Capacitor (CE04WIHOI0MU)

C Capacitor (CE04WIHRI0MU) o

B V 9 9 0 5 2 1 005 1 AD N C Coil (SSI00K)

38 VHiUPC358C/ 1 c--l-~

AG B IC o

B V 9 0 2 0 0 4 5 5 5 8 AD N B Transistor (2SClSIS-GR) t----- f----

I --I

[Q]

MZ -1 P 16 Exterio rs

NO.

I

PARTS CODE

~~I~~ ~f;fK ~~~~

---itc:cABB 1 0 0 6 A C Z A A M N 0 Cabinet top

2 G CAB B 1 0 0 8 A C Z B

. 3 G CAB B 1 0 0 8 A C Z C

-- "4

C-F TAT 1 0 0 1 A C Z A

- - 5 G F TAT

A L

A K

N

N

0 Cabinet top

0 Lid i

0 0 9 A C Z A A E N D Lid for oen chanlle

6 P C U T I 0 0 1 A C Z A

A C

A 0

---7CS

F T Z 1 0 alA C Z Z A H

8 0 U N T M 1 0 5 1 A C Z Z

-9 JKNBT

B W

N

C Holder

0 Paper cut

E Paoer shaft unit

E Printer mechanism unit

DESCRIPTION

_

10 n:fLoTl 0 0 2 A CL 2

-U--!-~ H L 0 Z 1 0 0 2 A C R 2

AB N 0 Holder

I

AA B~_-"-N'--+-...,0;o.--+:H::,o"'ld"'e"-.r--,--;--_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

_~_ PG IOW 1 0 0 1 A C Z Z

13 P S P A B 1 0 0 3 A C Z Z

_--I~h.pJE

T El 0 0 5 A C Z Z A

A-+--=~::::~C~::::!~ln~s~ul~at~o~r~sh~e~e~t ~::::::::::::::::::::::::::::::::::::=-

15'QCNW-I013ACZZ

I

A A

AD

-+--'0;o.--+:P""'a~pelrc.Jll;>"u""id"'e'_:_:_---------------------------l

C Collar for printer

C Ground wire

___________________

16 0 U N T K 1 4 2 5 A C Z Z B F N

-"17 0 U N T K 1 4 2 6 A C Z Z A L N

E CPU PWB unit

E Switch PWB unit

_-:~ G LEG P 1 O_..9_~l-~Cc-C:--=Z;.cZ~-+-""'A'-'B=__+_-_:_;___+-C=__t_'Lo_=u:.-cb7'be~r;_'_f=oo'-'t_;_;_--_ _ _ _ _ _ _ _ _ _

--i(j-h

A N GKJ.---oaiA-C:--=;Z--"ZI---+-7 H

N

N

C c

I

Angle for cable

21--l..! C H S M 1 0 1 6 A C Z Z

.. -. 22: LCHS"MTo 1 7 A C Z Z

A M

A Q

N

N

C Bottom chaSSIS

- 23 tQ

C N W- 1 1 0 8 A C Z Z A L

!

~Ncl---+---:C=---ECC"a:;-:-bl:=e-ofo-r-po-'w-e-r

- - - - - - - - - - - - - - - - - - - - - - - - - 1

-24"10

C

N IN =-flO9A

C Z Z

=t=--BD--r--~N-~~-=-_=:~C~__l-t_';:71/~F~C;a~b~le;;~~::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::-::::::::::::::::::::::::::::::::::::::::::::-::::::::::::::::=-_---1

" 2sTr·rS'F

T Z 1 0 0 1 A t u

A C I C Paoer holder

26 ! N S F T Z 1 0 0 1 A C Z B A G

:,jJJXREST4O=-O''60

0 0 A A

29 X B P S 0 3 0 P

6 0 tl 0 A A

+ __

C Paoer shaft

, C Screw (3 x 6)

-30 X U B S 02 6 P 0 8 0 0 0 A A ' C Screw

31 I X U B S 0 2 6 PlO 0 0 0

--32 IX B P S M 3 0 P 06 K S 0

A A I C

I

Screw

6KSl

[SWl-SWl-3]

[SW2]

[Q3,Q4]

[01 04]

[lC2]

[R20]

[R21 R6]

[RI8,10,9,713IS 28]

[R27]

[RI9]

[R3]

[Rll]

[RI4]

[RI2]

[RI6]

[RI]

[R30]

[R22]

[R2]

[R26]

[R23 R4]

[R8]

[RIl]

[R29]

[R31]

[R24]

[R32]

[R2S]

[VR!]

[C2,S]

[CI0]

[C9]

[Cl]

[C8]

[C3]

[C6]

[C4,Cl Cll]

[Ll ]

[lC!]

[Ql,Q2,QS]

" 12-

[IQ]

MZ -1 P 16 Exterio rs

NO. PARTS C.ODE

33 XBPSM30P08KOO

34 QC NW-Ill 0 A C Z Z

35 QSW-PIOIOACZZ

36 QSW PIOIIACZZ

37 LX BZOO38FCZZ

38 P Z ET VIOl 0 AC Z Z

PRICE NEW PART

RANK MARK RANK

AA

AE

AC

AD

AA

AC

N

N

C

C

C

C

C

C

DESCRIPTION

Screw

Connector (4pin)

Push switch (Paper feed)

Push switch (Pen Change,Reset)

Screw

Insulator

-13-

6---

18

MZ800

[ll] MZ-IPI6 Main PWB Unit

NO. PARTS CODE

1 QCNCMI009ACZD

2 QCNCMIOl5ACZZ

3 QCNCM2414RC2F

4 QCNW 1012ACZZ

5 QSOCZ6440ACZZ

6 RCRSZI006ACZZ

7 RMPTC8332QCKB

8 VCCCPUlHHlOOD

- · 9

VCEAAUlAWl07Q

.-

--

10 VCEAAUlHW225Q

11 VCKYPUIHB331K

12 VCTYPUINXI04M

13 VHDDSI588L2-l

14 VHEHZIIA/// 1

15 VHi L B I 2 5 7 / / 1

16 V HiM 5 M 8 0 5 0 H 0 1

17 VHiM74LS244-1

18 VHiSN75451B-l

19 VRD-ST2EYI03J

20 VRD ST2EYI04J

21 VRD ST2EY221J

22 VRD-ST2EY332J

23 VRD-ST2EY561J

24 VRD-ST2EY562J

25 VS2SA673-C/-l

26 VS2SB739-//-1

27 VS2SC458KS/-I

28 VS2SD788 C/EC

PRICE NEW PART

RANK MARK RANK

AB C

AC

AH

A L

AG

AD

AD

AA

B

C

C

C

C

B

AB

AB

AA

C

C

C

C

AB

AB

AC

AM

AZ

AM

C

B

B

B

B

B

B AG

AA

AA

AA

AA

AA

AA

C

C

C

C

C

C

AE

AD

AC

AC

B

B

B

B

DESCRIPTION

Connector (4pin)

Co nnector{~pinl.

Connector (26pin)

Connector wire

IC socket (40pin)

X TAL 6MHZ

Block resistor (3.3Kox8 1/8W +10%)

Capacitor (50WV 10pF)

Capacitor 10V 1001lF 6.5.pXlO)

Capacitor 50WV 2.211F)

Capacitor 50WV 330pF)

Capacitor l2WV O.lOllF)

Diode (DS1588L2)

Zener diode (HZllA)

IC

LSI

IC (M74LS244P)

IC (SN7545l B)

Resistor (l/4W 10KO ±5%)

Resistor (1/4W 100KO +5%1

Resistor (1/4W 2200 ±5%)

Resistor (1/4W 3.3KO +59102

Carbon resistor (l/4W 5600 +5%)

Resistor (l/4W 5.6KO +5%)

Transistor (2SA673-C)

Transistor

Transistor (2SC458KS)

Transistor (2SD788 C/EC) c

[2] MZ-I PI6 Packing Parts

NO. PARTS CODE

1 TiN S E 1 2 1 3 A C Z Z

2 PC US SI 0 14 AC Z Z

3 PCUSS1015ACZZ

4 SPAKA1559ACZZ

5 SPAKCI560ACZZ

6 SSAKAOO06UCZZ

7 SSAKHOOl5HCZZ

8 SSAKA0231QCZZ

9 SSAKA20 1 OKCZZ

10 SSAKA5004CCZZ

11 T LAB S 0 9 1 8 F C Z Z

12 TLABZI027ACZA

13 TLABJI083CCZZ

PRICE NEW PART

RANK MARK RANK

AG

AL

N

N

D

D

AH

AH

AH

AA

N

N

N

D

D

D

D

AA

AA

AA

AA

AA

AB

AA

N

D

D

D

D

D

D

C

DESCRIPTION

Instruction book

Packing cushion A

Packing cushion B

Packinj;! accessories

Packing case

Poly bag (50 x 60mm)

Poly bag (180X280mm)

Poly bag (80 x 220 30Ul

Poly baj;! (240X300mm)

Poly baj;! (lOO X 300mm)

F mark label

Pen label

Label (U.K. only) (Made in Japan)

- c----

- - - f----_ ..

~---

-~--

_.

_.

--

-

•

-14-

. -

- -

..-

[l2J

MZ-l P16 Packing Parts

,3

MZ800

,5

[l

MZ-l E20

NO, PARTS CODE

1 LANGT1080ACZZ

2 SPAKA1589ACZZ

3 SPAKC1590ACZZ

4 SSAKH3010CCZZ

5 T 5 ELF 1 0 0 2 A C Z Z

6 XBPSD30P06KSO

PRICE NEW PART

RANK MARK RANK

AK

AE

AT

AA

AA

AA

N

N

N

C

0

0

0

0

PWB angle

Packing cushion

Packing case

Poly bag (180 x 240nn) label

C Screw (3X6KS)

DESCRIPTION

•

-15-

MZ800

• Index

PARTS CODE NO.

PRICE NEW PART

RANK MARK RANK

(C 1

CCABBI006ACZA 10I AM N 0

-CC A B B I 0 (8 A C Z B 2I AS 0

CCOVHI002ACZB 1I AQ 0 cTrATIOOIACZA 104 AK N 0

---Tor--

107 AH E

DSOCN034 4 PAZ Z 5- 13 AF

D U I 4 0 9 A C ZZ 16 BS

C

B

DUNT-1420ACZZ 17 BM N E

C Z Z 18 BM N E

DUN-i'-=ITj 5 ACZZ u-r:,ffG141zACU-

NTG1Tf-jAC-n

I

---:----

1-

9 BK

2

3

OUN-fK 14 18ACZZ 14

AX

AX

** N

E

0

0

C b UN-fKl4 I 9 A C Z Z 15 BA N C

-bUNTK142S-AC Z Z 10- 16 B F N E b-UNTK 14 2 6 AC Z Z 10- 17 AL N E

DUNTMI051ACZZ 108 BW

--rG]-

E c;9~J;lJ!LQ~~_~~ 102 AC C

GCABBI008ACZC 103 AL N 0

GCOVHlO 02 ACZZ 1- 10 AB

G C-OV-HlOO§ A C Z B 1- 34 AN

0

0

GFTA'RIO 19ACZZ III AB df'TARI021ACZB 1- 35 AE

0

0

GTTARI024ACZA 22 AF

GFTARI025ACZZ 1- 12 AC nATTOoTIc Z A 105 AE

GLE.GGI020CCZZ 1- 25 AD

GCE-GPIOOICCZZ 10- 18 AB

N

0

0

0

D

C

H

(H 1

BO-G sffiTA C Z 0 z-

-j-

24 AC ifp N L C I 0 0 4 A C Z B 1- 36 AE

( J

TKNBZI005AC02 109 AG N 0

( L

1

1

CANGK 1082 ACZ'Z 1020 AH

LANGTI077ACZZ 1- 27 AC

N

0

C

C

LANGTI078ACZZ 1- 28 AC C

CANGTI079ACZZ 10- 19 AB N C

TANGTI080ACZZ 13I AK N C lBNOCOO08PAZZ 54 AA C

LBSHZ2029SCZZ 3I AB

CCHSMIOIOACZZ 23 AQ

C

C

LCHSMIOl6ACZZ 10- 21 AM N C

LCHSMIOl7ACZZ 10- 22 AQ N 0

LCHSMIOl8ACZZ 1- 13 AY C

T, -HT6 Z I 0 0 2 A CL 2 10- 10 AB N 0

TH-LDZl- 0 0 2 A C R 2 lOII AB N 0

THLDZ"lO"05 A

czz-

~:

24 AD C

TX-BZ0038FCZZ 10- 37 AA C

(N

NSFTZIOOIACZA 10- 25 AC

NSFTZIOOIACZB 10- 26 AG

(P

1

1

PCOVSO 181 VAZZ 5I AG

PCOVS0215PAZZ 52 AF

PCUSSI002ACZZ 1- 14 AA

C

C

C

C

C

~SUSS I 0 14ACZZ 122 AL N 0

PCUSS1015ACZZ 123 AH N 0

~_C U T -1 0 0 1 A C Z A 106 AD N 0

0' PGiOW1001ACZZ 10- 12 AB

PGUMS1266CCZZ 1- 26 AA f-pRbARO 143 PAZZ 5- 46 A F

C

C

PROAR0144PAZZ 5- 47 AE

PSPAB1003ACZZ 10- 13 AA

P'ZETE1005ACZZ 10- 14 AA

C

C

C

PZETi0021PAZZ 53 AE C

PZETV1010ACZZ 1038 AC N C

(Q 1

QACCE3620QCZZ 62 AL

-£':AC C Z 3 f'2-1QC NI 61 AL

QCNCM1009ACZB 32 AA

QCNCM1009ACZO Ill AB

QCNCM1009ACZi 33 AC

QCNCM1009ACZL 34 AC

QCNCM1009ACZO 35 AC

QCNCM1010ACZZ 36 AF

QCNCMI015ACZZ 112 AC

0

C

C

C

C

C

C

C

B

--16--

PARTS CODE NO.

PRICE NEW PART

RANK MARK RANK

QCNCM1038ACZZ 38 AM

QCNCM1056ACZZ 1- 29 AG

QCNCM2414RC2F 113 AH

QCNCW1008AC03 1- 15 AC

C

C

C

QCNCW1013ACZZ 37 AC

QCNCW1270CC2J 39 AE

QCNW 1012ACZZ 114 AL

C

C

C

C

QCNW 1013ACZZ 10- 15 AD

QCNW 1049ACZZ 64 AN

QCNW-1065ACZZ 63 BA

C

C

0

QCNW-1076ACZZ 25 BA C

QCNW-1108ACZZ 10- 23 AL N C

QCNW-1109ACZZ 10- 24 BD N C

QCNW-I110ACZZ 1034 AE N C

QCNW 1111ACZZ

QCNW 1112ACZZ 1- 31 AG

QFS COO02PAZZ

QFSHAOO01PAZZ 512 AA

QJAKCOO04PAZZ 514 AD

QJAKC1013CCZZ

1-

5-

30

11

3- 10

AK

AD

AC

C

C

A

C

C

B

QSOCAOO03PAZZ 554 A F

QSOCZ6418ACZZ 311 AD

QSOCZ6428ACZZ 3- 12 AE

QSOCZ6440ACZZ 3- 13 AG

IJ

115 AG

QSW-COO03PAZZ 5- 53 AK

C

C

C

C

C

B

QSW-K1031ACZZ 1- 16 BH

QSW-P1009ACZZ 3- 14 A F

QSW P1010ACZZ 10- 35 AC

QSW P1011ACZZ 1036 AD

QTANS1003ACZZ 1- 18 AD

[ R 1

RC FZ030CPAZZ 5- 25 AE

RC QZ0023PAZZ 5- 28 AD

RCRS 1007ACZZ 3- 15 AV

C

B

C

C

QSW-Z1032ACZZ 1- 32 AM N B

QTANS1002ACZZ 1- 17 AD C

C

C

C

B

RCRSZ1006ACZZ 116 AD

RH-iX0464PAZZ 5- 21 AF

RH-PX0075PAZZ 5- 52 AK

RMPTCB102QCKB 3- 16 AD

C

B

B

RMPTC8103QCKB 317 AD

RMPTC8332QCKB

RR-XZOO08PAZZ

RTPEK1006AC84 6- 18 BB 0

RTRNZ0035PAZZ 5- 16 AE N B

RTRNZ0081PAZZ 5- 18 AH

RTRNZ0110PAZZ 5- 17 AT

RVR B1450QCZZ

117 AD

5- 29

3- 18

AB

AE

B

B

B

C

C

B

B

RVR-MO 0 89 PAZZ 5- 19 AC

( S 1

B

SPAKA1559ACZZ 124 AH N 0

SPAKA1589ACZZ 132 AE N 0

SPAKA1624ACZL 6- 13 AH N 0

SPAKA1624ACZR 6- 14 AH N 0

SPAKA1625ACZZ 6- 15 AM N 0

SPAKCI552ACZZ 6- 12 AQ N 0

SPAKCI556ACZZ 611 AQ N 0

SPAKCI560ACZZ 125 AH N 0

SPAKCI590ACZZ 133 AT N 0

SSAKAOO06UCZZ 126 AA 0

SSAKA0231QCZZ 6- 17 AA

IJ

128 AA

0

0

SSAKA2010KCZZ 129 AA

SSAKA5004CCZZ 69 AA

IJ

12- 10 AA

SSAKHOOl3HCZZ 6- 10 AA

SSAKHOOl4HCZZ 6- 16 AB

SSAKHOOl5HCZZ 127 AA

0

0

0

0

0

0

SSAKH3010CCZZ 134 AA

[T]

0

TiNSEI213ACZZ 12I AG N D

TiNSG1212ACZZ 66 BE N D

TiNSM1294ACZZ 65 AC N 0

TLABE 1119ACZZ 6- 20 AC 0

TLABEl120ACZZ 6- 21 AC

TLABJ1083CCZZ 1213 AA

TLABS0918FCZZ 1211 AA cJl-_ABS 112 8ACZZ 6- 22 AB

TLABZI009ACZC 6- 21 AA

0

C

0

0

D

- -

PARTS CODE NO.

PRICE NEW PART

RANK MARK RANK

TLABZ1010ACZZ 67 AD 0

TLABZ1027ACZA 12- 12 AB N 0

TLABZ1102ACZZ 68 AD

TLABZ1103ACZZ 6- 19 AA

TSELF1002ACZZ

[ V ]

135 AA

0

0

0

VCCCPU1HH1000 118 AA

VCCCPU1HH101J 335 AB

VCEAAA1AW227M 3- 20 AC

VCEAAA1CW226Q 3- 37 AB

C

C

C

C

VCEAAU1AM228M 530 AC

VCEAAU1AW107Q 3- 19 AB

1/

119 AB

VCEAAU1CW106Q 336 AB

VCEAAU1EW475Q 3- 21 AB

VCEAAU1HW105Q 338 AB

VCEAAU1HW225Q 1110 AB

VCEAAU2GM105M 5- 31 AD

VCEAAU2GM476Y 5- 32 AH

VCKYPU1HB102K 3- 39 AA

VCKYPU1HB331K 11- 11 AA

VCKYPU1HB682K 533 AA

VCKYPU1NB204Z 534 AB

C

C

C

C

C

C

C

C

C

C

C

C

VCKYPU3DB101K 5- 35 AB

VCQYKU1HM102K 536 AA

VCQYKU1HM333K 5- 37 AB

VCSATA1CE226M 340 AB

VCSATA1CE336M 3- 41 AB

C

C

C

C

C

VCTYPG1CD104Z 538 AE

VCTYPU1EX103M 3- 42 AB

VCTYPU1EX223M 3- 22 AB

VCTYPU1EX333M 3- 23 AB

VCTYPU1EX473M 3- 24 AB

VCTYPU1NX104M 3- 43 AB

C

C

C

C

C

C

1/

11-

C

12 AB C

VHDDFC05R//-1 5- 39 AC N B

B

B

VHDDS1588L1-1 344 AD

VHODS1588L2-1 94 AB

1/

1113 AB

VHDESAC8204-2 548 AN

VHORB156/// 1 5- 20 AG

VHD1S2076A/-1 540 AB

VHEHZ11A///-1 1114 AC

VH C04069B/-1 3- 45 AE

VH 065040-032 3- 25 BT

VH LB1257//-1 1115 AM

VH LH0080A/-1 3- 26 AX

VH LH0081A/-1 3- 27 AW

VH LM386N//-1 3- 28 AH

VH MB81416-12 3- 29 AZ

VH M5M8050H01 1116 AZ

VH M74LSOO/-1 346 AE

VH M74LS02/-1 3- 47 AE

VHiM74LS04/ 1 348 AE

VHiM74LS08/-1 3- 49 AE

VHiM74LS125-1 3- 50 AH

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

VHiM74LS14/-1 3- 51 AM

VHiM74LS145-1 3- 52 AH

VHiM74LS244-1 1117 AM

VH iM74LS245-1 3- 53 AM

VHiM74LS257 1 354 AQ

VHiM74LS32/ 1 3- 55 AF

VHiM74LS365 1 356 AF

VHiM74LS74/ 1 3- 57 AG

VHiM74LS86/-1 358 AF

VHiNE556N//-1 3- 30 AH

VHiSN74LS373N 3- 59 AL

VHiSN7417N/ 1 360 AG

VHiSN75451B 1 1118 AG

VHiSN76489/-1 3- 61 AW

VHiUPC358C/-1 938 AG

VHiUPD8255/-1 3- 31 AV

VHi27128/AC85 3- 32 BP

VHi4164 1 5 0 H 3- 62 AZ

VHi8253//// 1 3- 33 BA

VRO RU2EE101J 5- 50 AA

VRO RU2EE151J 5- 26 AA

VRD RU2EE152J 5- 22 AA

VRD RV2EY152J 3- 70 AA

VRD-SC2EF151J 5- 24 AA

B

B

B

B

B

B

B

B

B

B

C

C

C

C

C

B

B

B

B

B

MZ800

-17-

PARTS CODE

V R 0-5 C 2E F 1 8 0 J 5- 23 AA

VRO-SC2EF272J 5- 27 AA

VRO-SC2EF332J 5- 51 AA

VRO-ST2EYOOOJ 3- 63

PRICE NEW PART

RANK MARK RANK

AA

VRO-ST2EY100J 364 AA

VRO-ST2EY 1 0 1 J 3- 65 AA

VRO-ST2EY102J 366 AA

VRO-ST2EY 1 03 J 3- 67 AA

1/ 1119 AA

VRO-ST2EY104J 368 AA

1/ 1120 AA

VRO-ST2EY122J 3- 69 AA

VRO-ST2EY 18 2 J 371 AA

VRO ST2EY183J 372 AA

VRO-ST2EY221J 373 AA

1/

1121 AA

V R D-S T 2E Y 3 3 0 J

1/

3- 74

11-

AA

VRO ST2EY331J 3- 75 AA

VRO-ST2EY332J 3- 76 AA

22 AA

VRD-ST2EY472J 377 AA

VRO-ST2EY473J 3- 78 AA

VRO-ST2EY561J 3- 79 AA

1/

1123 AA

VRO-ST2EY562J 1124 AA

VRO ST2EY683J 380 AA

VRO ST3AF224J 5- 41 AA

VRS PT3AB1ROJ 5- 42 AA

VS2SA673 C/ 1

VS2SC1213 01A

NO.

VRS-PT30B683J 5- 43 AA

VRW-KT30C100K 544 AC

VSP0080P 608N 1- 19 AN

1125

5- 45

AE

VS2SB739 / / 1 1126 AD

AC

VS2SC3150//-1 5- 49 AK

VS2SC458K//-1 334 AC

VS2SC458KS/-1 1127 AC

VS2S0788-C/EC 1128 AC

[ X ]

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

B

B

B

C

C

B

B

B

XBBSC30P06000 1- 37 AA

1/

1/

26 AA

56 AA

1/ 10- 28 AA

XBBSC30P10000 120 AA

XBBSM20P06000 55 AA

XBPSC30P06KSO 5- 10 AA

XBPSC30P06KOO 57 AA

XBPS030P04KOO 1029 AA

XBPSD30P06KSO

XBPS030P08000

XBPS030P10KSO

13-

5-

2-

6 AA

8 AA

7 AB

XBPS040P08KSO 59 AA

XBPSM30P06KSO 1- 21 AA

1/

1/

133 AA

1032 AA

XBPSM30P08KOO 122 AA

1/

1033 AA

XNES030 24000 5- 15 AA

XRESJ40-06000

XUBS026P08000

10- 27

1030

AA

AA

XUBS026P10000 10- 31 AA

XUPSD30P08000 28 AA

XUPS030P10000 1- 23 AA

[ 0 ]

C

C

OBV0210680007 81 AN N B

OBV0211280006 82 AH N B

OBV0222830001 83 AW N B

OBV0364180002 91 AH B

OBV0365800008 92 AF N B

OBV0440800004 84 AM N B

OBV0560690004 85 AD N B

OBV0560800009 86 AD N B

OBV0560950005 87 AD B

OBV0630121009 88 AA N C

OBV0630220009 89 AA

OBV0630600007 8- 10 AA

C

C

OBV0631960001 811 AA C

OBV0631982009 8- 12 AA N C

OBV0631992002 8- 13 AA N C

OBV0632060005 8- 14 AA N C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

- -

MZ800

PARTS CODE

OBV0632070008

OBV0635110000

OBV0636973002

OBV0646310006

OBV0653380009

OBV0757170043

OBV3801290009

OBV3801311007

OBV3801321000

OBV3801331003

OBV3801341006

OBV500 1700005

OBV5624150003

OBV6221800005

OBV6501180009

OBV6501361006

OBV6501372000

OBV650 138000 1

OBV650 1390004

OBV6501401009

OBV6501413004

OBV6501461007

OBV6501471000

OBV6501480002

OBV6501832003

OBV6501841005

OBV6502030006

OBV6502251005

OBV6502300505

OBV6502584000

OBV6502595004

OBV6502620009

OBV6502660001

~BV6502752001

OBV6502920002

OBV6502930005

OBV6502940008

·OBV6611820002

OBV6628620024

OBV6661050008

OBV6661410000

~BV6674000003

OBV66800 1 0005

OBV6680400017

OBV6681000005

OBV6681200007

OBV6682700005

OBV6685400001

OBV6688000017

OBV6688040019

OBV6688220015

OBV9020045558

OBV9020046250

OBV9110340008

OBV9205118149

OBV9208610248

OBV9208610341

11

OBV9208615140

OBV9208615346

OBV9208615449

OBV9208620540

OBV9208622243

OBV9208622346

OBV9208622449

OBV9208627145

~~V9208633144

OBV9208647048

OBV9208647141

08'.'9208647347

OBV9208656040

OBV9208656246

OBV9208656442

OBV9208682148

OBV9208682241

OBV9227120142

OBV9250347046

OBV9298020 174

OBV9318310250

OBV9318347359

NO.

97 AA

98 AA

98 AA

99 AA

910 AA

911 AA

912 AA

913 AA

914 AA

9IS AA

916 AA

917 AA

918 AA

919 AA

920 AA

921 AA

922 AA

923 AA

924 AA

925 AA

9- ·26 AC

927 AB

928 AD

929 AC

930 AC

72 AC

850 AD

851 AG

852 AB

853 AA

710 BG

711 BP

854 AS

855 AE

856 AG N

713 AG N

73 AT

74 AL

75 AC

N

N

N

939 AD

93 AF

95 AK

96 AA

N

N

N

N

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C.

C

C

C

C

C

C

C

C

C

B

B

B

C

C

C

C

C

D

D

D

PRICE NEW PART

RANK MARK RANK

815 AA

816 AA

817 AA

712 AA

819 AA

71 AA

820 AC

821 AD

822 AC

823 AC

824 AD

825 AA

818 AF

826 AC

827 AB

828 AD

829 AC

830 AB

831 AB

832 AB

833 AB

836 AG

834 AE

N

N

N

N

N

N

N

N

N

N

835 AF

837 AC

838 AC

839 AB

N

840 AD

841 AK

8- 42 AF

N

N

843 AF

844 AB

N

N

845 AB

846 AG

847 AF

848 A F

N

N

N

849 AA N

N

N

N

N

N

N

N

N

N

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

D

C

C

C

C

C

C

C

E

E

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

N

-l~-

OBV9349010161

OBV9349022063

OBV9349047064

OBV9349210060

OBV9349501061

OBV9349510960

OBV9710200254

OBV9710200313

OBV9710200416

OBV9710200519

OBV9710260414

OBV9711260417

OBV9712200412

OBV9718200410

OBV9718260511

OBV9743551004

OBV9760260811

OBV9760261018

OBV9799024006

OBV9811015142

OBV9811025145

OBV9811030143

OBV9862020115

OBV9870003003

OBV9870012005

OBV9874002004

OBV9874026004

OBV9905210051

PARTS CODE NO.

PRICE NEW PART

RANK MARK RANK

931 AD

932 AC

933 AD

N

N

9-

9-

34 AC

35 AC

936 AC

857 AA N

858 AA

859 AA

860 AA

76 AA

77 AA

861 AA

862 AA

78 AA

863 AA

864 AA

79 AA

865 AA

866 AA

867 AA

N

N

N

868 AA

869 AA

870 AA

87l AA

872 AA

873 AA

937 AD

N

N

N

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

C

MZ 800

112BB03~ 4

•

71 93 1-1 05 S l MMl800

------------------------------

203 250887 17 20007000

1

R

SHARP

C

OR PORATION ndustrial Instrument Group

I .

Control

Dept .

Reliability & OJaIity

.

Nara

639-" ."pan

,

_

October

, 1984

,

Printed in Japan

®