User manual | Cal Flame FPT-80 Hardware manual

FUJITSU SEMICONDUCTOR

DATA SHEET

DS704-00012-1v0-E

16-bit Proprietary Microcontroller

F

2

MC-16FX MB96630 Series

MB96F633R/A, MB96F635R/A,

MB96F636R, MB96F637R

 DESCRIPTION

MB96630 series is based on FUJITSU’s advanced F

2

MC-16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established F

2

MC-16LX family thus allowing for easy migration of F

F

2

MC-16LX Software to the new F

2

MC-16FX products.

2

MC-16FX product improvements compared to the previous generation include significantly improved performance - even at the same operation frequency, reduced power consumption and faster start-up time.

For high processing speed at optimized power consumption an internal PLL can be selected to supply the

CPU with up to 32MHz operation frequency from an external 4MHz to 8MHz resonator. The result is a minimum instruction cycle time of 31.2ns going together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources independent of the CPU speed.

Note: F

2

MC is the abbreviation of FUJITSU Flexible Microcontroller.

FUJITSU SEMICONDUCTOR provides information facilitating product development via the following website.

The website contains information useful for customers. http://edevice.fujitsu.com/micom/en-support/

Copyright© 2011-2012 FUJITSU SEMICONDUCTOR LIMITED All rights reserved

2012.11

FUJITSU SEMICONDUCTOR CONFIDENTIAL r2.0

MB96630 Series

 FEATURES

• Technology

0.18

µm CMOS

• CPU

• F 2

MC-16FX CPU

• Optimized instruction set for controller applications

(bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers)

• 8-byte instruction queue

• Signed multiply (16-bit × 16-bit) and divide (32-bit/16-bit) instructions available

• System clock

• On-chip PLL clock multiplier (×1 to ×8, ×1 when PLL stop)

• 4MHz to 8MHz crystal oscillator

(maximum frequency when using ceramic resonator depends on Q-factor)

• Up to 8MHz external clock for devices with fast clock input feature

• 32.768kHz subsystem quartz clock

• 100kHz/2MHz internal RC clock for quick and safe startup, clock stop detection function, watchdog

• Clock source selectable from mainclock oscillator, subclock oscillator and on-chip RC oscillator, independently for CPU and 2 clock domains of peripherals

• The subclock oscillator is enabled by the Boot ROM program controlled by a configuration marker after a

Power or External reset

• Low Power Consumption - 13 operating modes (different Run, Sleep, Timer, Stop modes)

• On-chip voltage regulator

Internal voltage regulator supports a wide MCU supply voltage range (Min=2.7V), offering low power consumption

• Low voltage detection function

Reset is generated when supply voltage falls below programmable reference voltage

• Code Security

Protects Flash Memory content from unintended read-out

• DMA

Automatic transfer function independent of CPU, can be assigned freely to resources

• Interrupts

• Fast Interrupt processing

• 8 programmable priority levels

• Non-Maskable Interrupt (NMI)

• CAN

• Supports CAN protocol version 2.0 part A and B

• ISO16845 certified

• Bit rates up to 1Mbps

• 32 message objects

• Each message object has its own identifier mask

• Programmable FIFO mode (concatenation of message objects)

• Maskable interrupt

• Disabled Automatic Retransmission mode for Time Triggered CAN applications

• Programmable loop-back mode for self-test operation

2 DS704-00012-1v0-E

FUJITSU SEMICONDUCTOR CONFIDENTIAL

MB96630 Series

• USART

• Full duplex USARTs (SCI/LIN)

• Wide range of baud rate settings using a dedicated reload timer

• Special synchronous options for adapting to different synchronous serial protocols

• LIN functionality working either as master or slave LIN device

• Extended support for LIN-Protocol to reduce interrupt load

• I 2 C

• Up to 400kbps

• Master and Slave functionality, 7-bit and 10-bit addressing

• A/D converter

• SAR-type

• 8/10-bit resolution

• Signals interrupt on conversion end, single conversion mode, continuous conversion mode, stop conversion mode, activation by software, external trigger, reload timers and PPGs

• Range Comparator Function

• Scan Disable Function

• Source Clock Timers

Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer)

• Hardware Watchdog Timer

• Hardware watchdog timer is active after reset

• Window function of Watchdog Timer is used to select the lower window limit of the watchdog interval

• Reload Timers

• 16-bit wide

• Prescaler with 1/2 1

, 1/2

2

, 1/2

• Event count function

3

, 1/2

4

, 1/2

5

, 1/2

6

of peripheral clock frequency

• Free-Running Timers

• Signals an interrupt on overflow, supports timer clear upon match with Output Compare (0, 4)

• Prescaler with 1, 1/2 1

, 1/2

2

, 1/2

3

, 1/2

4

, 1/2

5

, 1/2

6

, 1/2

7

, 1/2

8

of peripheral clock frequency

• Input Capture Units

• 16-bit wide

• Signals an interrupt upon external event

• Rising edge, Falling edge or Both (rising & falling) edges sensitive

• Output Compare Units

• 16-bit wide

• Signals an interrupt when a match with Free-running Timer occurs

• A pair of compare registers can be used to generate an output signal

• Programmable Pulse Generator

• 16-bit down counter, cycle and duty setting registers

• Can be used as 2 × 8-bit PPG

• Interrupt at trigger, counter borrow and/or duty match

• PWM operation and one-shot operation

• Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock as counter clock or of selected Reload timer underflow as clock input

• Can be triggered by software or reload timer

• Can trigger ADC conversion

• Timing point capture

• Start delay

DS704-00012-1v0-E 3


MB96630 Series

• Quadrature Position/Revolution Counter (QPRC)

• Up/down count mode, Phase difference count mode, Count mode with direction

• 16-bit position counter

• 16-bit revolution counter

• Two 16-bit compare registers with interrupt

• Detection edge of the three external event input pins AIN, BIN and ZIN is configurable

• Real Time Clock

• Operational on main oscillation (4MHz), sub oscillation (32kHz) or RC oscillation (100kHz/2MHz)

• Capable to correct oscillation deviation of Sub clock or RC oscillator clock (clock calibration)

• Read/write accessible second/minute/hour registers

• Can signal interrupts every half second/second/minute/hour/day

• Internal clock divider and prescaler provide exact 1s clock

• External Interrupts

• Edge or Level sensitive

• Interrupt mask bit per channel

• Each available CAN channel RX has an external interrupt for wake-up

• Selected USART channels SIN have an external interrupt for wake-up

• Non Maskable Interrupt

• Disabled after reset, can be enabled by Boot-ROM depending on ROM configuration block

• Once enabled, can not be disabled other than by reset

• High or Low level sensitive

• Pin shared with external interrupt 0

• I/O Ports

• Most of the external pins can be used as general purpose I/O

• All push-pull outputs (except when used as I 2

C SDA/SCL line)

• Bit-wise programmable as input/output or peripheral signal

• Bit-wise programmable input enable

• One input level per GPIO-pin (either Automotive or CMOS hysteresis)

• Bit-wise programmable pull-up resistor

• Built-in On Chip Debugger (OCD)

• One-wire debug tool interface

• Break function:

- Hardware break: 6 points (shared with code event)

- Software break: 4096 points

• Event function

- Code event: 6 points (shared with hardware break)

- Data event: 6 points

- Event sequencer: 2 levels + reset

• Execution time measurement function

• Trace function: 42 branches

• Security function

• Flash Memory

• Dual operation flash allowing reading of one Flash bank while programming or erasing the other bank

• Command sequencer for automatic execution of programming algorithm and for supporting DMA for programming of the Flash Memory

• Supports automatic programming, Embedded Algorithm

• Write/Erase/Erase-Suspend/Resume commands

• A flag indicating completion of the automatic algorithm

• Erase can be performed on each sector individually

• Sector protection

• Flash Security feature to protect the content of the Flash

• Low voltage detection during Flash erase or write

4 DS704-00012-1v0-E


MB96630 Series

 PRODUCT LINEUP

Product Type

Features MB96630

Flash Memory Product

Remark

Subclock

Dual Operation Flash Memory RAM

64.5KB + 32KB 10KB

128.5KB + 32KB

256.5KB + 32KB

384.5KB + 32KB

Package

DMA

USART

16KB

24KB

28KB

Subclock can be set by software

-

MB96F633R, MB96F633A

MB96F635R, MB96F635A

MB96F636R

MB96F637R

LQFP-80

FPT-80P-M21

4ch

5ch

Product Options

R: MCU with CAN

A: MCU without CAN

LIN-USART 0/2/4/5/7 with automatic LIN-Header transmission/reception with 16 byte RX-and

TX-FIFO

Yes (only 1ch)

No

LIN-USART 0

I

2

C

8/10-bit A/D Converter with Data Buffer with Range Comparator with Scan Disable with ADC Pulse Detection

16-bit Reload Timer (RLT)

16-bit Free-Running Timer (FRT)

16-bit Input Capture Unit (ICU)

16-bit Output Compare Unit (OCU)

2ch

21ch

No

Yes

Yes

No

3ch

3ch

7ch

(1 channel for LIN-USART)

7ch

I

2

C 0/1

AN 2 to 4/6 to 8/

10 to 12/15 to 17/20 to 28

RLT 0/1/6

FRT 0 to 2

ICU 0/1/4 to 7/9

(ICU 9 for LIN-USART)

OCU 0 to 4/6/7

(OCU 4 for FRT clear)

8/16-bit Programmable Pulse Generator

(PPG) with Timing point capture with Start delay with Ramp

Quadrature Position/Revolution Counter

(QPRC)

15ch (16-bit) / 20ch (8-bit)

Yes

Yes

No

2ch

PPG 0 to 4/6 to 15

QPRC 0/1

CAN Interface

External Interrupts (INT)

Non-Maskable Interrupt (NMI)

Real Time Clock (RTC)

I/O Ports

1ch

15ch

1ch

1ch

62 (Dual clock mode)

64 (Single clock mode)

1ch

2ch

CAN 0

32 Message Buffers

INT 0 to 13/15

Clock Calibration Unit (CAL)

Clock Output Function

Low Voltage Detection Function Yes

Low voltage detection function can be disabled by software

Hardware Watchdog Timer

On-chip RC-oscillator

Yes

Yes

On-chip Debugger Yes

Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package.

It is necessary to use the port relocate function of the general I/O port according to your function use.

DS704-00012-1v0-E 5


MB96630 Series

 BLOCK DIAGRAM

CKOT0_R, CKOT1, CKOT1_R

CKOTX0, CKOTX1, CKOTX1_R

X0, X1

X0A, X1A

RSTX

MD DEBUG I/F

OCD

16FX

CPU

NMI

Interrupt

Controller

Flash

Memory A

Clock &

Mode Controller

16FX Core Bus (CLKB)

DMA

Controller

SDA0, SDA1

SCL0, SCL1

AVcc

AVss

AVRH

AN2 to AN4, AN6 to AN8

AN10 to AN12, AN15 to AN17

AN20 to AN28

ADTG

TIN0, TIN1

TOT0, TOT1

FRCK0, FRCK0_R

IN0, IN0_R, IN1_R

OUT0 to OUT3

OUT0_R, OUT2_R

FRCK1

IN6, IN7

IN4_R, IN5_R, IN7_R

OUT6, OUT7

FRCK2

Watchdog

I 2 C

2ch

16-bit Reload

Timer

0/1/6

3ch

I/O Timer 0

FRT0

ICU 0/1

OCU 0/1/2/3

I/O Timer 1

FRT1

ICU 4/5/6/7

OCU 4/6/7

I/O Timer 2

FRT2

ICU 9

Peripheral

Bus Bridge

8/10-bit ADC

21ch

INT0, INT4 to INT13, INT15

INT1_R to INT3_R

INT6_R, INT7_R

External

Interrupt

15ch

Peripheral

Bus Bridge

USART

5ch

PPG

20ch (8-bit)

QPRC

2ch

Real Time

Clock

CAN

Interface

1ch

15ch (16-bit)/

RAM

RX0

TX0

Voltage

Regulator

Vcc

Vss

C

SIN0, SIN2, SIN4, SIN5, SIN7, SIN5_R, SIN7_R

SOT0, SOT2, SOT4, SOT7, SOT5_R, SOT7_R

SCK0, SCK2, SCK4, SCK5_R, SCK7_R

TTG0, TTG2 to TTG4, TTG6, TTG7, TTG12 to TTG14

PPG0, PPG1, PPG3, PPG4, PPG6

PPG0_R to PPG2_R, PPG8_R to PPG13_R

PPG6_B to PPG11_B, PPG14_B, PPG15_B

AIN0, AIN1

BIN0, BIN1

ZIN0, ZIN1

Boot ROM

WOT, WOT_R

6


DS704-00012-1v0-E

 PIN ASSIGNMENT

MB96630 Series

(Top view)

Vss

P00_3 / INT6_R / PPG8_B

P00_4 / INT7_R / PPG9_B

P00_5 / IN6 / TTG2 / TTG6 / PPG10_B

P00_6 / IN7 / TTG3 / TTG7 / PPG11_B

P01_1 / CKOT1 / OUT0 / SOT7

P01_2 / CKOTX1 / OUT1 / INT15 / SIN7 * 1

P01_4 / SIN4 / INT8 * 1

P01_5 / SOT4

P01_6 / SCK4 / TTG12 * 1

P01_7 / CKOTX1_R / INT9 / TTG13 / ZIN0 / SCK7_R * 1

P02_0 / CKOT1_R / INT10 / TTG14 / AIN0 / SOT7_R

P02_2 / IN7_R / CKOT0_R / INT12 / BIN0 / SIN7_R * 1

P02_5 / OUT0_R / INT13 / SIN5_R * 1

P03_2 / PPG14_B / SOT5_R

P03_3 / PPG15_B / SCK5_R * 1

P03_4 / RX0 / INT4 * 1

P03_5 / TX0

P03_6 / INT0 / NMI

Vcc

61

60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41

40

62 39

63 38

64 37

65 36

66 35

67 34

68 33

69 32

70

71

LQFP - 80

31

30

72 29

73 28

74 27

75 26

76 25

77 24

78 23

79 22

80

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

21

Vcc

P10_2 / SCK2 / PPG6 * 1

P10_1 / SOT2

P10_0 / SIN2 / AN28 / INT11 * 1

P17_2 / PPG13_R

P17_1 / PPG12_R

P09_3 / AN27 / PPG11_R

P09_2 / AN26 / PPG10_R

P09_1 / AN25 / PPG9_R

P09_0 / AN24 / PPG8_R

P08_7 / AN23 / PPG7_B

P08_6 / AN22 / PPG6_B

P08_5 / AN21 / OUT7

P04_7 / SCL1* 2

P04_6 / SDA1* 2

P08_4 / AN20 / OUT6

P08_1 / AN17

P08_0 / AN16

P05_7 / AN15

P05_4 / AN12 / INT2_R / WOT_R

(FPT-80P-M21)

*1: CMOS input level only

*2: CMOS input level only for I 2 C

*3: Please set ROM Configuration Block (RCB) to use the subclock.

Other than those above, general-purpose pins have only Automotive input level.

DS704-00012-1v0-E


7

MB96630 Series

FRCKn

FRCKn_R

INn

INn_R

INTn

INTn_R

MD

NMI

OUTn

OUTn_R

Pnn_m

PPGn

AINn

ANn

AVcc

AVRH

AVss

BINn

C

CKOTn

CKOTn_R

CKOTXn

CKOTXn_R

DEBUG I/F

PPGn_B

RSTX

RXn

SCKn

SCKn_R

SCLn

SDAn

SINn

SINn_R

SOTn

SOTn_R

TINn

TOTn

TTGn

TXn

Vcc

Vss

WOT

 PIN DESCRIPTION

Pin name

ADTG

PPGn_R

Feature

ADC

Description

A/D converter trigger input pin

QPRC

ADC

Supply

ADC

Supply

QPRC

Quadrature Position/Revolution Counter Unit n input pin

A/D converter channel n input pin

Analog circuits power supply pin

A/D converter high reference voltage input pin

Analog circuits power supply pin


Voltage regulator Internally regulated power supply stabilization capacitor pin

Clock Output function Clock Output function n output pin

Clock Output function Relocated Clock Output function n output pin

Clock Output function Clock Output function n inverted output pin

Clock Output function Relocated Clock Output function n inverted output pin

OCD On Chip Debugger input/output pin

Free-Running Timer

Free-Running Timer

ICU

ICU

External Interrupt

External Interrupt

Core

External Interrupt

OCU

OCU

GPIO

PPG

PPG

PPG

Core

CAN

USART

USART

I

2

C

I

2

C

USART

Free-Running Timer n input pin

Relocated Free-Running Timer n input pin

Input Capture Unit n input pin

Relocated Input Capture Unit n input pin

External Interrupt n input pin

Relocated External Interrupt n input pin

Input pin for specifying the operating mode

Non-Maskable Interrupt input pin

Output Compare Unit n waveform output pin

Relocated Output Compare Unit n waveform output pin

General purpose I/O pin

Programmable Pulse Generator n output pin (16bit/8bit)

Relocated Programmable Pulse Generator n output pin

(16bit/8bit)

Programmable Pulse Generator n output pin (16bit/8bit)

Reset input pin

CAN interface n RX input pin

USART n serial clock input/output pin

Relocated USART n serial clock input/output pin

I

2

C interface n clock I/O input/output pin

I

2

C interface n serial data I/O input/output pin

USART n serial data input pin

USART

USART

USART

Reload Timer

Reload Timer

PPG

CAN

Supply

Supply

RTC

Relocated USART n serial data input pin

USART n serial data output pin

Relocated USART n serial data output pin

Reload Timer n event input pin

Reload Timer n output pin

Programmable Pulse Generator n trigger input pin

CAN interface n TX output pin

Power supply pin

Power supply pin

Real Time clock output pin

8 DS704-00012-1v0-E


Pin name

WOT_R

X0

X0A

X1

X1A

ZINn

Feature

RTC

Clock

Clock

Clock

Clock

QPRC

MB96630 Series

Description

Relocated Real Time clock output pin

Oscillator input pin

Subclock Oscillator input pin

Oscillator output pin

Subclock Oscillator output pin


DS704-00012-1v0-E


9

MB96630 Series

 PIN CIRCUIT TYPE

Pin no.

1

I/O circuit type*

Supply

2

3

4

F

H

H

24

25

26

27

28

29

17

18

19

20

21

22

23

11

12

13

14

15

16

7

8

5

6

9

10

30

31

32

33

34

35

36

37

38

39

40

K

K

N

N

K

K

Supply

K

K

K

K

K

K

K

K

K

K

Supply

G

M

H

M

N

N

I

K

H

H

K

K

K

K

I

H

M

Supply

10


Pin name

Vss

C

P13_2 / PPG0 / TIN0 / FRCK1

P13_3 / PPG1 / TOT0 / WOT

P13_4 / SIN0 / INT6

P13_5 / SOT0 / ADTG / INT7

P13_6 / SCK0 / CKOTX0

P04_4 / PPG3 / SDA0

P04_5 / PPG4 / SCL0

P06_2 / AN2 / INT5 / SIN5

P06_3 / AN3 / FRCK0

P06_4 / AN4 / IN0 / TTG0 / TTG4

P06_6 / AN6 / TIN1 / IN4_R

P06_7 / AN7 / TOT1 / IN5_R

AVcc

AVRH

AVss

P05_0 / AN8

P05_2 / AN10 / OUT2

P05_3 / AN11 / OUT3

P05_4 / AN12 / INT2_R / WOT_R

P05_7 / AN15

P08_0 / AN16

P08_1 / AN17

P08_4 / AN20 / OUT6

P04_6 / SDA1

P04_7 / SCL1

P08_5 / AN21 / OUT7

P08_6 / AN22 / PPG6_B

P08_7 / AN23 / PPG7_B

P09_0 / AN24 / PPG8_R

P09_1 / AN25 / PPG9_R

P09_2 / AN26 / PPG10_R

P09_3 / AN27 / PPG11_R

P17_1 / PPG12_R

P17_2 / PPG13_R

P10_0 / SIN2 / AN28 / INT11

P10_1 / SOT2

P10_2 / SCK2 / PPG6

Vcc

DS704-00012-1v0-E

MB96630 Series

Pin no.

41

42

43

44

65

66

67

68

69

70

71

58

59

60

61

62

63

64

52

53

54

55

56

57

45

46

47

48

49

50

51

I/O circuit type*

Supply

O

H

C

H

M

M

H

H

M

M

H

H

Supply

Supply

H

H

H

H

H

H

H

H

H

A

A

Supply

B

B

C

H

Pin name

Vss

DEBUG I/F

P17_0

MD

X0

X1

Vss

P04_0 / X0A

P04_1 / X1A

RSTX

P11_1 / PPG0_R

P11_2 / PPG1_R

P11_3 / PPG2_R

P11_6 / FRCK0_R / ZIN1

P11_7 / IN0_R / AIN1

P12_0 / IN1_R / BIN1

P12_3 / OUT2_R

P12_7 / INT1_R

P00_0 / INT3_R / FRCK2

Vcc

Vss

P00_3 / INT6_R / PPG8_B

P00_4 / INT7_R / PPG9_B

P00_5 / IN6 / TTG2 / TTG6 / PPG10_B

P00_6 / IN7 / TTG3 / TTG7 / PPG11_B

P01_1 / CKOT1 / OUT0 / SOT7

P01_2 / CKOTX1 / OUT1 / INT15 / SIN7

P01_4 / SIN4 / INT8

P01_5 / SOT4

P01_6 / SCK4 / TTG12

P01_7 / CKOTX1_R / INT9 / TTG13 / ZIN0 / SCK7_R

72

73

74

75

76

77

78

79

M

M

H

H

M

M

H

H

P02_0 / CKOT1_R / INT10 / TTG14 / AIN0 / SOT7_R

P02_2 / IN7_R / CKOT0_R / INT12 / BIN0 / SIN7_R

P02_5 / OUT0_R / INT13 / SIN5_R

P03_2 / PPG14_B / SOT5_R

P03_3 / PPG15_B / SCK5_R

P03_4 / RX0 / INT4

P03_5 / TX0

P03_6 / INT0 / NMI

Vcc 80 Supply

*: See “

■

I/O CIRCUIT TYPE” for details on the I/O circuit types.

DS704-00012-1v0-E 11


MB96630 Series

 I/O CIRCUIT TYPE

Type

A

X1

Circuit

X0

R

FCI or Osc disable

0

1

X out

FCI

Remarks

High-speed oscillation circuit:

• Programmable between oscillation mode (external crystal or resonator connected to X0/X1 pins) and Fast external Clock Input (FCI) mode (external clock connected to X0 pin)

• Feedback resistor = approx.

1.0M

Ω

• The amplitude: 1.8V±0.15V to operate by the internal supply voltage

12


DS704-00012-1v0-E

MB96630 Series

Type

B

P-ch P-ch

Standby control for input shutdown

R

N-ch

Circuit

Pull-up control

Pout

Nout

Automotive input

Remarks

Low-speed oscillation circuit shared with GPIO functionality:

• Feedback resistor = approx.

5.0M

Ω

• GPIO functionality selectable

(CMOS level output (I

OL

=

4mA, I

OH

= -4mA),

Automotive input with input shutdown function and programmable pull-up resistor)

X1A

R

X0A

0

X out

1

FCI

C

P-ch P-ch


R

N-ch

R

FCI or Osc disable

Pull-up control

Pout

Nout

Automotive input

CMOS hysteresis input pin

Hysteresis inputs

DS704-00012-1v0-E


13

MB96630 Series

Type

F

Circuit

P-ch

N-ch

Remarks

Power supply input protection circuit

G

P-ch

N-ch

• A/D converter ref+ (AVRH) power supply input pin with protection circuit

• Without protection circuit against V

CC

for pins AVRH

H

I

P-ch P-ch

N-ch


R

P-ch P-ch

N-ch


R

Pull-up control

Pout

• CMOS level output

(I

OL

= 4mA, I

OH

= -4mA)

• Automotive input with input shutdown function

• Programmable pull-up resistor

Nout

Automotive input

Pull-up control

Pout


(I

OL

= 4mA, I

OH

= -4mA)

• CMOS hysteresis input with input shutdown function


• Analog input

Nout

Hysteresis input

Analog input

14


DS704-00012-1v0-E

Type

K

M

MB96630 Series

P-ch P-ch


R

Circuit

N-ch

P-ch P-ch

Pull-up control

Pout

Remarks


(I

OL

= 4mA, I

OH

= -4mA)

• Automotive input with input shutdown function


• Analog input

Nout

Automotive input

Analog input

Pull-up control

Pout


(I

OL

= 4mA, I

OH

= -4mA)




R

N-ch Nout

Hysteresis input

N

P-ch P-ch


R

N-ch

Pull-up control

Pout

Nout*

Hysteresis input


(I

OL

= 3mA, I

OH

= -3mA)



*: N-channel transistor has slew rate control according to I

2

C spec, irrespective of usage.

DS704-00012-1v0-E


15

MB96630 Series

Type

O

Circuit


R

N-ch Nout

TTL input

Remarks

• Open-drain I/O

• Output 25mA, Vcc = 2.7V

• TTL input

16


DS704-00012-1v0-E

 MEMORY MAP

FF:FFFF

H

DE:0000

H

DD:FFFF

H

MB96630 Series

USER ROM* 1

10:0000

H

0F:C000

H

0E:9000

H

Reserved

Boot-ROM

Peripheral

Reserved

01:0000

H

00:8000

H

RAMSTART0* 2

ROM/RAM

MIRROR

Internal RAM bank0

Reserved

00:0C00

H

00:0380

H

00:0180

H

00:0100

H

00:00F0

H

00:0000

H

Peripheral

GPR*

DMA

3

Reserved

Peripheral

*1: For details about USER ROM area, see “USER ROM MEMORY MAP FOR FLASH DEVICES” on the following pages.

*2: For RAMSTART addresses, see the table on the next page.

*3: Unused GPR banks can be used as RAM area.

GPR: General-Purpose Register

The DMA area is only available if the device contains the corresponding resource.

The available RAM and ROM area depends on the device.

DS704-00012-1v0-E 17


MB96630 Series

 RAMSTART ADDRESSES

Devices

Bank 0

RAM size

MB96F633 10KB

MB96F635

MB96F636

MB96F637

16KB

24KB

28KB

RAMSTART0

00:5A00

H

00:4200

H

00:2200

H

00:1200

H

18


DS704-00012-1v0-E

MB96630 Series

 USER ROM MEMORY MAP FOR FLASH DEVICES

CPU mode address

FF:FFFF

H

FF:0000

H

FE:FFFF

H

FE:0000

H

FD:FFFF

H

FD:0000

H

FC:FFFF

H

FC:0000

H

FB:FFFF

H

FB:0000

H

FA:FFFF

H

FA:0000

H

F9:FFFF

H

Flash memory mode address

3F:FFFF

H

3F:0000

H

3E:FFFF

H

3E:0000

H

3D:FFFF

H

3D:0000

H

3C:FFFF

H

3C:0000

H

3B:FFFF

H

3B:0000

H

3A:FFFF

H

3A:0000

H

MB96F633

Flash size

64.5KB + 32KB

SA39 - 64KB

MB96F635

Flash size

128.5KB + 32KB

SA39 - 64KB

SA38 - 64KB

MB96F636

Flash size

256.5KB + 32KB

SA39 - 64KB

SA38 - 64KB

SA37 - 64KB

SA36 - 64KB

Reserved

Reserved

Reserved

MB96F637

Flash size

384.5KB + 32KB

SA39 - 64KB

SA38 - 64KB

SA37 - 64KB

SA36 - 64KB

SA35 - 64KB

SA34 - 64KB

Bank A of Flash A

Reserved

DF:A000

H

DF:9FFF

H

DF:8000

H

DF:7FFF

H

DF:6000

H

DF:5FFF

H

DF:4000

H

DF:3FFF

H

DF:2000

H

DF:1FFF

H

DF:0000

H

DE:FFFF

H

DE:0000

H

1F:9FFF

H

1F:8000

H

1F:7FFF

H

1F:6000

H

1F:5FFF

H

1F:4000

H

1F:3FFF

H

1F:2000

H

1F:1FFF

H

1F:0000

H

SA4 - 8KB

SA3 - 8KB

SA2 - 8KB

SA1 - 8KB

SAS - 512B*

Reserved

SA4 - 8KB

SA3 - 8KB

SA2 - 8KB

SA1 - 8KB

SAS - 512B*

Reserved

SA4 - 8KB

SA3 - 8KB

SA2 - 8KB

SA1 - 8KB

SAS - 512B*

Reserved

SA4 - 8KB

SA3 - 8KB

SA2 - 8KB

SA1 - 8KB

SAS - 512B*

Reserved

Bank B of Flash A

Bank A of Flash A

*: Physical address area of SAS-512B is from DF:0000

Others (from DF:0200

H

to DF:1FFF

H

to DF:01FF

H

.

SAS can not be used for E 2

H

) is mirror area of SAS-512B.

Sector SAS contains the ROM configuration block RCBA at CPU address DF:0000

H

PROM emulation.

-DF:01FF

H

.

19 DS704-00012-1v0-E


MB96630 Series

 SERIAL PROGRAMMING COMMUNICATION INTERFACE

USART pins for Flash serial programming (MD = 0, DEBUG I/F = 0, Serial Communication mode)

Pin Number

MB96630

USART Number Normal Function

5 SIN0

6 USART0 SOT0

39

68

69

70

7

37

38 USART2

USART4

SCK0

SIN2

SOT2

SCK2

SIN4

SOT4

SCK4

20


DS704-00012-1v0-E

MB96630 Series

 INTERRUPT VECTOR TABLE

Vector number

Offset in vector table Vector name

Cleared by

DMA

370

H

36C

H

368

H

364

H

360

H

35C

H

3FC

H

3F8

H

3F4

H

3F0

H

3EC

H

3E8

H

3E4

H

3E0

H

3DC

H

3D8

H

3D4

H

3D0

H

3CC

H

3C8

H

3C4

H

3C0

H

3BC

H

398

H

394

H

390

H

38C

H

388

H

384

H

380

H

37C

H

378

H

374

H

3B8

H

3B4

H

3B0

H

3AC

H

3A8

H

3A4

H

3A0

H

39C

H

27

28

29

30

23

24

25

26

31

32

33

34

19

20

21

22

15

16

17

18

35

36

37

38

39

40

8

9

10

11

12

13

14

4

5

6

7

0

1

2

3

SC_TIMER

LVDI

EXTINT0

EXTINT1

EXTINT2

EXTINT3

EXTINT4

EXTINT5

EXTINT6

EXTINT7

EXTINT8

EXTINT9

EXTINT10

EXTINT11

EXTINT12

EXTINT13

-

EXTINT15

CAN0

-

CALLV0

CALLV1

CALLV2

CALLV3

CALLV4

CALLV5

CALLV6

CALLV7

RESET

INT9

EXCEPTION

NMI

DLY

RC_TIMER

MC_TIMER

-

-

-

PPG0

PPG1

PPG2

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

No

No

Yes

Yes

Yes

Yes

Yes

Yes

-

Yes

No

-

-

-

-

Yes

Yes

Yes

No

No

No

No

No

No

No

No

No

No

No

No

No

No

No

27

28

29

30

23

24

25

26

31

32

33

34

19

20

21

22

15

16

17

18

35

36

37

38

39

40

Index in

ICR to program

-

-

-

-

12

13

14

-

-

-

-

-

-

-

-

Description

CALLV instruction

CALLV instruction

CALLV instruction

CALLV instruction

CALLV instruction

CALLV instruction

CALLV instruction

CALLV instruction

Reset vector

INT9 instruction

Undefined instruction execution

Non-Maskable Interrupt

Delayed Interrupt

RC Clock Timer

Main Clock Timer

Sub Clock Timer

Low Voltage Detector

External Interrupt 0














Reserved


CAN Controller 0

Reserved

Reserved

Reserved

Reserved

Programmable Pulse Generator 0



DS704-00012-1v0-E


21

MB96630 Series

Vector number

72

73

74

75

68

69

70

71

64

65

66

67

60

61

62

63

76

77

78

53

54

55

56

49

50

51

52

45

46

47

48

41

42

43

44

57

58

59

79

80


Cleared by

DMA

358

H

334

H

330

H

32C

H

328

H

324

H

320

H

31C

H

318

H

314

H

310

H

354

H

350

H

34C

H

348

H

344

H

340

H

33C

H

338

H

30C

H

308

H

304

H

300

H

2FC

H

2F8

H

2F4

H

2F0

H

2EC

H

2E8

H

2E4

H

2E0

H

2DC

H

2D8

H

2D4

H

2D0

H

2CC

H

2C8

H

2C4

H

2C0

H

2BC

H

-

ICU4

ICU5

ICU6

ICU7

-

ICU9

-

RLT6

ICU0

ICU1

-

-

-

-

-

-

OCU0

OCU1

PPG11

PPG12

PPG13

PPG14

PPG15

-

-

-

PPG3

PPG4

-

PPG6

PPG7

PPG8

PPG9

PPG10

-

RLT0

RLT1

OCU2

OCU3

-

Yes

Yes

Yes

Yes

-

Yes

-

Yes

Yes

Yes

-

-

-

-

-

-

Yes

Yes

Yes

Yes

Yes

Yes

Yes

-

-

-

Yes

Yes

-

Yes

Yes

Yes

Yes

Yes

-

Yes

Yes

Yes

Yes

72

73

74

75

68

69

70

71

64

65

66

67

60

61

62

63

76

77

78

79

80

Index in

ICR to program

41

54

55

56

57

50

51

52

53

58

59

46

47

48

49

42

43

44

45

Description



Reserved











Reserved

Reserved

Reserved

Reserved

Reload Timer 0

Reload Timer 1

Reserved

Reserved

Reserved

Reserved

Reload Timer 6

Input Capture Unit 0


Reserved

Reserved





Reserved


Reserved

Reserved

Output Compare Unit 0




22


DS704-00012-1v0-E

MB96630 Series

Vector number

108

109

110

111

112

113

114

115

100

101

102

103

104

105

106

107

116

117

118

119

93

94

95

96

89

90

91

92

85

86

87

88

81

82

83

84

97

98

99

120


Cleared by

DMA

2B8

H

298

H

294

H

290

H

28C

H

288

H

284

H

280

H

27C

H

2B4

H

2B0

H

2AC

H

2A8

H

2A4

H

2A0

H

29C

H

278

H

274

H

270

H

26C

H

268

H

244

H

240

H

23C

H

238

H

234

H

230

H

22C

H

228

H

224

H

220

H

264

H

260

H

25C

H

258

H

254

H

250

H

24C

H

248

H

21C

H

-

LINR4

LINT4

LINR5

LINT5

-

-

LINR7

-

LINR0

LINT0

-

-

LINR2

LINT2

-

LINT7

-

-

-

FRT0

FRT1

FRT2

-

RTC0

CAL0

-

IIC0

OCU4

-

OCU6

OCU7

-

-

-

-

IIC1

ADC0

-

-

-

Yes

Yes

Yes

Yes

-

-

Yes

-

Yes

Yes

-

-

Yes

Yes

-

Yes

-

-

-

Yes

Yes

Yes

-

No

No

-

Yes

-

-

-

-

Yes

-

Yes

Yes

Yes

Yes

-

-

108

109

110

111

112

113

114

115

100

101

102

103

104

105

106

107

116

117

118

119

120

Index in

ICR to program

81

94

95

96

97

90

91

92

93

98

99

86

87

88

89

82

83

84

85

Description

Reserved

LIN USART 0 RX

LIN USART 0 TX

Reserved

Reserved

LIN USART 2 RX

LIN USART 2 TX

Reserved

Reserved

LIN USART 4 RX

LIN USART 4 TX

LIN USART 5 RX

LIN USART 5 TX

Reserved

Reserved

LIN USART 7 RX

LIN USART 7 TX

Reserved

Reserved

Reserved


Reserved



Reserved

Reserved

Reserved

Reserved

Free-Running Timer 0



Reserved

Real Time Clock

Clock Calibration Unit

Reserved

I

2

C interface 0

I

2

C interface 1

A/D Converter 0

Reserved

Reserved

DS704-00012-1v0-E


23

138

139

140

141

142

143

Vector number

129

130

131

132

133

134

135

136

121

122

123

124

125

126

127

128

137

MB96630 Series

218

H

1F8

H

1F4

H

1F0

H

1EC

H

1E8

H

1E4

H

1E0

H

1DC

H

214

H

210

H

20C

H

208

H

204

H

200

H

1FC

H

1D8

H


Cleared by

DMA

-

-

-

-

FLASHA

-

-

-

-

-

-

-

-

-

-

-

Yes

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

QPRC0 Yes

1D4

H

1D0

H

1CC

H

1C8

H

1C4

H

1C0

H

QPRC1

ADCRC0

-

-

-

-

Yes

No

-

-

-

-

Index in

ICR to program

121

130

131

132

133

134

135

136

122

123

124

125

126

127

128

129

137

138

139

140

141

142

143

Description

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Flash memory A interrupt

Reserved

Reserved

Reserved

Quadrature Position/Revolution counter 0

Quadrature Position/Revolution counter 1

A/D Converter 0 - Range Comparator

Reserved

Reserved

Reserved

Reserved

24


DS704-00012-1v0-E

MB96630 Series

 HANDLING PRECAUTIONS

Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU SEMICONDUCTOR semiconductor devices.

1. Precautions for Product Design

This section describes precautions when designing electronic equipment using semiconductor devices.

 Absolute Maximum Ratings

Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of certain established limits, called absolute maximum ratings. Do not exceed these ratings.

 Recommended Operating Conditions

Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges.

Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their sales representative beforehand.

 Processing and Protection of Pins

These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions.

(1) Preventing Over-Voltage and Over-Current Conditions

Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage.

(2) Protection of Output Pins

Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device.

Therefore, avoid this type of connection.

(3) Handling of Unused Input Pins

Unconnected input pins with very high impedance levels can adversely affect stability of operation.

Such pins should be connected through an appropriate resistance to a power supply pin or ground pin.

 Latch-up

Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be formed, causing large current levels in excess of several hundred mA to flow continuously at the power supply pin. This condition is called latch-up.

CAUTION: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the following:

(1) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include attention to abnormal noise, surge levels, etc.

(2) Be sure that abnormal current flows do not occur during the power-on sequence.

Code: DS00-00004-1Ea

DS704-00012-1v0-E 25


MB96630 Series

 Observance of Safety Regulations and Standards

Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the design of products.

 Fail-Safe Design

Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions.

 Precautions Related to Usage of Devices

FUJITSU SEMICONDUCTOR semiconductor devices are intended for use in standard applications

(computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.).

CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval.

2. Precautions for Package Mounting

Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance during soldering, you should only mount under FUJITSU SEMICONDUCTOR's recommended conditions. For detailed information about mount conditions, contact your sales representative.

 Lead Insertion Type

Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct soldering on the board, or mounting by using a socket.

Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage temperature. Mounting processes should conform to FUJITSU SEMICONDUCTOR recommended mounting conditions.

If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket contacts and IC leads be verified before mounting.

 Surface Mount Type

Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges.

You must use appropriate mounting techniques. FUJITSU SEMICONDUCTOR recommends the solder reflow method, and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with FUJITSU SEMICONDUCTOR ranking of recommended conditions.

26


DS704-00012-1v0-E

MB96630 Series

 Lead-Free Packaging

CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, junction strength may be reduced under some conditions of use.

 Storage of Semiconductor Devices

Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the following:

(1) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product.

Store products in locations where temperature changes are slight.

(2) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5°C and 30°C.

When you open Dry Package that recommends humidity 40% to 70% relative humidity.

(3) When necessary, FUJITSU SEMICONDUCTOR packages semiconductor devices in highly moisture-resistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for storage.

(4) Avoid storing packages where they are exposed to corrosive gases or high levels of dust.

 Baking

Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU

SEMICONDUCTOR recommended conditions for baking.

Condition: 125°C/24 h

 Static Electricity

Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions:

(1) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity.

(2) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment.

(3) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 M

Ω).

Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended.

(4) Ground all fixtures and instruments, or protect with anti-static measures.

(5) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies.

DS704-00012-1v0-E


27

MB96630 Series

3. Precautions for Use Environment

Reliability of semiconductor devices depends on ambient temperature and other conditions as described above.

For reliable performance, do the following:

(1) Humidity

Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing.

(2) Discharge of Static Electricity

When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges.

(3) Corrosive Gases, Dust, or Oil

Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices.

(4) Radiation, Including Cosmic Radiation

Most devices are not designed for environments involving exposure to radiation or cosmic radiation.

Users should provide shielding as appropriate.

(5) Smoke, Flame

CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases.

Customers considering the use of FUJITSU SEMICONDUCTOR products in other special environmental conditions should consult with sales representatives.

Please check the latest handling precautions at the following URL. http://edevice.fujitsu.com/fj/handling-e.pdf

28


DS704-00012-1v0-E

MB96630 Series

 HANDLING DEVICES

Special care is required for the following when handling the device:

• Latch-up prevention

• Unused pins handling

• External clock usage

• Notes on PLL clock mode operation

• Power supply pins (Vcc/Vss)

• Crystal oscillator and ceramic resonator circuit

• Turn on sequence of power supply to A/D converter and analog inputs

• Pin handling when not using the A/D converter

• Notes on Power-on

• Stabilization of power supply voltage

• Serial communication

• Mode Pin (MD)

1. Latch-up prevention

CMOS IC chips may suffer latch-up under the following conditions:

- A voltage higher than V

CC

or lower than V

SS

is applied to an input or output pin.

- A voltage higher than the rated voltage is applied between Vcc pins and Vss pins.

- The AV

CC

power supply is applied before the V

CC

voltage.

Latch-up may increase the power supply current dramatically, causing thermal damages to the device.

For the same reason, extra care is required to not let the analog power-supply voltage (AV

CC

, AVRH) exceed the digital power-supply voltage.

2. Unused pins handling

Unused input pins can be left open when the input is disabled (corresponding bit of Port Input Enable register

PIER = 0).

Leaving unused input pins open when the input is enabled may result in misbehavior and possible permanent damage of the device. To prevent latch-up, they must therefore be pulled up or pulled down through resistors which should be more than 2kΩ.

Unused bidirectional pins can be set either to the output state and be then left open, or to the input state with either input disabled or external pull-up/pull-down resistor as described above.

3. External clock usage

The permitted frequency range of an external clock depends on the oscillator type and configuration.

See AC Characteristics for detailed modes and frequency limits. Single and opposite phase external clocks must be connected as follows:

(1) Single phase external clock for Main oscillator

When using a single phase external clock for the Main oscillator, X0 pin must be driven and X1 pin left open.

And supply 1.8V power to the external clock.

X0

X1

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29

MB96630 Series

(2) Single phase external clock for Sub oscillator

When using a single phase external clock for the Sub oscillator, “External clock mode” must be selected and

X0A/P04_0 pin must be driven. X1A/P04_1 pin can be configured as GPIO.

(3) Opposite phase external clock

When using an opposite phase external clock, X1 (X1A) pins must be supplied with a clock signal which has the opposite phase to the X0 (X0A) pins. Supply level on X0 and X1 pins must be 1.8V.

X0

X1

4. Notes on PLL clock mode operation

If the microcontroller is operated with PLL clock mode and no external oscillator is operating or no external clock is supplied, the microcontroller attempts to work with the free oscillating PLL. Performance of this operation, however, cannot be guaranteed.

5. Power supply pins (Vcc/Vss)

It is required that all V

CC

-level as well as all V

SS

-level power supply pins are at the same potential. If there is more than one V

CC

or V

SS

level, the device may operate incorrectly or be damaged even within the guaranteed operating range.

Vcc and Vss pins must be connected to the device from the power supply with lowest possible impedance.

The smoothing capacitor at Vcc pin must use the one of a capacity value that is larger than Cs.

Besides this, as a measure against power supply noise, it is required to connect a bypass capacitor of about 0.1

µF between Vcc and Vss pins as close as possible to Vcc and Vss pins.

6. Crystal oscillator and ceramic resonator circuit

Noise at X0, X1 pins or X0A, X1A pins might cause abnormal operation. It is required to provide bypass capacitors with shortest possible distance to X0, X1 pins and X0A, X1A pins, crystal oscillator (or ceramic resonator) and ground lines, and, to the utmost effort, that the lines of oscillation circuit do not cross the lines of other circuits.

It is highly recommended to provide a printed circuit board art work surrounding X0, X1 pins and X0A, X1A pins with a ground area for stabilizing the operation.

It is highly recommended to evaluate the quartz/MCU or resonator/MCU system at the quartz or resonator manufacturer, especially when using low-Q resonators at higher frequencies.

7. Turn on sequence of power supply to A/D converter and analog inputs

It is required to turn the A/D converter power supply (AV

CC

, AVRH) and analog inputs (ANn) on after turning the digital power supply (V

CC

) on.

It is also required to turn the digital power off after turning the A/D converter supply and analog inputs off. In this case, AVRH must not exceed AV

CC

. Input voltage for ports shared with analog input ports also must not exceed AV

CC

(turning the analog and digital power supplies simultaneously on or off is acceptable).

8. Pin handling when not using the A/D converter

If the A/D converter is not used, the power supply pins for A/D converter should be connected such as AV

CC

=

V

CC

, AV

SS

= AVRH = V

SS

.

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MB96630 Series

9. Notes on Power-on

To prevent malfunction of the internal voltage regulator, supply voltage profile while turning the power supply on should be slower than 50

µs from 0.2V to 2.7V.

10. Stabilization of power supply voltage

If the power supply voltage varies acutely even within the operation safety range of the V

CC

power supply voltage, a malfunction may occur. The V

CC

power supply voltage must therefore be stabilized. As stabilization guidelines, the power supply voltage must be stabilized in such a way that V

CC

ripple fluctuations (peak to peak value) in the commercial frequencies (50Hz to 60Hz) fall within 10% of the standard V

CC

power supply voltage and the transient fluctuation rate becomes 0.1V/

µs or less in instantaneous fluctuation for power supply switching.

11. Serial communication

There is a possibility to receive wrong data due to noise or other causes on the serial communication.

Therefore, design a printed circuit board so as to avoid noise.

Consider receiving of wrong data when designing the system. For example apply a checksum and retransmit the data if an error occurs.

12. Mode Pin (MD)

Connect the mode pin directly to Vcc or Vss pin. To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to minimize the distance from the mode pin to Vcc or Vss pin and provide a low-impedance connection.

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MB96630 Series

 ELECTRICAL CHARACTERISTICS

1. Absolute Maximum Ratings

Parameter Symbol Condition Unit Remarks

Power supply voltage*

1

Analog power supply voltage*

1

Analog reference voltage*

1

Input voltage*

1

Output voltage*

1

Maximum Clamp

Current

Total Maximum

Clamp Current

V

CC

AV

CC

AVRH

V

I

V

O

I

CLAMP

Σ|I

CLAMP

|

-

-

-

-

-

-

-

Min

Rating

Max

V

SS

-

0.3

V

SS

+ 6.0

V

SS

-

0.3

V

SS

-

0.3

V

SS

-

0.3

V

SS

-

0.3

V

SS

+ 6.0

V

SS

+ 6.0

V

SS

+ 6.0

V

SS

+ 6.0

-4.0

-

+4.0

21

V

V

V

V

V mA mA

V

CC

= AV

CC

*

2

AV

CC

≥ AVRH,

AVRH

≥ AV

SS

V

I

≤ V

0.3V*

3

CC

+

V

O

≤ V

CC

+

0.3V*

3

Applicable to general purpose

I/O pins *

4

Applicable to general purpose

I/O pins *

4

"L" level maximum output current

"L" level average output current

"L" level maximum overall output current

"L" level average overall output current

"H" level maximum output current

"H" level average output current

"H" level maximum overall output current

"H" level average overall output current

ΣI

Σ

I

I

I

OL

OLAV

ΣI

I

OL

OLAV

OH

OHAV

Σ

I

I

OH

OHAV

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

15

4

52

26

-15

-4

-52

-26 mA mA mA mA mA mA mA mA

Power consumption*

5

Operating ambient temperature

P

T

D

A

T

A

= +125°C

-

-

-40

396

+125

*6

*7 mW

°C

Storage temperature T

STG

*1: This parameter is based on V

SS

= AV

SS

= 0V.

- -55 +150 °C

*2: AV

CC

and V

CC

must be set to the same voltage. It is required that AV

CC

does not exceed V

CC

and that the voltage at the analog inputs does not exceed AV

CC

when the power is switched on.

*3: V

I

and V

O

should not exceed V

CC

+ 0.3V. V

I

should also not exceed the specified ratings. However if the maximum current to/from an input is limited by some means with external components, the I

CLAMP

rating supersedes the V

I

rating. Input/Output voltages of standard ports depend on V

CC

.

*4:

• Applicable to all general purpose I/O pins (Pnn_m).

• Use within recommended operating conditions.

• Use at DC voltage (current).

• The +B signal should always be applied a limiting resistance placed between the +B signal and the microcontroller.

• The value of the limiting resistance should be set so that when the +B signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods.

32 DS704-00012-1v0-E


MB96630 Series

• Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input potential may pass through the protective diode and increase the potential at the V

CC

pin, and this may affect other devices.

• Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0V), the power supply is provided from the pins, so that incomplete operation may result.

• Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the Power reset.

• The DEBUG I/F pin has only a protective diode against V

SS

. Hence it is only permitted to input a negative clamping current (4mA). For protection against positive input voltages, use an external clamping diode which limits the input voltage to maximum 6.0V.

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33

MB96630 Series

• Sample recommended circuits:

+B input (0V to 16V)

Limiting resistance

Protective diode

V

CC

P-ch

N-ch

R

*5: The maximum permitted power dissipation depends on the ambient temperature, the air flow velocity and the thermal conductance of the package on the PCB.

The actual power dissipation depends on the customer application and can be calculated as follows:

P

D

P

IO

= P

IO

+ P

= Σ (V

P

INT

= V

CC

INT

OL

× I

OL

× (I

CC

+ V

OH

× I

OH

) (I/O load power dissipation, sum is performed on all I/O ports)

+ I

A

) (internal power dissipation)

I

CC

is the total core current consumption into V

CC

as described in the “DC characteristics” and depends on the selected operation mode and clock frequency and the usage of functions like Flash programming.

I

A

is the analog current consumption into AV

CC

.

*6: Worst case value for a package mounted on single layer PCB at specified T

*7: Write/erase to a large sector in flash memory is warranted with T

A

A

without air flow.

≤ + 105°C.

<WARNING>

Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

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DS704-00012-1v0-E

MB96630 Series

2. Recommended Operating Conditions

Parameter

Power supply voltage

Smoothing capacitor at C pin

Symbol

V

CC

, AV

CC

C

S

Min

2.7

2.0

Value

Typ Max

- 5.5

- 5.5

0.5 1.0 to 3.9 4.7

Unit

(V

SS

= AV

SS

= 0V)

Remarks

V

V Maintains RAM data in stop mode

1.0

µF (Allowance within ± 50%)

3.9µF (Allowance within ± 20%)

Please use the ceramic capacitor or the

µF capacitor of the frequency response of this level.

The smoothing capacitor at V

CC

must use the one of a capacity value that is larger than C

S

.

<WARNING>

The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand.

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35

MB96630 Series

3. DC Characteristics

(1) Current Rating

Power supply current in Run modes

*1

I

CCPLL

I

CCMAIN

I

CCRCH

I

CCRCL

I

CCSUB

Vcc

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Conditions

Value

Min Typ Max

Unit Remarks

PLL Run mode with

CLKS1/2 = CLKB =

- 27 - mA T

A

= +25°C

CLKP1/2 = 32MHz

Flash 0 wait

(CLKRC and CLKSC stopped)

-

-

-

-

37 mA T

A

= +105°C

38.5 mA T

A

= +125°C

Main Run mode with

CLKS1/2 = CLKB =

CLKP1/2 = 4MHz

Flash 0 wait

(CLKPLL, CLKSC and

CLKRC stopped)

RC Run mode with

CLKS1/2 = CLKB =

CLKP1/2 = CLKRC =

2MHz

Flash 0 wait

(CLKMC, CLKPLL and

CLKSC stopped)

RC Run mode with

CLKS1/2 = CLKB =

CLKP1/2 = CLKRC =

100kHz

Flash 0 wait

(CLKMC, CLKPLL and

CLKSC stopped)

Sub Run mode with

CLKS1/2 = CLKB =

CLKP1/2 = 32kHz

Flash 0 wait

(CLKMC, CLKPLL and

CLKRC stopped)

-

-

-

-

-

-

-

-

-

-

-

-

3.5

-

-

1.8

-

-

0.16

-

-

0.1

-

-

-

8

9.5

-

6

7.5

-

3.5

5

-

3.3

4.8 mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C

36


DS704-00012-1v0-E

MB96630 Series

Parameter Symbol

I

CCSPLL

Pin name

Conditions

PLL Sleep mode with

CLKS1/2 = CLKP1/2 =

32MHz

(CLKRC and CLKSC stopped)

Value

Min Typ Max

- 8.5 -

-

-

-

-

14

Unit Remarks mA T

A

= +25°C mA T

A

= +105°C

15.5 mA T

A

= +125°C

Power supply current in

Sleep modes

*1

I

CCSMAIN

I

CCSRCH

Vcc

Main Sleep mode with

CLKS1/2 = CLKP1/2 =

4MHz,

SMCR:LPMSS = 0

(CLKPLL, CLKRC and CLKSC stopped)

RC Sleep mode with

CLKS1/2 = CLKP1/2 =

CLKRC = 2MHz,

SMCR:LPMSS = 0

(CLKMC, CLKPLL and CLKSC stopped)

-

-

-

-

-

-

1

-

-

0.6

-

-

-

4.5

6

-

3.8

5.3 mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C

0.07 - mA T

A

= +25°C

I

CCSRCL

RC Sleep mode with

CLKS1/2 = CLKP1/2 =

CLKRC = 100kHz

(CLKMC, CLKPLL and CLKSC stopped)

-

-

-

-

-

2.8

4.3 mA T

A

= +105°C mA T

A

= +125°C

I

CCSSUB

Sub Sleep mode with

CLKS1/2 = CLKP1/2 =

32kHz,

(CLKMC, CLKPLL and CLKRC stopped)

-

-

-

0.04

-

-

-

2.5

4 mA T

A

= +25°C mA T

A

= +105°C mA T

A

= +125°C

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37

MB96630 Series

Parameter Symbol

Pin name

Power supply current in

Timer modes

*2

I

CCTPLL

I

CCTMAIN

I

CCTRCH

Vcc

I

CCTRCL

I

CCTSUB

Conditions

PLL Timer mode with

CLKPLL = 32MHz (CLKRC and CLKSC stopped)

Value

Min Typ Max

-

Unit Remarks

1800 2250

µA T

A

= +25°C

- -

Main Timer mode with

CLKMC = 4MHz,

SMCR:LPMSS = 0

(CLKPLL, CLKRC and

CLKSC stopped)

RC Timer mode with

CLKRC = 2MHz,

SMCR:LPMSS = 0

(CLKPLL, CLKMC and

CLKSC stopped)

RC Timer mode with

CLKRC = 100kHz

(CLKPLL, CLKMC and

CLKSC stopped)

Sub Timer mode with

CLKSC = 32kHz

(CLKMC, CLKPLL and

CLKRC stopped)

-

-

-

-

-

-

-

-

-

-

-

-

-

-

285

-

-

160

-

-

35

-

-

25

-

-

3220

µA T

A

= +105°C

4205

µA T

A

= +125°C

330

µA T

A

= +25°C

1195

µA T

A

= +105°C

2165

µA T

A

= +125°C

215

µA T

A

= +25°C

1095

µA T

A

= +105°C

2075

µA T

A

= +125°C

75

µA T

A

= +25°C

905

µA T

A

= +105°C

1880

µA T

A

= +125°C

65

885

µA T

A

= +25°C

µA T

A

= +105°C

1850

µA T

A

= +125°C

38


DS704-00012-1v0-E

MB96630 Series

Parameter Symbol

Pin name

Conditions

Value

Min Typ Max

- 20 60

Unit Remarks

µA T

A

= +25°C

Power supply current in Stop mode

*3

I

CCH

- - - 880

µA T

A

=+105°C

- - 1845

µA T

A

=+125°C

Flash Power

Down current

Power supply current for active Low

Voltage detector*

4

I

CCFLASHPD

I

CCLVD

Vcc

-

Low voltage detector enabled

-

-

-

36

5

-

70

-

12.5

µA

µA T

µA T

A

A

= +25°C

=+125°C

- 12.5 - mA

T

A

= +25°C

Flash Write/

Erase current*

5

I

CCFLASH

-

- - 20 mA

T

A

=+125°C

*1: The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a 32kHz external clock connected to the Sub oscillator. See chapter “Standby mode and voltage regulator control circuit” of the Hardware Manual for further details about voltage regulator control. Current for "On

Chip Debugger" part is not included. Power supply current in Run mode does not include Flash Write / Erase current.

*2: The power supply current in Timer mode is the value when Flash is in Power-down / reset mode.

When Flash is not in Power-down / reset mode, I

CCFLASHPD

must be added to the Power supply current.

The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a

32kHz external clock connected to the Sub oscillator. The current for "On Chip Debugger" part is not included.

*3: The power supply current in Stop mode is the value when Flash is in Power-down / reset mode.


CCFLASHPD

must be added to the Power supply current.

*4: When low voltage detector is enabled, I

CCLVD

must be added to Power supply current.

*5: When Flash Write / Erase program is executed, I

CCFLASH

must be added to Power supply current.

DS704-00012-1v0-E


39

MB96630 Series

(2) Pin Characteristics

"H" level input voltage

"L" level input voltage

"H" level output voltage

"L" level output voltage

V

IH

V

IHX0S

Port inputs

Pnn_m

X0

V

IHX0AS

X0A

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Conditions

Value

Min Typ Max

Unit Remarks

-

V

CC

× 0.7

-

V

CC

+ 0.3

V

CMOS Hysteresis input

-

External clock in

"Fast Clock Input mode"

V

CC

× 0.8

VD

× 0.8

-

-

V

CC

+ 0.3

V

AUTOMOTIVE

Hysteresis input

VD V VD=1.8V±0.15V

External clock in

"Oscillation mode"

- V

V

IHR

RSTX

V

IHM

V

IHD

V

IL

V

ILX0S

V

ILX0AS

X0A

V

ILR

V

ILM

V

ILD

MD

DEBUG

I/F

Port inputs

Pnn_m

X0

RSTX

MD

DEBUG

I/F

-

-

-

-

-

External clock in "Fast

Clock Input mode"

External clock in

"Oscillation mode"

-

-

-

V

CC

× 0.8

V

CC

× 0.8

V

CC

- 0.3

2.0

V

SS

- 0.3

V

SS

- 0.3

V

SS

V

SS

- 0.3

V

SS

- 0.3

V

SS

- 0.3

V

SS

- 0.3

-

-

-

-

-

-

-

-

-

-

V

CC

+ 0.3

V

CC

+ 0.3

V

CC

+ 0.3

V

CC

+ 0.3

V

CC

× 0.3

V

CC

× 0.5

VD

× 0.2

V

CC

× 0.2

V

CC

× 0.2

V

SS

+ 0.3

V

V



V TTL Input

V

V

V VD=1.8V±0.15V

V

V

V


AUTOMOTIVE

Hysteresis input



0.8 V TTL Input

V

OH4

V

OH3

3mA type

V

OL4

V

OLD

4mA type

4mA type

V

OL3

3mA type

DEBUG

I/F

4.5V ≤ V

CC

≤ 5.5V

I

OH

= -4mA

2.7V ≤ V

CC

< 4.5V

I

OH

= -1.5mA

4.5V ≤ V

CC

≤ 5.5V

I

OH

= -3mA

2.7V ≤ V

CC

< 4.5V

I

OH

= -1.5mA

4.5V ≤ V

CC

≤ 5.5V

I

OL

= +4mA

2.7V ≤ V

CC

< 4.5V

I

OL

= +1.7mA

2.7V ≤ V

CC

< 5.5V

I

OL

= +3mA

V

CC

= 2.7V

I

OL

= +25mA

V

CC

- 0.5

V

CC

- 0.5

-

-

0

-

-

-

-

V

CC

V

V

CC

V

0.4 V

0.4 V

- 0.25 V

40


DS704-00012-1v0-E

MB96630 Series

Parameter Symbol Pin name

Input leak current

Pull-up resistance value

I

R

IL

PU

Pnn_m

Pnn_m

Input capacitance

C

IN

Other than

C,

Vcc,

Vss,

AVcc,

AVss,

AVRH

Conditions

V

SS

< V

I

< V

CC

AV

SS

< V

I

<

AV

CC

, AVRH

V

CC

= 5.0V ±10%

-

Value

Min Typ Max

Unit Remarks

- 1 - + 1

µA

25 50 100 k

Ω

- 5 15 pF

DS704-00012-1v0-E


41

MB96630 Series

4. AC Characteristics

(1) Main Clock Input Characteristics

Parameter

(V

CC

= AV

CC

= 2.7V to 5.5V, VD=1.8V±0.15V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Symbol

Pin name Min

Value

Typ Max

Unit Remarks

4 - 8 MHz

When using a crystal oscillator, PLL off

Input frequency

Input frequency f

C f

FCI

X0,

X1

X0

-

4

-

4

-

-

-

-

8

8

8

8

MHz

MHz

MHz

MHz

When using an opposite phase external clock, PLL off

When using a crystal oscillator or opposite phase external clock,

PLL on

When using a single phase external clock in “Fast Clock

Input mode”, PLL off

When using a single phase external clock in “Fast Clock

Input mode”, PLL on

Input clock cycle t

CYLH

- 125 - - ns

Input clock pulse width

P

WH

,

P

WL

- 55 - - ns

When using the crystal oscillator t

CYLH

X0,X1

Reference value:

1.8V±0.15V

The amplitude changes by resistance, capacity which added outside or the difference of the device.

When using the external clock

X0

V

IHX0S

P

WH t

CYLH

V

IHX0S

V

ILX0S

P

WL

V

V

IHX0S

ILX0S

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DS704-00012-1v0-E

MB96630 Series

(2) Sub Clock Input Characteristics

Parameter Symbol Pin

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Value

Min Typ Max

Unit Remarks

When using an

- - 32.768 - kHz oscillation circuit

X0A,

When using an

X1A

- - - 100 kHz opposite phase

Input frequency f

CL external clock

X0A - - - 50 kHz

When using a single phase external clock

Input clock cycle t

CYLL

- - 10 - -

µs

Input clock pulse width

- -

P

WH

/t

CYLL

,

P

WL

/t

CYLL

30 - 70 %

When using the crystal oscillator t

CYLL

X0A,X1A V

CC

When using the external clock

X0A

V

IHX0AS

P

WH t

CYLL

V

IHX0AS

V

ILX0AS

P

WL

V

IHX0AS

V

ILX0AS

DS704-00012-1v0-E


43

MB96630 Series

(3) Built-in RC Oscillation Characteristics

Parameter Symbol

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Min

Value

Typ Max

Unit Remarks

When using slow frequency of

50 100 200 kHz

RC oscillator

Clock frequency f

RC

When using fast frequency of

1 2 4 MHz

RC oscillator

RC clock stabilization time t

RCSTAB

80 160 320

µs

When using slow frequency of

RC oscillator

(16 RC clock cycles)

64 128 256

µs

When using fast frequency of

RC oscillator

(256 RC clock cycles)

(4) Internal Clock Timing

Parameter

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Symbol

Min

Value

Max

Unit

Internal System clock frequency

(CLKS1 and CLKS2) f

CLKS1

, f

CLKS2

- 54 MHz

Internal CPU clock frequency (CLKB),

Internal peripheral clock frequency (CLKP1)

Internal peripheral clock frequency (CLKP2) f

CLKB

, f

CLKP1 f

CLKP2

-

-

32

32

MHz

MHz

44


DS704-00012-1v0-E

MB96630 Series

(5) Operating Conditions of PLL

Parameter

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Symbol

Value

Min Typ Max

Unit Remarks

PLL oscillation stabilization wait time

PLL input clock frequency

PLL oscillation clock frequency f t

LOCK f

PLLI

CLKVCO

1

4

56

- 4 ms For CLKMC = 4MHz

PLL phase jitter t

PSKEW

-5 - +5 ns

For CLKMC (PLL input clock)

≥ 4MHz

Deviation time from the ideal clock is assured per cycle out of 20,000 cycles.

PLL output t1 t2 t3 tn-1 tn

Ideal clock

-

-

8

108

MHz

MHz

Permitted VCO output frequency of PLL

(CLKVCO)

Slow t3

Deviation time t1 t2 tn-1 tn

Fast

(6) Reset Input

Parameter

Reset input time

Rejection of reset input time

RSTX

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Symbol Pin name

Min

Value

Max

Unit

µs t

RSTL

RSTX

10 -

1 -

µs

0.2V

CC t

RSTL

0.2V

CC

DS704-00012-1v0-E


45

MB96630 Series

(7) Power-on Reset Timing

Parameter Symbol

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Pin name

Min

Value

Typ Max

Unit

Power on rise time t

R

Vcc 0.05 - 30 ms

Power off time t

OFF

Vcc 1 - - ms t

R t

OFF

2.7V

V

CC

0.2V

0.2V

0.2V

If the power supply is changed too rapidly, a power-on reset may occur.

We recommend a smooth startup by restraining voltages when changing the power supply voltage during operation, as shown in the figure below.

5.0V

2.7V

V

CC

0V

V

SS

It is required that rises in voltage have a slope of 50 mV/ms or less.

46


DS704-00012-1v0-E

MB96630 Series

(8) USART Timing

Parameter

Serial clock cycle time

SCK

↓ → SOT delay time

SOT

→ SCK ↑ delay time

SIN

→ SCK ↑ setup time

SCK

↑ → SIN hold time

Serial clock "L" pulse width

Serial clock "H" pulse width

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

Symbol Pin

= AV

SS

= 0V, T

4.5V ≤ V

Min

CC

A

= - 40°C to + 125°C, C

< 5.5V 2.7V ≤ V

Max Min

CC

L

=50pF)

< 4.5V

Max

Unit

4t

CLKP1

- 4t

CLKP1

- ns t t t t t

SCYC

SCKn

SLOVI

OVSHI

IVSHI

SHIXI

SCKn,

SOTn

SCKn,

SOTn

SCKn,

SINn

SCKn,

SINn

Internal shift clock mode

- 20

N

× t

CLKP1

– 20

* t

CLKP1

+ 45

0

+ 20

-

-

-

- 30

N

× t

CLKP1

– 30

* t

CLKP1

+ 55

0

+ 30

-

-

- ns ns ns ns t

SLSH

SCKn t

SHSL

SCKn t

CLKP1

+ 10 t

CLKP1

+ 10

-

- t

CLKP1

+ 10 t

CLKP1

+ 10

-

- ns ns

SCK

↓ → SOT delay time

SIN

→ SCK ↑ setup time

SCK

↑ → SIN hold time t

SLOVE t

IVSHE t

SHIXE

SCKn,

SOTn

SCKn,

SINn

SCKn,

SINn

External shift clock mode

- t

CLKP1

/2

+ 10 t

CLKP1

+ 10

2t

CLKP1

+ 45

-

-

- t

CLKP1

/2

+ 10 t

CLKP1

+ 10

2t

CLKP1

+ 55

-

- ns ns ns

SCK fall time t

F

SCKn - 20 - 20 ns

SCK rise time

Notes: t

R

SCKn - 20 - 20 ns

•

AC characteristic in CLK synchronized mode.

•

C

L

is the load capacity value of pins when testing.

•

Depending on the used machine clock frequency, the maximum possible baud rate can be limited by

some parameters. These parameters are shown in “MB96600 series HARDWARE MANUAL”.

•

t

CLKP1

indicates the peripheral clock 1 (CLKP1), Unit: ns

•

These characteristics only guarantee the same relocate port number.

For example, the combination of SCKn and SOTn_R is not guaranteed.

*: Parameter N depends on t

•

•

If t

If t

SCYC

SCYC

= 2

× k × t

CLKP1

SCYC and can be calculated as follows:

, then N = k, where k is an integer > 2

= (2

× k + 1) × t

CLKP1

, then N = k + 1, where k is an integer > 1

Examples: t

SCYC

4

× t

CLKP1

5

× t

CLKP1

, 6

× t

CLKP1

7

× t

CLKP1

, 8

× t

CLKP1

...

N

2

3

4

...

DS704-00012-1v0-E


47

MB96630 Series

SCK

SOT

SIN

SCK

SOT

SIN

V

IH t

F

V

OH t

SCYC

V

OL t

SLOVI

V

OH

V

OL t

OVSHI t

IVSHI

V

IH

V

IL t

SHIXI

V

IH

V

IL

V

IL t

SLOVE

V

OH

V

OL

Internal shift clock mode t

SLSH

V

IH

V

IL t

R t

IVSHE

V

IH

V

IL t

SHIXE

V

IH

V

IL t

SHSL

External shift clock mode

V

IH

V

OL

48


DS704-00012-1v0-E

MB96630 Series

(9) External Input Timing

Parameter Symbol

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Pin name

Value

Min Max

Unit Remarks

Pnn_m General Purpose I/O

ADTG

TINn

A/D Converter trigger input

Reload Timer

PPG trigger input

Input pulse width t

INH

, t

INL

TTGn

FRCKn,

FRCKn_R

2t

CLKP1

+200

(t

CLKP1

=

1/f

CLKP1

)*

- ns Free-Running Timer input clock

Input Capture INn, INn_R

AINn,

BINn,

ZINn

Quadrature

Position/Revolution

Counter

INTn, INTn_R External Interrupt

NMI

200 - ns Non-Maskable

Interrupt

*: t

CLKP1

indicates the peripheral clock1 (CLKP1) cycle time except stop when in stop mode.

t

INH

t

INL

External input timing V

IH

V

IH

V

IL

V

IL

DS704-00012-1v0-E


49

MB96630 Series

(10) I

2

C Timing

Parameter

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Symbol Conditions

Typical mode

High-speed mode*

4

Unit f

SCL

Min Max Min Max

0 100 0 400 kHz SCL clock frequency

(Repeated) START condition hold time

SDA

↓ → SCL ↓

SCL clock "L" width

SCL clock "H" width

(Repeated) START condition setup time

SCL

↑ → SDA ↓

Data hold time

SCL

↓ → SDA ↓ ↑

Data setup time

SDA

↓ ↑ → SCL ↑

STOP condition setup time

SCL

↑ → SDA ↑

Bus free time between

"STOP condition" and

"START condition" t t t t t t

HDSTA t

SUSTA

HDDAT

SUDAT

SUSTO t

LOW

HIGH

BUS

C

L

= 50pF,

R = (Vp/I

OL

)*

1

4.0

4.7

4.0

4.7

0

250

4.0

4.7

-

-

-

-

3.45*

-

-

-

2

0.6

1.3

0.6

0.6

0

100

0.6

1.3

-

-

-

-

0.9*

-

-

-

3

µs

µs

µs

µs

µs ns

µs

µs

Pulse width of spikes which will be suppressed by input noise filter t

SP

- 0

(1-1.5) t

CLKP1

×

*

5

0

(1-1.5) t

CLKP1

*

×

5 ns

*1: R and C

L

represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively.

Vp indicates the power supply voltage of the pull-up resistance and I

OL

indicates V

OL

guaranteed current.

*2: The maximum t

HDDAT

*3: A high-speed mode I

2

only has to be met if the device does not extend the "L" width (t

LOW

) of the SCL signal.

C bus device can be used on a standard mode I

2

C bus system as long as the device satisfies the requirement of "t

SUDAT

≥ 250ns".

*4: For use at over 100kHz, set the peripheral clock1 (CLKP1) to at least 6MHz.

*5: t

CLKP1

indicates the peripheral clock1 (CLKP1) cycle time.

SDA t

SUDAT

t

SUSTA

t

BUS

t

LOW

SCL t

HDSTA

t

HDDAT

t

HIGH

50


t

HDSTA

t

SP

t

SUSTO

DS704-00012-1v0-E

MB96630 Series

5. A/D Converter

(1) Electrical Characteristics for the A/D Converter

Parameter Symbol

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Pin name Min

Value

Typ Max

Unit Remarks

Resolution - - - - 10 bit

Total error - - - 3.0 - + 3.0 LSB

Nonlinearity error

Differential

Nonlinearity error

Zero transition voltage

Full scale transition voltage

Compare time

*

V

V

-

-

OT

FST

-

Sampling time

*

I

-

A

I

AH

Power supply current

Reference power supply current

(between AVRH and AV

SS

)

Analog input capacity

I

C

I

R

RH

VIN

Analog impedance R

VIN

Analog port input current (during conversion)

Analog input voltage

Reference voltage range

Variation between channels

*: Time for each channel.

I

AIN

V

AIN

-

-

-

-

ANn

ANn

-

-

AV

CC

ANn

ANn

ANn

AVRH

ANn

AVRH

ANn

- 2.5 - + 2.5 LSB

- 1.9

Typ - 20

Typ - 20

1.0

2.2

0.5

1.2

-

-

-

-

-

-

-

- 0.3

- + 1.9 LSB

AV

SS

+0.5LSB

AVRH

- 1.5LSB

-

-

-

-

2.0

-

520

Typ + 20 mV

Typ + 20

5.0

8.0

-

-

3.1

3.3

810 mV

µs 4.5V ≤ ΑV

µs 2.7

V ≤ ΑV

CC

CC

µs 4.5V ≤ ΑV

CC

≤ 5.5V

< 4.5V

µs 2.7

V ≤ ΑV

CC

≤ 5.5V

< 4.5V mA A/D Converter active

µA

A/D Converter not operated

µA A/D Converter active

-

-

-

-

-

1.0

15.9

2050

3600

+ 0.3

µA

A/D Converter not operated pF

Ω 4.5V ≤ AV

CC

≤ 5.5V

Ω 2.7V ≤ AV

CC

< 4.5V

µA AV SS

AV

< V

AIN

CC

, AVRH

<

AV

SS

AV

CC

- 0.1

-

-

-

-

AVRH

AV

CC

4.0

V

V

LSB

DS704-00012-1v0-E


51

MB96630 Series

(2) Accuracy and Setting of the A/D Converter Sampling Time

If the external impedance is too high or the sampling time too short, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting the A/D conversion precision.

To satisfy the A/D conversion precision, a sufficient sampling time must be selected. The required sampling time (Tsamp) depends on the external driving impedance R ext

, the board capacitance of the A/D converter input pin C ext and the AV

CC

voltage level. The following replacement model can be used for the calculation:

MCU

Source

R ext

Analog input

C ext

R

VIN

Comparator

C

VIN

Sampling switch

(During sampling:ON)

R ext

: External driving impedance

C ext

: Capacitance of PCB at A/D converter input

C

VIN

: Analog input capacity (I/O, analog switch and ADC are contained)

R

VIN

: Analog input impedance (I/O, analog switch and ADC are contained)

The following approximation formula for the replacement model above can be used:

Tsamp = 7.62 × (Rext × Cext + (Rext + R

VIN

) × C

VIN

)

• Do not select a sampling time below the absolute minimum permitted value.

(0.5

µ s for 4.5V ≤ AV

CC

≤ 5.5V, 1.2µs for 2.7V ≤ AV

CC

< 4.5V)

• If the sampling time cannot be sufficient, connect a capacitor of about 0.1µF to the analog input pin.

• A big external driving impedance also adversely affects the A/D conversion precision due to the pin input leakage current IIL (static current before the sampling switch) or the analog input leakage current IAIN (total leakage current of pin input and comparator during sampling). The effect of the pin input leakage current IIL cannot be compensated by an external capacitor.

• The accuracy gets worse as |AVRH - AV

SS

| becomes smaller.

52


DS704-00012-1v0-E

MB96630 Series

(3) Definition of A/D Converter Terms

• Resolution

: Analog variation that is recognized by an A/D converter.

• Nonlinearity error

: Deviation of the actual conversion characteristics from a straight line that connects the zero transition point (0b0000000000 ←→ 0b0000000001) to the full-scale transition point (0b1

111111110 ←→ 0b1111111111).

• Differential nonlinearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1LSB.

• Total error

: Difference between the actual value and the theoretical value. The total error includes zero transition error, full-scale transition error and nonlinearity error.

• Zero transition voltage: Input voltage which results in the minimum conversion value.

• Full scale transition Voltage : Input voltage which results in the maximum conversion value.

Nonlinearity error

0x3FF

0x3FE

0x3FD

0x004

0x003

0x002

0x001

Actual conversion characteristics

{1 LSB(N-1) + V

OT

}

V

FST

(Actuallymeasured value)

V

NT

(Actually-measured

value)


Ideal characteristics

V

OT

(Actually-measured value)

AV

SS

AVRH

Analog input

0x(N+1)

Differential nonlinearity error


0xN


0x(N-1)

0x(N-2)

AV

SS

V

(N+1)T


V

NT



Analog input

AVRH

Nonlinearity error of digital output N =

V

NT

- {1LSB × (N - 1) + V

OT

1LSB

} [LSB]

Differential nonlinearity error of digital output N =

V

(N + 1) T

- V

1LSB

NT

- 1 [LSB]

1LSB =

V

FST

- V

OT

1022

N

V

OT

: A/D converter digital output value.

: Voltage at which the digital output changes from 0x000 to 0x001.

V

FST

V

NT

: Voltage at which the digital output changes from 0x3FE to 0x3FF.

: Voltage at which the digital output changes from 0x(N − 1) to 0xN.

DS704-00012-1v0-E


53

MB96630 Series

Total error

0x3FF

0x3FE

0x3FD


{1 LSB (N-1) + 0.5 LSB}

1.5 LSB

0x004

0x003

0x002

0x001

AV

SS

1LSB (Ideal value) =

V

NT


Actual conversion

characteristics


0.5 LSB

AVRH

Analog input

AVRH - AV

SS

1024

[V]

Total error of digital output N =

V

NT

- {1LSB × (N - 1) + 0.5LSB}

1LSB

N

V

NT

: A/D converter digital output value.

: Voltage at which the digital output changes from 0x(N + 1) to 0xN.

V

OT

(Ideal value) = AV

SS

V

FST

+ 0.5LSB[V]

(Ideal value) = AVRH - 1.5LSB[V]

54


DS704-00012-1v0-E

MB96630 Series

6. Low Voltage Detection Function Characteristics

Parameter

Detected voltage

*1

Symbol

V

DL0

V

DL1

V

DL2

V

DL3

V

DL4

V

DL5

V

DL6

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Conditions

Min

Value

Typ Max

Unit

2.70 2.90 3.10 V CILCR:LVL = 0000

B

CILCR:LVL = 0001

B

CILCR:LVL = 0010

B

2.79

2.98

3.00

3.20

3.21

3.42

V

V

3.26 3.50 3.74 V CILCR:LVL = 0011

B

CILCR:LVL = 0100

B

CILCR:LVL = 0111

B

CILCR:LVL = 1001

B

3.45

3.73

3.91

3.70

4.00

4.20

3.95

4.27

4.49

V

V

V

Power supply voltage change rate

*2 dV/dt - - 0.004 - + 0.004 V/

µs

Hysteresis width V

HYS

CILCR:LVHYS=0

CILCR:LVHYS=1

-

80

-

100

50

120 mV mV

Stabilization time T

LVDSTAB

- - - 75

µs

Detection delay time t d

- - - 30

*1: If the power supply voltage fluctuates within the time less than the detection delay time (t d

), there is a possibility that the low voltage detection will occur or stop after the power supply voltage passes the

µs detection range.

*2: In order to perform the low voltage detection at the detection voltage (V

DLX

), be sure to suppress fluctuation of the power supply voltage within the limits of the change ration of power supply voltage.

DS704-00012-1v0-E


55

MB96630 Series

Voltage

V

DLX max

V

DLX min

Detected Voltage dt dV

Vcc

Time

Voltage

Internal Reset

Release Voltage

V

HYS dt dV

Vcc td

Time td

Normal Operation Low Voltage Reset Assertion Power Reset Extension Time

RCR:LVDE

···Low voltage detection

function enable

Low voltage detection function disable

Stabilization time

T

LVDSTAB

Low voltage detection function enable···

56


DS704-00012-1v0-E

MB96630 Series

7. Flash Memory Write/Erase Characteristics

Parameter

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C)

Conditions

Value

Min Typ Max

Unit Remarks

Large Sector T

A

≤ + 105°C

- 1.6 7.5 s

Sector erase time Small Sector - - 0.4 2.1 s

Includes write time prior to internal erase.

Security Sector - - 0.31 1.65 s

Word (16-bit) write time

Large Sector

Small Sector

T

A

≤ + 105°C

-

-

-

25 400

25 400

µs Not including system-level overhead

µs time.

Chip erase time T

A

≤ + 105°C

- 11.51 55.05 s

Includes write time prior to internal erase.

Note: While the Flash memory is written or erased, shutdown of the external power (V

CC

) is prohibited. In the application system where the external power (V

CC

) might be shut down while writing or erasing, be sure to turn the power off by using a low voltage detection function.

To put it concrete, change the external power in the range of change ration of power supply voltage

(-0.004V/

µs to +0.004V/µs) after the external power falls below the detection voltage (V

DLX

)

*1

.

Write/Erase cycles and data hold time

Write/Erase cycles

(cycle)

1,000

10,000

Data hold time

(year)

20

*2

10

*2

100,000 5

*2

*1: See "6. Low Voltage Detection Function Characteristics".

*2: This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85

°C).

DS704-00012-1v0-E


57

MB96630 Series

 EXAMPLE CHARACTERISTICS

This characteristic is an actual value of the arbitrary sample. It is not the guaranteed value.

• MB96F637

100.00

Run Mode

(V

CC

= 5.5V)

PLL clock (32MHz)

10.00

Main osc. (4MHz)

1.00

RC clock (2MHz)

RC clock (100kHz)

0.10

0.01

-50

Sub osc. (32kHz)

0 50

T

A

[ºC]

100 150

58

100.000

10.000

PLL clock (32MHz)

1.000

0.100

0.010

0.001

-50

Main osc. (4MHz)

RC clock (2MHz)

RC clock (100kHz)

Sub osc. (32kHz)

0

Sleep Mode

50

T

A

[ºC]


100

(V

CC

= 5.5V)

150

DS704-00012-1v0-E

• MB96F637

10.000

PLL clock (32MHz)

1.000

0.100

Main osc. (4MHz)

RC clock (2MHz)

0.010

0.001

-50

RC clock (100kHz)

Sub osc. (32kHz)

0

Timer Mode

50

T

A

[ºC]

Stop Mode

1.000

MB96630 Series

100

(V

CC

= 5.5V)

(V

CC

= 5.5V)

150

0.100

0.010

0.001

-50 0

• Used setting

DS704-00012-1v0-E


50

T

A

[ºC]

100 150

59

60

MB96630 Series

• Used setting

Mode

Run mode

Selected Source

Clock

PLL

Main osc.

Sleep mode

RC clock fast

RC clock slow

Sub osc.

PLL

Timer mode

Stop mode

Main osc.

RC clock fast

RC clock slow

Sub osc.

PLL

Main osc.

RC clock fast

RC clock slow

Sub osc. stopped

Clock/Regulator and FLASH Settings

CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 32MHz



CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 100kHz

CLKS1 = CLKS2 = CLKB = CLKP1 = CLKP2 = 32kHz

CLKS1 = CLKS2 = CLKP1 = CLKP2 = 32MHz

Regulator in High Power Mode,

(CLKB is stopped in this mode)







CLKS1 = CLKS2 = CLKP1 = CLKP2 = 100kHz

Regulator in Low Power Mode,


CLKS1 = CLKS2 = CLKP1 = CLKP2 = 32kHz



CLKMC = 4MHz, CLKPLL = 32MHz

(System clocks are stopped in this mode)


FLASH in Power-down / reset mode

CLKMC = 4MHz




CLKMC = 2MHz




CLKMC = 100kHz




CLKMC = 32 kHz




(All clocks are stopped in this mode)



DS704-00012-1v0-E


 ORDERING INFORMATION

MCU with CAN controller

Part number Flash memory

MB96F633RBPMC-GSE1

MB96F633RBPMC-GSE2

Flash A

(96.5KB)

MB96F635RBPMC-GSE1

MB96F635RBPMC-GSE2

MB96F636RBPMC-GSE1

MB96F636RBPMC-GSE2

Flash A

(160.5KB)

Flash A

(288.5KB)

MB96F637RBPMC-GSE1

MB96F637RBPMC-GSE2

Flash A

(416.5KB)

*: For details about package, see "PACKAGE DIMENSION".

MCU without CAN controller

Part number

MB96F633ABPMC-GSE1

MB96F633ABPMC-GSE2

Flash memory

Flash A

(96.5KB)

MB96F635ABPMC-GSE1

MB96F635ABPMC-GSE2

Flash A

(160.5KB)

*: For details about package, see "PACKAGE DIMENSION".

MB96630 Series

Package*

80-pin plastic LQFP

(FPT-80P-M21)

80-pin plastic LQFP

(FPT-80P-M21)

80-pin plastic LQFP

(FPT-80P-M21)

80-pin plastic LQFP

(FPT-80P-M21)

Package*

80-pin plastic LQFP

(FPT-80P-M21)

80-pin plastic LQFP

(FPT-80P-M21)

DS704-00012-1v0-E


61

MB96630 Series

 PACKAGE DIMENSION

80-pin plastic LQFP Lead pitch

Package width × package length

Lead shape

Sealing method

Mounting height

Weight

Code

(Reference)

0.50 mm

12 mm × 12 mm

Gullwing

Plastic mold

1.70 mm Max

0.47 g

P-LFQFP80-12×12-0.50

(FPT-80P-M21)

80-pin plastic LQFP

(FPT-80P-M21)

14.00±0.20(.551±.008)SQ

*

12.00±0.10(.472±.004)SQ

60 41

Note 1) * : These dimensions do not include resin protrusion.

Note 2) Pins width and pins thickness include plating thickness.

Note 3) Pins width do not include tie bar cutting remainder.

0.145±0.055

(.006±.002)

61 40

0.08(.003)

80

INDEX

21

LEAD No.

1

0.50(.020)

20

0.20±0.05

(.008±.002)

0.08(.003) M

C 2006-2010 FUJITSU SEMICONDUCTOR LIMITED F80035S-c-2-4

Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/

62

"A"

Details of "A" part

1.50

+0.20

–0.10

.059

+.008

–.004

(Mounting height)

0°~8°

0.10±0.05

(.004±.002)

(Stand off)

0.25(.010)

0.50±0.20

(.020±.008)

0.60±0.15

(.024±.006)

Dimensions in mm (inches).

Note: The values in parentheses are reference values

DS704-00012-1v0-E


MB96630 Series

 MAJOR CHANGES IN THIS EDITION

A change on a page is indicated by a vertical line drawn on the left side of that page.

Page Section Change Results

- - PRELIMINARY

→ Data sheet



FEATURES

2

Changed the description of “System clock”

Up to 16 MHz external clock for devices with fast clock input feature

→

Up to 8 MHz external clock for devices with fast clock input feature

Changed the description of “External Interrupts”

Interrupt mask and pending bit per channel

→

Interrupt mask bit per channel

4

Changed the description of “Built-in On Chip Debugger”

- Event sequencer: 2 levels

→

- Event sequencer: 2 levels + reset



PRODUCT LINEUP

5



BLOCK DIAGRAM

Added the Product

Changed the Remark of RLT

RLT 0/1/6 Only RLT6 can be used as PPG clock source

→

RLT 0/1/6

Deleted the block of RLT6 from PPG block

6

8

13

14

17







PIN DESCRIPTION

I/O CIRCUIT TYPE

MEMORY MAP

Changed the RLT block

2ch

→

0/1/6 3ch

Changed the Description of PPGn_B

Programmable Pulse Generator n output (8bit)

→

Programmable Pulse Generator n output (16bit/8bit)

Changed the figure of type B

Changed the Remarks of type B

(CMOS hysteresis input with input shutdown function,

I

OL

→

= 4mA, I

OH

= -4mA, Programmable pull-up resister)

(CMOS level output (I

OL

= 4mA, I

OH

= -4mA), Automotive input with input shutdown function and programmable pull-up resistor)

Changed the figure of type G

Changed the START addresses of Boot-ROM

0F:E000

H

→

0F:C000

H

DS704-00012-1v0-E


63

MB96630 Series

Page

19

21

22

25 to 28



INTERRUPT VECTOR

TABLE

Section



USER ROM MEMORY MAP

FOR FLASH DEVICES

Change Results

Changed the annotation


H

to DF:1FFF

H

) are all mirror area of

SAS-512B.

→


H

to DF:1FFF

H

) is mirror area of

SAS-512B.

Changed the Description of CALLV0 to CALLV7

Reserved

→

CALLV instruction

Changed the Description of RESET

Reserved

→

Reset vector

Changed the Description of INT9

Reserved

→

INT9 instruction

Changed the Description of EXCEPTION

Reserved

→

Undefined instruction execution

Changed the Vector name of Vector number 64

PPGRLT

→

RLT6

Changed the Description of Vector number 64

Reload Timer 6 can be used as PPG clock source

→

Reload Timer 6



HANDLING PRECAUTIONS Added a section



HANDLING DEVICES

30

31

33



ELECTRICAL

CHARACTERISTICS


Added the description to “3. External clock usage”

(3) Opposite phase external clock

Changed the description in “7. Turn on sequence of power supply to A/D converter and analog inputs”

In this case, the voltage must not exceed AVRH or AV

CC

→

In this case, AVRH must not exceed AV

CC

. Input voltage for ports shared with analog input ports also must not exceed

AV

CC

Added the description “12. Mode Pin (MD)”

Changed the annotation *4

Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the Power reset

(except devices with persistent low voltage reset in internal vector mode).

→

Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the Power reset.

64 DS704-00012-1v0-E


MB96630 Series

Page Section


33

35

36

37

2. Recommended Operating

Conditions


(1) Current Rating

Change Results

Added the annotation *4

The DEBUG I/F pin has only a protective diode against V

SS

.

Hence it is only permitted to input a negative clamping current

(4mA). For protection against positive input voltages, use an external clamping diode which limits the input voltage to maximum 6.0V.

Added the Value and Remarks to “Power supply voltage”

Min: 2.0V

Typ: -

Max: 5.5V

Remarks: Maintains RAM data in stop mode

Changed the Value of “Smoothing capacitor at C pin”

Typ: 1.0

µF → 1.0µF to 3.9µF

Max: 1.5

µF → 4.7µF

Changed the Remarks of “Smoothing capacitor at C pin”

Deleted “(Target value)”

Added “3.9

µF (Allowance within ± 20%)”

Deleted “(Target value)” from Remarks

Added the Symbol to “Power supply current in Run modes”

I

CCRCH

, I

CCRCL

Changed the Conditions of I

CCPLL

, I

CCMAIN

, I

CCSUB

in “Power supply current in Run modes”

“Flash 0 wait” is added

Changed the Value of “Power supply current in Run modes”

I

CCPLL

Max: 37.5mA

→ 37mA (T

A

= +105°C)

Max: 39mA

→ 38.5mA (T

A

= +125°C)

I

CCMAIN

Max: 9mA

→ 8mA (T

A

= +105°C)

Max: 10.5mA

→ 9.5mA (T

A

= +125°C)

I

CCSUB

Max: 6mA

→ 3.3mA (T

A

= +105°C)

Max: 7.5mA

→ 4.8mA (T

A

= +125°C)

Added the Symbol to “Power supply current in Sleep modes”

I

CCSRCH

, I

CCSRCL


CCSMAIN

in “Power supply current in Sleep modes”

“SMCR:LPMSS=0” is added

Changed the Value of “Power supply current in Sleep modes”

I

CCSPLL

Typ: 10mA

→ 8.5mA (T

A

= +25°C)

Max : 15mA

→ 14mA (T

A

= +105°C)

Max : 16.5mA

→ 15.5mA (T

A

= +125°C)

I

CCSMAIN

Max: 7mA

→ 4.5m A (T

A

= +105°C)

Max : 8.5mA

→ 6mA (T

A

= +125°C)

I

CCSSUB

Typ: 0.08mA

→ 0.04m A (T

A

= +25°C)

Max: 4mA

→ 2.5m A (T

Max : 5.5mA

→ 4mA (T

A

= +105°C)

A

= +125°C)

DS704-00012-1v0-E


65

MB96630 Series

Page Section


(1) Current Rating

38

39

Change Results

Added the Symbol to “Power supply current in Timer modes”

I

CCTPLL


CCTMAIN

, I

CCTRCH

in “Power supply current in Timer modes”

“SMCR:LPMSS=0” is added

Changed the Value of “Power supply current in Timer modes”

I

CCTMAIN

Max: 355

µA → 330µA (T

A

= +25°C)

Max: 1300

µA → 1195µA (T

A

= +105°C)

Max: 2310

µA → 2165µA (T

A

= +125°C)

I

CCTRCH

Max: 245

µA → 215µA (T

A

= +25°C)

Max: 1215

µA → 1095µA (T

A

= +105°C)

Max: 2215

µA → 2075µA (T

A

= +125°C)

I

CCTRCL

Max: 105

µA → 75µA (T

A

= +25°C)

Max: 1010

µA → 905µA (T

A

= +105°C)

Max: 2015

µA → 1880µA (T

A

= +125°C)

I

CCTSUB

Max: 90

µA → 65µA (T

A

= +25°C)

Max: 985

µA → 885µA (T

A

= +105°C)

Max: 1990

µA → 1850µA (T

A

= +125°C)

Changed the Value of “Power supply current in Stop modes”

I

CCH

Max: 90

µA → 60µA (T

A

= +25°C)

Max: 985

µA → 880µA (T

A

= +105°C)

Max: 1985

µA → 1845µA (T

A

= +125°C)

Added the Symbol

I

CCFLASHPD

Changed the Value and condition of “Power supply current for active Low Voltage detector”

I

CCLVD

Typ: 5

µA, Max: 15µA, Remarks: nothing

→

Typ: 5

µA, Max: -, Remarks: T

A

= +25°C

Typ: -, Max: 12.5

µA, Remarks: T

A

= +125°C

Changed the condition of “Flash Write/Erase current”

I

CCFLASH

Typ: 12.5mA, Max: 20mA, Remarks: nothing

→

Typ: 12.5mA, Max: -, Remarks: T

A

= +25°C

Typ: -, Max: 20mA, Remarks: T

A

= +125°C

Changed the annotation *2

The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a 32kHz external clock connected to the Sub oscillator.

→


CCFLASHPD must be added to the Power supply current.

The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a 32kHz external clock connected to the Sub oscillator. The current for "On Chip

Debugger" part is not included.

66


DS704-00012-1v0-E

MB96630 Series

Page

40

41

42

Section


(2) Pin Characteristics


(1) Main Clock Input

Characteristics

Change Results

Added the Symbol for DEBUG I/F pin

V

OLD

Changed the Pin name of “Input capacitance”

Other than

Vcc,

Vss,

AVcc,

AVss,

AVRH

→

Other than

C,

Vcc,

Vss,

AVcc,

AVss,

AVRH

Deleted the annotation

“I

OH

and I

OL

are target value.”

Changed MAX frequency for f

FCI

16

→8

in all conditions

Changed MIN frequency for t

CYLH

62.5

→125

Changed MIN, MAX and Unit for P

WH

, P

MIN: 30

→55

MAX: 70

→-

Unit: %

→ns

WL

Added the figure (t

CYLH

) when using the external clock

43

44

45

47

48

50


(2) Sub Clock Input

Characteristics


(3) Built-in RC Oscillation

Characteristics


(5) Operating Conditions of PLL

Added the figure (t

CYLL

) when using the crystal oscillator clock

Added “RC clock stabilization time”

Changed the Value of “PLL input clock frequency”

Max: 16MHz → 8MHz

Changed the Symbol of “PLL oscillation clock frequency” f

PLLO

→ f

CLKVCO

Added Remarks to “PLL oscillation clock frequency”

Added “ PLL phase jitter” and the figure


(6) Reset Input


(8) USART Timing


(10) I

2

C timing

DS704-00012-1v0-E

Added the figure for reset input time (t

RSTL

)

Changed the condition

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to

+ 105°C)

→

(V

CC

= AV

CC

= 2.7V to 5.5V, V

SS

= AV

SS

= 0V, T

A

= - 40°C to + 125°C, C

L

=50pF)

Changed the HARDWARE MANUAL

“MB96630 series HARDWARE MANUAL”

→

“MB96600 series HARDWARE MANUAL”

Changed the figure for “Internal shift clock mode”

Added parameter, “Noise filter” and an annotation *5 for it

Added t

SP

to the figure

67


MB96630 Series

Page

51

52

Section

5. A/D Converter

(1) Electrical Characteristics for the A/D Converter

5. A/D Converter

(2) Accuracy and Setting of the

A/D Converter Sampling Time

5. A/D Converter

(3) Definition of A/D Converter

Terms

Change Results

Added “Analog impedance”

Added “Variation between channels”

Added the annotation

Deleted the unit “[Min]” from approximation formula of

Sampling time

53

55

56

57

58 to 60

6. Low Voltage Detection

Function Characteristics

7. Flash Memory Write/Erase

Characteristics



EXAMPLE

CHARACTERISTICS

Changed the Description and the figure

“Linearity” → “Nonlinearity”

“Differential linearity error”

→

“Differential nonlinearity error”

Changed the Description

Linearity error:

Deviation of the line between the zero-transition point

(0b0000000000←→0b0000000001) and the full-scale transition point

(0b1111111110←→0b1111111111) from the actual conversion characteristics.

→

Nonlinearity error:

Deviation of the actual conversion characteristics from a straight line that connects the zero transition point

(0b00

00000000 ←→ 0b0000000001) to the full-scale transition point (0b1111111110 ←→ 0b1111111111).

Added the Description

“Zero transition voltage”

“Full scale transition voltage”

Added the Value of “ Power supply voltage change rate”

Max: +0.004 V/

µs

Added “Hysteresis width” (V

HYS

)

Added “Stabilization time” (T

LVDSTAB

)

Added “Detection delay time” (t d

)

Deleted the Remarks

Added the annotation *1, *2

Added the figure for “Hysteresis width”

Added the figure for “Stabilization time”

Changed the Value of “Sector erase time”

Added “Security Sector” to “Sector erase time”

Changed the Parameter

“Half word (16 bit) write time”

→

“Word (16-bit) write time”

Changed the Value of “Chip erase time”

Changed the Remarks of “Sector erase time”

Excludes write time prior to internal erase

→

Includes write time prior to internal erase

Added the Note and annotation *1

Deleted “(targeted value)” from title “ Write/Erase cycles and data hold time”

Added a section

68


DS704-00012-1v0-E

MB96630 Series

Page

61

61

Section Change Results



ORDERING INFORMATION Changed part number

• MCU with CAN controller

MB96F636RAPMC-GSE1*

→ MB96F636RBPMC-GSE1

MB96F636RAPMC-GSE2*


MB96F637RAPMC-GSE1*


MB96F637RAPMC-GSE2*




ORDERING INFORMATION Added part number

• MCU with CAN controller

MB96F633RBPMC-GSE1

MB96F633RBPMC-GSE2

MB96F635RBPMC-GSE1

MB96F635RBPMC-GSE2

• MCU without CAN controller

MB96F633ABPMC-GSE1

MB96F633ABPMC-GSE2

MB96F635ABPMC-GSE1

MB96F635ABPMC-GSE2

DS704-00012-1v0-E


69

MB96630 Series

70


DS704-00012-1v0-E

MB96630 Series

DS704-00012-1v0-E


71

MB96630 Series

FUJITSU SEMICONDUCTOR LIMITED

Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,

Kohoku-ku Yokohama Kanagawa 222-0033, Japan

Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/

For further information please contact:

North and South America

FUJITSU SEMICONDUCTOR AMERICA, INC.

1250 E. Arques Avenue, M/S 333

Sunnyvale, CA 94085-5401, U.S.A.

Tel: +1-408-737-5600 F ax: +1-408-737-5999 http://us.fujitsu.com/micro/

Europe

FUJITSU SEMICONDUCTOR EUROPE GmbH

Pittlerstrasse 47, 63225 Langen, Germany

Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/

Korea

FUJITSU SEMICONDUCTOR KOREA LTD.

902 Kosmo Tower Building, 1002 Daechi-Dong,

Gangnam-Gu, Seoul 135-280, Republic of Korea

Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fsk/

Asia Pacific

FUJITSU SEMICONDUCTOR ASIA PTE. LTD.

151 Lorong Chuan,

#05-08 New Tech Park 556741 Singapore

Tel : +65-6281-0770 Fax : +65-6281-0220 http://sg.fujitsu.com/semiconductor/

FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD.

30F, Kerry Parkside, 1155 Fang Dian Road,

Pudong District, Shanghai 201204, China

Tel : +86-21-6146-3688 Fax : +86-21-6146-3660 http://cn.fujitsu.com/fss/

FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD.

2/F, Green 18 Building, Hong Kong Science Park,

Shatin, N.T., Hong Kong

Tel : +852-2736-3232 Fax : +852-2314-4207 http://cn.fujitsu.com/fsp/

Specifications are subject to change without notice. For further information please contact each office.

All Rights Reserved.

The contents of this document are subject to change without notice.

Customers are advised to consult with sales representatives before ordering.

The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU

SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information.

FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information.

Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of

FUJITSU SEMICONDUCTOR or any third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU SEMICONDUCTOR assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions.

Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of their respective owners.

Edited: Sales Promotion Department

72 DS704-00012-1v0-E


User manual | Cal Flame FPT-80 Hardware manual

FUJITSU SEMICONDUCTOR

DATA SHEET

16-bit Proprietary Microcontroller

Ω

Ω

Standby control for input shutdown

Pull-up control

Pout

Nout

Hysteresis input

Analog input

MB96F633 10KB

MB96F635

MB96F636

MB96F637

16KB

24KB

28KB

00:5A00

00:4200

00:2200

00:1200

•

•

•

•

•

•

•

t

t

External input timing V

V

V

V

SDA t

t

t

t

SCL t

t

t

t

t

t

Nonlinearity error

Analog input

Differential nonlinearity error

Analog input

Total error

Analog input

RCR:LVDE

Run Mode

Sleep Mode

Timer Mode

Stop Mode

FUJITSU SEMICONDUCTOR LIMITED

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Table of contents