STEVAL-TDR013V1
Demonstration board using the PD84002 for UHF RFID reader
Features
■
■
■
■
■
■
■
■
■
Excellent thermal stability
Frequency: 8
860 - 960 MHz
Supply voltage: 7.2 V
Output power: 2 W
Power gain: 13.9
±
0.5 dB
Efficiency: 60 % - 63 %
Load mismatch: 20:1
BeO-free amplifier
Description
The STEVAL-TDR013V1 is an evaluation board using PD84002 LDMOS transistor and designed for UHF RFID reader and 2-way radio applications.
For additional information on PD84002, please refer to its datasheet.
Mechanical specification:
L = 60 mm, W = 30 mm
Table 1.
Device summary
Order code
STEVAL-TDR013V1
September 2010 Doc ID 18013 Rev 1 1/16 www.st.com
16
4
5
2
3
6
7
Contents
Contents
1
8
STEVAL-TDR013V1
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Circuit layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.1
Thermal pad and via design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.2
Soldering profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1 Electrical data
Table 2.
Symbol
V
DD
I
D
T
CASE
T
A
Absolute maximum ratings
Parameter
Supply voltage
Drain current
Operating case temperature
Maximum ambient temperature
Value
16
0.75
-20 to +85
+55
Unit
V
A
°C
°C
T
A
= +25 o
C, V
DD
= 7.2 V, I dq
= 100 mA
Table 3.
Symbol
Electrical specifications
Test conditions
Freq Frequency range
P
OUT
Gain
ND
H2
H3
@ P
IN
= 19 dBm
@ P
IN
= 19 dBm
2nd harmonic @ P
OUT
= 2 W
3rd harmonic @ P
OUT
= 2 W
VSWR Load mismatch all phases @ P
OUT
= 2 W
Min
860
Typ
2
13.9
±
0.5
60 - 63
-31 / -46
-62 / -70
Max
960
20:1
Unit
MHz
W dB
%
dBc
dBc
Doc ID 18013 Rev 1 3/16
Impedance
3 Impedance
Figure 1.
Impedance illustration
D
Z
DL
Z
IN
G
S
Table 4.
Impedance data
F(MHz)
860
870
880
890
900
910
920
930
940
Z
GS
1,80 + j 7,79
1,84 + j 7,96
1,83 + j 8,01
1,76 + j 8,11
1,70 + j 8,20
1,63 + j 8,30
1,57 + j 8,48
1,43 + j 8,64
1,41+ j 8,83
STEVAL-TDR013V1
Z
DL
3,88 + j 2,41
3,89 + j 2,69
4,01 + j 2,96
4,17 + j 3,16
4,27 + j 3,32
4,37 + j 3,40
4,41 + j 3,46
4,36 + j 3,51
4,28 + j 3,51
4/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1 Typical performance
Figure 2.
Output power and efficiency vs frequency
7.2 V / 100 mA / Pin = 19 dBm
4.0
80
Pout Eff
3.5
70
Figure 3.
Gain vs frequency
7.2 V / 100 mA / Pin = 19 dBm
18
16
3.0
60
14
2.5
50
12
2.0
40
10
1.5
30
1.0
840 860 880 900
Freq (MHz)
920 940 960
20
8
820 840 860 880 900 920 940 960 980 1000
Freq (MHz)
Figure 4.
Gain vs Pout
7.2 V / 100 mA
18
16
14
12
860 MHz 900 MHz 960 MHz
10
0.50
0.75
1.00
1.25
1.50
Pout (W)
1.75
2.00
2.25
2.50
Figure 5.
Harmonics vs frequency
7.2 V / 100 mA / Pin = 19 dBm
0
-10
H2 H3
-20
-30
-40
-50
-60
-70
-80
820 840 860 880 900 920
Freq (MHz)
940 960 980 1000
Doc ID 18013 Rev 1 5/16
Typical performance
Figure 6.
Input return loss vs frequency
7.2 V / 100 mA / Pin = 19 dBm
0
-5
-10
-15
-20
-25
-30
-35
820 840 860 880 900 920
Freq (MHz)
940 960 980 1000
STEVAL-TDR013V1
6/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1 Test circuit
Figure 7.
Test circuit schematic
MSub
FR4
H=20 mil
R3
R2
RFin
C4
TL1
C6
TL2
C7
B1
B2
C3
Vcc
1 +
2 -
C1
L1
C2
R1
TL3
C8
LDMOS
PD84002
TL4
C9
TL5
C10
TL6
C11
C5
RFout
Table 5.
Part list
Component ID Description
B1
B2
C1, C2
C3
C4, C5
C6, C10
C7
C8
C9
C11
L1
R1
R2
R3
Ferrite Bead
Ferrite Bead
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Inductor
Resistor
Potentiometer
Resistor
Value
120 pF
1 uF
39 pF
3.3 pF
8.2 pF
22 pF
12 pF
2.7 pF
12.55 nH
150
Ω
10 K
Ω
1 K
0603
0603
0603
0603
0603
0603
0603
0603
Case size
0603
0603
Manufacturer Part code
Panasonic
Panasonic
Murata
Murata
Murata
Murata
Murata
Murata
Murata
Murata
Coilcraft
Tyco electronics
Bourns electronics
Tyco electronics
EXCELDRC35C
EXCELDRC35C
GRM39-C0G121J50D500
GRM39-X5R105K16D52K
GRM39-C0G390J50D500
GRM39-C0G3R3C50Z500
GRM39-C0G8R2D50Z500
GRM39-C0G220J50D500
GRM39-C0G120J50D500
GRM39-C0G2R7C50Z500
1606-10
3214W-1-103E
01623440-1
Doc ID 18013 Rev 1 7/16
Test circuit
Table 5.
TL1
Part list (continued)
Component ID
Transmission line W = 0.92mm L = 13.6 mm
Description Value Case size
TL2
TL3
TL4
TL5
TL6
RF in, RF out
PD84002
Board
Manufacturer
Transmission line W = 0.92mm
L = 3.5 mm
Transmission line W = 0.92mm
L = 4.2 mm
Transmission line W = 0.92mm
L = 3.8 mm
Transmission line W = 0.92mm
L = 3.7 mm
Transmission line W = 0.92mm
L = 11.3 mm
SMA-CONN 50
Ω 60 mils
LDMOS
Johnson
STMicroelectronics
FR-4 THk=0.020" 2OZ Cu both sides
STEVAL-TDR013V1
Part code
142-0701-801
PD84002
Figure 8.
Demoboard photo
8/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1
Figure 9.
Test fixture component layout
Circuit layout
Figure 10.
Test circuit photomaster
Doc ID 18013 Rev 1 9/16
Package mechanical data
7 Package mechanical data
STEVAL-TDR013V1
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
10/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1
Table 6.
Dim.
SOT-89 mechanical data mm.
Min Typ
A 1.4
Max
Package mechanical data
Min
Inch
Typ Max
63.0
D 4.4
E 2.29 e1 2.92
H 3.94
L 0.89
Figure 11.
Package dimensions
2.6 90.2
1.2 35.0
181.1
102.4
120.9
167.3
47.2
Doc ID 18013 Rev 1 11/16
Package mechanical data
7.1
STEVAL-TDR013V1
Thermal pad and via design
Thernal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device.
The via pattern is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a
0.5mm to 1.2mm grid pattern with 0.025 plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
Figure 12.
Pad layout details
12/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1 Package mechanical data
Figure 13
shows the recommeded solder for devices that have Pb-free terminal plating and where a Pb-free solder is used.
Figure 13.
Recommended solder profile
Figure 14
shows the recommeded solder for devices with Pb-free terminal plating used with leaded solder, or for devices with leaded terminal plating used with a leaded solder.
Figure 14.
Recommended solder profile for leaded devices
Doc ID 18013 Rev 1 13/16
Package mechanical data
Figure 15.
Reel information
STEVAL-TDR013V1
14/16 Doc ID 18013 Rev 1
STEVAL-TDR013V1
Updated
Table 7.
Date
Document revision history
Revision
22-Sep-2007 1 Initial release
Changes
Revision history
Doc ID 18013 Rev 1 15/16
STEVAL-TDR013V1
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