STMicroelectronics L4974A Datasheet

®

L4974A

.

.

.

.

.

.

.

.

3.5A OUTPUT CURRENT

5.1V TO 40V OUTPUT VOLTAGE RANGE

0 TO 90% DUTY CYCLE RANGE

INTERNAL FEED-FORWARD LINE REG.

INTERNAL CURRENT LIMITING

PRECISE 5.1V

±

2% ON CHIP REFERENCE

RESET AND POWER FAIL FUNCTIONS

INPUT/OUTPUT SYNC PIN

.

.

UNDER VOLTAGE LOCK OUT WITH HYS-

TERETIC TURN-ON

PWM LATCH FOR SINGLE PULSE PER PE-

RIOD

.

.

.

.

VERY HIGH EFFICIENCY

SWITCHING FREQUENCY UP TO 200KHz

THERMAL SHUTDOWN

CONTINUOUS MODE OPERATION

DESCRIPTION

The L4974A is a stepdown monolithic power switching regulator delivering 3.5A at a voltage variable from 5.1 to 40V.

Realized with BCD mixed technology, the device uses a DMOS output transistor to obtain very high efficiency and very fast switching times. Features of

3.5A SWITCHING REGULATOR

MULTIPOWER BCD TECHNOLOGY

POWERDIP (16 + 2 + 2)

ORDERING NUMBER : L4974A the L4974A include reset and power fail for microprocessors, feed forward line regulation, soft start, limiting current and thermal protection. The device is mounted in a Powerdip 16 + 2 + 2 plastic package and requires few external components. Efficient operation at switching frequencies up to 200KHz allows reduction in the size and cost of external filter component.

BLOCK DIAGRAM

June 2000

1/22

This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

L4974A

ABSOLUTE MAXIMUM RATINGS

Symbol

V

11

V

11

V

20

I

20

V

I

V

4

, V

8

V

3

I

3

V

2

, V

7

, V

9

, V

10

I

2

I

7

I

8

P tot

T

J

, T stg

Parameter

Input Voltage

Input Operating Voltage

Output DC Voltage

Output Peak Voltage at t = 0.1

µ s f = 200khz

Maximum Output Current

Boostrap Voltage

Boostrap Operating Voltage

Input Voltage at Pins 4, 12

Reset Output Voltage

Reset Output Sink Current

Input Voltage at Pin 2, 7, 9, 10

Reset Delay Sink Current

Error Amplifier Output Sink Current

Soft Start Sink Current

Total Power Dissipation at T

PINS

≤

90°C

at T amb

= 70°C (No copper area on PCB)

Junction and Storage Temperature

Value

55

50

-1

-5

Internally Limited

65

V

11

+ 15

12

50

50

7

30

1

30

5

1.3

-40 to 150

V mA

A mA

W

W

°C

V

V

V

V mA

Unit

V

V

V

V

PIN CONNECTION (top view)

THERMAL DATA

Symbol

R th j-pins

R th j-amb

Parameter

Thermal Resistance Junction-Pins max

Thermal Resistance Junction-ambient max

Value

12

60

2/22

Unit

°C/W

°C/W

L4974A

PIN FUNCTIONS

N

o

1

Name

BOOTSTRAP

2 RESET DELAY

3

4

RESET OUT

RESET INPUT

5, 6

15, 16

7

8

GROUND

FREQUENCY

COMPENSATION

SOFT START

9

10

FEEDBACK INPUT

SYNC INPUT

11 SUPPLY VOLTAGE

12, 19 N.C.

13

14

17

V ref

V start

OSCILLATOR

18

20

OSCILLATOR

OUTPUT

Function

A C boot

capacitor connected between this terminal and the output allows to drive properly the internal D-MOS transistor.

A C d

capacitor connected between this terminal and ground determines the reset signal delay time.

Open Collector Reset/power Fail Signal Output. This output is high when the supply and the output voltages are safe.

Input of Power Fail Circuit. The threshold is 5.1V. It may be connected via a divider to the input for power fail function. It must be connected to the pin 14 an external 30K

Ω resistor when power fail signal not required.

Common Ground Terminal

A series RC network connected between this terminal and ground determines the regulation loop gain characteristics.

Soft Start Time Constant. A capacitor is connected between thi sterminal and ground to define the soft start time constant.

The Feedback Terminal of the Regulation Loop. The output is connected directly to this terminal for 5.1V operation; It is connected via a divider for higher voltages.

Multiple L4974A’s are synchronized by connecting pin 10 inputs together or via an external syncr. pulse.

Unregulated Input Voltage.

Not Connected.

5.1V V ref

Device Reference Voltage.

Internal Start-up Circuit to Drive the Power Stage.

R osc

. External resistor connected to ground determines the constant charging current of C osc

.

C osc

. External capacitor connected to ground determines (with R osc

) the switching frequency.

Regulator Output.

3/22

L4974A

CIRCUIT OPERATION

The L4974A is a 3.5A monolithic stepdown switching regulator working in continuous mode realized in the new BCD Technology. This technology allows the integration of isolated vertical DMOS power transistors plus mixed CMOS/Bipolar transistors.

The device can deliver 3.5A at an output voltage adjustable from 5.1V to 40V and contains diagnostic and control functions that make it particularly suitable for microprocessor based systems.

BLOCK DIAGRAM

The block diagram shows the DMOS power transistors and the PWM control loop. Integrated functions include a reference voltage trimmed to 5.1V

±

2%, soft start, undervoltage lockout, oscillator with feedforward control, pulse by pulse current limit, thermal shutdown and finally the reset and power fail circuit. The reset and power fail circuit provides an output signal for a microprocessor indicating the status of the system.

Device turn on is around 11V with a typical 1V hysterysis, this threshold porvides a correct voltage for the driving stage of the DMOS gate and the hysterysis prevents instabilities.

An external bootstrap capacitor charge to 12V by an internal voltage reference is needed to provide correct gate drive to the power DMOS. The driving circuit is able to source and sink peak currents of around 0.5A to the gate of the DMOS transistor. A typical switching time of the current in the DMOS transistor is 50ns. Due to the fast commutation switching frequencies up to 200kHz are possible.

The PWM control loop consists of a sawtooth oscillator, error amplifier, comparator, latch and the output stage. An error signal is produced by comparing the output voltage with the precise 5.1V

±

2% on chip reference. This error signal is then compared with the sawtooth oscillator in order to generate frixed frequency pulse width modulated drive for the output stage. A PWM latch is included to eliminate multiple pulsing within a period even in noisy environments.

The gain and stability of the loop can be adjusted by an external RC network connected to the output of the error amplifier. A voltage feedforward control has been added to the oscillator, this maintains superior line regulation over a wide input voltage range. Closing the loop directly gives an output voltage of 5.1V, higher voltages are obtained by inserting a voltage divider.

At turn on, output overcurrents are prevented by the soft start function (fig. 2). The error amplifier is initially clamped by an external capacitor, Css, and allowed to rise linearly under the charge of an internal constant current source.

Output overload protection is provided by a current limit circuit. The load current is sensed by a internal metal resistor connected to a comparator. When the load current exceeds a preset threshold, the output of the comparator sets a flip flop which turns off the power DMOS. The next clock pulse, from an internal

40kHz oscillator, will reset the flip flop and the power

DMOS will again conduct. This current protection method, ensures a constant current output when the system is overloaded or short circuited and limits the switching frequency, in this condition, to 40kHz. The

Reset and Power fail circuit (fig. 4), generates an output signal when the supply voltage exceeds a threshold programmed by an external voltage divider. The reset signal, is generated with a delay time programmed by a external capacitor on the delay pin. When the supply voltage falls below the threshold or the output voltage goes below 5V, the reset output goes low immediately. The reset output is an open drain.

Fig. 4A shows the case when the supply voltage is higher than the threshold, but the output voltage is not yet 5V.

Fig. 4B shows the case when the output is 5.1V, but the supply voltage is not yet higher than the fixed threshold.

The thermal protection disables circuit operation when the junction temperature reaches about

150

°

C and has a hysterysis to prevent unstable conditions.

4/22

Figure 1 : Feedforward Waveform.

Figure 2 : Soft Start Function.

Figure 3 : Limiting Current Function.

L4974A

5/22

L4974A

Figure 4 : Reset and Power Fail Functions.

A

B

6/22

L4974A

ELECTRICAL CHARACTERISTICS (refer to the test circuit, T

J

= 25°C, V i

= 35V, R

4

= 30K

Ω

,

C

9

= 2.7nF, f

SW

= 100KHz typ, unless otherwise specified)

DYNAMIC CHARACTERISTICS

Min.

15

Typ.

Max.

50

Unit

V

Symbol

∆

∆

∆

I

V i

SVR f f/

∆

V

V

V

V

20L

η f o d

∆ o o

Vi f/T max j

Parameter Test Conditions

Input Volt. Range (pin 11) V o

= V ref

to 40V

I o

= 3.5A (*)

Output Voltage V i

=15V to 50V

I o

= 2A; V o

= V ref

Line Regulation

Load Regulation

V

I

= 15V to 50V

I o

= 1A; V o

= V ref

V

O

= V ref

I o

= 1A to 3.5A

I o

= 2A to 3A

Dropout Voltage between

Pin 11 and 20

Max Limiting Current

Efficiency

I

I o o

= 2A

= 3.5A

V i

= 15V to 50V

V o

= V ref

to 40V

I o

= 3.5A, f = 100KHz

V o

= V ref

V o

= 12V

V i

= 2VRMS; I o

= 5A f = 100Hz; V o

= V ref

Supply Voltage Ripple

Rejection

Switching Frequency

Voltage Stability of

Switching

Frequency

Temperature Stability of

Switching Frequency

Maximum Operating

Switching Frequency I

V

T

V o j i o

= 15V to 45V

= 0 to 125°C

= V ref

R

= 3.5A C

4

9

= 15K

Ω

= 2.2nF

(*) Pulse testing with a low duty cycle

V ref

SECTION (pin 13)

Symbol

V

13

∆

V

13

∆

V

13

∆

V

13

∆

T

I

13 short

Parameter

Reference Voltage

Line Regulation

Test Condition

V i

= 15V to 50V

Load Regulation I

13

= 0 to 1mA

Average Temperature

Coefficient Reference

Voltage

T j

= 0

°

Short Circuit Current Limit V

13

= 0

C to 125

°

C

5

4

80

56

90

200

Min.

5

5.1

12

8

4

0.25

0.45

4.75

85

90

60

100

2

1

Typ.

5.1

10

20

0.4

70

5.2

30

25

10

0.4

0.7

5.5

110

6

Max.

5.2

25

40

V mV mV mV

V

A

%

% dB

KHz

%

%

KHz

Unit

V mV mV mV/

°

C mA

V

START

SECTION (pin 15)

Symbol

V

14

∆

V

14

∆

V

14

I

14 short

Parameter

Reference Voltage

Line Regulation

Load Regulation

Test Condition

V i

= 15 to 50V

I

14

= 0 to 1mA

Short Circuit Current Limit V

15

= 0V

Min.

11.4

Typ.

12

0.6

50

80

Max.

12.6

1.4

200

Unit

V

V mV mA

5

5

5

Fig.

5

5

5

5

Fig.

7

7

7

7

7

Fig.

7

7

7

7

7/22

L4974A

ELECTRICAL CHARACTERISTICS (continued)

DC CHARACTERISTICS

Symbol

V

11on

V

11 Hyst

I

11Q

I

11OQ

I

20L

Parameter

Turn-on Threshold

Test Condition

Turn-off Hysteresys

Quiescent Current V

8

= 0; S1 = D

Operating Supply Current V

8

= 0; S1 = B; S2 = B

Out Leak Current V i

= 55V; S3 = A; V

8

= 0

SOFT START (pin 8)

Symbol

I

8

V

8

Parameter Test Condition

Soft Start Source Current V

8

= 3V; V

9

= 0V

Output Saturation Voltage I

8

= 20mA; V

11

= 10V

I

8

= 200

µ

A; V

11

= 10V

ERROR AMPLIFIER

Min.

10

Min.

80

Symbol

V

7H

V

7L

Parameter

High Level Out Voltage

Low Level Out Voltage

I

7H

-I

7L

I

9

G

V

SVR

V

OS

Source Output Current

Sink Output Current

Input Bias Current

DC Open Loop Gain

Supply Voltage Rejection

Input Offset Voltage

RAMP GENERATOR (pin 18)

Symbol

V

18

V

18

Parameter

Ramp Valley

Ramp Peak

Test Condition

I

7

= -100

µ

A; S1 = C

V

9

= 4.7V

I

7

= 100

µ

A; S1 = C

V

9

= 5.3V;

V

7

= 1V; V

7

= 4.7V

V

7

= 6V; V

9

= 5.3V

S1 = B; R

S

= 10K

Ω

S1 = A; R

S

= 10

Ω

15 < V i

< 50V

R

S

= 50

Ω

S1 = A

Min.

6

100

100

60

60

I

18

I

18

Min. Ramp Current

Max. Ramp Current

SYNC FUNCTION (pin 10)

Symbol

V

10

V

10

+I

10L

+I

10H

V

10 t

W

Test Condition

S1 = B; S2 = B

S1 = B V i

= 15V

S2 = B V i

= 45V

S1 = A; I

17

= 100

µ

A

S1 = A; I

17

= 1mA

Min.

1.2

2.4

Parameter

Low Input Voltage

High Input voltage

Sync Input Current with Low

Input Voltage

Input Current with High

Input Voltage

Output Amplitude

Output Pulse Width

Test Condition

V i

= 15V to 50V; V

8

= 0;

S1 = B; S2 = B; S4 = B

V

8

= 0;

S1 = B; S2 = B; S4 = B

V

10

10

= V

18

= 2.5V

= 0.9V; S4 = B;

S1 = B; S2 = B

V

V thr

= 2.5V

Min.

–0.3

2.5

4

0.3

Typ.

11

1

13

16

Max.

12

19

23

2

Unit

V

V mA mA mA

Typ.

115

Max.

150

1

0.7

Unit

µ

A

V

V

Typ.

Max.

150

150

0.4

80

2

1.2

3

10

Unit

V

V

µ

A

µ

A

µ

A dB dB mV

Typ.

1.5

2.5

5.5

270

2.7

Max.

300

Unit

V

V

V

µ

A mA

Typ.

Max.

0.9

5.5

0.4

1.5

5

0.5

0.8

Unit

V

V mA mA

V

µ s

Fig.

7B

7B

7B

Fig.

7A

7A

7A

7A

7A

Fig.

7A

7A

7A

7A

7A

Fig.

7C

7C

7C

7C

7C

7C

7C

7C

Fig.

7A

7A

7A

7A

–

–

8/22

L4974A

ELECTRICAL CHARACTERISTICS (continued)

RESET AND POWER FAIL FUNCTIONS

Symbol

V

9R

V

V

V

9F

2H

2L

I

2SO

I

2SI

V

3S

I

3

V

4R

V

4H

I

4

Parameter Test Conditions

Rising Thereshold Voltage

(pin 9)

Falling Thereshold Voltage

(pin 9)

V i

= 15 to 50V

V

4

= 5.3V

Vi = 15 to 50V

V

4

= 5.3V

Delay High Threshold Volt.

Vi = 15 to 50V

V

4

= 5.3V V

9

= V

13

Delay Low Threshold Volt.

Vi = 15 to 50V

V

4

= 4.7V V

9

= V

13

Delay Source Current V

4

= 5.3V; V

2

= 3V

Delay Source Sink Current V

4

= 4.7V; V

2

= 3V

Output Saturation Voltage I

3

= 15mA; S1 = B V

4

= 4.7V

Output Leak Current

Rising Threshold Voltage

V3 = 50V; S1 = A

V9 = V

13

Hysteresis

Input Bias Current

Min.

V ref

-130

4.77

4.95

1

30

10

4.955

0.4

Typ.

V ref

-100

Vref

-200

5.1

1.1

60

5.1

0.5

1

Max.

V ref

-80

V ref

-160

5.25

1.2

80

0.4

100

5.25

0.6

3

V

µ

A mA

V

µ

A

V

V

µ

A

Unit

V mV

V mV

V

Fig.

7D

7D

7D

7D

7D

7D

7D

7D

7D

7D

7D

Figure 5 : Test and Evaluation Board Circuit.

TYPICAL PERFORMANCES (using evaluation board) : n = 83% (V i

= 35V ; V o

= VREF ; I o

= 3.5A ; f sw

= 100KHz)

V o RIPPLE

= 30mV (at 1A)

Line regulation = 12mV (V i

= 15 to 50V)

Load regulation = 8mV (I o

= 1 to 3.5A) for component values Refer to the fig. 5 (Part list).

9/22

L4974A

Figure 6a : Component Layout of fig.5 (1 : 1 scale). Evaluation Board Available

PART LIST

R

1

R

2

= 30K

Ω

= 10K

Ω

R

3

R

4

= 15K

Ω

= 30K

Ω

R

5

R

6

= 22

Ω

= 4.7K

Ω

R

7

= see table A

R

8

R

9

= OPTION

= 4.7K

Ω

* C

1

= C

2

C

3

= C

4

= 1000

µ

F 63V EYF (ROE)

= C

5

= C

6

= 2,2

µ

F 50V

C

7

= 390pF Film

C

8

= 22nF MKT 1837 (ERO)

C

C

9

= 2.7nF KP 1830 (ERO)

10

= 0.33

µ

F Film

C

11

= 1nF

** C

12

= C

13

C

= C

15

= 1

µ

F Film

14

= 100

µ

F 40V EKR (ROE)

D1 = SB 560 (OR EQUIVALENT)

L1 = 150

µ

H core 58310 MAGNETICS

45 TURNS 0.91mm (AWG 19)

COGEMA 949181

* 2 capacitors in parallel to increase input RMS current capability.

* * 3 capacitors in parallel to reduce total output ESR.

10/22

Table A

V

0

12V

15V

18V

24V

R

9

4.7k

Ω

4.7k

Ω

4.7k

Ω

4.7k

Ω

R

7

6.2kW

9.1k

Ω

12

Ω

18

Ω

Table B

SUGGESTED BOOSTRAP CAPACITORS

Operating Frequency

f = 20KHz f = 50KHz f = 100KHz f = 200KHz f = 500KHz

Boostrap Cap.c10

≥

680nF

≥

470nF

≥

330nF

≥

220nF

≥

100nF

Figure 6b: P.C. Board and Component Layout of the Circuit of Fig. 5. (1:1 scale)

L4974A

Figure 7 : DC Test Circuits.

11/22

L4974A

Figure 7A.

Figure 7B.

Figure 7C.

12/22

L4974A

Figure 7D.

Figure 8 : Quiescent Drain Current vs. Supply

Voltage (0% duty cycle - see fig. 7A).

Figure 9 : Quiescent Drain Current vs. Junction

Temperature (0% duty cycle).

13/22

L4974A

Figure 10 : Quiescent Drain Current vs. Duty Cy-

cle.

Figure 11 : Reference Voltage (pin 13) vs. Vi

(see fig. 7).

Figure 12 : Reference Voltage (pin 13) vs. Junc-

tion Temperature (see fig. 7).

Figure 13 : Reference Voltage (pin 14) vs. Vi

(see fig. 7).

Figure 14 : Reference Voltage (pin 14) vs. Junc-

tion Temperature (see fig. 7).

Figure 15 : Reference Voltage 5.1V (pin 13) Sup-

ply Voltage Ripple Rejection vs. Fre-

SVR

(dB)

14/22

L4974A

Figure 16 : Switching Frequency vs. Input Voltage

(see fig. 5).

Figure 17 : Switching Frequency vs. Junction

Temperature (see fig. 5).

Figure 18 : Switching Frequency vs. R4

(see fig.5).

Figure 19 : Maximum Duty Cycle vs. Frequency.

Figure 20 : Supply Voltage Ripple Rejection vs.

Frequency (see fig. 5).

Figure 21 : Efficiency vs. Output Voltage.

15/22

L4974A

Figure 22 : Line Transient Response (see fig. 5).

Figure 23 : Load Transient Response (see fig. 5).

Figure 24 : Dropout Voltage between Pin 11 and

Pin 20 vs. Current at Pin 20.

Figure 25 : .Dropout Voltage between Pin 11 and

Pin 20 vs. Junction Temperature.

Figure 26 : Power Dissipation (device only) vs.

Input Voltage.

Figure 27 : Power Dissipation (device only) vs.

Input Voltage.

16/22

Figure 28 : Power Dissipation (device only) vs.

Output Voltage.

L4974A

Figure 29 : Power Dissipation (device only) vs.

Output Voltage.

Figure 30 : Power Dissipation (device only) vs.

Output Current.

Figure 31 : Power Dissipation (device only) vs.

Output Current.

Figure 32 : Efficiency vs. Output Current.

Figure 33 : Test PCB Thermal Characteristic.

17/22

L4974A

Figure 34 : Junction to Ambient Thermal Resistance

vs. Area on Board Heatsink (DIP 16+2+2)

Figure 35: Maximum Allowable Power Dissipation vs. Ambient Temperature (Powerdip)

Figure 36: Open Loop Frequency and Phase of Error Amplifier (see fig. 7C).

18/22

Figure 37 : 3.5A – 5.1V Low Cost Application Circuit.

L4974A

Figure 38 : A 5.1V/12V Multiple Supply. Note the Synchronization between the L4974A and L4970A.

19/22

L4974A

Figure 39 : L4974A’s Sync. Example.

Figure 40: 1A/24V Multiple Supply. Note the synchronization between the L4974A and L4962

20/22

I

L e3

F

Z

D

E e b b1

DIM.

mm inch

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

a1

B

0.51

0.85

1.40

0.020

0.033

0.055

0.50

0.020

0.38

8.80

2.54

22.86

0.50

24.80

0.015

0.346

0.100

0.900

0.020

0.976

3.30

7.10

5.10

1.27

0.130

0.280

0.201

0.050

OUTLINE AND

MECHANICAL DATA

L4974A

Powerdip 20

21/22

L4974A

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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22/22