L6395
SO-8
Features
High voltage rail up to 600 V
dV/dt immunity ± 50 V/ns in full temperature range
Driver current capability:
– 290 mA source
– 430 mA sink
Switching times 75/35 ns rise/fall with 1 nF load
3.3 V, 5 V TTL/CMOS inputs with hysteresis
Integrated bootstrap diode
Compact and simplified layout
Bill of material reduction
Effective fault protection
Flexible, easy and fast design
High voltage high and low-side driver
Datasheet
-
production data
Applications
Motor driver for home appliances
Factory automation
Industrial drives and fans
Description
The L6395 is a high voltage device manufactured with the BCD™ “offline” technology. It is a singlechip high and low-side gate driver for N-channel power MOSFETs or IGBTs.
The high-side (floating) section is designed to stand a voltage rail up to 600 V. The logic inputs are CMOS/TTL compatible down to 3.3 V for the easy interfacing microcontroller/DSP.
September 2015
This is information on a product in full production.
DocID024048 Rev 2 1/16
www.st.com
6
7
9
10
3
4
1
2
Contents
Contents
5
8
L6395
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.1
AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.2
DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
C
BOOT
selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16 DocID024048 Rev 2
L6395 Block diagram
VCC
3
LIN
1
HIN
2
GND
4
UV
DETECTION
Figure 1. Block diagram
BOOTSTRAP DRIVER
FLOATING STRUCTURE from LVG
UV
DETECTION
LEVEL
SHIFTER
S
R
LOGIC
8
BOOT
HVG
DRIVER
7
HVG
6
OUT
V
CC LVG
DRIVER
5
LVG
AM16532v1
DocID024048 Rev 2 3/16
16
Pin connection L6395
Figure 2. Pin connection
LIN
HIN
VCC
GND
1
2
3
4
8
7
6
5
BOOT
HVG
OUT
LVG
AM16533v1
Table 1. Pin description
Type Function
1
2
3
4
5
6
7
8
LIN
HIN
VCC
GND
LVG
(1)
OUT
HVG
(1)
BOOT
I
I
P
P
O
P
O
P
Low-side driver logic input (active high)
High-side driver logic input (active high)
Lower section supply voltage
Ground
Low-side driver output
High-side (floating) common voltage
High-side driver output
Bootstrapped supply voltage
1. The circuit guarantees less than 1 V on the LVG and HVG pins (at I normally used to hold the pin low, is omitted.
sink
= 10 mA), with V
CC
> 3 V. In this manner, the “bleeder”, resistor connected between the gate and the source of the external MOSFET
4/16 DocID024048 Rev 2
L6395 Truth table
LIN
L
L
H
H
Input
HIN
L
H
L
H
Table 2. Truth table
LVG
L
L
H
H
Output
HVG
L
H
L
H
DocID024048 Rev 2 5/16
16
Electrical data L6395
4.1 Absolute maximum ratings
Symbol
Table 3. Absolute maximum ratings
Value
Parameter
Min.
V
CC
V
OUT
V
BOOT
Supply voltage
Output voltage
Bootstrap voltage
V hvg
V lvg
High-side gate output voltage
Low-side gate output voltage
V i
Logic input voltage dV
OUT
/dt Allowed output slew rate
P
T tot
J
T stg
ESD
Total power dissipation (T
A
= 25 °C)
Junction temperature
Storage temperature
Human body model
- 0.3
V
BOOT
- 21
- 0.3
V
OUT
- 0.3
- 0.3
- 0.3
-50
2
Max.
21
V
BOOT
+ 0.3
620
V
BOOT
+ 0.3
V
CC
+ 0.3
15
50
800
150
150
Unit
V
V
V
V/ns mW
°C
°C kV
V
V
V
4.3
6/16
Symbol
R th(JA)
Table 4. Thermal data
Parameter
Thermal resistance junction to ambient
SO-8
150
Unit
°C/W
Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Pin Parameter Test condition
V
CC
V
BO
(1)
V
OUT f
SW
T
J
3
8 - 6
6
Supply voltage
Floating supply voltage
Output voltage
(1)
Switching frequency
Junction temperature
HVG, LVG load C
1. V
BO
= V
BOOT
- V
OUT
.
2. LVG off. V
CC
= 10 V. Logic is operational if V
BOOT
> 5 V.
L
= 1 nF
Value
Min.
Max.
10
9.4
-11
(2)
-40
20
20
580
800
125
Unit
V
V
V kHz
°C
DocID024048 Rev 2
L6395 Electrical characteristics
Table 6. AC operation electrical characteristics (V
CC
= 15 V; T j
= +25 °C)
Value
Symbol Pin Parameter Test condition
Min.
Typ.
Max.
Unit
t on t off t r t f
1,2 vs. 5, 7
1,2 vs. 5, 7
5, 7
5, 7
High/low-side driver turn-on propagation delay
V
OUT
= 0 V
V
BOOT
= V
CC
C
L
= 1 nF
V
IN
= 0 to 3.3 V
See
Figure 3
High/low-side driver turn-off propagation delay
Rise time
Fall time
V
OUT
= 0 V
V
BOOT
= V
CC
C
L
= 1 nF
V
IN
= 3.3 V to 0
See
Figure 3
C
L
= 1 nF
C
L
= 1 nF
50
50
125 200 ns
125 200 ns
75
35
120 ns
70 ns
Figure 3. Timing
LIN/HIN
LVG/HVG
50% t on
10% t r
90%
50%
90% t f
10% t off
AM16534v1
DocID024048 Rev 2 7/16
16
Electrical characteristics L6395
8/16
(V cc
= 15 V; T j
= +25 °C)
1
Symbol Pin
Table 7. DC operation electrical characteristics
Parameter Test condition
Value
Min. Typ. Max.
Unit
Low supply voltage section
V
V
V
CC_hys
CC_thON
CC_thOFF
I
I qccu qcc
3 V
CC
UV hysteresis
3
V
CC
UV turn ON threshold
3
V
CC
UV turn OFF threshold
3
3
Undervoltage quiescent supply current
Quiescent current
V
CC
= 7 V
LIN = 5V; HIN = GND;
V
CC
= 15 V
LIN = 5 V; HIN = GND;
Bootstrapped supply voltage section
(1)
V
BO_hys
V
V
BO_thON
BO_thOFF
I
QBOU
I
QBO
8 V
BO
UV hysteresis
8
V
BO
UV turn ON threshold
8
V
BO
UV turn OFF threshold
8
Undervoltage V
BO quiescent current
8 V
BO
quiescent current
V
BO
= 7 V
LIN = GND; HIN = 5 V
V
BO
= 15 V
LIN = GND; HIN = 5 V;
R
I
LK
DS(on)
8
High voltage leakage current
Bootstrap driver onresistance
(2)
Driving buffer section
V hvg
= V
OUT
LVG on
= V
BOOT
= 600 V
0.6
9
8.3
40
0.7
9.5
8.8
90
100 220 350
A
0.5
7.9
7.3
10
0.6
8.6
8
30
190
120
0.8
10
9.3
150
0.7
9.4
8.7
60
220
10
V
V
V
A
V
V
V
A
A
A
I
I so si
5, 7
High/low-side source short-circuit current
V
IN
= V ih
(t p
< 10 μs)
5, 7
High/low-side sink shortcircuit current
V
IN
= V il
(t p
< 10 μs)
Logic inputs
V
V il ih
1, 2
Low level logic threshold voltage
1, 2
High level logic threshold voltage
200
250
0.8
1.9
290
430
1.1
2.25
mA
mA
V
V
DocID024048 Rev 2
L6395 Electrical characteristics
Table 7. DC operation electrical characteristics (continued)
Value
Symbol Pin Parameter Test condition
Min. Typ. Max.
Unit
I
I
I
I
HINh
HINl
LINh
LINl
2
2
1
1
HIN logic “1” input bias current
HIN logic “0” input bias current
LIN logic “1” input bias current
LIN logic “0” input bias current
HIN = 15 V
HIN = 0 V
LIN = 15 V
LIN = 0 V
10
10
40
40
100
1
100
1
1. V
BO
= V
BOOT
- V
OUT
.
2. R
I
2
(V
CC,
is tested in the following way: R
V
BOOT2
)] where I
1
DS(on)
= [(V
is the pin 8 current when V
- V
BOOT1
BOOT
= V
) - (V
CC
- V
BOOT2
BOOT1
, I
2
)] / [I
1
(V
CC
,V
when V
BOOT
= V
BOOT2
.
) -
A
A
A
A
DocID024048 Rev 2 9/16
16
Typical application diagram
6 Typical application diagram
L6395
Figure 4. Application diagram
VCC 3
FROM CONTROLLER LIN
1
UV
DETECTION
BOOTSTRAP DRIVER from LVG
FLOATING STRUCTURE
UV
DETECTION
LEVEL
SHIFTER
S
R
LOGIC
FROM CONTROLLER HIN
2
GND 4
8
BOOT
HVG
DRIVER
7
HVG
H.V.
6
OUT
V
CC LVG
DRIVER
5
LVG
Cboot
TO LOAD
AM16535v1
Figure 5. Application diagram for asymmetrical load driving
Dboot
VCC
3
FROM CONTROLLER
LIN
1
HIN
2
GND
4
UV
DETECTION
BOOTSTRAP DRIVER from LVG
FLOATING STRUCTURE
UV
DETECTION
LEVEL
SHIFTER
S
R
LOGIC
8
BOOT
H.V.
HVG
DRIVER
7
HVG
6
OUT
VCC LVG
DRIVER
LVG
5
LOAD
Cboot
AM16536v1
10/16 DocID024048 Rev 2
L6395 Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally accomplished using a high voltage fast recovery diode (
Figure 6
). In the L6395 device
a patented integrated structure replaces the external diode. It is implemented using a high voltage DMOS, driven synchronously with the low-side driver (LVG), with a diode in series,
as shown in
Figure 7
. An internal charge pump provides the DMOS driving voltage.
C
BOOT
selection and charging
To select the proper C
BOOT
This capacitor C
EXT
value the external MOS can be seen as an equivalent capacitor.
is related to the MOS total gate charge:
Equation 1
C
EXT
=
Q
V gate
The ratio between the capacitors C
EXT loss.
and C
BOOT
is proportional to the cyclical voltage
It must be:
Equation 2
C
BOOT
» C
EXT
E.g.: if Q gate
300 mV.
is 30 nC and V gate
is 10 V, C
EXT
is 3 nF. With C
BOOT
= 100 nF the drop is
If HVG needs to be supplied for an extended period, the C
BOOT account also the leakage and quiescent losses.
selection has to take into
E.g.: HVG steady state consumption is lower than 220 must supply 1.1
C to C
EXT
A, so if HVG T
ON
is 5 ms, C
BOOT
. This charge on a 1
F capacitor means a voltage drop of 1.1 V.
The internal bootstrap driver offers some important advantages: the external fast recovery diode can be avoided (it usually has a high leakage current).
This structure can work only if V
OUT
is close to GND (or lower) and, at the same time, the
LVG is on. The charging time (T charge
) of the C
BOOT
is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS R
DS(on)
(typical value:
120
). At low switching frequency, this drop can be neglected but, operating at high switching frequency, it should be taken into account.
The following equation is useful to compute the drop on the bootstrap DMOS:
Equation 3
V drop
= I ch arg e
R
DS on
V drop
=
Q gate ch arg e
DS on
where Q
gate
is the gate charge of the external power MOSFET, R of the bootstrap DMOS and T
charge
DS(on)
is the on-resistance
is the charging time of the bootstrap capacitor.
DocID024048 Rev 2 11/16
16
Bootstrap driver L6395
For example: using a power MOSFET with a total gate charge of 30 nC, the drop on the bootstrap DMOS is about 1 V, if the T charge
is 5
s.
Equation 4
V drop
=
30
5
s
V drop
must be taken into account when the voltage drop on C
BOOT
is calculated: whether this drop is too high, or the circuit topology does not allow a sufficient charging time, an external diode can be used.
Figure 6. Bootstrap driver with high voltage fast recovery diode
D BO O T
VCC
BO O T
H.V.
HVG
C BO O T
OUT
TO LO AD
LVG
AM16537v1
Figure 7. Bootstrap driver with internal charge pump
V CC
BO O T
H. V.
HVG
CBO O T
OUT
TO LO AD
LVG
AM16538v1
12/16 DocID024048 Rev 2
L6395 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at:
www.st.com
.
ECOPACK is an ST trademark.
SO-8 package information
Figure 8. SO-8 package outline
0016023_G_FU
DocID024048 Rev 2 13/16
16
Package information
Symbol
h
L
L1
L2 k ccc
E1 e
D
E b b1 c c1
A
A1
A2
Table 8. SO-8 package mechanical data
Dimensions (mm)
Min.
Typ.
0.10
0.10
4.80
5.80
3.80
0.10
1.25
0.31
0.28
0.25
0.40
4.90
6.00
3.90
1.27
1.04
0.25
0°
Figure 9. SO-8 footprint
Max.
1.75
0.25
0.51
0.48
0.25
0.23
5.00
6.20
4.00
0.50
1.27
8°
0.10
L6395
14/16 DocID024048 Rev 2
Footprint_0016023_G_FU
L6395
Order codes
L6395D
L6395DTR
Order codes
Table 9. Order codes
Package
SO-8
SO-8
Packaging
Tube
Tape and reel
Date
20-Mar-2013
11-Sep-2015
Revision
Table 10. Document revision history
Changes
1
2
Initial release.
Updated
Table 4 on page 6
(added ESD parameter and value).
Updated note
2.
below
Table 7 on page 8
(replaced V
CBOOTx
V
BOOTx
).
by
Updated
Section 8 on page 13
.
Moved
Table 9 on page 15
(moved from page 1 to page 15,
updated/added titles).
Minor modifications throughout document.
DocID024048 Rev 2 15/16
16
L6395
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
16/16 DocID024048 Rev 2
