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IFX1763
Wide Input Range Low Noise 500mA LDO
Data Sheet
Rev. 1.1, 2014-10-30
Standard Power
Wide Input Range Low Noise 500mA LDO IFX1763
1 Overview
Features
• Low Noise down to 24 µ
V
RMS
(BW = 10 Hz to 100 kHz)
• 500 mA Current Capability
• Low Quiescent Current: 30 µA
• Wide Input Voltage Range: 1.8 V to 20 V
• 2.5% Output Voltage Accuracy (over full temperature and load range)
• Low Dropout Voltage: 320 mV
• Very low Shutdown Current: < 1 µA
• No Protection Diodes Needed
• Fixed Output Voltage: 3.3 V
• Adjustable Version with Output from 1.22 V to 20 V
• Stable with ≥ 3.3 µF Output Capacitor
• Stable with Aluminium, Tantalum or Ceramic Capacitors
• Reverse Battery Protection
• No Reverse Current
• Overcurrent and Overtemperature Protected
• DSO-8 Exposed Pad and TSON-10 Exposed Pad packages
• Green Product (RoHS compliant)
Applications
• Microcontroller Supply
• Battery-Powered Systems
• Noise Sensitive Instruments
• Radar Applications
• Image Sensors
PG-DSO-8 Exposed Pad
PG-TSON-10
The IFX1763 is not qualified and manufactured according to the requirements of Infineon Technologies with regards to automotive and/or transportation applications. For automotive applications please refer to the Infineon
TLx (TLE, TLS, TLF.....) voltage regulator products.
Type
IFX1763XEJ V
IFX1763XEJ V33
IFX1763LD V
IFX1763LD V33
Data Sheet
Package
PG-DSO-8 Exposed Pad
PG-DSO-8 Exposed Pad
PG-TSON-10
PG-TSON-10
2
Marking
1763EV
1763EV33
176LV
176LV33
Rev. 1.1, 2014-10-30
IFX1763
Overview
The IFX1763 is a micropower, low noise, low dropout voltage regulator. The device is capable of supplying an output current of 500 mA with a dropout voltage of 320 mV. Designed for use in battery-powered systems, the low quiescent current of 30 µA makes it an ideal choice.
A key feature of the IFX1763 is its low output noise. By adding an external 0.01 µF bypass capacitor output noise values down to 24 µ
V
RMS
over a 10 Hz to 100 kHz bandwidth can be reached. The IFX1763 voltage regulator is stable with output capacitors as small as 3.3 µF. Small ceramic capacitors can be used without the series resistance required by many other regulators. Its internal protection circuitry includes reverse battery protection, current limiting and reverse current protection. The IFX1763 comes as fixed output voltage 3.3 V as well as adjustable device with a 1.22 V reference voltage. It is available in a DSO-8 Exposed Pad and as well as in a
TSON-10 Exposed Pad package.
Data Sheet 3 Rev. 1.1, 2014-10-30
2 Block Diagram
Note: Pin numbers in the block diagrams refer to the DSO-8 EP package type.
IN
8
EN
5
BYP
4
IFX1763
Bias
Voltage reference
Error
Amplifier
Over Current
Protection
Saturation
Control
Temperature
Protection
1
OUT
2
SENSE
Figure 1 Block Diagram IFX1763 fixed voltage version
GND
6
IFX1763
Block Diagram
IN
8
IFX1763 ADJ
EN
5
BYP
4
Bias
Voltage reference
Error
Amplifier
Over Current
Protection
Saturation
Control
Temperature
Protection
1
OUT
2
ADJ
Figure 2 Block Diagram IFX1763 adjustable version
Data Sheet 4
6
GND
Rev. 1.1, 2014-10-30
IFX1763
Pin Configuration
3
3.1
Pin Configuration
Pin Assignment
OUT
SENSE
1
2
8
7
IN
NC
OUT
ADJ
1
2
8
7
IN
NC
Figure 3
3 6 3 6
NC GND NC GND
9
9
4 5 4 5
BYP EN BYP EN
IFX1763XEJ V33
IFX1763XEJ V
version
Pin Configuration of IFX1763 in PG-DSO-8 Exposed Pad for fixed voltage and adjustable
OUT
OUT
NC
SENSE
BYP
3
4
5
1
2
11
10
9
8
7
6
IFX1763LD V33
IN
IN
NC
EN
GND
OUT
OUT
NC
ADJ
BYP
1
2
3
4
5
11
10
9
8
7
6
IFX1763LD V
IN
IN
NC
EN
GND
Figure 4 Pin Configuration of IFX1763 in PG-TSON-10 for fixed voltage and adjustable version
Data Sheet 5 Rev. 1.1, 2014-10-30
IFX1763
Pin Configuration
3.2
Pin Definitions and Functions
Pin
1 (DSO-8 EP)
1,2 (TSON-10)
2 (DSO-8 EP)
4 (TSON-10)
2 (DSO-8 EP)
4 (TSON-10)
3, 7 (DSO-8 EP)
3, 8 (TSON-10)
4 (DSO-8)
5 (TSON-10)
5 (DSO-8 EP)
7 (TSON-10)
6 (DSO-8 EP)
6,(TSON-10)
8 (DSO-8 EP)
9, 10 (TSON-10)
9 (DSO-8 EP)
11 (TSON-10)
EN
GND
IN
Symbol
OUT
SENSE
(fix voltage version)
Function
Output. Supplies power to the load. For this pin a minimum output capacitor of
3.3 µF is required to prevent oscillations. Larger output capacitors may be required for applications with large transient loads in order to limit peak voltage transients or when the regulator is applied in conjunction with a bypass capacitor.
For more details please refer to the section
.
Output Sense. For the fixed voltage version the SENSE pin is the input to the error amplifier. This allows to achieve an optimized regulation performance in case of small voltage drops
R
p
that occur between regulator and load. In applications where such drops are relevant they can be eliminated by connecting the SENSE pin directly at the load. In standard configurations the SENSE pin can be connected directly to the OUT pin. For further details please refer to the section
“Kelvin Sense Connection” on Page 25
ADJ
(adjustable version)
NC
Adjust. For the adjustable version the ADJ pin is the input to the error amplifier.
The ADJ pin voltage is 1.22V referenced to ground and allows an output voltage range from 1.22V to 20V -
V
DR
. The ADJ pin is internally clamped to ±7 V. Please note that the bias current of the ADJ pin is flowing into the pin.
1)
No Connect. The NC Pins have no connection to any internal circuitry. Connect either to GND or leave open.
BYP
Tab
Bypass. The BYP pin is used to bypass the reference of the IFX1763 to achieve low noise performance. The BYP-pin is clamped internally to ±0.6 V (i.e. one
V
BE
).
A small capacitor from the output to the BYP pin will bypass the reference to lower the output voltage noise
2)
. If not used this pin must be left unconnected.
Enable. With the EN pin the IFX1763 can be put into a low power shutdown state.
The output will be off when the EN is pulled low. The EN pin can be driven by 5V logic or open-collector logic with pull-up resistor. The pull-up resistor is required to supply the pull-up current of the open-collector gate
3)
and the EN pin current
4)
.
Please note that if the EN pin is not used it must be connected to
V
IN
. It must not be left floating.
Ground. For the ADJ version connect the bottom of the output voltage setting resistor divider directly to the GND pin for optimum load regulation performance.
Input. Via the input pin IN the power is supplied to the device. A capacitor at the input pin is required if the device is more than 6 inches away from the main input filter capacitor or if bigger inductance is present at the IN pin
5)
. The IFX1763 is designed to withstand reverse voltages on the Input pin with respect to GND and
Output. In the case of reverse input (e.g. due to a wrongly attached battery) the device will act as if there is a diode in series with its input. In this way there will be no reverse current flowing into the regulator and no reverse voltage will appear at the load. Hence, the device will protect both - the device itself and the load.
Exposed Pad. To ensure proper thermal performance,solder Pin 11 (exposed pad) of TSON-10 to the PCB ground and tie directly to Pin 6. In the case of DSO-
8 EP as well solder exposed pad (Pin 9) to the PCB ground and tie directly to
Pin 6.
Data Sheet 6 Rev. 1.1, 2014-10-30
IFX1763
Pin Configuration
1) The typical value of the ADJ pin bias current is 60 nA with a very good temperature stability.See also the corresponding
2) A maximum value of 10 nF can be used for reducing output voltage noise over the bandwidth from 10 Hz to 100 kHz.
3) Normally several microamperes.
4) Typical value is 1 µA.
5) In general the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in batterypowered circuits. Depending on actual conditions an input capacitor in the range of 1 to 10 µF is sufficient.
Data Sheet 7 Rev. 1.1, 2014-10-30
IFX1763
General Product Characteristics
4 General Product Characteristics
4.1
Absolute Maximum Ratings
Table 1 Absolute Maximum Ratings
1)
T
j
= -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Number Parameter Symbol Values Unit Note /
Test Condition
Min.
Typ.
Max.
Input Voltage
Voltage
V
IN
-20 – 20 V
Output Voltage
Voltage
Input to Output Differential
Voltage
Sense Pin
Voltage
ADJ Pin
V
OUT
V
IN
- V
OUT
V
SENSE
-20
-20
-20
–
–
–
20
20
20
7
V
V
V
Voltage
V
ADJ
-7 – V
BYP Pin
Voltage
V
BYP
-0.6
– 0.6
V
Enable Pin
Voltage
V
EN
-20 – 20 V
Temperatures
Junction Temperature
Storage Temperature
T
j
T
stg
-40
-55
–
–
150
150
°C
°C
ESD Susceptibility
All Pins
All Pins
V
ESD
V
ESD
-2
-1
1) Not subject to production test, specified by design.
–
–
2
1
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5k
Ω
, 100 pF)
3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101 kV kV
–
–
–
–
–
–
–
–
HBM
2)
CDM
3)
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation.
Data Sheet 8 Rev. 1.1, 2014-10-30
IFX1763
General Product Characteristics
4.2
Functional Range
Table 2 Functional Range
Parameter Symbol
Min.
Values
Typ.
Max.
Unit Note /
Test Condition
Number
Input Voltage Range
(3.3 V fix voltage version)
V
IN
3.8 V – 20 V –
Input Voltage Range
(adjustable voltage version)
V
IN
2.3 – 20 V –
1)
Operating Junction Temperature
T
j
-40 – 125 °C –
1) For the
IFX1763
adjustable version the minimum limit of the functional range
V
IN is tested and specified with the ADJ- pin connected to the OUT pin.
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to
www.jedec.org
.
Table 3
Parameter
Thermal Resistance
1)
Symbol Unit Note /
Test Condition
Number
Min.
Values
Typ.
Max.
IFX1763X EJ (PG-DSO-8 Exposed Pad)
Junction to Case
Junction to Ambient
Junction to Ambient
Junction to Ambient
R
thJC
R
thJA
R
thJA
R
thJA
Junction to Ambient
R
thJA
–
–
–
–
–
7.0
39
155
66
52
–
–
–
–
–
K/W –
K/W –
2)
K/W Footprint only
3)
K/W 300 mm
2
heatsink area on PCB
K/W 600 mm
2
heatsink area on PCB
IFX1763 LD (PG-TSON-10)
Junction to Case
Junction to Ambient
Junction to Ambient
Junction to Ambient
R
thJC
R
thJA
R
thJA
R
thJA
Junction to Ambient
R
thJA
–
1) Not subject to production test, specified by design.
–
–
–
–
6.4
53
183
69
57
–
–
–
–
–
K/W –
K/W
K/W Footprint only
K/W 300 mm
2
heatsink area on PCB
K/W 600 mm
2
heatsink area on PCB
Data Sheet 9 Rev. 1.1, 2014-10-30
IFX1763
General Product Characteristics
2) Specified
R
thJA
value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified
R
thJA
value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm
3
board with 1 copper layer (1 x 70µm Cu).
Data Sheet 10 Rev. 1.1, 2014-10-30
IFX1763
Electrical Characteristics
5
5.1
Electrical Characteristics
Electrical Characteristics Table
Table 4 Electrical Characteristics
-40 °C <
T
j
< 125 °C; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified.
Parameter Symbol Unit Note / Test Condition Number
V
IN,min
Min.
–
Values
Typ.
Max.
1.8
2.3
V
I
OUT
= 500 mA
1)2)3)
Minimum Operating Voltage
Output Voltage
4)
IFX1763XEJ V33
IFX1763LD V33
IFX1763XEJ V
IFX1763LD V
Line Regulation
IFX1763XEJ V33
IFX1763LD V33
IFX1763XEJ V
IFX1763LD V
Load Regulation
IFX1763XEJ V33
IFX1763LD V33
IFX1763XEJ V33
IFX1763LD V33
IFX1763XEJ V
IFX1763LD V
IFX1763XEJ V
IFX1763LD V
Dropout Voltage
Dropout Voltage
Dropout Voltage
Dropout Voltage
Dropout Voltage
Dropout Voltage
Dropout Voltage
V
V
∆
∆
∆
∆
∆
∆
V
V
V
V
V
V
V
OUT
OUT
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
DR
DR
DR
DR
DR
DR
DR
3.220
3.30
3.380
V
1.190 1.22
1.250 V
–
–
–
–
–
–
–
–
–
–
–
–
–
1
1
9
–
4
–
100
–
150
–
190
–
320
20
8
20
22
38
14
130
190
190
250
220
300
350 mV mV mV mV mV mV mV mV mV mV mV mV mV
1m A <
4.3 V <
1m A <
2.3 V <
∆
V
IN
I
OUT
∆
V
IN
I
OUT
T
J
∆
V
∆
T
J
∆
I
V
∆
I
I
IN
I
IN
OUT
OUT
OUT
I
V
OUT
IN
< 500 mA,
< 20 V
I
V
OUT
IN
< 500 mA;
= 3.8 V to 20 V;
= 1 mA
= 2.0 V to 20 V;
= 1 mA
= 25°C;
V
= 1 to 500 mA
= 4.3 V;
IN
= 4.3 V;
= 1 to 500 mA
= 25°C;
OUT
V
IN
= 2.3 V;
= 1 to 500 mA
= 1 to 500 mA
I
OUT
V
IN
=
= 10 mA;
V
OUT,nom
;
T
J
I
V
OUT
IN
=
= 10 mA;
V
OUT,nom
I
V
OUT
IN
=
= 50 mA;
V
OUT,nom
;
T
J
I
OUT
V
IN
=
= 50 mA;
V
OUT,nom
I
OUT
V
IN
=
= 100 mA;
V
OUT,nom
;
T
J
I
V
OUT
IN
=
= 100 mA;
V
OUT,nom
I
V
OUT
IN
=
= 500 mA;
V
OUT,nom
;
T
J
= 25°C
= 25°C
= 25°C
= 25°C
P_5.1.2
P_5.1.4
Data Sheet 11 Rev. 1.1, 2014-10-30
IFX1763
Electrical Characteristics
Table 4
Electrical Characteristics (cont’d)
-40 °C <
T
j
< 125 °C; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified.
Parameter Symbol Unit Note / Test Condition Number
Dropout Voltage
V
DR
Min.
–
Values
Typ.
Max.
– 450 mV
I
V
OUT
IN
=
= 500 mA;
V
OUT,nom
GND Pin Current
GND Pin Current
I
GND
– 30 60 µA
GND Pin Current
GND Pin Current
GND Pin Current
GND Pin Current
GND Pin Current
GND Pin Current
Quiescent Current in Off-Mode
(EN-pin low)
Enable
Enable Threshold High
Enable Threshold Low
EN Pin Current
8)
Adjust Pin Bias Current
ADJ Pin Bias Current
Output Voltage Noise
Output Voltage Noise
IFX1763XEJ V
10)
IFX1763LD V
Output Voltage Noise
IFX1763XEJ V
IFX1763LD V
Output Voltage Noise
IFX1763XEJ V
IFX1763LD V
I
I
I
I
I
I
I
I
I
I
V
V e e e
GND
GND
GND
GND
GND
GND q th,EN tl,EN
EN
EN bias,ADJ no no no
–
–
–
–
–
–
–
–
–
–
0.25
–
–
–
–
50
300
0.7
3
11
11
0.1
60
41
28
29
100
850
2.2
8
0.8
2.0
0.65
–
0.01
–
1 –
–
–
–
–
22
1
31
µA
µA mA mA mA mA
µA
V
V
µA
µA nA
µV
µV
µV
RMS
RMS
RMS
I
V
IN
OUT
=
V
OUT,nom;
= 0 mA
I
V
IN
OUT
=
V
OUT,nom;
= 1 mA
V
IN
I
OUT
=
V
OUT,nom;
= 50 mA
V
IN
I
OUT
=
V
OUT,nom;
= 100 mA
I
V
IN
OUT
=
V
OUT,nom;
= 250 mA
I
V
IN
OUT
=
V
OUT,nom;
= 500 mA;
T
J
≥ 25°C
V
IN
I
OUT
=
V
OUT,nom;
= 500 mA;
T
J
V
IN
T
J
= 6 V;
= 25°C
V
EN
< 25°C
= 0 V;
V
OUT
V
OUT
V
EN
V
EN
T
J
= Off to On
= On to Off
= 0 V;
T
J
= 20 V;
T
J
= 25°C
= 25°C
= 25°C
C
OUT
C
BYP
= 10 µF ceramic;
= 10 nF;
I
OUT
= 500 mA;
(BW = 10 Hz to 100 kHz)
C
OUT
= 10 µF ceramic
+250mΩ resistor in series;
I
C
BYP
OUT
= 10 nF;
= 500 mA;
(BW = 10 Hz to 100 kHz)
C
OUT
C
BYP
= 22 µF ceramic;
= 10 nF;
I
OUT
= 500 mA;
(BW = 10 Hz to 100 kHz)
Data Sheet 12 Rev. 1.1, 2014-10-30
IFX1763
Electrical Characteristics
Table 4
Electrical Characteristics (cont’d)
-40 °C <
T
j
< 125 °C; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified.
Parameter Symbol Unit Note / Test Condition Number
Output Voltage Noise
IFX1763XEJ V
IFX1763LD V
Output Voltage Noise
IFX1763XEJ V33
IFX1763LD V33
Output Voltage Noise
IFX1763XEJ V33
IFX1763LD V33
Output Voltage Noise
IFX1763XEJ V33
IFX1763LD V33
Output Voltage Noise
IFX1763XEJ V33
IFX1763LD V33
e e e e e
no no no no no
Min.
–
–
–
–
–
Values
Typ.
Max.
24 –
45
35
33
30
–
–
–
–
µV
µV
µV
RMS
RMS
RMS
µV
RMS
µV
RMS
C
OUT
= 22 µF ceramic
+250mΩ resistor in series;
I
C
BYP
OUT
= 10 nF;
= 500 mA;
(BW = 10 Hz to 100 kHz)
I
C
OUT
= 10 µF ceramic;
C
BYP
OUT
= 10 nF;
= 500 mA;
(BW = 10 Hz to 100 kHz)
C
OUT
= 10 µF ceramic
+250mΩ resistor in series;
I
C
BYP
OUT
= 10 nF;
= 500 mA;
(BW = 10 Hz to 100 kHz)
I
C
OUT
= 22 µF ceramic;
C
BYP
OUT
= 10 nF;
= 500 mA;
(BW = 10 Hz to 100 kHz)
C
OUT
= 22 µF ceramic
+250mΩ resistor in series;
I
C
BYP
OUT
= 10 nF;
= 500 mA;
(BW = 10 Hz to 100 kHz)
P_5.1.34
Power Supply Ripple Rejection
11)
Power Supply Ripple Rejection
PSRR
50 65 – dB
V
IN
f
r
-
V
OUT
= 1.5V (avg);
V
RIPPLE
= 0.5Vpp;
= 120Hz;
I
OUT
= 500mA
Output Current Limitation
Output Current Limit
Output Current Limit
I
OUT,limit
I
OUT,limit
520
520
–
–
–
– mA mA
V
IN
= 7 V;
V
OUT
= 0 V
V
IN
=
2.3 V
V
OUT,nom
12)
;
∆
V
OUT
= -0.1 V
+ 1 V or
Input Reverse Leakage Current
Input Reverse Leakage
Reverse Output Current
13)
I
leak,rev
Fixed Voltage Versions
I
Reverse
Adjustable Voltage Version
I
Reverse
–
–
–
–
10
5
1
20
10 mA
µA
µA
V
IN
= -20 V;
V
OUT
= 0 V
V
OUT
V
IN
T
J
=
V
OUT,nom
;
<
V
OUT,nom
= 25°C
;
V
OUT
V
IN
= 1.22 V;
< 1.22 V;
T
J
= 25°C
Data Sheet 13 Rev. 1.1, 2014-10-30
IFX1763
Electrical Characteristics
Table 4
Electrical Characteristics (cont’d)
-40 °C <
T
j
< 125 °C; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified.
Parameter Symbol Values Unit Note / Test Condition Number
Min.
Typ.
Max.
Output Capacitor
Output Capacitance
ESR
C
OUT
ESR
3.3
–
14)
–
–
–
3
µF
Ω
C
BYP
–
= 0 nF P_5.1.45
P_5.1.46
1) This parameter defines the minimum input voltage for which the device is powered up and provides the maximum output current of 500 mA. Due to the nominal output voltage of 3.3 V of the fixed voltage version or depending on the chosen setting of the external voltage divider as well as on the applied conditions the device may either regulate its nominal output voltage or it may be in tracking mode. For further details please also refer to the
V
OUT
2) For the IFX1763XEJ V and IFX1763LD V adjustable versions the dropout voltage for certain output voltage / load conditions will be restricted by the minimum input voltage specification.
3) The adjustable versions of the IFX1763 are tested and specified for these conditions with the ADJ pin connected to the OUT pin.
4) The operation conditions are limited by the maximum junction temperature. The regulated output voltage specification will only apply for conditions where the limit of the maximum junction temperature is fulfilled. It will therefore not apply for all possible combinations of input voltage and output current at a given output voltage. When operating at maximum input voltage, the output current must be limited for thermal reasons. The same holds true when operating at maximum output current where the input voltage range must be limited for thermal reasons.
5) To satisfy requirements for minimum input voltage, the adjustable version of the IFX1763 is tested and specified for these conditions with an external resistor divider (two 250 k
Ω
resistors) for an output voltage of 2.44 V. The external resistors will add a 5 µA DC load on the output.
6) The dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to
V
IN
-
V
DR
.
7) GND-pin current is tested with
V
IN
=
V
OUT,nom
or VIN = 2.3 V, whichever is greater, and a current source load. This means that this parameter is tested while being in dropout condition and thus reflects a worst case condition. The GND-pin current will in most cases decrease slightly at higher input voltages - please also refer to the corresponding typical performance graphs.
8) The EN pin current flows into EN pin.
9) The ADJ pin current flows into ADJ pin.
10) ADJ pin connected to OUT pin.
11) Not subject to production test, specified by design.
12) whichever of the two values of
V
IN
is greater in order to also satisfy the requirements for
V
IN,min
.
13) Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out of the GND pin.
14)
C
BYP
= 0 nF,
C
OUT
≥ 3.3 µF; please note that for cases where a bypass capacitor at BYP is used - depending on the actual applied capacitance of
C
OUT
and
C
BYP
- a minimum requirement for ESR may apply. For further details please also refer to the corresponding typical performance graph.
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specified mean values expected over the production spread. If not otherwise specified, typical characteristics apply at
T
A
= 25 °C and the given supply voltage.
Data Sheet 14 Rev. 1.1, 2014-10-30
IFX1763
6 Typical Performance Characteristics
Dropout Voltage
V
DR
versus
Output Current
I
OUT
Typical Performance Characteristics
Guaranteed Dropout Voltage
V
DR
versus
Output Current
I
OUT
500
450
400
350
300
250
200
150
100
50
0
0 100 200
I
OUT
[A]
300
Dropout Voltage
V
DR
versus
Junction Temperature
T
J
T j
= −40
°
C
T j
= 25
°
C
T j
= 125
°
C
400 500
300
250
200
150
100
50
0
−50
500
450
400
350
Data Sheet
I
OUT
= 10 mA
I
OUT
= 50 mA
I
OUT
= 100 mA
I
OUT
= 500 mA
0
T j
[
°
C]
50 100
15
10
5
0
−50
30
25
20
15
50
45
40
35
500
Δ
= Guaranteed Limits
450
400
350
300
250
200
150
100
50
0
0 100 200
I
OUT
[A]
300
Quiescent Current versus
Junction Temperature
T
J
T j
≤
25
°
C
T j
≤
125
°
C
400 500
0
T j
[
°
C]
50
V
IN
= 6 V
I
OUT
= 0 mA .
V
EN
= V
IN
100
Rev. 1.1, 2014-10-30
Output Voltage
V
OUT versus
Junction Temperature
T
J
(IFX1763XEJ V33)
3.36
3.34
3.32
3.3
3.28
3.26
3.24
−50
I
OUT
= 1 mA
0
T j
[
°
C]
50
Quiescent Current
Input Voltage
V
I
q versus
IN
(IFX1763XEJ V33)
100
500
400
300
200
100
0
0
800
700
600
2 4
V
IN
[V]
6
V
OUT,nom
I
OUT,nom
V
EN
T j
= V
IN
= 25
°
C
= 3.3 V
= 0 mA
8 10
IFX1763
Typical Performance Characteristics
25
20
15
10
5
0
0
40
35
30
Output / ADJ Pin Voltage
V
OUT
versus
Junction Temperature
T
J
(IFX1763XEJ V)
1.24
1.235
1.23
1.225
1.22
1.215
1.21
1.205
1.2
−50
I
OUT
= 1 mA
0
T j
[
°
C]
50
Quiescent Current
Input Voltage
V
IN
I
q
versus
(IFX1763XEJ V)
100
5 10
V
IN
[V]
V
OUT,nom
R
Load
V
EN
T j
= V
IN
= 25
°
C
= 1.22 V
= 250 k
Ω
15 20
Data Sheet 16 Rev. 1.1, 2014-10-30
1200
1000
800
600
400
200
GND Current
Input Voltage
I
GND
versus
V
IN
(IFX1763XEJ V33)
R
Load
= 3.3 k
Ω
/ I
OUT
= 1 mA*
R
Load
= 330
Ω
/ I
OUT
= 10 mA*
R
Load
= 66
Ω
/ I
OUT
= 50 mA*
[* for V
OUT
T j
= 25
°
C
= 3.3 V]
0
0 2 4
V
IN
[V]
6
GND Current
Input Voltage
I
GND
versus
V
IN
(IFX1763XEJ V33)
8 10
16000
14000
12000
10000
8000
6000
4000
2000
0
0 2
R
Load
= 33.0
Ω
/ I
OUT
= 100 mA*
R
Load
= 11.0
Ω
/ I
OUT
= 300 mA*
R
Load
= 6.60
Ω
/ I
OUT
= 500 mA *.
[* for V
OUT
T j
= 25
°
C
= 3.3 V]
4
V
IN
[V]
6 8 10
IFX1763
Typical Performance Characteristics
GND Current
I
Input Voltage
GND
versus
V
IN
(IFX1763XEJ V)
400
350
300
R
Load
= 1.22 k
Ω
/ I
OUT
= 1 mA*
R
Load
= 122
Ω
/ I
OUT
= 10 mA*
R
Load
= 24.4
Ω
/ I
OUT
= 50 mA*
[* for V
OUT
T j
= 25
°
C
= 1.22 V]
250
200
150
100
50
0
0 2 4
V
IN
[V]
6
GND Current
I
Input Voltage
GND
versus
V
IN
(IFX1763XEJ V)
8 10
16000
14000
12000
10000
8000
6000
4000
2000
0
0 2
R
Load
= 12.2
Ω
/ I
OUT
= 100 mA*
R
Load
= 4.07
Ω
/ I
OUT
= 300 mA*
R
Load
= 2.44
Ω
/ I
OUT
= 500 mA *.
[* for V
OUT
T j
= 25
°
C
= 1.22 V]
4
V
IN
[V]
6 8 10
Data Sheet 17 Rev. 1.1, 2014-10-30
GND Current
I
GND versus
Output Current
I
OUT
12
10
V
IN
T j
= V
OUT,nom
= 25
°
C
+ 1 V
8
6
4
2
0
0 100 200 300
I
OUT
[mA]
EN Pin Threshold (Off-to-On) versus
Junction Temperature
T
J
400 500
1.2
1 mA
500 mA
1
0.8
0.6
0.4
0.2
0
−50 0
T j
[
°
C]
50 100
IFX1763
Typical Performance Characteristics
EN Pin Threshold (On-to-Off) versus
Junction Temperature
T
J
1.2
1 mA
500 mA
1
0.8
0.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
0.4
0.2
0
−50 0
T j
[
°
C]
50
EN Pin Input Current versus
EN Pin Voltage
V
EN
5 10
V
EN
[V]
15
100
T j
= 25
°
C
V
IN
= 20 V
20
Data Sheet 18 Rev. 1.1, 2014-10-30
EN Pin Input Current versus
Junction Temperature
T
J
1
0.8
0.6
0.4
0.2
1.6
1.4
1.2
0
−50 0
Current Limit versus
Junction Temperature
T
J
T j
[
°
C]
50
V
EN
= 20 V
100
1.2
V
IN
= 7 V
V
OUT
= 0 V
1
0.8
0.6
0.4
0.2
0
−50 0
T j
[
°
C]
50 100
IFX1763
Typical Performance Characteristics
Current Limit versus
Input Voltage
V
IN
0.6
0.5
0.4
0.3
1
0.9
V
OUT
T j
= 0 V
= 25
°
C
0.8
0.7
0.2
0.1
0
0
1 2 3
V
IN
[V]
4
Reverse Output Current versus
Output Voltage
V
OUT
5 6 7
30
20
10
0
0
90
80
V
OUT.nom
= 1.22 V (ADJ)
V
OUT.nom
= 3.3 V (V33)
70
60
V
IN
T j
= 0 V
= 25
°
C
50
40
2 4
V
OUT
[V]
6 8 10
Data Sheet 19 Rev. 1.1, 2014-10-30
IFX1763
Typical Performance Characteristics
Reverse Output Current versus
Junction Temperature
T
J
8
6
4
2
20
18
V
OUT.nom
= 1.22 V (ADJ)
V
OUT.nom
= 3.3 V (V33)
16
14
V
IN
= 0 V
12
10
0
−50 0
Load Regulation versus
Junction Temperature
T
J
T j
[
°
C]
50 100
Minimum Input Voltage
1)
versus
Junction Temperature
T
J
2.5
2
1.5
1
0.5
0
−50 0
T j
[
°
C]
50
I
OUT
= 100 mA
I
OUT
= 500 mA
100
Adjust Pin Bias current
I
ADJ
Junction Temperature
T
J
versus
5 140
V33: V
IN
= 4.3 V V
OUT.nom
= 3.3 V
ADJ: V
IN
= 2.3 V V
OUT.nom
= 1.22 V
120
0
100
−5
80
−10
60
−15
40
−20
20
−25
−50
Δ
I
Load
= 1 mA to 500 mA
0
T j
[
°
C]
50 100
0
−50 0
T j
[
°
C]
50 100
1)
V
IN
,min is referred here as the minimum input voltage for which the requested current is provided and
V
OUT
reaches 1 V.
Data Sheet 20 Rev. 1.1, 2014-10-30
IFX1763
Typical Performance Characteristics
ESR Stability versus
Output Current
I
OUT
(for
C
OUT
= 3.3 µF)
10
1
ESR(
C
OUT
) with
C
BYP
= 10 nF versus
Output Capacitance
C
OUT
3
C
Byp
= 10 nF
measurement limit
2.5
2
1.5
stable region above blue line
10
0
ESR max
C
Byp
= 0 nF
ESR min
C
Byp
= 0 nF
ESR max
C
Byp
= 10 nF
ESR min
C
Byp
= 10 nF
C
OUT
= 3.3 µF
(0.06
Ω
is measurement limit)
10
−1
0 100 200 300
I
OUT
[mA]
400
Input Ripple Rejection PSRR versus
Frequency f
500
60
50
40
30
20
10
0
10
100
90
80
70
V
IN
V
C
= V
OUTnom ripple
OUT
= 0.5 V
= 10 µF
+ 1.5 V pp
I
OUT
=500mA C
BYP
=0 nF
I
OUT
=500mA C
BYP
=10nF
I
OUT
=50mA C
BYP
=0 nF
I
OUT
=50mA C
BYP
=10nF
100 1k f [Hz]
10k 100k
1
0.5
0
2 3 4
C
OUT
[µF]
5
Input Ripple Rejection PSRR versus
Junction Temperature
T
J
6
68
66
64
62
60
58
56
V
IN
= V
OUTnom
+ 1.5 V
V ripple
= 0.5 V pp f ripple
= 120 Hz
C
OUT
= 10 µF
54
52
−50
I
OUT
=500mA C
BYP
=0 nF
I
OUT
=500mA C
BYP
=10nF
0
T j
[
°
C]
50 100
7
Data Sheet 21 Rev. 1.1, 2014-10-30
Output Noise Spectral Density (ADJ) versus
Frequency (
C
OUT
= 10 µF,
I
OUT
= 50 mA
1)
)
10
1
C
OUT
I
OUT
= 10 µF
= 50 mA
10
0
IFX1763
Typical Performance Characteristics
Output Noise Spectral Density (ADJ) versus
Frequency (
C
OUT
= 22 µF,
I
OUT
= 50 mA
10
1
C
OUT
I
OUT
= 22 µF
= 50 mA
10
0
10
−1
10
−2
10
1
C
Byp
= 0 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=250m
Ω
10
2
10
3 f [Hz]
10
4
Output Noise Spectral Density (3.3 V) versus
Frequency (
C
OUT
= 10 µF,
I
OUT
)
10
5
10
1
C
OUT
I
OUT
= 10 µF
= 50 mA
10
−1
C
Byp
= 0 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=250m Ω
10
−2
10
1
10
2
10
3 f [Hz]
10
4
10
5
Output Noise Spectral Density (3.3 V) versus
Frequency (
C
OUT
= 22µF,
I
OUT
)
10
1
C
OUT
I
OUT
= 22 µF
= 50 mA
10
0
10
0
10
−1
10
−1
10
−2
10
1
C
Byp
= 0 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=250m Ω
10
2
10
3 f [Hz]
10
4
10
5
10
−2
10
1
C
Byp
= 0 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=0
C
Byp
= 10 nF; ESR(C
OUT
)=250m Ω
10
2
10
3 f [Hz]
10
4
1) Load condition 50mA is representing a worst case condition with regard to output voltage noise performance.
10
5
Data Sheet 22 Rev. 1.1, 2014-10-30
IFX1763
Typical Performance Characteristics
Transient Response
C
BYP
= 0nF (IFX1763XEJ V33) Transient Response
C
BYP
= 10nF (IFX1763XEJ V33)
-0,1
-0,2
-0,3
0
0,1
0
0,3
0,2
C
OUT
C
BYP
V
IN
= 10 µF
= 0 nF
= 6 V
100 200 300 400 500
Time (μs)
600 700 800 900 1000
200
100
0
0
400
300
600
I
OUT
: 100 to 500mA
500
100 200 300 400 500
Time (μs)
600 700 800 900 1000
-0,05
-0,1
-0,15
0
0,15
0,1
C
OUT
C
BYP
V
IN
= 10 µF
= 10 nF
= 6V
0,05
0
10 20
600
I
OUT
: 100 to 500mA
500
400
300
200
100
0
0 10 20 30
30 40 50
Time / [μs]
60 70
40 50
Time / [μs]
60 70 80
80 90 100
90 100
Data Sheet 23 Rev. 1.1, 2014-10-30
IFX1763
7 Application Information
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device.
V
IN
C
IN
1µF
IN
IFX1763
OUT
SENSE
C
BYP
10nF
C
OUT
10µF
V
OUT
R
Load
EN
GND
BYP
Figure 5
GND
Typical Application Circuit IFX1763 (fixed voltage version)
IFX1763 ADJ
V
IN
IN OUT
R
2
C
IN
ADJ
R
1 1µF
C
BYP
C
OUT
V
OUT
10nF
EN
GND
BYP
10µF
R
Load
GND
Calculation of V
OUT
: V
OUT
= 1.22V x (1 + R
2
/ R
1
) + (I
ADJ x R
2
)
Figure 6 Typical Application Circuit IFX1763 (adjustable version)
Note: This is a very simplified example of an application circuit. The function must be verified in the real application
1)2)
.
1) Please note that in case a non-negligible inductance at IN pin is present, e.g. due to long cables, traces, parasitics, etc, a bigger input capacitor
C
IN
may be required to filter its influence. As a rule of thumb if the IN pin is more than six inches away from the main input filter capacitor an input capacitor value of
C
IN
= 10 µF is recommended.
2) For specific needs a small optional resistor may be placed in series to very low ESR output capacitors
C
OUT
for enhanced noise performance (for details please see
“Bypass Capacitance and Low Noise Performance” on Page 25
).
Data Sheet 24 Rev. 1.1, 2014-10-30
IFX1763
Application Information
The IFX1763 is a 500 mA low dropout regulator with very low quiescent current and Enable-functionality. The device is capable of supplying 500 mA at a dropout voltage of 320 mV. Output voltage noise numbers down to
24
µV
RMS
can be achieved over a 10 Hz to 100 kHz bandwidth with the addition of a 10 nF reference bypass capacitor. The usage of a reference bypass capacitor will additionally improve transient response of the regulator, lowering the settling time for transient load conditions. The device has a low operating quiescent current of typical
30 µA that drops to less than 1 µA in shutdown (EN-pin pulled to low level). The device also incorporates several protection features which makes it ideal for battery-powered systems. It is protected against both reverse input and reverse output voltages. In battery backup applications where the output can be held up by a backup battery when the input is pulled to ground the device behaves like it has a diode in series with its output and prevents reverse current flow.
7.1
Adjustable Operation
The adjustable version of the IFX1763 has an output voltage range of 1.22 V to 20 V -
set by the ratio of two external resistors, as it can be seen in
V
DR
. The output voltage is
V
OUT
the formula given in the figure can be used). The device controls the output to maintain the ADJ pin at 1.22 V referenced to ground.
The current in
R
1
is then equal 1.22 V /
R
1
and the current in
R
2
equals the current in current. The ADJ pin bias current, which is ~ 60 nA @ 25°C, flows through
R
R
1
plus the ADJ pin bias
2
into the ADJ pin. The value of
R
1 should be not greater than 250 kΩ in order to minimize errors in the output voltage caused by the ADJ pin bias current. Note that when the device is shutdown (i.e. low level applied to EN pin) the output is turned off and consequently the divider current will be zero. For details of the ADJ pin bias current see also the corresponding
Figure “Adjust Pin Bias current I
.
7.2
Kelvin Sense Connection
For the fixed voltage version of the IFX1763 the SENSE pin is the input to the error amplifier. An optimum regulation will be obtained at the point where the SENSE pin is connected to the OUT pin of the regulator. In critical applications however small voltage drops can be caused by the resistance Rp of the PC-traces and thus may lower the resulting voltage at the load. This effect may be eliminated by connecting the SENSE pin to the output as close
). Please note that the voltage drop across the external PC trace will add up
to the dropout voltage of the regulator.
V
IN
C
IN
IN
IFX1763
OUT
SENSE
EN
GND
BYP
R
P
C
OUT
R
Load
R
P
Figure 7 Kelvin Sense Connection
7.3
Bypass Capacitance and Low Noise Performance
The IFX1763 regulator may be used in combination with a bypass capacitor connecting the OUT pin to the BYP pin in order to minimize output voltage noise
1)
.This capacitor will bypass the reference of the regulator, providing
1) a good quality low leakage capacitor is recommended.
Data Sheet 25 Rev. 1.1, 2014-10-30
IFX1763
Application Information
a low frequency noise pole. The noise pole provided by such a bypass capacitor will lower the output voltage noise in the considered bandwidth. For a given output voltage actual numbers of the output voltage noise will - next to the bypass capacitor itself - be dependent on the capacitance of the applied output capacitor and its ESR: In case of the IFX1763XEJ V applied with unity gain (i.e.
V
OUT
= 1.22 V) the usage of a bypass capacitor of 10 nF in combination with a (low ESR) ceramic
41
µV
C
OUT
of 10 µF will result in output voltage noise numbers of typical
RMS
. This Output Noise level can be reduced to typical 28
µV
RMS
under the same conditions by adding a small resistor of ~250 mΩ in series to the 10 µF ceramic output capacitor acting as additional ESR. A reduction of the output voltage noise can also be achieved by increasing capacitance of the output capacitor. For
C
OUT
= 22 µF
(ceramic low ESR) the output voltage noise will be typically around 29
24
µV
RMS
by adding a small resistance of ~250 mΩ in series to
C
µV
RMS
and can again be further lowered to
OUT
. In case of the fix voltage version IFX1763XEJ
V33 the output voltage noise for the described cases vary from 45
µV
RMS
down to 30
µV
RMS
. For further details
,, of the Electrical Characteristics. Please note that next
to reducing the output voltage noise level the usage of a bypass capacitor has the additional benefit of improving transient response which will be also explained in the next chapter. However one needs to take into consideration that on the other hand the regulator start-up time is proportional to the size of the bypass capacitor and slows down to values around 15 ms when using a 10 nF bypass capacitor in combination with a 10 µF
C
OUT
output capacitor.
7.4
Output Capacitance Requirements and Transient Response
The IFX1763 is designed to be stable with a wide range of output capacitors. The ESR of the output capacitor is an essential parameter with regard to stability, most notably with small capacitors. A minimum output capacitor of
3.3 µF with an ESR of 3 Ω or less is recommended to prevent oscillations. Like in general for LDO’s the output transient response of the IFX1763 will be a function of the output capacitance. Larger values of output capacitance decrease peak deviations and thus improve transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the IFX1763 will increase the effective output capacitor value. Please note that with the usage of bypass capacitors for low noise operation either larger values of output capacitors are needed or a minimum ESR requirement of
C
OUT
may have to be considered (see also
= 10 nF versus Output Capacitance C
as example). In conjunction with the usage of a 10 nF bypass capacitor an output capacitor
C
OUT
≥ 6.8 µF is recommended. The benefit of a bypass capacitor to the transient response performance is impressive and illustrated as one example
where the transient response of the IFX1763XEJ V33 to one and the same load step from 100 mA to
500 mA is shown with and without a 10 nF bypass capacitor: for the given configuration of
C
OUT
= 10 µF with no bypass capacitor the load step will settle in the range of less than 100 µs while for
C
OUT
= 10 µF in conjunction with a 10 nF bypass capacitor the same load step will settle in the range of 10 µs. Due to the shorter reaction time of the regulator by adding the bypass capacitor not only the settling time improves but also output voltage deviations due to load steps are sharply reduced.
Figure 8
0,3
0,2
C
OUT
C
BYP
V
IN
= 10 µF
= 0 vs 10nF
= 6 V
0,1
0
C_BYP = 0nF
C_BYP = 10nF
-0,1
-0,2
-0,3
0 100 200 300 400 500
Time (μs)
600 700 800 900 1000
Influence of without
C
C
BYP
: example of transient response to one and the same load step with and
BYP
of 10 nF (
I
OUT
100 mA to 500 mA, IFX1763XEJ V33)
Data Sheet 26 Rev. 1.1, 2014-10-30
IFX1763
Application Information
7.5
Protection Features
The IFX1763 regulators incorporate several protection features which make them ideal for usage in batterypowered circuits. In addition to normal protection features associated with monolithic regulators like current limiting and thermal limiting the device is protected against reverse input voltage, reverse output voltage and reverse voltages from output to input.
Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation the junction temperature must not exceed 125°C.
The input of the device will withstand reverse voltages of 20 V. Current flowing into the device will be limited to less than 1 mA (typically less than 100 µA) and no negative voltage will appear at the output. The device will protect both itself and the load. This provides protection against batteries being plugged backwards.
The output of the IFX1763 can be pulled below ground without damaging the device. If the input is left open-circuit or grounded, the output can be pulled below ground by 20 V. Under such conditions the output of the device by itself behaves like an open circuit with practically no current flowing out of the pin
1)
. In more application relevant cases however where the output is either connected to the SENSE pin (fix voltage variant) or tied either via an external voltage divider or directly to the ADJ pin (adjustable variant) a small current will be present from this origin.
In the case of the fixed voltage version this current will typically be below 100 µA while for the adjustable version it depends on the magnitude of the top resistor of the external voltage divider
2)
. If the input is powered by a voltage source the output will source the short circuit current of the device and will protect itself by thermal limiting. In this case grounding the EN pin will turn off the device and stop the output from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above or below ground by as much as 7 V without damaging the device. If the input is grounded or left open-circuit, the ADJ pin will act inside this voltage range like a large resistor (typically 100 kΩ) when being pulled above ground and like a resistor (typically 5 kΩ) in series with a diode when being pulled below ground. In situations where the ADJ pin is at risk of being pulled outside its absolute maximum ratings ±7 V the ADJ pin current must be limited to 1 mA (e.g. in cases where the ADJ pin is connected to a resistor divider that would pull the ADJ pin above its 7 V clamp voltage). Let’s consider for example the case where a resistor divider is used to provide a 1.5 V output from the 1.22 V reference and the output is forced to
20 V. The top resistor of the resistor divider must then be chosen to limit the current into the ADJ pin to 1 mA or less when the ADJ pin is at 7 V. The 13 V difference between output and ADJ pin divided by the 1 mA maximum current into the ADJ pin requires a minimum resistor value of 13 kΩ.
In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or is left open-circuit. Current flow back into the output will follow the curve as shown in
below.
When the IN pin of the fixed voltage version is forced below the OUT pin, or the OUT pin is pulled above the IN pin, the input current will drop to very small values – typically down to less than 2 µA, once
V
OUT
exceeds
V
IN
by some 300 mV or more. This can happen if the input of the device is connected to a discharged battery and the output is held up by either a backup battery or a second regulator circuit. The state of the EN pin will have no effect on the reverse output current when the output is pulled above the input.
1) typically < 1 µA for the mentioned conditions,
V
OUT
being pulled below ground with other pins either grounded or open.
2) In case there is no external voltage divider applied i.e. the ADJ pin is directly connected to the output and the output is pulled below ground by 20 V the current flowing out of the ADJ pin will be typically ~ 4 mA. Please ensure in such cases that the absolute maximum ratings of the ADJ pin are respected.
Data Sheet 27 Rev. 1.1, 2014-10-30
Figure 9 Reverse Output Current
30
20
10
90
80
V
OUT.nom
= 1.22 V (ADJ)
V
OUT.nom
= 3.3 V (V33)
70
60
V
IN
T j
= 0 V
= 25
°
C
50
40
0
0 2 4
V
OUT
[V]
6 8 10
IFX1763
Application Information
Data Sheet 28 Rev. 1.1, 2014-10-30
8 Package Outlines
+0 -0.1
0.41
±0.0
9
2)
1.27
C 0.08
C
Seating Plane
0.2
M
C A-B D 8x
3.
9 ±0.1
1)
0.35 x 45˚
0.1
C D 2x
+0.06
9
0.1
D
6
±0.2
0.64
±0.25
0.2
M
D 8x
8 5
A
Bottom View
3
±0.2
1 4
1 4
8
B
Index Marking
4.
9
±0.1
1)
0.1
C A-B 2x
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width
3) JEDEC reference MS-012 variation BA
Figure 10
PG-DSO-8 Exposed Pad package outlines
5
PG-DSO-8-27-PO V01
IFX1763
Package Outlines
3 .
3
±0.1
0.05
0.1
±0.1
Z
0.
3 6
±0.1
2.5
8
±0.1
0.5
3
±0.1
Pin 1 M a rking
Z (4:1)
0.5
±0.1
Pin 1 M a rking
0.25
±0.1
PG-T S ON-10-2-PO V02
0.07 MIN.
Figure 11
PG-TSON-10 Package Outlines
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages
.
Data Sheet 29
Dimensions in mm
Rev. 1.1, 2014-10-30
IFX1763
9
Revision
1.1
1.0
Revision History
Revision History
Date Changes
2014-10-30 Updated Data Sheet including additional package type PG-TSON-10:
• PG-TSON-10 package variants added: Product Overview, Pin Configuration
Thermal Resistance, Wording, etc added / updated accordingly.
• Typical Performance Graphs: some legends entries updated and corrected
(
Figure “Minimum Input Voltage versus Junction Temperature T
and
Figure “Input Ripple Rejection PSRR versus Junction
).
• Application Information updated: Clarification and correction of wording.
Typical values updated and footnotes added.
• Editorial changes throughout the document.
2014-02-13 Data Sheet - Initial Release
Data Sheet 30 Rev. 1.1, 2014-10-30
Edition 2014-10-30
Published by
Infineon Technologies AG
81726 Munich, Germany
©
2014 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (
www.infineon.com
).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.
The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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