STMicroelectronics Audio/video switch matrix Datasheet
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STV6414A Audio/video switch matrix Features ■ I²C bus control ■ Standby mode with interrupt signal output ■ Video section – 3 CVBS inputs, 2 CVBS outputs – 3 Y/C inputs, 2 Y/C outputs – Switchable LPFs (low pass filters) on 6 inputs – 6 dB gain on all CVBS/Y and C outputs – Integrated 150 Ω buffers – 2 RGB/FB inputs, 1 tri-state RGB/FB output with 6 dB adjustable gain (from +3 dB to +9 dB) – Video muting on all outputs – 2 slow blanking inputs/outputs – Sync bottom clamp on all CVBS/Y and RGB inputs, average clamp on C inputs – SVHS switch on C VCR output – Bandwidth: 15 MHz – Crosstalk: 50 dB minimum ) s ( ct u d o r P e LQFP64 (10 × 10 × 1.4 mm) (Low-profile Quad Flat Package) Marking: STV6414ADT t e l o )- s ( t c u d o r P e ■ Audio section – 3 stereo inputs, 3 stereo outputs – Stereo-to-mono sound capability – 0/6/9 dB selectable gain on one stereo input – Full range volume control with soft control – Audio muting on all outputs t e l o s b O Description The STV6414A is a highly integrated I²C buscontrolled audio and video switch matrix, optimized for use in digital set-top box applications. It provides the audio and video routings required in a two SCART set-top box design. In an LQFP64 (10 × 10 × 1.4 mm) package, the STV6414A is compatible with the STV6413. Table 1. bs O June 2008 Rev 1 Device summary Order code Packaging STV6414AD Tray STV6414ADT Tape and reel 1/32 www.st.com 32 Contents STV6414A Contents 1 General information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 2 I/O pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Latch-up data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Audio section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Video section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5 Chroma section characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.6 Blanking section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.7 I²C bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 ) s ( ct u d o r P e t e l o I²C bus selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 s b O I²C bus addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ) (s 4 Input/output groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 t c u 6.1 P e d o r t e l o Lead-free packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 s b O 2/32 38 37 36 35 34 33 42 39 43 NC LOUT_TV 44 NC R/COUT_TV NC VCCB 3 VCCB 5 Y/CVBSOUT_TV BOUT_TV VCCB 2 VCCB 4 COUT_VCR GNDB VCCB 1 GOUT_TV Y/CVBSOUT_VCR 45 STV6414A pinout diagram 46 Figure 1. 47 General information 48 1 40 General information 41 STV6414A ) s ( ct u d o 49 32 ROUT_TV FBIN_VCR 50 31 VCCAO FBIN_ENC 51 30 LOUT_VCR NC 52 29 ROUT_VCR 28 LOUT_CINCH 27 ROUT_CINCH 26 NC 25 GNDA 24 VCCA 23 RIN_TV 22 LIN_TV 21 CVBSIN_TV 20 RIN_VCR 19 LIN_VCR 18 Y/CVBSIN_VCR 17 GND FBOUT_TV VDD 53 NC 54 SCL 55 SDA 56 GND 57 IT_OUT 58 SLB_TV 59 R/CIN_VCR 60 SLB_VCR 61 GIN_VCR 62 VCC12 63 BIN_VCR 64 b O s ( t c u d o 15 16 BIN_ENC NC DECA NC 14 CIN_ENC LIN_ENC 9 13 8 NC GIN_ENC 7 YIN_ENC 12 6 GND RIN_ENC 5 Y/CVBSIN_ENC 11 4 DECV R/CIN_ENC 3 NC 10 2 VCC Pr 1 s b O e t e ol so STV6414A )- e t e l Pr 3/32 General information 1.1 I/O pin description Table 2. Name Function 1 VCC +5 V Supply 2 NC Not connected 3 DECV Video decoupling capacitor 4 Y/CVBSIN_ENC Y/CVBS input from encoder 5 GND Ground 6 YIN_ENC Y input from encoder 7 NC Not connected 8 CIN_ENC Chroma input from encoder 9 NC Not connected 10 R/CIN_ENC Red/Chroma input from encoder 11 RIN_ENC Audio right, input from encoder 12 GIN_ENC Green input from encoder 13 LIN_ENC Audio left, input from encoder 14 BIN_ENC Blue input from encoder 15 NC 16 DECA 17 GND 18 Y/CVBSIN_VCR s b O ) s ( ct u d o r P e t e l o ) (s s b O Not connected Audio decoupling capacitor ct du Ground Y/CVBS input from VCR SCART 21 o r P CVBSIN_TV CVBS input from TV SCART 22 LIN_TV Audio left, input from TV SCART 23 RIN_TV Audio right, input from TV SCART 24 VCCA (see Figure 2) 9V audio supply voltage output if VCCAO is used as 12V supply voltage input or 9V audio supply voltage input, VCCAO must be used as 9V supply voltage input 25 GNDA Audio ground 26 NC Not connected 27 ROUT_CINCH Audio right output to CINCH 28 LOUT_CINCH Audio left output to CINCH 29 ROUT_VCR Audio right output to VCR SCART 30 LOUT_VCR Audio left output to VCR SCART 20 ete ol I/O pin description Pin No. 19 4/32 STV6414A LIN_VCR Audio left, input from VCR SCART RIN_VCR Audio right, input from VCR SCART STV6414A General information Table 2. Pin No. Name Function 31 VCCAO (see Figure 2) 12V supply voltage input, VCCA is regulated 9V output for decoupling or 9v Supply Voltage input, VCCA must be used as 9V supply voltage input. 32 ROUT_TV Audio right output to TV SCART 33 LOUT_TV Audio left output to TV SCART 34 NC Not connected 35 NC Not connected 36 NC Not connected 37 VCCB5 Video output buffer supply pin 38 BOUT_TV Blue output to TV SCART 39 VCCB4 Video output buffer supply pin 40 GOUT_TV Green output to TV SCART 41 GNDB Video buffer ground 42 R/COUT_TV Red/Chroma output to TV SCART 43 VCCB3 Video output buffer supply pin 44 Y/CVBSOUT_TV 45 VCCB2 46 COUT_VCR 47 VCCB1 48 Y/CVBSOUT_VCR Y/CVBS output to VCR SCART FBOUT_TV Fast blanking output to TV SCART FBIN_VCR Fast blanking input from VCR SCART 51 FBIN_ENC Fast blanking input from encoder 52 NC Not connected 53 VDD +5 V I²C supply 54 NC Not connected 55 SCL I²C bus clock 56 SDA I²C bus data 57 GND Ground digital 58 IT_OUT Interrupt output 59 SLB_TV Slow blanking input/output from TV SCART 60 R/CIN_VCR Red input (or C Input) from VCR SCART 61 SLB_VCR Slow blanking input/output from VCR SCART 62 GIN_VCR Green input from VCR SCART 49 e t e ol 50 s b O I/O pin description (continued) ) (s ) s ( ct u d o r P e t e l o s b O Y/CVBS output to TV SCART Video output buffer supply pin du ct o r P Chroma output to VCR SCART Video output buffer supply pin 5/32 General information Table 2. Figure 2. STV6414A I/O pin description (continued) Pin No. Name Function 63 VCC12 +12 V supply 64 BIN_VCR Blue input from VCR SCART Power supply configuration STV6414A STV6414A 63 ) s ( ct VCC12 9 volt output 31 12V VCCAO 24 VCCA 9V 31 VCCAO u d o VCCA 24 9 volt input Audio ground In applications where a 12 volt supply from slow blanking is used to derive the internal audio 9 Volt supply voltage, the VCCAO pin must be connected to the 12 volt supply as shown in the example. The VCCA pin will show the regulated 9 volt audio supply voltage which must be decoupled by capacitors. ) (s t c u d o r P e t e l o s b O 6/32 r P e Audio ground t e l o In applications having a dedicated audio supply voltage, the VCCAO pin must be connected together with the VCCA pin to the audio supply as shown in the example. The VCCA pin acts as power supply input for the internal audio block. s b O STV6414A Figure 3. General information STV6414A block diagram FBIN_ENC FBIN_ENC FBIN_VCR FBIN_VCR FBOUT_TV FB Switch BIN_ENC LPF BIN_ENC BIN_VCR BIN_VCR LPF GIN_ENC GIN_VCR R/CIN_ENC 3 to 9 dB Mute GIN_ENC GIN_VCR Mute R/CIN_ENC R/CIN_VCR Mute LPF R/CIN_VCR BOUT_TV 3 to 9 dB GOUT_TV RGB Switch CIN_ENC R/C Switch R/CIN_VCR CIN_ENC R/CIN_ENC Mute LPF R/COUT_TV Tri-State r P e C Switch YIN_ENC LPF Y/CVBSIN_ENC LPF u d o 6 dB Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Y/CVBSIN_VCR t e l o 6 dB Mute Y/CVBS Switch Mute CIN_ENC R/CIN_ENC Mute )- Y/CVBSOUT_TV s b O 6 dB s ( t c COUT_VCR C Switch du e t e l LIN_ENC o s b o r P 0/6/9 dB LIN_TV O RIN_ENC IT_OUT Slow Blanking Monitor Interrupt Signal CVBSIN_TV CVBSIN_TV ) s ( ct 3 to 9 dB Y_ENC Y/CVBSIN_ENC Mute SLB_TV SLB_VCR 6 dB Y/CVBSOUT_VCR Y/CVBS Switch LIN_ENC LIN_TV Mute Stereo/Mono RIN_ENC RIN_TV LOUT_VCR ROUT_VCR Mute 0/6/9 dB VCR Switch RIN_TV 0/6 dB ROUT_CINCH 0/6 dB LOUT_CINCH LIN_ENC LIN_VCR LIN_VCR LIN_TV -62 dB Mute RIN_VCR 0/6 dB Stereo/Mono RIN_ENC RIN_VCR LOUT_TV ROUT_TV RIN_TV Mute -62 dB TV Switch 0/6 dB I²C Bus Decoder SDA SCL 7/32 General information Figure 4. STV6414A STV6414A functional diagram Audio L STV6414A CINCH Audio R Output R/C G R/C B G RGB and FB Switches Fast Blanking B Fast Blanking CVBS SCART1 Audio L TV Audio R CVBS/Y Audio L Audio L u d o Audio R Audio R Y r P e Slow Blanking Chroma Switches t e l o R/C G Interrupt Micro r P e od t e l o s b O 8/32 t c u (s) bs -O Audio Switches Slow Blanking I/O Control ) s ( ct C CVBS/Y Switches CVBS/Y Encoder B Fast Blanking CVBS/Y Audio L SCART2 Audio R VCR CVBS/Y C Audio L Audio R Slow Blanking STV6414A Electrical characteristics 2 Electrical characteristics Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC12 Supply voltage for slow blanking sections 13.2 V VCCAO Supply voltage for audio drivers 13.2 V VCCA Supply voltage for digital audio sections 10 V VDD Supply voltage for digital sections 6 V VCC, VCCBI Supply voltage for video sections 6 V VIN Input voltage at pin (in reference to GND) VESD Maximum ESD Voltage allowed. (human body model: ±4 100 pF capacitor discharged through 1.5 kOhm serial resistor) Table 4. Parameter RthJA u d o V r P e kV t e l o Thermal data Symbol 0, VCCA 0, VCC or VCCBI 0, 5.5 0, VCC12 Audio pins Video pins Bus pins Slow Blanking pins s b O ) s ( ct Value Unit Maximum junction-to-ambient thermal resistance 58 °C/W TSTG Storage temperature -20, +150 °C TOPER Operating free air temperature range 0 to +70 °C Tj Maximum junction temperature 150 °C )- s ( t c 2.1 du o r P Latch-up data e t e ol At an ambient temperature of 25 °C, all pins meet the following specifications: I trigger = 200 mA or I trigger = -200 mA. s b O 2.2 Table 5. Symbol Recommended operating conditions TAMB = 25° C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω (unless otherwise specified) Recommended operating conditions Parameter Test conditions Min Typ Max Unit 4.75 5 5.25 V 12 9 12.8 9.5 V Supply voltages VDD Digital supply voltage VCCAO Audio operating supply voltage - Decoupling capacitor on VCCA 11.2 8.5 - Connected to VCCA 9/32 Electrical characteristics Table 5. STV6414A Recommended operating conditions (continued) Symbol Parameter VCC VCC12 Test conditions Min Typ Max Unit Video operating supply voltage 4.75 5 5.25 V Slow blanking control supply voltage 11.2 12 12.8 V Active mode (all channels ON) IDD Digital supply current VDD = 5 V 6 10 mA ICCA Audio supply current VCCAO = 12 V, no load 8 15 mA ICCV VCC = 5 V, no load, LPF OFF Total video supply current VCC = 5 V, no load, LPF ON (VCC+VCCB1+VCCB2+VCCB3+VCC VCC = 5 V, with load, LPF OFF B4+VCCB5) VCC = 5 V, with load, LPF ON 35 50 48 63 45 65 62 80 ICC12 12 V supply current VCC12 = 12 V SLB input mode SLB output mode, no load Standby mode (all channels OFF + LPF OFF) IDD Digital supply current VDD = 5 V ICCAstd Audio supply current VCCA0 = 12 V, no load ICCVstd Total video supply current VCC = 5 V ) (s 2.3 0 3 u d o 1 4 mA 10 mA r P e t e l o s b O 6 ) s ( ct mA 3 mA 1 mA Audio section characteristics t c u TAMB = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 50 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 6. d o r Symbol Audio section characteristics P e Parameter let Test conditions Min Supply voltage rejection VRIPPLE = 500 mVRMS at 100 Hz, Gain= 0 dB DECA filter cap = 47 µF 60 DECA filter cap = 220 µF SVR1K Supply voltage rejection VRIPPLE = 500 mVRMS at 1 kHz, Gain = 0 dB VINDC Input DC level VINAC Input signal amplitude RIN Input resistance RINmatch Input resistance matching FRANGE Bandwidth -3 dB, 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB Flatness Spread of gain in audio band -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB SVR100 o s b O 10/32 70 Typ Max dB 70 80 80 dB 3.2 V 2 30 Unit 50 ±2 VRMS kΩ ±10 50 % kHz 0.5 dB STV6414A Table 6. Electrical characteristics Audio section characteristics (continued) Symbol Parameter CS Channel separation, from audio VIN = 0.5 VRMS at 1 kHz on one 80 inputs input, RLOAD = 10 kΩ, Gain = 0 dB 70 Between L & R of TV outputs 90 74 dB dB Ci Channel isolation from video inputs VIN = 1 VPP at 15 kHz on one point 85 dB VOUT Output DC level VCCA = 9 V VCCA/2 V VOFF DC offset change Switching between inputs 1 ±15 ROUT Output resistance 60 120 PHD Phase difference 1 VRMS input on each input channel at 1 kHz ASN S/N ratio VIN = 1 VRMS at 1 kHz input weighted CCIR 468-4 quasi peak, 75 Gain = 0 dB 85 eNI Equivalent rms input voltage noise BW = 20 Hz, 20 kHz Flat, Gain = 0 dB 5 G0 0 dB gain 0.5 VRMS, RLOAD = 10 kΩ, Gain = 0 dB GSTEP Gain step -62 dB to +6 dB (see Figure 5) GMATCH1 Gain matching between different inputs of one output VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB GMATCH2 Gain matching between left/right outputs of one input channel ) s ( ct -O VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB Max Unit mV ) s ( ct 3 u d o r P e -0.5 W ° deg. dB µV +0.5 2 dB dB -0.5 0.5 dB -0.5 0.5 dB VOUT = 0.5 VRMS at 1 kHz, LPF at 80 kHz, Volume level adjustment = 0 dB 0.01 0.01 0.01 0.05 0.05 0.05 % let THD = 0.2%, 1 kHz 2.1 2.3 VRMS Output load resistance VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB 2 2.25 kΩ Mute suppression VIN = 0.5 VRMS, on one point -90 o s b O bs Typ Output clipping level VCL Mute r P e Min t e l o u d o Total harmonic distortion ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB THD0 THD6 THD9 RL Test conditions dB 11/32 Electrical characteristics Figure 5. STV6414A Volume control characteristics 0 31 18 ± 0.5 dB -36 Step Number ) s ( ct ± 0.5 dB u d o r P e + 2 dB let -62 dB o s b - 0.5 dB O ) 2.4 Video section characteristics TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω, unless otherwise specified. Table 7. u d o Video characteristics Symbol Parameter r P e VDCIN DC input level ICLAMP s ( t c Test conditions Min Bottom sync pulse Typ Max Unit 2 V 2 mA Clamping current at VDCIN - 400 mV Input leakage current VIN = VDCIN +1 V CIN let VIN Max input signal VCC = 5 V 1.5 VPP DYN Dynamic output signal VCC = 5 V 3 VPP BW Bandwidth at -3 dB - Y/CVBS - RGB Input without low pass filter VIN = 1 VPP VIN = 1 VPPVINC = muted Input without low pass filter Flatness Spread of gain in video band (15 kHz - 20 MHz) - Y/CVBS - RGB BW LPF Low pass filter bandwidth at -3dB VIN = 1 VPP, CL=10pF 7.5 Low pass filter attenuation -47 ILEAK o s b O ATT 12/32 1 1 Input capacitance 10 2 10 10 27 MHz pF 15 15 VIN = 1 VPP VIN = 1 VPP, VINC = muted µA MHz +/-0.5 +/-0.5 dB Mhz -36 dB STV6414A Table 7. Electrical characteristics Video characteristics (continued) Symbol Parameter Test conditions CTi Crosstalk isolation between input VIN = 1 VPP at 4.43 MHz on channel one point CTo Crosstalk Isolation between output channel 60 dB 50 dB Ω 5.5 6 6.5 dB VIN = 1 Vpp, gain = 6 dB -0.3 0 0.3 dB 3 dB to 6 dB 0.75 1 1.25 VIN = 1 VPP 5.5 6 6.5 Gain matching between Y, CVBS VIN = 1 VPP inputs -0.5 0 Gain at RGB outputs VIN = 1 Vpp, gain = 6 dB Gain matching between R, G, B GRGBSTEP Step of gain Gain on Y,/CVBS channels DCOUT DC output voltage Bottom sync pulse DPHI Differential phase VIN = 1 VPP at 4.43 MHz Differential gain VIN = 1 VPP at 4.43 MHz Mute Mute suppression VIN = 1 VPP at 5 MHz on one point LNL Luminance non-linearity VSN Video S/N Ratio DG Unit 10 GRGB GYCVBSM Max 5 Output resistance GYCVBS Typ VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150Ω ROUT GRGBM Min e t e l o s b dB V 1 5 ° deg. 1 5 % -55 dB 0.3 -O Refer to note below ) s ( ct dB du 0.5 o r P 0.6 ) s ( ct dB 3 % 65 dB Note: S/N = 20 log (VOUT black to white = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567). 2.5 Chroma section characteristics u d o r P e TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω, unless otherwise specified. t e l o Table 8. Symbol s b O VDCIN Chroma section characteristics Parameter Test conditions Min DC input level 30 Typ Max Unit 3 V 50 kΩ 2 pF RIN Input resistance CIN Input capacitance VIN Max input signal 1.5 VPP DYN Dynamic output signal 3 VPP DCOUT DC output VCR voltage CBW Chroma bandwidth CIN = 1 VPP at -3 db CTi Crosstalk isolation between input channel VIN = 1 VPP at 4.43 MHz on one input 10 2.2 V 15 MHz 55 dB 13/32 Electrical characteristics Table 8. STV6414A Chroma section characteristics (continued) Symbol Parameter Test conditions CTo Crosstalk isolation between output channel VIN = 1 VPP at 4.43 MHz on one input, RLOAD = 150 Ω ROUT Output resistance GOUTC Gain at OUTC VIN = 1 Vpp GCM Gain matching between C inputs VIN = 1 VPP Mute Mute suppression VIN = 1 VPP at 4.43 MHz on one 55 input CToYdel Chroma to luma delay, source Y/C VPP at 4.43 MHz Output impedance when switched to ground 2.7V applied to COUT_VCR with series 75Ω Resistor ZCOUT_V CR 2.6 Min Typ Max 50 Unit dB 5 10 W 5.5 6 6.5 dB -0.5 0 0.5 dB dB ) s ( ct 20 u d o 2 ns W r P e Blanking section t e l o TAMB = 25 °C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10 kΩ, RLOUTV = 150 Ω, unless otherwise specified. Table 9. Symbol Slow blanking section Parameter Test conditions s ( t c Input mode SLBlow Input low level threshold SLBhigh Input high level threshold IIN Input current Output mode e t e l )- s b O u d o Pr Min Typ Max Unit 2.5 3.25 4 V 7.5 8.25 9 V 50 100 µA SLBlow Output low level (int. TV) 0 0.02 1.5 V SLBmed Output medium level (ext. 16/9) 5 5.75 6.5 V SLBhigh Output high level (ext. 4/3) 10 11 12 V Min Typ Max Unit 0.4 0.7 0.9 V 2 10 µA 0.5 V 3.8 V o s b O Table 10. Symbol Fast blanking section Parameter Test conditions Input mode FBlow/high Input low/high level threshold IIN Input current Output mode FBLOW Output Low Level FBHIGH Output High Level 14/32 RLOAD = 150 Ω 3.0 3.4 STV6414A Table 10. Symbol Electrical characteristics Fast blanking section (continued) Parameter Test conditions FBDEL Fast Blanking RGB delay At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum FBTRANS FB Transitions at FB output Rise Time Fall Time CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% Table 11. Min Typ Max Unit 15 ns 10 10 ns ns ) s ( ct Interrupt output Symbol Parameter Test conditions IT-Leak High level leakage External pull-up to 5 V IT-Low Output low level (active) IIN = 0 mA IIN = 1 mA Min Typ Max du 10 o r P 0.3 0.7 Unit µA V V Note: The interrupt is forced low when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. It is released when the I²C bus register is read. Table 12. Address selection input Symbol Parameter ) (s t c u ADDsel_ Address selection high level H d o r Leakage current s b O Test conditions ADDsel_ Address selection low level L ILEAK e t e ol Min 2.5 Typ Max Unit 0 0.2 V VDD V 10 µA P e t e l o s b O 15/32 Electrical characteristics 2.7 STV6414A I²C bus characteristics TAMB = 25°C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V, RLOUTA = 10kΩ, RLOUTV = 150Ω, unless otherwise specified. Table 13. Symbol I2C bus characteristics Parameter Test conditions Min Typ Max Unit SCL VIL Low level input voltage -0.3 1.5 V VIH High level input voltage 2.3 5.5 V ILI Input leakage current fSCL Clock frequency tR Input rise time 1.5 V to 3 V tF Input fall time 1.5 V to 3 V CI Input capacitance VIN = 0 to 5.5 V -10 u d o 1 Low level input voltage VIH High level input voltage ILI Input leakage current CI Input capacitance tR Input rise time tF Input fall time VOL Low level output voltage tF Output fall time CL Load capacitance µs 10 pF -0.3 1.5 V 2.3 5.5 V 10 µA 10 pF 1.5 V to 3 V 1 µs 3 V to 1.5 V 300 ns IOL = 3 mA 0.4 V 3 V to 1.5 V 250 ns 400 pF bs O ) o r P kHz ns VIN = 0 to 5.5 V -10 s ( t c du Pr µA 300 e t e ol VIL ) s ( ct 10 400 SDA e t e ol 0 0 Timing: SCL frequency = 400 kHz Clock low period 1.3 µs clock high period 0.6 µs Data setup time 100 ns tHD,DAT Data hold time 0 tSU,STO Setup Time from clock high to stop 0.6 µs tBUF Start setup time following a stop 1.3 µs tHD,STA Start hold time 0.6 µs tSU,STA Start setup time following clock low to high transition 0.6 µs tLOW s b O tHIGH tSU,DAT 16/32 340 ns STV6414A Figure 6. Electrical characteristics I²C bus timing SDA tBUF tF tLOW SCL tHD,STA tR tHD,DAT tHIGH tSU,DAT ) s ( ct SDA tSU,STA (start, stop) u d o tSU,STO r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 17/32 I²C bus selection 3 STV6414A I²C bus selection Data transfers follow the usual I²C format; that is, after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC’s I²C bus decoder enables the automatic incrementation mode in write mode. The circuit operates at clock frequencies of up to 400 kHz. Table 14. String format ) s ( ct Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) S SLAVE ADDRESS Table 15. SUB-ADDRESS SLAVE ADDRESS Table 16. S A 1 DATA A6 A5 A4 Value 1 0 0 0 A s ( t c SUB-ADDRESS A3 bs O ) Auto increment mode A e t e ol Slave address Address SLAVE ADDRESS A A A DATA0 A Sub-Address 1 DATA1 P u d o Read only mode S Table 17. 0 Pr DATA A P A2 A1 A0 0 1 X A .... Sub-Address +1 DATAn A P Sub-Address + N u d o 3.1 I²C bus addresses r P e Write Address: 1001 0110 = 96(hex), Read Address: 1001 0111 = 97(hex) t e l o Table 18. bs Reg add (hex) O Input signal summary (write mode) d7 Data d6 d5 d4 d3 d2 d1 d0 Audio 00h TV Stereo Mono TV 0/6 dB TV Volume-62 dB to 0 dB - 2 dB steps 01h VCR Stereo Mono Not Used (See Note) VCR Audio Switch Control Video 18/32 CINCH Audio Gain Soft Volume Mode TV/CINCH Audio Switch Control STV6414A Table 18. I²C bus selection Input signal summary (write mode) (continued) Data Reg add (hex) d7 d6 d5 d4 d3 d2 02h VCR chroma muted TV VCR video and chroma switch control chroma muted 03h RGB and FB tri-state RGB gain d1 d0 TV video and chroma switch control RGB switch control Fast blanking mode/input selection Miscellaneous LPF enable SLB mode IT enable 05h VCR slow blanking TV slow blanking ENC audio input gain 0/6/9 dB Not used (see Note) CINCH outputs Not used (see Note) 06h TV outputs u d o VCR R/C ENC R/C sub clamp sub clamp r P e Standby VCR outputs ) s ( ct TV R or C Not used Not used output (see Note) (see Note) selection VCR-C output control 04h t e l o TV inputs VCR inputs ENC inputs s b O Note: At register address 06h, bits marked “Not used” must be set to “1”. All other bits from all other registers marked “Not used” must be set to “0”. Table 19. TV audio output Reg add (hex) bs ct Bits d7 d6 d5 Data Comments d4 d3 d2 d1 d0 u d o 1 X X X X X X X X X X X X X X 0 1 Active Disabled 5 X X X X 0 1 0 1 0 1 0 1 0 1 X X 0 dB -62 dB (-2 dB/step) 6 dB extra gain 1 X X 0 1 X X X X X X X X X X X X 0 dB +6 dB TV stereo or mono mode 1 0 1 X X X X X X X X X X X X X X 0 = stereo 1 = mono Soft volume change Level adjustment r P e t e l o 00h O Description ) (s 19/32 I²C bus selection Table 20. Reg add (hex) 01h STV6414A Audio selection and VCR audio output Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Muted Encoder L/R selected VCR L/R selected Not allowed TV L/R selected Not allowed Not allowed Not allowed TV & CINCH audio output selection 3 X X X X X X X X CINCH audio gain 1 X X X X X X X X 0 1 X X X X X X 0 dB Follow TV gain VCR audio output selection 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Muted Encoder L/R selected TV L/R selected Not allowed VCR stereo or mono mode 1 0 1 X X X X X X X X X X X X 0 = stereo 1 = mono O ) s ( t c u d o r P e t e l o s b O 20/32 u d o r P e let o s b ) s ( ct X X STV6414A Table 21. Reg add (hex) I²C bus selection TV and VCR video selection Data Description Bits Comments d7 TV video output selection 3 TV chroma output control 1 d6 d5 d4 d3 d2 3 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 X X X X X X X X 0 1 X X X X X X Chroma defined by d2d1d0 Chroma force to mute P e X X X X X X X X 1 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 X X X X ) (s t c u d o r VCR chroma output control d0 Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR Not allowed Not allowed Not allowed Not allowed 02h VCR video output selection d1 0 1 0 1 0 1 0 1 X X X X X X X X X X X X u d o r P e t e l o s b O ) s ( ct X X X X X X X X X X X X X X X X X X X X X X X X Y/CVBS muted & chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & chroma muted Not allowed Not allowed Not allowed Not allowed X X X X X X Chroma defined by d6d5d4 Chroma force to mute t e l o s b O 21/32 I²C bus selection Table 22. Reg add (hex) STV6414A RGB and fast blanking outputs Data Description Bits Fast blanking control RGB selection 03h Comments d7 d6 d5 d4 d3 d2 d1 d0 2 X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 FB forced to low level FB forced to high level FB from Encoder FB from VCR 2 X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X Muted RGB_ENC selected RGB_VCR selected Not allowed 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X +6 dB gain +5 dB gain +4 dB gain +3 dB gain 1 X X 0 1 X X X X X X X X X X X X +0 dB extra gain +3 dB for weak input signals 0 X X X X X X X 1 X X X X X X X RGB gain RGB and FB control Table 23. Reg add (hex) Miscellaneous control ) (s r P e t e l o s b O RGB and FB outputs high impedance state RGB and FB outputs active d7 d6 d5 d4 d3 d2 d1 d0 1 X X X X X X X X X X 0 0 0 0 0 1 Red signal selected Chroma signal selected 2 X X X X X X X X Not used C_VCR output control 2 X X X X X X X X X 0 0 1 0 1 X 0 0 0 0 0 0 X X X Grounded Tri-state mode (high impedance) Active Low pass filters control 1 X X X X 0 1 X X X X 0 0 0 0 X X LPF enabled LPF disabled Slow blanking mode 1 X X 0 1 X X X X X X 0 0 0 0 X X Normal mode SLB TV is driven by SLB VCR IT enable 1 0 1 X X X X X X X X 0 0 0 0 X X No iterrupt flag IT enable u d o Pr e t e ol Not used Bits Data Comments 04h 22/32 u d o ct Description R/C TV output selection s b O 1 ) s ( ct STV6414A Table 24. Reg add (hex) I²C bus selection Slow blanking and inputs control Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Encoder R/Csub clamp 1 X X X X X X X X X X X X X X 0 1 Bottom level clamp Average level clamp VCR R/Csub clamp 1 X X X X X X X X X X X X 0 1 X X Bottom level clamp Average level clamp Encoder input level adjustment 2 X X X X X X X X X X X X 0 0 1 0 1 0 X X X X X X 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 2 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 05h Slow blanking TV SCART Slow blanking VCR SCART ) (s u d o r P e t e l o s b O ) s ( ct t c u d o r P e t e l o s b O 23/32 I²C bus selection Table 25. STV6414A Standby modes Data Reg add (hex) Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 ENC inputs 1 1 1 X X X X X X 1 1 X X X X 0 1 Inputs active Inputs disabled VCR inputs 1 1 1 X X X X X X 1 1 X X 0 1 X X Inputs active Inputs disabled TV inputs 1 1 1 X X X X X X 1 1 0 1 X X X X Inputs active Inputs disabled 1 1 1 X X X X 0 1 1 1 X X X X X X Audio & video outputs ON Audio & video outputs OFF VCR outputs 06h CINCH outputs TV outputs 1 1 1 X X 0 1 X X 1 1 1 1 1 0 1 X X X X 1 1 1 1 Full stop d o r Description X X t e l o X X X X X X Audio & video outputs ON Audio & video outputs OFF 1 1 1 Only I²C bus and slow blanking detection parts are supplied. P e Data Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Slow blanking TV SCART let 2 X X X X X X X X X X X X X X X X X X 0 1 1 1 0 1 Input < 2 V Input 16/9 format Input 4/3 format Slow banking VCR SCART 2 X X X X X X X X X X X X 0 1 1 1 0 1 X X X X X X Input < 2 V Input 16/9 format Input 4/3 format X X X X X X 0 1 X X X X X X X X o s b Interrupt flag 24/32 1 r P e X X X X Output signals (read mode) Reg add (hex) Note: 1 u d o Audio & video outputs ON Audio & video outputs OFF s b O t c u Table 26. O ) (s 1 ) s ( ct 1 No change since read One change has been detected (refer to Note) The interrupt flag will be cleared when this register is read. To prepare for a new interrupt, a “1” must be re-written in the IT Enable bit (Reg. 04, d7). STV6414A Input/output groups 4 Input/output groups Figure 7. Bottom clamped video inputs (pins Figure 8. 2, 4, 6, 12, 14, 18, 21, 62, and 64) Average clamped video inputs (pin 8) VCC 5 V VCC 5 V VCC 5 V VCC 5 V IB 25 kΩ 2 V + VD 25 kΩ 3V ) s ( ct 15 kΩ u d o tri tri Protected pad Figure 9. r P e Protected pad R/C clamped video inputs (pins 10 and 60) t e l o Figure 10. Fast blanking output (pin 49) bs VCCB1 5 V VCC 5 V O ) s ( t c R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. u d o r P e Protected pad t e l o Figure 11. Fast blanking inputs (pins 50 and 51) s b O Figure 12. Video outputs (pins 36, 38, 40, 42, 44, 46, and 48) VCCB1,2 ...5 5V VCC 5 V VDD 5 V ib tri Protected Pad Protected pad Protected pad 25/32 Input/output groups STV6414A Figure 13. Audio inputs (pins 7, 9 11, 13, 19, 20, 22, and 23) Figure 14. Audio outputs (pins 27, 28, 29, 30, 32, 33, and 35) I2 V 12 V 9 kΩ 24 kΩ 13 kΩ 8 kΩ 2 kΩ IB 32 kΩ 24 kΩ Protected pad ) s ( ct Protected pad VREF Figure 15. Slow blanking I/O (pins 59 and 61) u d o Figure 16. Interrupt output (pin 58) r P e VDD 5 V 110 kΩ ) (s t c u d o r Figure 17. Trap filter (pin 34) P e let VCCB5 5 V o s b 1 kΩ s b O 40 Ω Protected pad Protected pad 55 kΩ Figure 18. I²C bus (SDA) (Pin 56) VCC 5 V VDD 5 V Float 100 Ω 10 kΩ O Protected pad Protected pad 26/32 Float t e l o 12 V STV6414A Input/output groups Figure 19. I²C bus (ADD) (pin 54) VDD 5 V Figure 20. I²C bus (SCL) (pin 55) VDD 5 V Float Float 10 kΩ 10 kΩ Protected pad ) s ( ct Protected pad u d o Figure 21. Power supply connection VCCB1 VCCB2 5V 47 45 VCCB3 VCCB4 VCCB5 5V 43 39 VCC 5V 37 1 5V VCCA0 12 V VCC1 31 12 V VCCA 24 r P e 12 V 63 12 V 5V VDD 53 5V t e l o 41 5 GNDB GNDV 17 ) (s GNDref s b O 25 57 GNDA GND t c u d o r P e t e l o s b O 27/32 Application diagram STV6414A 5 Application diagram Note: The application diagram presented here is an example only and is subject to change without notice. The real application diagram will depend on application conditions and constraints. Figure 22. STV6414A application diagram ) s ( ct u d o r P e t e l o ) (s t c u STV6414A d o r P e t e l o s b O B 28/32 s b O STV6414A Package mechanical data 6 Package mechanical data Figure 23. 64 pin, LQFP64 (low-profile quad flat package) 10 x10 x 1.4 mm Seating plane ) s ( ct u d o r P e t e l o Pin 1 identification ) (s d o r LQFP64 package dimensions Dimension P e let so b O Gage plane t c u Table 27. A s b O Minimum Millimeters Typical Inches Maximum Minimum Typical 1.60 A1 0.05 A2 1.35 b 0.17 c 0.09 Maximum 0.063 0.15 0.002 1.40 1.45 0.053 0.055 0.057 0.22 0.27 0.006 0.008 0.010 0.20 0.003 ccc 0.005 0.0078 0.08 0.0031 D 11.80 12.00 12.20 0.464 0.472 0.48 D1 9.80 10.00 10.20 0.385 0.393 0.401 D3 7.50 0.295 E 11.0 12.00 12.20 0.464 0.472 0.480 E1 9.80 10.00 10.20 0.385 0.393 0.401 29/32 Package mechanical data Table 27. STV6414A LQFP64 package dimensions (continued) Millimeters Inches Dimension Minimum Typical Maximum Minimum Typical E3 7.50 0.295 e 0.50 0.019 L 0.45 0.60 L1 0.75 0.017 0.023 Maximum 1.00 0.029 0.039 ) s ( ct Degrees K 6.1 0° minimum 3.5° typical 7° maximum u d o Lead-free packaging r P e To meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. t e l o s b O ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. ) (s t c u d o r P e t e l o s b O 30/32 STV6414A Revision history Revision history Table 28. Document revision history Date Revision 26-Jun-2008 1 Changes Initial release ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 31/32 STV6414A ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. 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