Application Report

SLEA038 – July 2004

Implementation of Power Supply Volume Control

Tomas Bruunshuus Texas Instruments Copenhagen

ABSTRACT

This document gives design guide lines for applications using the power supply volume control (PSVC). The power supply volume control increases system performance by:

• Volume can be decreased without loss of audio resolution, in the range where PSVC is active.

• When supply voltage for PVDD is decreased, the noise voltage at the output decreases as well. The ratio between noise voltage and maximum RMS voltage (DNR) then increases.

The user experiences better noise performance at usual listening levels. E.g. a system having 102 dB in DNR and a power supply range of 18 dB will have a SNR up to 120 dB.

• Reduces power consumption and heat in the system at usual listening levels, thereby increasing the lifetime of the system.

• Many EMI tests are performed at a reduced volume setting. FTC requires 1/8 of maximum output power equal to a volume setting of -9 dBFS. By use of the PSVC operating voltage during EMI, the test will be reduced giving reduced switching noise in the system.

The PSVC is supported in Texas Instruments PWM processors like the TAS5508, which makes implementation easy. For other modulator types like the TAS5066 and TAS5076, the PSVC can also be implemented. However, on these devices all calculations and control must be handled by the micro controller.

This document gives design guidelines, how to implement PSVC correctly for the

TAS5508. To implement PSVC for other PWM processors like the TAS5066 and

TAS5076, contact the Texas Instruments digital audio applications team.

1

SLEA038

Contents

1 Introduction .....................................................................................................................................3

1.1

PSVC Advantages.....................................................................................................................3

1.2

PSVC Concept ..........................................................................................................................3

2 General Structure............................................................................................................................5

2.1

Examples of Gain Settings ........................................................................................................7

2.1.1

Gain Setting Within the PSU Range..............................................................................7

2.1.2

Gain Setting Higher Than the PSU Range ....................................................................7

2.1.3

Gain Setting Lower Than the PSU Range.....................................................................7

2.2

Power Supply Control................................................................................................................8

2.3

TAS5508 PSVC PWM Output ...................................................................................................9

2.4

Programming the TAS5508 for PSVC.....................................................................................10

3 Power Supply Implementation.....................................................................................................12

3.1

TAS5508 0% Duty Cycle Handling..........................................................................................12

3.2

Power Supply Sink / Source....................................................................................................13

4 DC/DC Converter Application Example ......................................................................................15

4.1

Implementation........................................................................................................................15

References.............................................................................................................................................16

Figures

Figure 1.

Digital and Power Supply Gain .........................................................................................4

Figure 2.

Resulting Gain ....................................................................................................................4

Figure 3.

Volume Calculation Flow Chart ........................................................................................6

Figure 4.

Control of the Power Supply .............................................................................................8

Figure 5.

PSVC PWM Pulse ...............................................................................................................9

Figure 6.

Configuration Using PWM .................................................................................................9

Figure 7.

PSVC Output of the TAS5508..........................................................................................10

Figure 8.

PSVC With Saturation ......................................................................................................12

Figure 9.

PSVC With Shutdown ......................................................................................................13

Figure 10.

Basic Schematic for a Buck Converter ..........................................................................13

Figure 11.

Buck Converter Using Synchronous Rectification .......................................................14

Figure 12.

Use of a Bleeder Resistor to Sink Current.....................................................................14

Tables

Table 1.

System Control Register 1 (0x03) ...................................................................................10

Table 2.

PSVC Range Register (0xDF) ..........................................................................................11

Table 3.

General Control Register (0xE0) .....................................................................................11

2 Implementation of Power Supply Volume Control

SLEA038

1 Introduction

Using a combination of digital gain and power supply to the control volume setting gives several advantages:

• Volume can be decreased without loss of audio resolution, in the range where PSVC is active.

• When supply voltage for PVDD is decreased, the noise voltage at the output decreases as well. The ratio between noise voltage and maximum RMS voltage (DNR) then increases.

The user experiences better noises performance at usual listening levels. E.g. a system having 102 dB in DNR and a power supply range of 18 dB will have an SNR up to 120 dB.

• Reduces power consumption and heat in the system at usual listening levels. Thereby increasing lifetime of the system.

• Many EMI tests are performed at reduced volume setting. FTC requires 1/8 of maximum output power equal to a volume setting of -9 dBFS. By use of PSVC, the operating voltage during EMI test will be reduced, giving reduced switching noise in the system.

With only a minimum extra complexity audio performance can be improved and EMI tests become easier to pass.

Speaker output voltage can at be calculated as:

V

SPEAKER

( t ) = d ( t ) ⋅ V

PSU

Where d is the duty cycle that varies according to the audio signal and V

PSU

is the power supply voltage. From this equation it can be seen that the output volume can be controlled from either the duty cycle or the power supply voltage. Note that when the output volume level is calculated in dB, the following formula is used:

V

SPEAKER

( dB ) = d ( dB ) + V

PSU

( dB )

Using this formula it becomes easier to calculate total output volume. The concept pf PSVC is to have the power supply to control from 0 dBFS to e.g. -24 dBFS and then use digital gain to control volume above 0 dBFS and below -24 dBFS. The lower crossover point (e.g. -24 dBFS) can be selected differently depending on the power supply configuration.

Implementation of Power Supply Volume Control 3

SLEA038

Power Supply Volume Control

0

-10

-20

-30

-40

30

20

10

-50

-60

-80 -70 -60 -50 -40 -30 -20 -10 0

Digital Gain

Gain (dB)

Power Supply Gain

10 20 30

Figure 1. Digital and Power Supply Gain

Figure 1 shows gain settings for both digital circuits and a power supply at different desired gains. The resulting gain (or volume level) is the two gains, digital and power supply gain, added together. This is shown in Figure 2 according to the previous formula.

Power Supply Volume Control

0

-20

60

40

20

-40

-60

-80

-100 -80 -60

Digital Gain

-40 -20

Desired Gain (dB)

0

Power Supply Gain

20 40

Digital Gain

60

Figure 2. Resulting Gain

The resulting gain is linear to the desired gain, where the power supply controls the gain from

-24 dBFS to 0 dBFS.

4 Implementation of Power Supply Volume Control

SLEA038

Note that minimum power supply gain (lower crossover point of -24 dBFS) must be selected different depending on the power supply capability, e.g. -18 dBFS or -12 dBFS.

To set the volume correctly, the volume setting must be split into a digital gain setting and a power supply gain setting. Care must be taken to get these calculations right. Especially the calculations at the two crossover points can cause non linear volume control if not done correctly. The TAS5508 automatically calculates settings for digital gain and power supply gain.

A flow chart to calculate volume settings is shown in Figure 3. The principle is to set the power supply volume according to the channel having the highest volume setting and then recalculate gain setting for the digital circuits. The TAS5508 uses a sequence based on this flow chart to calculate gain settings for digital gain and power supply gain.

Implementation of Power Supply Volume Control 5

SLEA038

Channel1_volume

Channel2_volume

.

.

Channel n_volume

Find Channel with highest volume setting - channel_x

Calculate PSU setting for channel_x

Higher

PSU_volume = 0 dB

Is PSU setting within PSU range

Within range

Lower

PSU_volume = min. dB

Calculate digital gain as:

Channel1_digital = Channel1_volume - PSU_volume

Channel2_digital = Channel2_volume - PSU_volume

.

.

Channel n_digital = Channel n_volume - PSU_volume

Figure 3. Volume Calculation Flow Chart

6 Implementation of Power Supply Volume Control

SLEA038

2.1 Examples of Gain Settings

The following examples are for a three channel system. The power supply can be controlled from -18 dB to 0 dB.

2.1.1 Gain Setting Within the PSU Range

System requirement settings:

Channel1_volume = -14 dB

Channel2_volume = -28 dB

Channel3_volume = -22 dB

Channel 1 is found to have the highest volume setting of -14 dB. The PSU_volume is then set to

-14 dB.

Digital gain is then calculated as:

Channel1_digital = -14 dB – (-)14 dB = 0 dB

Channel2_digital = -28 dB – (-)14 dB = -14 dB

Channel3_digital = -22 dB – (-)14 dB = -8 dB

2.1.2 Gain Setting Higher Than the PSU Range

System requirement settings:

Channel1_volume = -14 dB

Channel2_volume = 4 dB

Channel3_volume = -22 dB

Channel 2 is found to have the highest volume setting of +4 dB. The PSU_volume is then set to

0 dB, which is highest setting for the power supply.

Digital gain is then calculated as:

Channel1_digital = -14 dB – 0 dB = -14 dB

Channel2_digital = 4 dB – 0 dB = 4 dB

Channel3_digital = -22 dB – 0 dB = -22 dB

2.1.3 Gain Setting Lower Than the PSU Range

System requirement settings:

Channel1_volume = -28 dB

Channel2_volume = -28 dB

Implementation of Power Supply Volume Control 7

SLEA038

Channel3_volume = -22 dB

Channel 3 is found to have the highest volume setting -22 dB. The PSU_volume is then set to

-18 dB, which is lowest setting for the power supply.

Digital gain is then calculated as:

Channel1_digital = -28 dB – (-)18 dB = -10 dB

Channel2_digital = -28 dB – (-)18 dB = -10 dB

Channel3_digital = -22 dB – (-)18 dB = -4 dB

2.2 Power Supply Control

The output voltage of the power supply PVDD is controlled by adjusting the reference voltage.

The control loop in the power supply uses this reference voltage to regulate the output. When the reference voltage is changed, PVDD will change accordingly.

PVDD

Feed Back

SMPS

-1

DC reference

Figure 4. Control of the Power Supply

The reference voltage must be controlled from the TAS5508. If the reference voltage is an analog voltage that has to pass from the TAS5508 at the amplifier board to the power supply board, the output voltage of the power supply will be erroneous. The voltage may drop when crossing from one board to the next. This makes the volume setting inaccurate. Also, if noise or hum is injected into the reference voltage, this noise will be coupled into the power supply output and then into the speaker output.

This is solved in the TAS5508 by using a PWM signal instead of an analog reference voltage.

8 Implementation of Power Supply Volume Control

SLEA038

Lowest Power Supply

Voltage Pulse

Maximum Power Supply

Voltage Pulse

Figure 5. PSVC PWM Pulse

The PSVC PWM pulse has a duty cycle corresponding to the power supply volume setting. The advantage is that all volume information is independent of the voltage level. This means that any voltage drop can be compensated by reclocking the PWM signal at the power supply board.

PWM pulses are then converted to the analog reference voltage through a low-pass filter.

PVDD

Feed Back

SMPS

-1

Reference

100 nF

10 k Ω

1 k Ω

1 uF

PSVC PWM

74LVC126

Figure 6. Configuration Using PWM

The PSVC PWM frequency must be above 20 kHz to insure that no audible leftovers from PSVC

PWM are coupled into the speaker outputs.

2.3 TAS5508 PSVC PWM Output

When PSVC is enabled, the TAS5508 generates a PWM signal at a frequency of 44.1 kHz or

48 kHz. The PWM frequency is synchronized to the LRCLK of the I2S.

Implementation of Power Supply Volume Control 9

SLEA038

Lowest Power Supply voltage Pulse > 120 out of

2048

Maximum Power Supply

Voltage

Pulse =

1944 out of 2048

Figure 7. PSVC Output of the TAS5508

The output has a maximum duty cycle of 95% corresponding to 0 dBFS and a minimum duty cycle of 6% corresponding to -24-dB attenuation.

Note that during start up, error recovery, and reset the duty cycle is 0%, 0 V. This can be changed by programming system control register 1 (0x03).

Table 1. System Control Register 1 (0x03)

D7 D6 D5 D4 D3 D2 D1 D0 Function

0 - - - - - - - PWM Disabled

1 - - - - - - - PWM Enabled

- - - - 1 - - - PSVC Enable

- - - - 0 - - - PSVC Disable

D0 to D2 is unused bits.

If D3 bit is set high, the PSVC output will go into Hi-Z during error recovery. This is however not recommended, since this interferes with the reclocking gate at the power supply board, causing

PVDD voltage to be too high. For most applications, PSVC Hi-Z must remain disabled.

The function of D4 to D7 is not covered in this document, see Reference 1.

2.4 Programming the TAS5508 for PSVC

The TAS5508 modulator has a PWM output for the power supply control. This provides an easy implementation of the PSVC. The modulator does all calculations to get the correct volume setting and generates the PSVC PWM pulse required at a frequency of 44.1 kHz or 48 kHz, depending on the audio sample rate.

10 Implementation of Power Supply Volume Control

SLEA038

The TAS5508 can be configured to provide PSVC with 12.04-dB, 18.06-dB, or 24.08-dB attenuation of the power supply. The attenuation level should be selected as high as possible.

The limiting factor is that the power supply must remain stable at all power levels. Some power supplies can have difficulties when regulating over a wide voltage range. Hence, the PSVC range must be selected smaller.

The PSVC control range is set in register 0xDF.

D31 – D2

0

0

0

0

0

0

Table 2. PSVC Range Register (0xDF)

D1

0

0

1

D0

0

1

0

Function

12.04-dB control range for PSVC

18.06-dB control range for PSVC

24.08-dB control range for PSVC

Subwoofer configuration must be selected. In case that the subwoofer output is a line output, the digital volume setting is not to be affected when setting the power supply volume.

This is done in register 0xE0. This register also enables/disables the PSVC.

D31 – D4

0

0

0

0

0

0

0

Table 3. General Control Register (0xE0)

0

1

D3

-

-

0

1

D2

-

-

-

-

-

-

D1

0

1

D0 Function

/8 Channel Configuration

6 Channel configuration

Power Supply Volume Control Disable

Power Supply Volume Control Enable

Subwoofer Part of PSVC

Subwoofer Separate from PSVC

The D1 bit is used to select between eight channel configuration and six channel configuration.

This item is not covered in this document.

The D2 bit is used to enable/disable PSVC. Default is disabled. When PSVC is disabled, the output of PSVC is 0. All volume control is performed using digital gain only. Enabling of the

PSVC starts the PSVC PWM. The TAS5508 automatically calculates the volume setting for the power supply and digital volume for all channels based on the flow chart shown in Figure 3.

If D3 is set to 1, the subwoofer channel (channel 8) is not included in the PSVC, only digital volume is used. This is needed if the subwoofer output is a line out (e.g. a 7.1 system using active subwoofer).

Implementation of Power Supply Volume Control 11

SLEA038

3 Power Supply Implementation

3.1 TAS5508 0% Duty Cycle Handling

As discussed in the previous section, the TAS5508 during start up and error recovery has a

PSVC output of 0% duty cycle. The power supply must then be able to handle this situation properly. When the reference voltage to the power supply is 0 V, PVDD will also be 0 V if no special arrangements are made.

NOTE: Texas Instruments power stages can handle PVDD being 0 V, since no audio is present during these events. Texas Instruments power stages does not need protection against PVDD =

0 V. However, the power supply must not be damaged nor become unregulated during these events.

If the power supply cannot handle a 0-V output, the following arrangements can be made:

PVDD

Feed Back

SMPS

-1

Reference

100 nF

10 k Ω

1 k Ω

1 uF

74LVC126

PWM ref

Figure 8. PSVC With Saturation

Figure 8 shows a power supply implementation, where PVDD is kept at a minimum voltage when PWM is 0%. The voltage is set by a resistor divider and the forward drop of the diode.

Another way of controlling 0% situation is to shut down the power supply when the duty cycle falls below a given level. This is shown in Figure 9.

12 Implementation of Power Supply Volume Control

SMPS

SLEA038

PVDD

Feed Back

-1

Reference

100 nF

10 k Ω

1 k Ω

1 uF

74LVC126

PWM ref

/shutdown

74LVC126

10 nF

10 k Ω

Figure 9. PSVC With Shutdown

3.2 Power Supply Sink / Source

Most power supplies are only capable of sourcing current. This is due to implementation of the rectifying circuit on output. In most cases, this is done by using a rectifying diode.

Figure 10 shows basic components for a buck converter. The buck converter creates an output voltage (PVDD) lower than its input voltage (V

I

). It can be seen that current can only flow out of the converter due to the direction of the diode and since the input voltage is higher than the output voltage, no current can flow from the PVDD to V

I only happen by loading the output.

. Decreasing of the output voltage can

Current

Source

V

I

PVDD

Figure 10. Basic Schematic for a Buck Converter

Implementation of Power Supply Volume Control 13

SLEA038

When using PSVC, this can cause a problem when ramping down volume. When the volume is ramped down, the PVDD voltage must decrease. If the power supply can only source current, only the amplifier load can decrease the PVDD voltage. This causes an uncontrolled ramp down of the volume.

To make the power supply able to sink current as well, one of following solutions is recommended.

Use of synchronous rectification. The basic theory is to replace the rectifying diode with a controlled MOSFET. A controlled MOSFET has the advantage to allow current in both directions when turned on. Actual implementation of a synchronous rectification depends on the power supply topology. Figure 11 shows an example of synchronous rectification for a buck converter.

Current Sink/Source

V

I

PVDD

Figure 11. Buck Converter Using Synchronous Rectification

Use of bleeder resistor. A resistor can be placed at the PVDD output to bleed down the output voltage. In order not to decrease efficiency, this resistor must be connected through a switch or a transistor. The bleeder resistor will then only be active when needed.

Figure 12 shows how a controlled bleeder resistor can be used to decrease the output voltage.

The bleeder resistor is turned on by the switch when the PVDD voltage is too high.

Current

Source

V

I

PVDD

Current

Sink

14

Figure 12. Use of a Bleeder Resistor to Sink Current

Implementation of Power Supply Volume Control

SLEA038

4 DC/DC Converter Application Example

The following application example is a dc/dc converter optimized for the full advantage of the

TAS5508. The converter is designed for:

• Input voltage 50 V to 55 V

• Output voltage 2 V to 40 V, giving the full 24.08-dB attenuation provided by the TAS5508

• Current limitation level set to 12 A

4.1 Implementation

The power supply is designed with the possibility to use remote voltage sensing, which improves audio performance, see Reference 2. The output voltage is sensed through a separate connector J704 pin 2. The voltage can then be sensed at the amplifier board eliminating impedances in wires and connectors.

For using the PSVC, a jumper must be placed at J703 between pin 1 and pin 2. If a manual voltage setting is required, the jumper must be placed between pin 2 and pin 3.

The PWM input for power supply control from the TAS5508 is at J703 pin 5. The input has a pulldown resistor, R827, to insure that the output voltage drops to 0 V in case of loss of PWM input. To restore the PWM signal and adapt it to the power supply reference voltage, the PWM input is reclocked in an AND-gate, U703. This removes voltage drops and noise that might have been injected in the transmission from the modulator to the power supply. Converting the PWM signal level to the power supply reference voltage improves the accuracy of the output voltage.

The converter itself is a BUCK topology. Basic components can be identified as: C708, C710,

C711, and C712 as the input capacitor, Q706 and Q707, L704 and C725 plus capacitors at the amplifier board as the output capacitor. U706 is an integrated power supply controller.

Synchronous rectification is used in this application. Q707 is the synchronous rectifier instead of a diode. The dc/dc converter is then capable of transferring current from output side to the input side.

Since the dc/dc converter can be supplied from a rectified transformer output, there must be a bleeder at the primary side, to be able to sink current. The bleeder resistor is R707 and is controlled by Q701. Q701 is turned on by U701C, if the input voltage exceeds 65 V.

Implementation of Power Supply Volume Control 15

SLEA038

References

1. TAS5508 – 8 Channel Digital Audio PWM Processor (SLES091)

2. Power Supply Considerations for A/V Receivers (SLEA028)

16 Implementation of Power Supply Volume Control

B

A

4 3 2 1

No.: 49

PSU Input voltage filter

J701

1 2 VIN-POS

R701

10R

C701

100n

C702

10n

0

J702

1 2 VIN-NEG

R702

10R

C703

100n

J705

1

2

3

4

0 connector4

C704

10n

0

C705

L701

1u

1000u

L702

1u

R700

10R

C706

100n

C707

10n

+12V

C782

100n

0

C780

47u

0

C781

100n

0

+5V

C783

47u

0

C708

1000u

C710

1000u

C711

1000u

C712

VIN

1000u

VIN-RTN

No.: 48

PSU Input voltage bleeder

R703

120k

R704

10k

VIN

R705

220k

9

U701C

3

+

V+

C713

220p 8

-

LM339

V-

12

C714

100n

14

+12V

VIN

R698

8k2

R706

2k7

R699

2k7

Q701

IRF540

VIN-RTN

R707

82R

1

D701

BAV70

2

R708

3

10k

R709

100k

C715

47u

C716

100n

R710

8k2

R711

470k

+12V

11

10

+

-

V+

V-

12

3

13

U701D

LM339

R712

10k

VIN-OV

0

+5VREF

+5VREF

No.: 47

PSU Power stage

VIN

+12V

R723

3R3

R713

20k R722

20k

R720

4k7

R721

4k7

C717

22p

RUN

R714

10k

0

PSU-PWM

1

3

Q703

2

C718

Q704

1

3

0

R715

100R

R716

47k

R719

47k

R717

22p

20k

2

R718

10k

0

0

1

Q712

3

2

0

C719

22p

R697

20k

0

C720

22p

0

1

3

Q705

2

0

8

LO

7

Vss

6

LI

5

HI

U702

Vdd

1

HB

2

HO

3

HS

4

HIP2100

L703

75nH

3R3

R724

C722

100n

220n

C721

R725

0R

Q706

IRF540

Q707

IRF540

VIN-RTN

C723

10n

C724

10n

R726

2R7

R727

2R7

R696

2R7

R695

2R7

L704

57uH / T131-8/90

C728

NU

R728

NU

R729

0R018

R730

0R018

C725

1000u

+I-sense

-I-sense

+VPWR

R731

10R

C726

100n

0

C727

10n

+12V

+5V connector4

J707

1

2

3

4

1

2

3

4

J706 connector4

No.: 46

PSU Controler

3

RUN

1

BAV70

R820

D708

2

R821 120k

C745 0

+12V

+5VREF

0

R744

510R

PSU-PWM

C741

0

1nF

R745

5k6

C743

100n

100k

U706

24

SHARE

UC3849DW

ADJ

1

23

OSC

R742

100R

22

RDEAD

0 R743

21

RT

7k5

20

CLKSYN

0

19

VEE

18

GND

ILIM

VA-

VA+

VAO

2

3

4

5

0

17

16

15

14

13

OUT

VCC

RUN

VREF

KILL

CA-

6

CAO

7

CS+

8

CS-

9

CSO

10

ENBL

11

SEQ

12

C744

100n

TP-PSU 0 0

R822

100R

0

100n

0

C746

100p

VA-

C747

22p

VAO

C749

22p

C751

220p

C748

1n

R746

270k

CA-

R747

27k

C750

4n7

CS-

R749

3k3

R751

5k6

R752

5k6

R753

1k0

0

R748

8k2

CS+

C752

100n

0

R750

82R

C756

220p

0

0

0

D704

BAV70

C755

100p

R760

5k6

C753

0

10u

0

0

+V-sense

R755

1k0

D705

BAV70

10k

27k

R756

R763

R761

8k2

C758

220n

R754

1k8

0

R758

510R

R759

510R

R762

1k5

+5VREF

1k5

R757

C754

10u

+I-sense

-I-sense

+5VREF

VOLUME

VIN-OV

R823

100R

0

No.: 44

Temperature detector for PSU

+12V

R801

3k

C779

10n

R802

33k NTC

R794

82k

+12V

R798

33k

R799

10k

R795

1k

R797

1k

U701A

5

+

V+

3

4

-

LM339

V-

12

0

R796

82k

+12V

U701B

7

+

V+

3

6

LM339

-

V-

12

R800

30k

2

1

0

4

R792

10k

C778

100n

TW-PSU

+5VREF

R793

10k

TP-PSU

No.: 45

Remote sense, voltage control

D710

+V-sense

+VPWR

1 2

R824

100R

0

J704

5_pol_pow

1

2

3

4

5

1

2

3

4

5

R827

0

4k7

0

1

U703

A VCC

5

2

B

3

GND Y

4

+5VREF

0

C784

100n

VOLUME

J703

3

R825

2k

0

POT

R826

10k

2

TBLK-A/B/C/G

Texas Instruments Denmark A/S

TITLE

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DWG NO

SCALE NONE

DC/DC converter

2-40V max 12A

A706-SCH-001

2004-05-23

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Confidential

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IMPORTANT NOTICE

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.

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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products

Amplifiers

Data Converters

DSP

Interface

Logic

Power Mgmt

Microcontrollers amplifier.ti.com

dataconverter.ti.com

dsp.ti.com

interface.ti.com

logic.ti.com

power.ti.com

microcontroller.ti.com

Applications

Audio

Automotive

Broadband

Digital Control

Military

Optical Networking

Security

Telephony

Video & Imaging

Wireless www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

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