Portwell PEB-2738I Series User manual

PEB-2738I Series

Embedded System Board

User's Manual

Version 1.0a

Copyright © Portwell, Inc., 2010. All rights reserved.

All other brand names are registered trademarks of their respective owners.

Preface

Table of Contents

How to Use This Manual

Chapter 1 System Overview....................................................................................................... 1-1

1.1 Introduction.................................................................................................................................. 1-1

1.2 Check List ..................................................................................................................................... 1-2

1.3 Product Specification .................................................................................................................. 1-2

1.3.1 Mechanical Drawing ......................................................................................................... 1-5

1.4 System Architecture .................................................................................................................... 1-6

Chapter 2 Hardware Configuration ........................................................................................... 2-1

2.1 Jumper Setting.............................................................................................................................. 2-1

2.2 Connector Allocation .................................................................................................................. 2-3

Chapter 3 System Installation.................................................................................................... 3-1

3.1 Intel ATOM Processor Z500 CPU........................................................................................... 3-1

3.2 Intel System Controller Hub US15WP(T)................................................................................. 3-1

3.3 Main Memory............................................................................................................................... 3-2

3.4 Installing the Single Board Computer ...................................................................................... 3-2

3.4.1 Chipset Component Driver.............................................................................................. 3-2

3.4.2 Intel Integrated Graphics GMCH Chip .......................................................................... 3-3

3.4.3 Intel Gigabit Ethernet Controller..................................................................................... 3-3

3.4.4 Audio Controller ............................................................................................................... 3-3

3.5 Clear CMOS Operation............................................................................................................... 3-4

3.6 WDT Function.............................................................................................................................. 3-4

3.7 GPIO.............................................................................................................................................. 3-5

Chapter 4 BIOS Setup Information............................................................................................ 4-1

4.1 Entering Setup.............................................................................................................................. 4-1

4.2 Main Menu ................................................................................................................................... 4-2

4.3 Advanced...................................................................................................................................... 4-3

4.4 PCIPnP ........................................................................................................................................ 4-16

4.5 Boot.............................................................................................................................................. 4-18

4.6 Security ....................................................................................................................................... 4-22

4.7 Chipset ........................................................................................................................................ 4-23

4.8 Exit............................................................................................................................................... 4-27

Chapter 5 Troubleshooting ........................................................................................................ 5-1

5.1 Hardware Quick Installation ..................................................................................................... 5-1

5.2 BIOS Setting.................................................................................................................................. 5-1

5.3 FAQ ............................................................................................................................................... 5-4

Appendix A

System Memory Address Map

Appendix B

Interrupt Request Lines (IRQ)

Preface

How to Use This Manual

The manual describes how to configure your PEB-2738I to meet various operating requirements. It is divided into five chapters, with each chapter addressing a basic concept and operation of Single Board Computer.

Chapter 1 : System Overview. Presents what you have in the box and give you an overview of the product specifications and basic computer architecture.

Chapter 2 : Hardware Configuration. Shows the definitions and locations of

Jumpers and Connectors that you can easily configure your embedded board.

Chapter 3 : System Installation. Describes how to properly mount the CPU, main memory and Compact Flash to get a safe installation and provides a programming guide of Watch Dog Timer function.

Chapter 4 : BIOS Setup Information. Specifies the meaning of each setup parameters, how to get advanced BIOS performance and update new BIOS. In addition, POST checkpoint list will give users some guidelines of trouble-shooting.

Chapter 5 : Troubleshooting. Provides various useful tips to quickly get PEB-2738I running with success. As basic hardware installation has been addressed in Chapter

3, this chapter will basically focus on system integration issues, in terms of backplane setup, BIOS setting, and OS diagnostics.

The content of this manual is subject to change without prior notice. These changes will be incorporated in new editions of the document. Portwell may make supplement or change in the products described in this document at any time.

Updates to this manual, technical clarification, and answers to frequently asked questions will be shown on the following web site: http://www.portwell.com.tw/ .

System Overview

Chapter 1

System Overview

1.1 Introduction

Portwell Inc., a world-leading innovator in the Industrial PC (IPC) market and a member of the Intel® Embedded and Communications Alliance (Intel ECA), announced today the Portwell PEB-2738I utilizing the Intel® ECX form factor based on the Intel® Atom™ processor Z500PT series and the Intel® System Controller Hub

US15WPT. The new micro-architecture of the Intel® platform will provide a range of low power, wide temperature and fanless devices such as Panel PC, Kiosk, DS,

Medical, Military, Government and Industrial automation and control applications.

PEB-2738I is specifically designed to operate at a very low power consumption of less than 10 watts at full loading. It supports dual independent display by LVDS and

SDVO daughter card (DVI/VGA/LVDS, by request).

Based on the Intel® Atom™ processor Z500PT series platform, the PEB-2738I takes advantage of the processor’s very low power consumption, Ground-breaking power management techniques and wide temperature so it can be a truly industrial temperature and fanless configuration. In addition, the PEB-2738I supports DC 12V input, one SO-DIMM memory slot for DDR2 SDRAM up to 2GB, and comes with one IDE, one CompactFlash® socket, one SDVO connector (with one PCIE x1 and

USB signal), one gigabit Ethernet, two RS232, six USB2.0 and one SDIO connector.

PEB-2738I features: z

Intel® Atom™ processor Z500PT series and System Controller Hub US15WPT z One 200-pin SO-DIMM support DDR2 SDRAM up to 2GB z Dual independent display: SDVO(by VGA/DVI/LVDS daughter card) and

24bit LVDS z One Gigabit Ethernet z TPM (Trusted Platform Module) could be added on board (optional) z

Customization (Extension card): BTB connector with SDVO/USB/PCI-E x1 signal and SDIO pin header z

Storage: One PATA / One CompactFlash / One USB Flash / One SDIO z

12V DC input

PEB-2738I User’s Manual 1-1

System Overview

The PEB-2738I package should include the following items:

9

One PEB-2738I embedded system board

9 One 2-in-1 Heatsink

9 One IDE Cable For 2.5" HDD

9

One Installation Resources CD Title

If any of these items is damaged or missing, please contact your vendor and keep all packing materials for future replacement and maintain. z

CPU

- On board Intel® Atom™ Z510PT (1.1GHz) / Z520PT (1.33GHz) processor

- CPU clock bus: Z520PT: 533MHz / Z510PT:400MHz z

Chipset

Intel® System Controller Hub US15WPT z

System BIOS

AMI BIOS z

Main Memory

One 200-pin DDR2 SODIMM socket supports up to 2GB dual channel

400/533MHz memory z

Serial Port

Support one RS-232 and one RS-232/422/485 selectable z

USB Interface

Support six USB (Universal Serial Bus) ports, four on rear I/O and two on board header for internal devices. USB port6, 7 can support USB 2.0 only base on Intel specification. z

Client USB

Support one Client USB on board edge z

Audio Interface

Connector for Mic-In and Line-Out z

Keyboard and PS/2 Mouse interface

Support one PS/2 header for keyboard and mouse z

Watch Dog Timer

- Support WDT function through software programming for enable/disable and interval setting

- General system reset


System Overview z

On Board VGA

Intel® System Controller Hub US15WPT integrated GMA 500 Graphic device z On-board Ethernet

One Gigabit Ethernet (10/100/1000 Mbits/sec) LAN ports using Intel PCI-

Expressx1interface GbE Ethernet Controller (82574IT) z

On Board I/O

- Rear I/O

‧

Line-Out

‧

MIC-In

‧

Four USB ports

‧

One DB-9 support RS-232/422/485

‧

Fast Ethernet port (RJ45)

‧

12V DC Jack

- Internal I/O

‧

One 44-pin IDE connector

‧

One Type II CompactFlash socket

‧

One LVDS port

‧

One SDVO port (BTB connector with SDVO/USB/PCI-E x1 signal)

‧

One SDIO port (2x8-pin, 2mm-pitch box header)

‧

One RS-232 port (2x5-pin, 2mm-pitch box header)

‧

Two USB 2.0 ports (2x5-pin, 2mm-pitch header)

‧

One Client USB connector

‧

One 3-pin power connector for system fan

‧

One power output port

‧

Power on/off LED, Hard drive activity LED and system Reset switch headers

‧

On-board programmable 8-bit Digital I/O interface z

System Monitoring Feature

Monitor system temperature and major power sources. z

Outline Dimension (L X W)

146mm X 105mm


System Overview z

Power requirements

System Configuration

CPU Type

Intel® Atom™ CPU [email protected]/FSB:400MHz/L2:512K

SBC BIOS

Memory

Portwell,Inc.PEB-2738 BIOS Rev.:R1.00.E2(09232009)

Transcend DDR2-533 1GB(SamSung K4T51083QE)

VGA Card

VGA Driver

Onboard Intel Corporation US15WPT Embedded Graphics

Chipset Function 0

Intel Corporation US15WPT Embedded Graphics Chipset

Ver:10.1.0.1390

Onboard Intel

84574IT

Gigabit Chipset

LAN Card

LAN Driver

Audio Card

Intel®

84574IT

Gigabit Network Connection Ver:10.6.15.0

Onboard Realtek ALC662 Audio Chipset

Audio Driver

Realtek High Definition Audio Ver:6.0.1.5680

Chip Driver

Intel® Chipset Device Software Ver:8.8.0.1011

USB 2.0 Driver Intel® SCH Family USB2 Enhanced Host Controller

IDE HDD

Ver:8.8.0.1001

WD WD1200BEVE 120GB 2.5”

Compact Flash Transcend Ultra DMA 1GB(TS1GCF45IF-A5)

USB-CDROM

ASUS CB-52164 DVD-ROM

Power Supply

Seasonic SSA-0651-1

Programs for loading both CPU & VGA: Run Burning Test V5.3

RUN time: 10 / 30 Minutes.

Full Loading

30Min

DC 12V

USB Loading Test

z

Operating Temperature

-40°C ~ 80°C z

Storage Temperature

-40°C ~ 80°C z

Relative Humidity

5% ~ 90%, non-condensing

0.6A 0.88A 0.89A

4.73 V/ 510 mA


System Overview


System Overview

All of details operating relations are shown in PEB-2738I System Block Diagram.

PEB-2738I Block Diagram


Hardware Configuration

Chapter 2

Hardware Configuration

This chapter gives the definitions and shows the positions of jumpers, headers and connector. All of the configuration jumpers on PEB-2738I are in the proper position.

The default settings are indicated with a star sign (Ì).

For users to customize PEB-2738I’s features. In the following sections, Short means covering a jumper cap over jumper pins; Open or N/C (Not Connected) means removing a jumper cap from jumper pins.

PEB-2738I Jumper and Connector Locations (Top)



PEB-2738I Jumper and Connector Locations (Bottom)

JP1, JP2, JP3 : Microcontroller programming

JP1, JP2, JP3 Function

1-2 Short Normal operation Ì

1-2 Open Programming microcontroller

JP4 : 5V / 3.3V backlight enable pin power level selection

Function JP4

1-2 Short 3.3V

2-3 Short 5V Ì

JP7 : Clear CMOS

JP7 Function

1-2 Short Normal operation Ì

1-2 Open Clear CMOS



JP8 : 5V / 3.3V Panel power selection

JP8

1-2 Short 3.3V Ì

2-3 Short 5V

Function

JP9 : Serial port 1 function selection

JP9

5-6, 9-11, 10-12, 15-17, 16-18 Short

Function

RS-232 Ì

3-4, 7-9, 8-10, 13-15, 14-16, 21-22 Short RS-422

1-2, 7-9, 8-10, 19-20 Short RS-485

I/O peripheral devices are connected to the interface connectors.

Connector Function List

Connector

J1

Function

PS/2 Keyboard & Mouse

J4

J7

J9

PATA 44-Pin (EIDE)

USB port 5,6

J10 SDVO daughter board connector

J11 FAN

J12

J13

J14

J15

J16

J17

J18

J19

J20

J21

J22

J23

8 bit GPIO

Single channel LVDS panel interface

LPC Debug Port

Audio Connector (Side output & Surround line output)

Audio Connector (Line input & Front output)

Big 4 power output

Panel backlight inverter’s power connector

RJ45 Ethernet Port

USB port 3,4

USB port 0,1

Power adapter input Jack

Audio Jack ( Microphone input)

Audio Jack ( Stereo line output)

Remark

*option

*option



J24 Serial 1

J25 DDR2 SO-DIMM 200Pin Socket

J26

J27

Compact flash Socket

Battery Socket (option)

Pin Assignments of Connectors

J1 : PS/2 Keyboard/Mouse

Pin No. Signal Description

1 KB_CLK

2 Mouse_DATA

3 KB_DATA

4 +5V

6 GND

J2 : Mini USB Port


1 +5V_USB_CLIENT

3 USBD2+

5 GND

J3 : SDIO Connector


1 SDIO_DATA0

3 SDIO_DATA1

5 SDIO_DATA2

7 SDIO_DATA3

9 SDIO_DATA4

11 SDIO_DATA5

13 SDIO_DATA6

15 SDIO_DATA7

Pin No.

2 USBD2-

4 NC

Pin No.

Signal Description


2 +3.3V

4 SDIO_CLK

6 SDIO_CMD

8 +3.3V

10 GND

12 SDIO_CD#

14 SDIO_WP

16 GND



J4 : Hard Disk 44-pin Connector


1 R_PLT_RST#

3 PDD7

5 PDD6

7 PDD5

9 PDD4

11 PDD3

13 PDD2

15 PDD1

17 PDD0

19 GND

21 PDDREQ

23 PDIOW#

25 PDIOR#

27 PDIORDY

29 PDDACK#

31 IRQ14#

33 PDA1

35 PDA0

37 PDCS1#

39 IDE_PDACTIVE#

41 +5V

43 GND

J5 : Microcontroller programmer Header



2 GND

4 PDD8

6 PDD9

8 PDD10

10 PDD11

12 PDD12

14 PDD13

16 PDD14

18 PDD15

20 N/C

22 GND

24 GND

26 GND

28 GND

30 GND

32 N/C

34 GND

36 PDA2

38 PDCS3#

40 GND

42 +5V

44 N/C

2 +3.3V

3 GND

4 I2C_DATA

5 I2C_CLK

6 N/C

J6 : Serial port 2 Header


1 DCD#2

3 RXD#2

5 TXD#2

7 DTR#2

9 GND


2 DSR#2

4 RTS#2

6 CTS#2

8 RI#2

10 N/C



J7 : USB Port5&Port6 Header


1 +5V

3 USBD6-

5 USBD6+

7 GND

9 N/C

J8 : Front Panel Header


2 +5V

4 USBD5-

6 USBD5+

8 GND

Pin No.

1


Power LED-

3 5VSB

5 +3.3V

7 RESET

9 GND

J9 : 8 bit GPIO Header


1 GP30

3 GP31

5 GP32

7 GP33

9 GND

J10 : SDVO daughter board connector

J11 : Fan Connector


1 GND

2 +12V

3 RPM

Pin No.

2


Power LED+

4 SUS_LED

6 HDD_LED

8 GND

10 PWR_ON_SW#


2 GP34

4 GP35

6 GP36

8 GP37

10 +5V



J12 : LVDS Panel Interface Connector


1 VDD_LVDS

3 LVDSA_DATA0+

5 LVDSA_DATA1+

7 LVDSA_DATA2+

9 LVDSA_DATA3+

11 LVDSA_CLK+

13 L_DDC_CLK

15 GND

17 N/C

19 N/C

21 N/C

23 N/C

25 N/C

27 N/C

29 GND

J13 : LPC Debug Port

J12 : LVDS Panel Interface Connector


2 VDD_LVDS

4 LVDSA_DATA0-

6 LVDSA_DATA1-

8 LVDSA_DATA2-

10 LVDSA_DATA3-

12 LVDSA_CLK-

14 L_DDC_DATA

16 GND

18 N/C

20 N/C

22 N/C

24 N/C

26 N/C

28 N/C

30 GND


1 LAD0

3 LAD1

5 LAD2


2 +3.3V

4 PLT_RST#

6 LFRAME#

7 LAD3 8 LPC_PCID

9 N/C 10 GND

J14 : Audio Connector ( Side output & Surround line output) * Option


1 NC

3 SIDE_OUT_R

5 SIDE_OUT_L

7 SUBWOF_OUT

9 CENTER_OUT


2 GND

4 SIDESURR_JD

6 GND

8 CEN_JD

10 NC



AJ15 : Audio Connector ( Line input & Front output)* Option


1 NC

3 LINE_IN_R

5 LINE_IN_L

7 REAR_OUT_R

9 REAR_OUT_L

J16 : Big 4 Power Output


2 GND

4 LINE_IN_JD

6 GND

8 SURR_JD

10 NC

Pin No.

1 +12V


2 GND

3 GND

4 VCC

J17 : LVDS Panel Back Light Inverter Power Connector


1 BACKLIGH_ENABLE

2 GND

3 +12V

4 GND

5 +5V

J18 : RJ45 Ethernet Port

PIN No. Signal Description



J19 : USB Port3&Port4 Connector


A1 +5V

A2 USBD3-

A3 USBD3+

A4 GND

CG1 GND

J20 : USB Port0&Port1 Connector


A1 +5V

A2 USBD0-

A3 USBD0+

A4 GND

CG1 GND

CG2 GND

J21 : Power Adapter Input Jack

J22 : Audio Jack (Microphone input)

J23 : Audio Jack (Stereo line output)

J24 : Serial port 1 Connector


1 DCD1#

3 TXD1#

5 GND

7 RTS1#

9 RI1#

J25 : DDR2 SO-DIMM 200Pin Connector


B1 +5V

B2 USBD4-

B3 USBD4+

B4 GND

CG3 GND


B1 +5V

B2 USBD1-

B3 USBD1+

B4 GND

CG3 GND

CG4 GND


2 RXD1#

4 DTR1#

6 DSR1#

8 CTS1#



J26 : Compact Flash connector


1 Ground

2

3

Data 3

Data 4

4

5

6

7

Data 5

Data 6

Data 7

HDC CS0#

8 Ground

9 Ground

10 Ground

11 Ground

12 Ground

13 +5V

14 Ground

15 Ground

16 Ground

17 Ground

20 HDC SDA0

22 Data 1

23 Data 2

24 N/C

25 N/C

J27 : Battery Socket (Option)


26 N/C

27

28

Data 11

Data 12

29

30

31

32

Data 13

Data 14

Data 15

HDC CS1#

33 N/C

34 IOR#

35 IOW#

37 IRQ

38 +5V

39 CSEL

40 N/C

41 RESET#

42 IORDY

43 DREQ#

44 DACK#

45 HDC ACT#

46 PDIAG#

47 Data 8

48 Data 9

50 Ground


System Installation

Chapter 3

System Installation

This chapter provides you with instructions to set up your system. The additional information is enclosed to help you set up onboard PCI device and handle Watch

Dog Timer (WDT) and operation of GPIO in software programming.

3.1 Intel ATOM

Processor Z500 CPU

Configuring System Bus

PEB-2738 will automatically detect the CPU FSB 400/533MHz CMOS used. CPU speed of Intel ATOM Processor for Mobile can be detected automatically.

3.2 Intel System Controller Hub US15WP(T)

The Intel® System Controller Hub US15WP(T) is a low-power chipset in one small

22x22mm package, It combines the Intel® Graphics Media Accelerator

500,memorycontroller, and I/O controller in a single-chip solution while featuring advanced 3D graphics and extensive I/O capabilities such as USB2.0,SDIO and PCI

Express. It supports Intel® High Definition Audio and hardware video decode acceleration, a 400/533 MHz CMOS front-side bus, dual independent display.


System Installation

3.3 Main Memory

Memory frequency / CPU FSB synchronization

PEB-2738 supports different memory frequencies depending on the CPU front side bus and the type of DDR2-SDRAM.

CPU FSB Memory Frequency

533MHz 533MHz

400MHz 400MHz

3.4 Installing the Single Board Computer

To install your PEB-2738 into standard chassis or proprietary environment, please perform the following:

Step 1 : Check all jumpers setting on proper position

Step 2 : Install and configure CPU and memory module on right position

Step 3 : Place PEB-2738 into the dedicated position in the system

Step 4 : Attach cables to existing peripheral devices and secure it

WARNING

Please ensure that SBC is properly inserted and fixed by mechanism.

Note:

Please refer to section 3.4.1 to 3.4.4 to install INF/VGA/LAN/Audio drivers.

3.4.1 Chipset Component Driver

The chipset on PEB-2738 is a new chipset that a few old operating systems might not be able to recognize. To overcome this compatibility issue, for Windows Operating

Systems such as Windows XP/VISTA, please install its INF before any of other

Drivers are installed. You can find very easily this chipset component driver in PEB-

2738 CD-title.


System Installation

3.4.2 Intel Integrated Graphics GMCH Chip

Using Intel® SCH US15WP(T) with Media Accelerator High performance graphic integrated chipset is aimed to gain an outstanding graphic performance. Shared 1MB to 8MB system DDR2-SDRAM Memory with Total Graphics Memory. This combination makes PQ7-M100G an excellent piece of multimedia hardware.

Drivers Support

Please find Springdale GMCH driver in the PEB-2738 CD-title. Drivers support

Windows XP / VISTA.

3.4.3 Intel Gigabit Ethernet Controller

Drivers Support

Please find Intel 82574IT LAN driver in /Ethernet directory of PEB-2738 CD-title.

The drivers support Windows XP / VISTA.

LED Indicator (for LAN status)

PEB-2738 provides two LED indicators to report Intel 82574IT Gigabit Ethernet interface status. Please refer to the table below as a quick reference guide.

Intel

82574IT

Color Name of LED

Operation of Ethernet Port

Linked Active

Status

LED

Green Linked & Active LED On Blinking

Speed

LED

Orange

Green speed LED

Giga

Mbps

100

Mbps

10

Mbps

Orange Green Off

3.4.4 Audio

Please find Realtek ALC622 Audio driver form PEB-2738 CD-title. The drivers support Windows XP / VISTA.


System Installation

The following table indicates how to enable/disable Clear CMOS Function hardware circuit by putting jumpers at proper position.

JP7 : CMOS Reset

JP8 Function

2-3 Clear CMOS Contents

To correctly operate CMOS Clear function, users must turn off the system, move JP8 jumper to short pin 2 and 3. Move the JP8 back to 1-2 position (Normal Operation) and start the system. System will then produce a “CMOS Check Sum Error” message and hold up. Users may then follow the displayed message to load BIOS default setting.

The algorithm of the WDT function can be simply described as a timer counting process with an output event. The Time-Out period ( Twd ) can be set by software commands or hardware jumpers that depend on the board circuit design and may be different among the boards. This timer can be used to monitor a software hang.

PEB-2738 allows users to control WDT by issuing dynamic software commands.The

WDT starts counting when it is activated. It will cause a system reset once it expires.

Before WDT expires, a refreshing command with a Twd can be issued to re-count

WDT and continue the status monitoring. If the system encounters a software or application hang, WDT will generate a system reset after its timeout.

The related Control Registers of WDT are included in the following programming guide that is written in C language. User can write a non-zero value ( defined as

Twd ) into the Time-out Value Register ( CR_Twd ) to enable WDT. Users can write

0x00 and then Twd to CR_Twd to refresh WDT. To refresh WDT, the time tolerance of refreshing interval must be considered. The smaller of Twd, the more deviation of

WDT and you need to include more tolerance. “Let Twd be longer than 2 seconds” is the recommendation due to the limitation of Winbond W83627DHG WDT. You can call Portwell support center for reference. The value read back from CR_Twd indicates the counting down value instead of the original Twd. System will be reset after the Time-out Value to be counted down to zero. Users can directly fill a zero value into CR_Twd to disable WDT immediately. To ensure a successful access to the desired Control Register, the following programming guide should be followed.

Programming guide :


System Installation

3.7 GPIO

The PEB-2738 provides 8 programmable input or output ports that can be individually configured to perform a simple basic I/O function. Users can configure each individual port to become an input or output port by programming register bit of I/O Selection. To invert port value, the setting of Inversion Register has to be made. Port values can be set to read or write through Data Register.

The GPIO ports are located on J12 shown as follows.

Notes : Do not short-circuit Pin 9 and 10 of J11！

#include <stdio.h>

#include <stdlib.h>

#include <conio.h> void WDT_Enable(int time,int mode); void WDT_Disable(); void GPIO_Set_Mode(int bit,int mode); void GPIO_Write(int bit,int data); int GPIO_Read(int bit); void main(){ outp (0x2e,0x87);//Input SIO entry key

//WDT sample code

WDT_Enable(20,0);

//WDT_Disable();

//GPIO sampe code

GPIO_Set_Mode(0,0);//set GPIO 30 for output

GPIO_Set_Mode(1,1);//set GPIO 31 for input

GPIO_Set_Mode(2,1);//Set GPIO 32 for input

GPIO_Write(0,1);//Set GPIO 30 for high outp (0x2e,0xAA);//Input SIO Exit key


System Installation

return;

}

// time<255 , mode 0 =sec, 1 =min void WDT_Enable(int time,int mode){ outp (0x2f,inp(0x2f)&0xfe);//Enable WDT function outp (0x2f,0x08); //entry device 8 outp (0x2f,inp(0x2f)|(mode*0x08)); //bit3 0:second,1 Minute outp (0x2f,time);// Set time (sec/min) interrupt outp (0x2f,inp(0x2f)|0xc0);//enable reset time by mouse/keyboard

} void WDT_Disable(){

} outp (0x2f,inp(0x2f)|0x01);//Disable WDT function

//bit 0~7=GPIO 30~37, mode 0=output 1=input void GPIO_Set_Mode(int bit,int mode){ outp (0x2f,0x09);// entry device 9


System Installation

}

//data 0 for low, 1 for high void GPIO_Write(int bit,int data){ outp (0x2f,0x09);// entry device 9 outp (0x2f,(inp(0x2f)&~tmp)|(tmp*data));//0 for low,1 for high

}

//high return 1, low return 0 int GPIO_Read(int bit){ outp (0x2f,0x09);// entry device 9

else


BIOS Setup Information

Chapter 4

BIOS Setup Information

PEB-2738 is equipped with the AMI BIOS stored in Flash ROM. These BIOS has a built-in Setup program that allows users to modify the basic system configuration easily. This type of information is stored in CMOS RAM so that it is retained during power-off periods. When system is turned on, PEB-2738 communicates with peripheral devices and checks its hardware resources against the configuration information stored in the CMOS memory. If any error is detected, or the CMOS parameters need to be initially defined, the diagnostic program will prompt the user to enter the SETUP program. Some errors are significant enough to abort the start-up.

Turn on or reboot the computer. When the message, “Hit <DEL> if you want to run SETUP” appears, press <Del> key to enter BIOS setup program.

If the message disappears before you respond, but you still wish to enter Setup, please restart the system to try “COLD START” again by turning it OFF and then ON, or touch the "RESET" button. You may also restart from “WARM

START” by pressing <Ctrl>, <Alt>, and <Delete> keys simultaneously. If you do not press the keys at the right time and the system will not boot, an error message will be displayed and you will again be asked to,

Press <F1> to Run SETUP or Resume

The BIOS setup program provides a General Help screen. You can call up this screen from any menu by simply pressing <F1>. The Help screen lists the appropriate keys to use and the possible selections for the highlighted item. Press <Esc> to exit the

Help screen.



Use this menu for basic system configurations such as time, date etc.

AMI BIOS, Processor, System Memory

These items show the firmware and hardware specifications of your system. Read only.

System Time

The time format is <Hour> <Minute> <Second>. Use [＋] or [－] to configure system Time.

System Date

The date format is <Day>, <Month> <Date> <Year>. Use [＋] or [－] to configure system Date.



4.3 Advanced

Use this menu to set up the items of special enhanced features.



CPU Configuration

These items show the advanced specifications of your CPU. Read only.

Max CPUID Value Limit

Disable for Windows XP.

Execute-Disable Bit Capability

When disable, force the XD feature flag to always return 0.

Hyper Threading Technology

Enable for Windows XP and Linux4 (OS optimized for Hyper Threading Technology) and disabled for other OS (OS not optimized for Hyper-Threading Technology)

Intel(R) SpeedSetup(™) tech

Disable: Disable GV3

Enable: Enable GV3



IDE Configuration

The IDE Configuration the IDE devices, such as hard disk drive or CD-ROM drive. It uses a separate sub menu to configure each hard disk drive (Master and Slave).

ATA/IDE Configuration

The choice: Disabled, Compatible.



Primary IDE Master/Slave

While entering setup, BIOS auto detects the presence of IDE devices. This display shows the status of auto detection of IDE devices.

[Type] Press PgUp/<＋> or PgDn/<－> to select [Manual], [None] or [Auto] type.

You can use [Manual] to define your own drive type manually.

[LBA/Large Mode] Enabling LBA causes Logical Block Addressing to be used in place of Cylinders, Heads and Sectors.

[Block (Multi-Sector Transfer)] Any selection except Disabled determines the number of sectors transferred per block.

[PIO Mode] Indicates the type of PIO (Programmed Input/Output).

[DMA Mode] Indicates the type of Ultra DMA.



[S.M.A.R.T.] This allows you to activate the S.M.A.R.T. (Self-Monitoring Analysis &

Reporting Technology) capability for the hard disks. S.M.A.R.T is a utility that monitors your disk status to predict hard disk failure. This gives you an opportunity to move data from a hard disk that is going to fail to a safe place before the hard disk becomes offline.

[32 Bit Data Transfer] Enable/Disable 32-bit Data Transfer.

Hard Disk Write Protect

Disabled/Enabled device write protection, this will be effective only if device is accessed through BIOS.

The choice: Disabled, Enabled.

IDE Detect Time Out (Sec)

Select the time out value for detecting ATA/ATAPI device (s).

The choice: 0, 5, 10, 15, 20, 25, 30, 35.

ATA (PI) 80Pin Cable Detection

Select the mechanism for detecting 80Pin ATA (PI) cable.

The choice: Host & Device, Host, Device.

Super IO Configuration

Serial Port 1 Address

Allows BIOS Select Serial Port1 Base Addresses.

The choice: Disabled, 3F8/IRQ4.



Hardware Health Configuration

Configuration / monitor the Hardware Health.



ACPI Configuration

Select for Advanced ACPI Configuration.



General ACPI Configuration

Suspend mode

This item specifies the power saving modes for ACPI function. If your operating system supports ACPI, you can choose to enter the Standby mode in S3 (STR) function through the setting of this field. Option is:

[S3 (STR)] The S3 sleep mode is a lower power state where the information of system configuration and open applications/files is saved to main memory that remains powered while most other hardware components turn off to save energy. The information stored in memory will be used to restore the system when a “wake up” event occurs.

Repost Video on S3 Resume

Determines whether to invoke VGA BIOS post on S3/STR resume.

The choice: No, Yes



Advanced ACPI Configuration

Advanced ACPI Configuration settings, Use this section to configure additional

ACPI options.

ACPI Version Features

Enable RSDP pointers to 64-bit Fixed System Description Tables.

The choice: ACPI v1.0 / ACPI v2.0 / ACPI v3.0.

ACPI APIC support

Include ACPI APIC table pointer to RSDT pointer list.


AMI OEMB table

Include OEMB table pointer to R(X) SDT pointer list.




Headless mode

Enable / Disable Headless operation mode through ACPI.


Chipset ACPI Configuration

Chipset ACPI related Configuration settings, Use this section to configure additional

ACPI options.

APIC ACPI SCI IRQ

Enable / Disable APIC ACPI SCI IRQ.


USB Device Wakeup From S3/S4

Enable / Disable USB device Wake from S3/S4 mode.




MPS Configuration

Configure the Multi-Processor Table.

MPS Revision

This field allows you to select which MPS (Multi-Processor Specification) version to be used for the operating system. You need to select the MPS version supported by your operating system. To find out which version to use, consult the vendor of your operating system.

The choice: 1.1, 1.4.



Smbios Configuration

SMBIOS Configuration Menu.

Smbios Smi Support

SMBIOS SMI Wrapper supports for PnP Func 50h-54h.




USB Configuration

Legacy USB Support

Set to [Enabled] if you need to use any USB 1.1/2.0 device in the operating system that does not support or have any USB 1.1/2.0 driver installed, such as DOS and

SCO Unix.

The choice: Disabled, Enabled, Auto.

USB 2.0 Controller Mode

This setting specifies the operation mode of the onboard USB 2.0 controller.

The choice: FullSpeed, HiSpeed.

BIOS EHCI Hand-Off

This is a workaround for OSes without EHCI hand-off support. The EHCI ownership change should claim by EHCI driver.




4.4 PCIPnP

Advanced PCI/PnP setting wrong values in below sections may cause system to malfunction.

Clear NVRAM

Clear NVRAM during System Boot.

The choice: No, Yes.

Plug & Play O/S

No: lets the BIOS configure all the devices in the system.

Yes: lets the operating system configure Plug and Play (PnP) devices not required for boot if your system has a Plug and Play operating system.


PCI Latency Timer

Select value in units of PCI clocks for PCI device latency timer register.

The choice: 32, 64, 96, 128, 160, 192, 224, 248.



Allocate IRQ to PCI VGA

Yes: Assigns IRQ to PCI VGA card if card requests an IRQ.

No: Does not assign IRQ to PCI VGA card even if card requests an IRQ.


Palette Snooping

Enabled: informs the PCI devices that an ISA graphics device is installed in the system so the card will function correctly.


PCI IDE BusMaster

Enabled: Uses PCI bus mastering for reading / writing to IDE drives.


OffBoard PCI/ISA IDE Card

Some PCI IDE cards may require this to be set to the PCI slot number that is holding the card. AUTO: Works for most PCI IDE cards.

The choice: Auto, PCI Slot1, PCI Slot2, PCI Slot3, PCI Slot4, PCI Slot5, PCI Slot6.

IRQ 3 / IRQ 4 / IRQ5 / IRQ7 / IRQ 9 / IRQ 10 / IRQ 11 / IRQ 14 / IRQ 15

Available: Specified IRQ is available to be used by PCI/PnP devices.

Reserved: Specified IRQ is reserved for used by Legacy ISA devices.

The choice: Available, Reserved.

Reserved Memory Size

Select Size of memory block to reserve for legacy ISA devices.

The choice: Disabled, 16K, 32K, 64K.



4.5 Boot

Use this menu to specify the priority of boot devices.



Boot Settings Configuration

Quick Boot

Enabling this setting will cause the BIOS power-on self test routine to skip some of its tests during boot up for faster system boot.


Quiet Boot

This BIOS feature determines if the BIOS should hide the normal POST messages with the motherboard or system manufacturer's full-screen logo. When it is enabled, the

BIOS will display the full-screen logo during the boot-up sequence, hiding normal

POST messages. When it is disabled, the BIOS will display the normal POST messages, instead of the full-screen logo.

Please note that enabling this BIOS feature often adds 2-3 seconds of delay to the booting sequence. This delay ensures that the logo is displayed for a sufficient amount of time. Therefore, it is recommended that you disable this BIOS feature for a faster boot-up time.




AddOn ROM Display Mode

This item is used to determine the display mode when an optional ROM is initialized during POST. When set to [Force BIOS], the display mode used by AMI

BIOS is used. Select [Keep Current] if you want to use the display mode of optional

ROM.

The choice: Force BIOS, Keep Current.

Bootup Num-Lock

This setting is to set the Num Lock status when the system is powered on.

Setting to [On] will turn on the Num Lock key when the system is powered on.

Setting to [Off] will allow users to use the arrow keys on the numeric keypad.

The choice: Off, On.

PS/2 Mouse support

Select [Enabled] if you need to use a PS/2-interfaced mouse in the operating system.

The choice: Disabled, Enabled, Auto.

Wait For ‘F1’ If Error

When this setting is set to [Enabled] and the boot sequence encounters an error, it asks you to press F1. If disabled, the system continues to boot without waiting for you to press any keys.


Hit ‘DEL’ Message Display

Set this option to [Disabled] to prevent the message as follows:

Hit Del if you want to run setup

It will prevent the message from appearing on the first BIOS screen when the computer boots. Set it to [Enabled] when you want to run the BIOS Setup Utility.


Interrupt 19 Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When enabled, this BIOS feature allows the ROM BIOS of these host adaptors to "capture"

Interrupt 19 during the boot process so that drives attached to these adaptors can function as bootable disks. In addition, it allows you to gain access to the host adaptor's ROM setup utility, if one is available.



When disabled, the ROM BIOS of these host adaptors will not be able to "capture"

Interrupt 19. Therefore, you will not be able to boot operating systems from any bootable disks attached to these host adaptors. Nor will you be able to gain access to their ROM setup utilities.


Boot Device Priority

1st Boot Device

The items allow you to set the sequence of boot devices where BIOS attempts to load the disk operating system. First press <Enter> to enter the sub-menu. Then you may use the arrow keys (↑↓) to select the desired device, then press <＋>, <－> or

<PageUp>, <PageDown> key to move it up/down in the priority list.

The choice: (Network:IBA GE Slot 0200 v1324), Disabled.



4.6 Security

Use this menu to set supervisor and user passwords.

Supervisor Password / Change Supervisor Password

Supervisor Password controls access to the BIOS Setup utility. These settings allow you to set or change the supervisor password.

User Password / Change User Password

User Password controls access to the system at boot. These settings allow you to set or change the user password.

Boot Sector Virus Protection

Boot Sector Virus Protection.




4.7 Chipset

This menu controls the advanced features of the onboard Northbridge and

Southbridge.



North Bridge Chipset Configuration

Primary Graphics Adapter

Select which graphics controller to use as the primary boot device.

The choice: IGD, PCIe/IGD.

Integrated Graphics Mode Selec

Select the amount of system memory used by the internal graphics device.

The choice: Disabled, Enabled, 1MB, Enabled, 4MB, Enabled, 8MB.



Boot Display Configuration

Boot Display Device

The choice: Auto, Integrated LVDS, External DVI/HDMI, External TV, External

CRT External LVDS.

Local Flat Panel Scaling

The choice: Auto, Forced Scaling, Disabled.

Flat Panel Type

The choice: 640x480 (generic), 800x600 (generic), 1024x768 (generic), 640x480 (NEC

8.4”), 800x600 (NEC 9”), 1024x600 (TMD 5.61”), 1024x600 (Samsung 4.8”), 1024x768

(Samsung 15”), 1280x768 (Sharp 7.2”), 1280x800 (Samsung 15.4”)

DPST Control

The choice: VBIOS-Default, DPST Disabled, DPST Enabled at Level 1~Level 5.



South Bridge Chipset Configuration

USB Functions

This setting specifies the function of the onboard USB controller.

The choice: Disabled, 2 USB Ports, 4 USB Ports, 6 USB Ports.

USB 2.0 Controller

Set to [Enabled] if you need to use any USB 2.0 device in the operating system that does not support or have any USB 2.0 driver installed, such as DOS.

The choice: Enabled, Disabled.

USB Client Controller


SDIO controller


Audio Controller Codec

The choice: Auto, Azalia, Disabled.



SLP_S4# Min. Assertion Width

The choice: 4 to 5 seconds, 3 to 4 seconds, 2 to 3 seconds, 1 to 2 seconds.

Restore on AC Power Loss

This item allows user to configure the power status of using ATX power supply after a serious power loss occurs.

The choice: Power Off, Power On, Last State.

Serial IRQ Mode

The choice: Continuous, Quiet.

PCIE Port 0

The choice: Auto, Enabled, Disabled.

PCIE Port 1

The choice: Auto, Enabled, Disabled.

4.8 Exit

This menu allows you to load the BIOS default values or factory default settings into the BIOS and exit the BIOS setup utility with or without changes.



Save Changes and Exit

Exit System Setup and save your changes to CMOS. Pressing <Enter> on this item asks for confirmation: Save changes to CMOS and exit the Setup Utility.

Discard Changes and Exit

Abandon all changes and exit the Setup Utility.

Discard Changes

Abandon all changes and continue with the Setup Utility.

Load Optimal Defaults

Use this menu to load the default values set by the SBC manufacturer specifically for optimal performance of the SBC.

Load Failsafe Defaults

Use this menu to load the default values set by the BIOS vendor for stable system performance.


Troubleshooting

Chapter 5

Troubleshooting

This chapter provides a few useful tips to quickly get PEB-2738I running with success. As basic hardware installation has been addressed in Chapter 2, this chapter will primarily focus on system integration issues, in terms of BIOS setting, and OS diagnostics.

5.1 Hardware Quick Installation

DC 12V Power Input

It is assumed that users have correctly adopted modules and connected all the device cables required before turning on DC 12V power. 200-pin DDR2 SO-DIMM, keyboard, mouse, 44pin hard disk, VGA connector, device power cables, 12V DC power accessories are good examples that deserve attention. With no assurance of properly and correctly accommodating these modules and devices, it is very possible to encounter system failures that result in malfunction of any device.

To make sure that you have a successful start with PEB-2738 it is recommended, when going with the boot-up sequence, to hit “DEL” key and enter the BIOS setup menu to tune up a stable BIOS configuration so that you can wake up your system far well.


Troubleshooting

Loading the default optimal setting

When prompted with the main setup menu, please scroll down to “Load Optimal

Defaults”, press “Enter” and “Y” to load in default optimal BIOS setup. This will force your BIOS setting back to the initial factory configuration. It is recommended to do this so you can be sure the system is running with the BIOS setting that

Portwell has highly endorsed. As a matter of fact, users can load the default BIOS setting any time when system appears to be unstable in boot up sequence.

Auto Detect Hard Disks

In the BIOS => Standard CMOS setup menu, pick up any one from

Primary/Secondary Master/Slave IDE ports, and press “Enter”. Setup the selected

IDE port and its access mode to “Auto”. This will force system to automatically pick up the IDE devices that are being connected each time system boots up.

Improper disable operation

There are too many occasions where users disable a certain device/feature in one application through BIOS setting. These variables may not be set back to the original values when needed. These devices/features will certainly fail to be detected.

When the above conditions happen, it is strongly recommended to check the BIOS settings. Make sure certain items are set as they should be. These include the COM1/

COM2 ports, USB ports, external cache, on-board VGA and Ethernet.

It is also very common that users would like to disable a certain device/port to release IRQ resource. A few good examples are

Disable COM1 serial port to release IRQ #4

Disable COM2 serial port to release IRQ #3

Etc…


Troubleshooting

A quick review of the basic IRQ mapping is given below for your reference.

IRQ#

IRQ #0 System Counter

Description

IRQ #1 Keyboard

IRQ #2 Programmed Controller

IRQ #3 COM2

IRQ #4 COM1

IRQ #5 Usable IRQ

IRQ #6 Diskette Event

IRQ #7 Usable IRQ

IRQ #8 CMOS Clock

IRQ #9 Usable IRQ

IRQ #10 Usable IRQ

IRQ #11 Usable IRQ

IRQ #12 PS/2 mouse

IRQ #13 Data Processor

IRQ #14 IDE Controller

IRQ #15 Usable IRQ

It is then very easy to find out which IRQ resource is ready for additional peripherals. If IRQ resource is not enough, please disable some devices listed above to release further IRQ numbers.


Troubleshooting

5.3 FAQ

Information & Support

Question: How can I connect my PEB-2738I series to panel?

Answer: First of all, you need to read the Panel spec and Inverter spec to understand which type of panel you will use on PEB-2738I series; different panel will connect to different connector; LVDS interface is CN10.

Question: How can I change COM port to RS-232/RS-422/RS-485 mode?

Answer: You can short JP5 pin header to change RS-232/RS-422/RS-485 mode.

JP5 : COM1(CN19 Top) Interface Selection

21 19 17 15 13 11 9

7

5

3

1

21 19 17 15 13 11 9 7 5 3 1

RS-232

22 20 18 16 14 12 10 8 6 4

21 19 17 15 13 11 9 7 5 3 1

21 19 17 15 13 11 9

22 20 18 16 14 12 10

7 5

8 6

3 1

4 2

21 19 17 15 13 11 9 7 5 3 1

RS-422

21 19 17 15 13 11 9

22 20 18 16 14 12 10

7 5

8 6

3 1

4 2

RS-485

JP5

Function

5-6,9-11,10-12,15-17,16-18 Short RS-232 Ì

3-4,7-9,8-10,13-15,14-16,21-22 Short RS-422

1-2,7-9,8-10,19-20 Short RS-485

Note:

Please visit our technical web site at http://www.portwell.com.tw

For additional technical information, which is not covered in this manual, you can mail to [email protected]

or you can also send mail to our sales, they wull be very delighted to forward them to us.


Appendix A

System Memory Address Map

Each on-board device in the system is assigned a set of memory addresses, which also can be identical of the device. The following table lists the system memory address used.

Memory Area Size Device Description

9F80-9FFF

= Conventional memory ends at 639K =

2K Extended Bios Area

PEB-2738I User’s Manual

Appendix B

Interrupt Request Lines (IRQ)

Peripheral devices can use interrupt request lines to notify CPU for the service required. The following table shows the IRQ used by the devices on-board.

IRQ#

IRQ 0

Current Use

System ROM

Default Use

System Timer

IRQ 1

IRQ 2

IRQ 3

IRQ 4

IRQ 5

IRQ 6

IRQ 7

IRQ 8

IRQ 9

IRQ 10

IRQ 11

IRQ 12

IRQ 13

IRQ 14

IRQ 15

System ROM

[Unassigned]

System ROM

System ROM

[Unassigned]

System ROM

Unused

System ROM

[Unassigned]

[Unassigned]

[Unassigned]

System ROM

System ROM

System ROM

[Unassigned]

Keyboard Event

Usable IRQ

COM 2

COM 1

Usable IRQ

Diskette Event

Usable IRQ

Real-Time Clock

Usable IRQ

Usable IRQ

Usable IRQ

IBM Mouse Event

Coprocessor Error

Hard Disk Event

Usable IRQ

PEB-2738I User’s Manual

Portwell PEB-2738I Series User manual

PEB-2738I Series

Embedded System Board

User's Manual

Table of Contents

How to Use This Manual

Chapter 1

System Overview

Chapter 2

Hardware Configuration

Chapter 3

System Installation

Chapter 4

BIOS Setup Information

Chapter 5

Troubleshooting

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