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Intel ® Q965 Express Chipset
Development Kit User Manual
October 2007
Order Number: 315664-002US
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS
OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING
TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,
MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See http://www.intel.com/products/processor_number for details.
The Intel ® Q965 Express Chipset may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
Hyper-Threading Technology requires a computer system with an Intel products/ht/Hyperthreading_more.htm
for additional information.
® Pentium ® 4 processor supporting HT Technology and a HT Technology enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use. See http://www.intel.com/
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling
1-800-548-4725 or by visiting Intel's website at http://www.intel.com
.
BunnyPeople, Celeron, Celeron Inside, Centrino, Centrino logo, Core Inside, Dialogic, FlashFile, i960, InstantIP, Intel, Intel logo, Intel386, Intel486,
Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Core, Intel Inside, Intel Inside logo, Intel. Leap ahead., Intel. Leap ahead. logo, Intel NetBurst, Intel
NetMerge, Intel NetStructure, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel Viiv, Intel vPro, Intel XScale, IPLink, Itanium, Itanium Inside,
MCS, MMX, Oplus, OverDrive, PDCharm, Pentium, Pentium Inside, skoool, Sound Mark, The Journey Inside, VTune, Xeon, and Xeon Inside are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007, Intel Corporation. All Rights Reserved.
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Intel Q965 Express Chipset—
Contents
Electronic Support Systems......................................................................11
Additional Technical Support ....................................................................11
Express Chipset Development Kit Features Summary .........................12
Jumper Settings and Descriptions .............................................................15
Header and Connector Descriptions ...........................................................15
Back Panel Connectors ............................................................................16
PCI Express* x16 / MEC Slot ....................................................................17
Front Panel Header (Power up & Reset) .....................................................21
Front Panel USB Header...........................................................................21
Resource Configuration............................................................................27
System Management BIOS (SMBIOS)........................................................27
Legacy USB Support ...............................................................................28
BIOS Security Features ...........................................................................29
Active Management Technology .................................................................30
Quiet System Technology ..........................................................................31
Memory Configurations............................................................................40
Eight-Channel (7.1) Audio Subsystem .......................................................43
Gigabit LAN Subsystem ...........................................................................44
RJ-45 LAN Connector with Integrated LEDs ................................................45
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Installation of a new Operating System ..................................................... 45
Figures
18 Back Panel Audio Connector Options for Eight-channel Audio Subsystem ......................... 43
Tables
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Intel Q965 Express Chipset—
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—Intel Q965 Express Chipset
Revision History
Date
October 2007
October 2006
Revision Description
002
001
Change SDVOB to SDVOC in pins 58, 59, 62 and 63 in
Table 9, “Intel® SDVO to PCI Express* connector mapping for MEC cards” on page 18 .
Initial public release.
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Intel Q965 Express Chipset—About This Manual
1.0
1.1
1.2
About This Manual
This user’s manual describes the use of the Intel
®
Q965
®
Express Chipset
Development Kit. This manual has been written for OEMs, system evaluators, and embedded system developers. All jumpers, headers, LED functions, and their locations on the board, along with subsystem features and POST codes, are defined in this document.
For the latest information about the Intel
® reference platform, visit:
Q965
®
Express Chipset Development Kit http://developer.intel.com/design/intarch/devkit/index.htm
For design documents related to this platform, such as schematics and layout, please contact your Intel Representative.
Content Overview
Chapter 1: “Development Kit Users Manual Content overview”
This chapter contains a description of conventions used in this manual. The last few sections explain how to obtain literature and contact customer support.
Chapter 2: “Development Kit Hardware Features”
This chapter provides information on the development kit features and the board capability. This includes the information on board component features, jumper settings, pin-out information for connectors and overall development kit board capability.
Chapter 3: “Development Kit Software and BIOS Features”
This chapter provides an overview of development kit software and BIOS features.
Chapter 4: “Development Kit Board Setup”
This chapter provides instructions on how to configure the evaluation board and processor assembly by setting jumpers, connecting peripherals, providing power, and configuring the BIOS.
Chapter 5: “Error Messages and Beep Codes”
This chapter describes the various progress codes that are reported by the BIOS and the corresponding LED Codes.
Text Conventions
The following notations may be used throughout this manual.
# The pound symbol (#) appended to a signal name indicates that the signal is active low.
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1.3
Variables
Instructions
Numbers
Units of Measure
Variables are shown in italics. Variables must be replaced with correct values.
Instruction mnemonics are shown in uppercase. When you are programming, instructions are not case-sensitive. You may use either upper-case or lower-case.
Hexadecimal numbers are represented by a string of hexadecimal digits followed by the character H. A zero prefix is added to numbers that begin with A through F. (For example, FF is shown as 0FFH.) Decimal and binary numbers are represented by their customary notations. (That is, 255 is a decimal number and 1111 1111 is a binary number.) In some cases, the letter B is added for clarity.
The following abbreviations are used to represent units of measure:
Gbyte gigabytes
Kbyte kilobytes
K kilo-ohms
Mbyte megabytes
MHz megahertz ms milliseconds mW milliwatts ns nanoseconds pF picofarads
W watts
V volts
μF microfarads
μs microseconds
μW microwatts
Signal Names Signal names are shown in uppercase. When several signals share a common name, an individual signal is represented by the signal name followed by a number, while the group is represented by the signal name followed by a variable (n). For example, the lower chip-select signals are named CS0#, CS1#,
CS2#, and so on; they are collectively called CSn#. A pound symbol (#) appended to a signal name identifies an active-low signal. Port pins are represented by the port abbreviation, a period, and the pin number (e.g., P1.0).
Glossary of Terms and Acronyms
This section defines conventions and terminology used throughout this document.
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Table 1.
Glossary of Terms and Acronyms (Sheet 1 of 3)
Host
IDER
INTx
Term
ADD2 Card
ACPI
ASF
BLT
Core
CRT
DBI
DDR2
DMI
DVI
FSB
Full Reset
GMCH
GMA 3000
Intel® 64
Architecture
Intel® Advanced
Digital Media
Boost
Intel® AMT
Intel® Advanced
Smart Cache
Intel® DVO
Intel® ICH8DO
Intel® QST
Intel® Smart
Memory Access
Description
Advanced Digital Display Card – second Generation. This card provides digital display options for an Intel Graphics Controller. It plugs into an x16 PCI Express* connector but uses the multiplexed SDVO interface. This Advanced Digital Display Card will not work with an Intel Graphics Controller that supports DVO and ADD cards.
Advanced Configuration and Power Interface
Alert Standard Format
Block Level Transfer
The internal base logic in the (G)MCH
Cathode Ray Tube
Dynamic Bus Inversion
A second generation Double Data Rate SDRAM memory technology.
Direct Media Interface
Digital Video Interface. Specification that defines the connector and interface for digital displays.
Front Side Bus. FSB is synonymous with Host or processor bus.
Full reset is when PWROK is de-asserted. Warm reset is when both RSTIN# and PWROK are asserted.
Graphics Memory Controller Hub component that contains the processor interface, DRAM controller, x16 PCI Express* Graphics port (typically, the external graphics interface), and integrated graphics device (IGD). It communicates with the I/O controller hub (ICH8DO*) and other I/O controller hubs over the DMI interconnect. In this document GMCH refers to the 82Q965 GMCH component.
Intel® Graphic Media Accelerator 3000
This term is used synonymously with processor.
IDE Redirect
An interrupt request signal where “x” stands for interrupts A, B, C, and D
Intel® 64 Architecture 1 (Formerly known as Intel® EM64T) enables the processor to access larger amounts of virtual and physical memory.
128-bit SSE instructions are now issued one per clock cycle effectively doubling their speed of execution over previous generation processors. This benefits a broad range of applications including video, audio, encryption, engineering and scientific with improved performance.
Intel ® Active Management Technology
The shared L2 cache is allocated to each processor core based on workload up to the full amount of total cache. This is more efficient than today’s dual-core processor. Sharing the cache significantly reduces the time needed to retrieve frequently used data improving performance.
Digital Video Out port. Term used for the first generation of Intel Graphics Controller’s digital display channels. Digital display data is provided in a parallel format. This interface is not electrically compatible with the 2 nd this document – SDVO.
generation digital display channel discussed in
Eighth generation I/O Controller Hub component that contains additional functionality compared to previous ICHs. The I/O Controller Hub component contains the primary PCI interface, LPC interface, USB2, SATA, and other I/O functions. It communicates with the
(G)MCH over a proprietary interconnect called DMI.
Intel ® Quiet System Technology
Optimizes functions for reducing wait time, moving data and accelerating out-of-order execution, keep the pipeline full improving instruction throughput and performance.
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Table 1.
Glossary of Terms and Acronyms (Sheet 2 of 3)
Term
Intel ® VT
Intel® Wide
Dynamic
Execution
IGD
LCD
LVDS
MEBx
MEC
PCI Express*
Graphics
PECI
Primary PCI
Processor
QST
Description
Intel® Virtualization Technology. Intel® VT allows one hardware platform to function as multiple “virtual” platforms. For businesses, Intel VT Technology isolating computing activities into separate partitions.
1 (Intel ® VT) offers improved manageability, limiting downtime and maintaining worker productivity by
Improves execution speed and efficiency, delivering more instructions per clock cycle.
Each core can complete up to four full instructions simultaneously.
Internal Graphics Device.
Liquid Crystal Display.
Low Voltage Differential Signaling. A high speed, low power data transmission standard used for display connections to LCD panels.
Management Engine BIOS Extensions
Media Expansion Card – Provides digital display options for an Intel Graphics Controller that supports MEC cards. Plugs into an x16 PCI Express connector but utilizes the multiplexed SDVO interface. Adds Video In capabilities to platform. Will not work with an
Intel Graphics Controller that supports DVO and ADD cards. Will function as an ADD2 card in an ADD2 supported system, but Video In capabilities will not work.
PCI Express* Graphics is a high-speed serial interface whose configuration is software compatible with the existing PCI specifications. The specific PCI Express* implementation intended for connecting the (G)MCH to an external Graphics Controller is a x16 link and replaces AGP.
Platform Environmental Control Interface
The Primary PCI is the physical PCI bus that is driven directly by the ICH8DO component.
Communication between Primary PCI and the (G)MCH occurs over DMI. Note that the
Primary PCI bus is not PCI Bus 0 from a configuration standpoint.
Intel® Core™2 Duo processor E6400
Quiet System Technology
SCI
SDVO
SDVO Device
SERR
SMI
SOL
SPI
SST
System Control Interrupt. SCI is used in ACPI protocol.
Serial Digital Video Out (SDVO). SDVO is a digital display channel that serially transmits digital display data to an external SDVO device. The SDVO device accepts this serialized format and then translates the data into the appropriate display format (i.e., TMDS, LVDS and TV-Out). This interface is not electrically compatible with the previous digital display channel - DVO. For the 82Q965 GMCH, it will be multiplexed on a portion of the x16 graphics PCI Express* interface.
Third party codec that uses SDVO as an input. May have a variety of output formats, including DVI, LVDS, HDMI, TV-out, etc.
System Error. An indication that an unrecoverable error has occurred on an I/O bus.
System Management Interrupt. SMI is used to indicate any of several system conditions
(such as, thermal sensor events, throttling activated, access to System Management
RAM, chassis open, or other system state related activity).
Serial Over LAN
Serial Peripheral Interface
Simple Serial Transport
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Table 1.
1.4
1.4.1
1.4.2
1.5
Table 2.
Glossary of Terms and Acronyms (Sheet 3 of 3)
Rank
UMA
Term Description
A unit of DRAM corresponding to eight x8 SDRAM devices in parallel or four x16 SDRAM devices in parallel, ignoring ECC. These devices are usually, but not always, mounted on a single side of a DIMM.
Unified Memory Architecture. Describes an IGD using system memory for its frame buffers.
Note:
1.
Intel ® Virtualization Technology (Intel ® VT), and Intel ® 64 Architecture require a computer system with a processor, chipset, BIOS, enabling software and/or operating system, device drivers and applications designed for these features. Performance will vary depending on your configuration.
Contact your vendor for more information.
Support Options
Electronic Support Systems
Intel’s site on the World Wide Web ( http://www.intel.com/ ) provides up-to-date technical information and product support. This information is available 24 hours per day, 7 days per week, providing technical information whenever you need it.
Additional Technical Support
If additional technical support is required, please contact your field sales representative or local distributor.
Product Literature
Product literature can be ordered from the following Intel literature centers:
Intel Literature Centers
Location
U.S. and Canada
U.S. (from overseas)
Europe (U.K.)
Germany
France
Japan (fax only)
Telephone Number
1-800-548-4725
708-296-9333
44(0)1793-431155
44(0)1793-421333
44(0)1793-421777
81(0)120-47-88-32
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Development Kit Hardware Features—Intel Q965 Express Chipset
2.0
2.1
2.2
Table 3.
Development Kit Hardware Features
Overview
This chapter provides information on the development kit features and the board capability. For detailed platform features please refer to the Platform Design Guide for or datasheet for the chipset and the Intel ®
Mechanical Design Guidelines.
Core™2 Duo processor Thermal and
Intel ® Q965 ® Express Chipset Development Kit Features
Summary
This section summarizes the development kit features.
Development Kit Features Summary (Sheet 1 of 2)
Form Factor
Processor
Memory
Chipset
Video
Audio
4 Layer μBTX (10.5 inches x 10.4 inches)
Intel ® Core TM 2 Duo processor E6400
Supports 1066 MHz front side bus
2M Shared L2 Cache
Supports Intel ® 64 Architecture
Supports Intel ® Wide Dynamic Execution, Intel® Smart Memory Access, Intel Advanced
Smart Cache, Intel ® Advanced Digital Media Boost, Intel ® Virtualization Technology
DDR2 dual-channel system memory interface
Four 240-pin DDR2 SDRAM DIMM sockets (two per channel) supporting dual channel interleaved mode
Support for 533MHz, 667MHz, 800MHz unbuffered, non-ECC DDR2 SDRAM modules
Supports 128 MB to 8 GB of system memory
256 Mbit, 512 Mbit, or 1 Gbit Technology
Intel ®
Intel ®
Intel ®
Q965 Express Chipset, consisting of:
82Q965 Graphics Memory Controller Hub ((G)MCH)
82801GB I/O Controller Hub (ICH8DO)
Option of either using integrated graphics system or external PCI Express* graphics:
Intel ® GMA3000 integrated graphics subsystem
Supports ADD2 and Intel features.
® Media Expansion Card (MEC, also known as ADD2+) for additional digital display such as DVI, LVDS, etc. depending on the media expansion card
Supports external PCI Express* (x16) graphics card
Intel ® High Definition Audio subsystem:
8-channel (7.1) audio subsystem and two S/PDIF digital audio outputs using the ADI audio codec.
Legacy I/O
Control
Port Angeles 3.0 Super I/O controller for diskette drive, serial, parallel, and PS/2* ports.
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Table 3.
2.3
Development Kit Features Summary (Sheet 2 of 2)
Form Factor
Peripheral
Interfaces
LAN Support
BIOS
Expansion
Capabilities
Additional
Features
4 Layer μBTX (10.5 inches x 10.4 inches)
Six SATA 1.5/3.0 Gb/s ports.
Ten Universal Serial Bus (USB) 2.0 ports – Three front panel headers for support of six front panel ports and four back panel ports
Three 1394a PCI controller – 2 front headers for support of two ports and one back panel port (Disabled in this Development Kit)
PS/2-style keyboard and PS/2 mouse (6-pin mini-DIN) connectors
One VGA connector provides access to integrated graphics.
Six analog audio connectors (Line-in, Line-out, MIC-in, Surround L/R, Surround L/R Rear,
Center) and two digital audio connectors driven by Intel High Definition Audio.
One parallel port.
One diskette drive interface
Gigabit (10/100/1000 Mbits/s) LAN subsystem using the Intel® 82566DM Gigabit
Ethernet Controller
Support for Advanced configuration and power interface (ACPI), plug and play, and
SMBIOS.
AMI system BIOS.
One PCI bus connectors
One PCI Express* x16 bus add-in card connector
Two PCI Express* x1 bus add-in card connectors
Trusted Platform Module (TPM) 1.2 support
Manageability Engine (ME) support. ME Enabled LED (red-blink)
Intel
Intel
®
®
Intel ®
Active Management Technology (Intel ®
Quiet System Technology (Intel ®
AMT) with System Defense support
QST) support
Matrix Storage technology with RAID 0,1,5, 10 support
Piezo speaker for BIOS POST codes
PORT 80 Display
Thermal Diode header
BIOS configuration jumper
Clear CMOS header
Force On header
XDP-SSA connector
Internal I/O headers
• 2x5 Front Panel I/O header
• 2x7 Front Panel audio header
• 1x2 Chassis intrusion header
• 3 four-wire fan headers
• 2x5 Serial port header
• 2x8 High Definition audio header
• 20-pin LPC header
Board Layout
Figure 1 shows the location of the major components, headers and jumpers.
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Figure 1.
Dev Kit Board Main Components, Headers and Jumper Locations
2.3.1
Table 4.
Note:
Core Components
Core Components
Reference
Designator
J1PR
U1UB
U1LB
U1LN
U1CK
U1LH
U1AU
U2LB
Component Description
LGA775 processor socket
Intel ® Q965 (G)MCH
Intel ® ICH8DO
Intel ® 82566DM Gb LAN chip
Clock Generator CK505
Super I/O (Port Angles)
Audio Codec
Primary SPI Flash (stuffed with 16 Mb)
There will be 2 SPI footprints on the board. Firmware Hub will not be supported. The primary SPI flash footprint is at XU3LB and stuffed with a 16 Mb (2 MB) SPI flash
(U2LB). The secondary SPI flash footprint is at XU5LB and unstuffed.
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2.3.2
Table 5.
2.3.3
Caution:
Table 6.
2.3.4
Table 7.
Jumper Settings and Descriptions
Jumper Settings
Jumper Default Description Notes
1-2 = Normal
2-3 = Config Mode
Off = Recovery
1-2 = Normal
2-3 = Clear CMOS
1-2 = Normal
Forcing always force board power on)
LED Descriptions
Power LEDs are on the board to indicate when standby and core power is being applied to the planes. When on, they indicate that no devices should be inserted or removed.
Please refer to Figure 2 for the LED locations.
Inserting or removing devices when the Standby Power LEDs are on could result in device or board damage.
LED Description
LED
CR5BV
DS1EV
DS2EV
CR7BV
Description
5-Volt Standby Power Display LED
Port 80 Display – Right
Port 80 Display - Left
ME Enabled LED
Green
Notes
Red Blink
Header and Connector Descriptions
Header and Connector Descriptions (Sheet 1 of 2)
Header
J5LB
J7LH
Description
Intruder Header
Serial Port Header
J7AU
J8AU
J3TH
J4TH
J5TH
J2BV
J1BV
J24LB
High Definition Media Interface Header
Front Panel Audio Header
CPU Fan
Chassis Fan
Chassis Fan
2x12 Standard Power Connector
2x2 12V Power Connector
SATA connector SATA HDD port 0
Notes
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Table 7.
2.3.5
Header and Connector Descriptions (Sheet 2 of 2)
J1TM
J1FW
J2FW
J9LB
J8LB
J2BC
Header
J4MY
J4LH
J6UB
J11LB
J12LB
J13LB
J14LB
J15LB
J16LB
J22LB
J23LB
J21LB
J19LB
J20LB
J1MY
J2MY
J3MY
Description
SATA connector
SATA connector
SATA connector
SATA connector
SATA connector
DIMM connector
DIMM connector
DIMM connector
DIMM connector
Floppy connector
X16 PCI Express* Graphics slot
X1 PCI Express slot
X1 PCI Express slot
PCI slot
USB Front Panel Header
USB Front Panel Header
USB Front Panel Header
LPC BUS Header (TPM)
1394a Front Panel Header
1394a Front Panel Header
Power Button
Reset Button
XDP_SSA
SATA HDD port 1
SATA HDD port 2
SATA HDD port 3
SATA HDD port 4
SATA HDD port 5
Channel A DIMM 0
Channel A DIMM 1
Channel B DIMM 0
Channel B DIMM 1
For Graphics cards
PCI Express* port 4
PCI Express* port 5
Notes
In order to Plug a TPM module into this header, you must first disable onboard TPM
Disabled
Disabled
This is reserved by Intel for debugging purpose. Located at the back of the board
Back Panel Connectors
Figure 2 shows the location of the back panel connectors for boards equipped with the
8-channel (7.1) audio subsystem. The back panel connectors are color-coded. The figure legend lists the colors used (when applicable).
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Figure 2.
Rear Panel I/O Connectors
Intel Q965 Express Chipset—Development Kit Hardware Features
Table 8.
2.3.6
G
J
K
H
I
L
O
P
M
N
Back panel connectors
C
D
A
B
E
F
Callouts from
Figure 2.2
Designator
J5LH
J5LH
J1AU
J2AU
J6LH
J4UB
J17LB
JA1LN
J3FW
J5AU
J5AU
J18LB
J5AU
J4AU
J4AU
J4AU
Description
PS/2 mouse port [Green]
PS/2 keyboard port [Purple]
S/PDIF Digital audio output
S/PDIF Digital audio input
Parallel port [Burgundy]
VGA Port
Back Panel USB Ports 1 and 2
Overlapping with 1394(J3FW)
RJ45 LAN connector
1394 Port present but disabled
Rear Speaker Out
Side Speaker Out
Back Panel USB Ports 3 and 4. Overlapping with LAN MagJack
(JA1LN)
Center channel and Subwoofer audio out
MIC In
Audio Line In
Audio Line Out (Front Speaker Out)
PCI Express* x16 / MEC Slot
The PCI Express* x16 slot is following the industry PCI Express* x16 connector standard. Table 2.7 shows the signals for PCI Express* x16 or MEC (SDVO).
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Table 9.
Intel® SDVO to PCI Express* connector mapping for MEC cards (Sheet 1 of 3)
Pin
Number
Side B Side A
7
8
5
6
3
4
1
2
9
10
11
27
28
29
30
31
32
23
24
25
26
19
20
21
22
16
17
18
12
13
14
15
33
PCI Express*
Function
12 V
12 V
RSVD
GND
SMCLK
SMDAT
GND
3.3 V
JTAG1 (TRST#)
3.3 Vaux
WAKE#
RSVD
GND
PET0+(or PETp0)
PET0-(or PETn0)
GND
PRSNT2#
GND
PET1+(or PETp1)
PET1-(or PETn1)
GND
GND
PET2+(or PETp2)
PET2-(or PETn2)
GND
GND
PET3+(or PETp3)
PET3-(or PETn3)
GND
RSVD
PRSNT2#
GND
PET4+(or PETp4)
SDVO/MEC Function
12 V
12 V
RSVD
GND
NC
NC
GND
3.3 V
NC
3.3 Vaux
WAKE#
PCI Express*
Function
PRSNT1#
12V
12V
GND
JTAG2 (TCK)
JTAG3 (TDI)
JTAG4 (TDO)
JTAG5 (TMS)
3.3 V
3.3 V
PERST#
SDVO/MEC Function
NC
12V
12V
GND
NC
JTAG3 (TDI)
JTAG4 (TDO)
NC
3.3 V
3.3 V
PERST#
Key
RSVD
GND
PET0+(or PETp0)
PET0-(or PETn0)
GND
SDVO_CtrlClk
GND
End of x1 Connector
GND
REFCLK+
REFCLK-
GND
GND
REFCLK+
REFCLK-
GND
PER0+(or PERp0) PER0+(or PERp0)
PER0-(or PERn0) PER0-(or PERn0)
GND GND
NC
NC
GND
GND
NC
NC
GND
GND
NC
NC
GND
RSVD
SDVO_CtrlData
GND
NC
RSVD
GND
RSVD
GND
PER1+(or PERp1) NC
PER1-(or PERn1) NC
GND
GND
GND
GND
PER2+(or PERp2) NC
PER2-(or PERn2) NC
GND
GND
GND
GND
PER3+(or PERp3) NC
PER3-(or PERn3) NC
GND
RSVD
GND
RSVD
End of x4 Connector
RSVD RSVD
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Table 9.
Intel® SDVO to PCI Express* connector mapping for MEC cards (Sheet 2 of 3)
54
55
56
57
50
51
52
53
58
59
60
Pin
Number
46
47
48
49
42
43
44
45
38
39
40
41
34
35
36
37
65
66
67
68
61
62
63
64
PET4-(or PETn4)
GND
GND
PET5+(or PETp5)
PET5-(or PETn5)
GND
GND
PET6+(or PETp6)
PET6-(or PETn6)
GND
GND
PET7+(or PETp7)
PET7-(or PETn7)
GND
PRSNT2#
GND
PET8+(or PETp8)
PET8-(or PETn8)
GND
GND
PET9+(or PETp9)
PET9-(or PETn9)
GND
GND
PET10+(or PETp10)
PET10-(or PETn10)
GND
GND
PET11+(or PETp11)
PET11-(or PETn11)
GND
GND
PET12+(or PETp12)
PET12-(or PETn12)
GND
Side B Side A
NC
GND
GND
NC
NC
GND
GND
NC
NC
GND
GND
NC
NC
GND
ADD2+_Enable
GND
GND GND
PER4+(or PERp4) NC
PER4-(or PERn4)
GND
NC
GND
GND GND
PER5+(or PERp5) NC
PER5-(or PERn5)
GND
NC
GND
GND GND
PER6+(or PERp6) NC
PER6-(or PERn6)
GND
NC
GND
GND GND
PER7+(or PERp7) NC
PER7-(or PERn7)
GND
NC
GND
End of x8 Connector
SDVOC_Clk+
SDVOC_Clk-
GND
GND
SDVOC_Blue+
SDVOC_Blue-
GND
GND
SDVOC_Green+
SDVOC_Green-
GND
GND
SDVOC_Red+
SDVOC_Red-
GND
GND
SDVOB_Clk+
SDVOB_Clk-
GND
RSVD
GND
RSVD
GND
PER8+(or PERp8) NC
PER8-(or PERn8) NC
GND
GND
GND
GND
PER9+(or PERp9) NC
PER9-(or PERn9) NC
GND
GND
GND
GND
PER10+(or
PERp10)
PER10-(or
PERn10)
GND
GND
NC
NC
GND
GND
PER11+(or
PERp11)
PER11-(or
PERn11)
GND
GND
PER12+(or
PERp12)
NC
NC
GND
GND
NC
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Table 9.
2.3.7
Table 10.
Intel® SDVO to PCI Express* connector mapping for MEC cards (Sheet 3 of 3)
Pin
Number
Side B Side A
77
78
79
80
73
74
75
76
69
70
71
72
GND
PET13+(or PETp13)
PET13-(or PETn13)
GND
GND
PET14+(or PETp14)
PET14-(or PETn14)
GND
GND
PET15+(or PETp15)
PET15-(or PETn15)
GND
81 PRSNT2#
82 RSVD
Note: End of x16 Connector
GND
SDVOB_Blue+
SDVOB_Blue-
GND
GND
SDVOB_Green+
SDVOB_Green-
GND
GND
SDVOB_Red+
SDVOB_Red-
GND
NC
RSVD
PER12-(or
PERn12)
GND
GND
PER13+(or
PERp13)
PER13-(or
PERn13)
GND
GND
PER14+(or
PERp14)
PER14-(or
PERn14)
GND
GND
PER15+(or
PERp15)
PER15-(or
PERn15)
GND
NC
GND
GND
NC
NC
GND
GND
NC
NC
GND
GND
NC
NC
GND
PCI Express* x1
The PCI Express* x1 connectors allow the use of any industry standard PCI Express* device. The pin configuration of the connectors is given below:
PCI Express* (x1) Pinout
Pin Number
8
9
10
5
6
7
11
1
2
3
4
12
13
Side B
12 V
12 V
12 V
GND
SMCLK
SMDAT
GND
3.3 V
JTAG1
3.3 Vaux
WAKE#
Key
RSVD
GND
Side A
PRSNT1#
12V
12V
GND
JTAG2
JTAG3
JTAG4
JTAG5
3.3 V
PWRGD
GND
REFCLK+
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Table 10.
2.3.8
Table 11.
PCI Express* (x1) Pinout
Pin Number Side B
14
15
16
17
HSOP0
HSON0
GND
PRSNT2#
18 GND
Note: End of x1 Connector
REFCLK-
GND
HSIP1
HSIN1
GND
Side A
Front Panel Header (Power up & Reset)
This development kit board use front panel header (J28LB) for powering-up and board reset. Refer to
Table 11 for the front panel header lists.
The front panel header is a 2x5 header, designated as J28LB. The following table outlines the pin out and functionality of this header:
Front Panel Jumper Setting
1 HDD LED Anode
Description
HDD LED Anode
3 HDD LED Cathode HDD LED Cathode
5 Ground
2.3.9
Table 12.
7 Reset
8 Ground
9 Power
10 KEY
VCC
Front Panel USB Header
The front panel USB header is a 2x5 header, designated as J14LB, J15LB or J16LB. The following table outlines the pin out and functionality of this header:
Front Panel USB Header (Sheet 1 of 2)
1
2
3
VREG_FP_USBPWR
VREG_FP_USBPWR
USB_FP_P0
4
5
USB_FP_P1
USB_FP_P0+
6 USB_FP_P1+
7 Ground
Description
Front panel USB power (Ports 0,1) [+5 V or +5 V Dual] Note
Front panel USB power (Ports 0,1) [+5 V or +5 V Dual]
Front panel USB Port 0 negative signal
Front panel USB Port 1 negative signal
Front panel USB Port 0 positive signal
Front panel USB Port 1 positive signal
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Table 12.
Note:
2.3.10
Table 13.
2.3.11
Table 14.
Front Panel USB Header (Sheet 2 of 2)
Description
8 Ground
9 Key
10 USB_FP_OC0 Front panel USB over current signal (Ports 0,1)
+5 V Dual switches between +5 V and +5 V Standby depending on the current board state.
Front Audio Header
The front panel Audio header is a 2x7 header, designated as J8AU. The following table outlines the pin out and functionality of this header:
Front Audio Header
Description
Port 1 Audio Right
Ground
1 AUD_PORT_1_R
2 GND
7
8
5
6
3 AUD_PORT_1_L
4 AUD_FP_PWR
AUD_PORT_2_R
AUD_FP_RET_R
AUD_FP_JS
No Connect
9 AUD_PORT_2_L
10 AUD_FP_RET_L
11
12
AUD_VOL_UP
AUD_VOL_MUTE
13
14
AUD_VOL_DWN
GND
Front Panel Audio Power
Port 2 Audio Right
Front Panel Audio Return Right
Front Panel Jack Sense
Key Pin
Front Panel Audio Return Left
Audio Volume Up
Audio Mute
Audio Volume Down
Ground
High Definition Audio Header
The High Definition Audio header is a 2x8 header, designated as J7AU. The following table outlines the pin out and functionality of this header:
High Definition Audio Header (Sheet 1 of 2)
Description
1 AUD_LINK_BCLK_HDR
2 GND
3 AUD_LINK_RST_HDR
4 VCC3
5 AUD_LINK_SYNC_HDR
6 GND
7 AUD_LINK_SDO_HDR
Ground
Power
Ground
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Intel Q965 Express Chipset—Development Kit Hardware Features
Table 14.
2.3.12
High Definition Audio Header (Sheet 2 of 2)
Description
8 VCC3
9 AUD_LINK_SDI0
10 +12V
15
16
AUD_LINK_SDI2_R
GND
Power
Power
11
12
AUD_LINK_SDI1
KEY No Connect
13 TP_AUD_LINK_SDO_1_HDR
14 V_3P3_STBY\G 3.3V Standby
Ground
BTX Power Connectors
Table 15.
2x12 BTX Power Connector
Pin Signal Name
1 +3.3V
2 +3.3V
3 GND
4 +5V
5 GND
6 +5V
7 GND
8 PWDGD
10 +12V
11 +3.3V
12 -12V
Pin Signal Name
13
14
15
GND
PS_ON#
GND
19
20
21
16
17
18
22 +5V
23 +5V
24 GND
GND
GND
-5V
+5V
+5V
-5V
Table 16.
2x2 Auxiliary 12V Power Connector
1 GND
2 GND
3 +12V
4 +12V
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2.3.13
SATA Pinout
Table 17.
SATA Pinout
2.3.14
1 GND
2 TXP
5
6
7
3 TXN
4 GND
RXN
RXP
GND
Fan Connectors
Table 18.
Fan connectors
2.4
1 GND
2 +12V
3 RPM
4 Control
Thermal Considerations
The development kit is shipped with a BTX TYPE I heatsink/fan thermal solution for installation on the processor. BTX systems are designed so that all the high power components are in-line and can be cooled using a single, continuous airflow stream.
The BTX Thermal Module Assembly (TMA) provides airflow to the central processing unit (microprocessor) and its voltage regulation (VR), which is located at the front of the system, and then to the memory controller (G)MCH, Input/Output controller (ICH), and the add-in card (AIC) in the first slot position. This same airflow supply pattern is available in all BTX system designs.
The Thermal Module Assembly (TMA) consists of 4 main parts:
• The 92mm four-wire fan
• The plastic duct assembly (black)
• The heatsink (copper and aluminum)
• The metal retention clip (for holding the heatsink to the plastic duct assembly)
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Intel Q965 Express Chipset—Development Kit Hardware Features
Figure 3.
BTX Type I Thermal Module Assembly (TMA)
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Development Kit Software and BIOS Features—Intel Q965 Express Chipset
3.0
Development Kit Software and BIOS Features
3.1
Note:
Note:
3.2
3.2.1
Figure 4.
This chapter provides an overview of development kit software and BIOS features.
Software Key Features
The software in the kit was chosen to facilitate development of real-time applications based on the components used in the evaluation board. The driver CD included in the kit contains all of the software drivers necessary for basic system functionality under the following operating systems Windows 2000/XP/XP Embedded, and Linux.
While every care was taken to ensure the latest version of drivers were provided on the enclosed CD at time of publication, newer versions may be available. Updated drivers for Intel components can be found at: http://developer.intel.com/design/intarch/ software/driver/index.htm#q965 .
For all third party components, please contact the appropriate vendor for updated drivers.
Software in the kit is provided free by the vendor and is only licensed for evaluation purposes.
Refer to the documentation in the evaluation kit for further details on any terms and conditions that may be applicable to the granted licenses. Customers using the tools that work with Microsoft* products must license those products. Any targets created by those tools should also have appropriate licenses. Software included in the kit is subject to change. Refer to http://developer.intel.com/design/intarch/devkit for details on additional software from other third-party vendors.
BIOS Features
BIOS Overview
This development kit ships pre-installed with Intel BIOS. The BIOS provides an industry-standard BIOS platform to run most standard operating systems, including
Windows* 2000/XP/XP Embedded, Linux*, WEPOS and others.
The BIOS is stored in a 16 Mb SPI flash at the primary SPI flash footprint at XU3LB and can be updated using a BIOS flash programming tool. FWH will not be supported
The BIOS displays a message during POST identifying the type of BIOS and a revision code. The BIOS Setup program can be used to view and change the BIOS settings for the computer. The BIOS Setup program is accessed by pressing the <DELETE> key after the Power-On Self-Test (POST) memory test begins and before the screen goes black before booting any device. The menu bar is shown below.
Menu Bar
<MAIN> - <ADVANCED> - <PCIPnP> - <BOOT> - <SECURITY> - <CHIPSET> -
<EXIT>
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Intel Q965 Express Chipset—Development Kit Software and BIOS Features
Table 19.
lists the BIOS setup program menu features.
BIOS Setup Program Menu Bar
Main ADVANCED PCIPnP BOOT SECURITY CHIPSET EXIT
Displays processor and memory configurations
Configures advanced features and settings
Setup for
PCI and PCI
Express*
Selects boot options and configurations
Sets passwords and security features
Configures different major components
Saves or discard changes to setup program options
Table 20.
3.2.2
3.2.2.1
3.2.2.2
Note:
3.2.3
BIOS Setup Program Function Keys
BIOS Setup Program
Function Key
< or >
^ or
Tab
Enter
F9
F10
ESC
Description
Selects a different menu screen (moves the cursor left or right)
Selects an item (moves the cursor up or down)
Selects a field (not implemented)
Executes command or selects the submenu
Load the optimal default configuration values for the current menu
Save the current values and exits the BIOS setup program
Exits the menu
Resource Configuration
PCI Auto Configuration
When a PCI card is added and the system is turned on, the BIOS automatically configures interrupts, the I/O space, and other system resources. Any interrupts set to
AVAILABLE in Setup are considered to be available for use by add-in card. There is one
32/33 PCI add-in card socket on the board.
SATA Drive Configuration
If you select AUTO in the BIOS Setup program, the BIOS automatically sets up the
SATA drive configuration with independent I/O channel support. The interface also supports second-generation Serial ATA drives. The BIOS determines the capabilities of each drive and configures them to optimize capacity and performance.
To take advantage of the high capacities typically available today, hard drives are automatically configured for Logical Block Addressing (LBA) and to PIO Mode 3 or 4, depending on the capability of the drive. You can override the auto-configuration options by specifying MANUAL CONFIGURATION in the BIOS setup program.
This board only supports Serial ATA drives.
System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing computers in a managed network. The main component of SMBIOS is the Management
Information Format (MIF) database, which contains information about the computing system and its components.
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3.2.4
3.2.5
3.2.5.1
Using SMBIOS, a system administrator can obtain the system types, capabilities, operational status, and installation dates for system components. The MIF database defines the data and provides the method for accessing this information. The BIOS enables applications such as third-party management software to use SMBIOS. The
BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor clock frequency
• Dynamic data, such as event detection and error logging
Non-Plug and play operating systems such as Microsoft Windows NT*, require an additional interface for obtaining the SMBIOS information. The BIOS supports an
SMBIOS table interface for such operating systems. Using this support, an SMBIOS service-level application running on a non-Plug and Play operating system can obtain the SMBIOS information.
Legacy USB Support
Legacy USB support enables USB devices to be used even when the operating system’s
USB drivers are not yet available. Legacy USB support is used to access the BIOS Setup program, and to install an operating system that supports USB.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu.
4. POST completes.
5. The operating system loads. While the operating system is loading, USB keyboards and mice are recognized and may be used to configure the operating system.
After the operating system loads the USB drivers, all legacy and non-legacy USB devices are recognized by the operating system, and Legacy USB support from the
BIOS is no longer used.
To install an operating system that supports USB, follow the operating system’s installation instructions.
Boot Options
In the BIOS Setup program, the user can choose to boot from a diskette drive, hard drive, CD-ROM, or from the network. The default setting is for the Hard Drive to be the first, and the CD-ROM to be the second. There is no third or fourth boot option.
CD-ROM Boot
Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM format specification. Under the Boot menu in the BIOS Setup program, CD-ROM is listed as a boot device. Boot devices are defined in priority order. Accordingly, if there is not a bootable CD in the CD-ROM drive, the system will attempt to boot from the next defined drive.
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Intel Q965 Express Chipset—Development Kit Software and BIOS Features
3.2.5.2
3.2.5.3
3.2.5.4
Note:
3.2.6
3.3
Network Boot
The network can be selected as a boot device. This selection allows booting from the on-board LAN or a network add-in card with a remote boot ROM installed. In order to boot from the LAN you will have to enter the BIOS and select LAN boot as your first boot device.
Booting without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing the POST, the operating system loader is invoked even if the following devices are not present:
• Video adapter
• Keyboard
• Mouse
Changing the Boot Device
Pressing the <Delete> key during POST causes the BIOS menu to be displayed. Using your arrow keys move over to <BOOT> and then arrow down to <Boot Device Priority> and then select which device you would like to boot first and second.
Please follow the instructions on the right side of the BIOS screen to navigate and change BIOS settings.
BIOS Security Features
The BIOS includes security features that restrict access to the BIOS Setup program and who can boot the computer. A supervisor password and a user password can be set for the BIOS Setup program and for booting the computer, with the following restrictions:
• The supervisor password gives unrestricted access to view and change all the
Setup options in the BIOS Setup program. This is the supervisor mode.
• The user password gives restricted access to view and change Setup options in the
BIOS Setup program. This is the user mode.
• If only the supervisor password is set, pressing the <Enter> key at the password prompt of the BIOS Setup program allows the user restricted access to Setup.
• If both the supervisor and user passwords are set, users can enter either the supervisor password or the user password to access Setup. Users have access to
Setup respective to which password is entered. Setting the user password restricts who can boot the computer. The password prompt will be displayed before the computer is booted. If only the supervisor password is set, the computer boots without asking for a password. If both passwords are set, the user can enter either password to boot the computer.
For enhanced security, use different passwords for the supervisor and user passwords.
Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to 16 characters in length.
Graphics Drivers
The Intel
®
Q965 Express Chipset will work with the Intel® GMA3000 Extreme graphics driver or the Intel
®
Embedded Graphics Driver (IEGD).
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3.4
IEGD is created specifically for embedded platforms, offering an adaptable alternative to drivers designed for the desktop market segments. IEGD offers Intel's embedded customers extended life support that correlates with the extended life support of
Embedded IA-32 silicon products. IEGD differentiates itself through its configurability and support of unique embedded market segment requirements, including an unprecedented support of advanced display combinations, non-standard display dimensions, and embedded operating systems such as Microsoft* XP Embedded and
WePOS.The Intel
®
Graphics Media Accelerator (GMA) is designed for mainstream desktop usage models focusing on 3D performance and ease of use.
When working with external graphics drivers, the internal graphics will automatically disable. When a discrete graphics card is plugged into to the graphics port (PEG), the integrated graphics will be disabled. Note that this does not apply to an ADD2 card, which is intended to work in conjunction with integrated graphics.
IEGD allows support of external discrete graphics cards in conjunction with integrated graphics when a discrete graphics card is plugged into the PCI Express* x1 or PCI at the ICH. If you have a discrete graphics card plugged into the PCI Express*, it will work in conjunction with the integrated graphics. Note that GMA drivers will not support this, only the IEGD drivers.
Intel ® Active Management Technology
Intel
®
Active Management Technology (AMT) offers tamper-resistant and persistent management capabilities. Specifically, Intel AMT is a hardware-based solution that offers encrypted and persistent asset management and remote diagnostics and/or recovery capabilities for networked platforms. With Intel AMT, IT organizations can easily get accurate platform information, and can perform remote updating, diagnostics, debugging, and repair of a system, regardless of the state of the operating system and the power state of the system. Intel AMT enables IT organizations to discover, heal, and protect all of their computing assets, regardless of system state in the manner described below.
(1) Discovering hardware and software computing assets:
• Intel AMT stores hardware and software asset information in non-volatile memory and allows IT to read the asset information anytime, even if the PC is off.
• Users cannot remove or prevent IT organization access to the information because it does not rely on software agents.
(2) Healing systems remotely, regardless of the operating system or system state:
• Intel AMT provides out-of-band diagnostics and recovery capabilities for IT organizations to remotely diagnose and repair PCs after software, operating system, or hardware failures.
• Alerting and event logging help IT organizations detect and diagnose problems quickly to reduce end-user downtime.
(3) Protecting the enterprise against malicious software attacks:
• Intel AMT helps IT organizations keep software versions and virus protection consistent and up-to-date across the enterprise.
• Version information is stored in non-volatile memory for access anytime by third- party software to check and, if necessary, wake a system to perform off-hours updates.
(4) The key features of Intel AMT include:
• Secure Out of Band (OOB) system management that allows remote management of
PCs regardless of system power or operating system state.
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3.5
Intel Q965 Express Chipset—Development Kit Software and BIOS Features
— SSL3.1/TLS encryption
— HTTP authentication
— TCP/IP
— HTTP web GUI
— XML/SOAP API
• Remote troubleshooting and recovery that can significantly reduce desk-side visits and potentially increase efficiency of IT technical staff.
— System event log
— IDE-Redirection or PXE boot; Network drive or remote CD boot
— Serial over LAN
— OOB diagnostics
— Remote control
— Remote BIOS update
• Proactive alerting that decreases downtime and minimizes time to repair.
— Programmable policies
— Operating system lock-up alert
— Boot failure alert
— Hardware failure alerts
• Third-party non-volatile storage that prevents users from removing critical inventory, remote control, or virus protection agents.
• Nonvolatile storage for agents
• Tamper-resistant
• Remote hardware and software asset tracking that eliminates time-consuming manual inventory tracking, which also reduces asset accounting costs.
— E-Asset Tag
— HW/SW inventory
For details of the AMT configurations, please contact your nearest Intel representatives for the Intel
®
AMT OEM Bring up Guide.
Intel
®
Quiet System Technology
Intel
®
ICH8 incorporated a new integrated Intel
®
Quiet System Technology (Intel QST) interface to provide a low cost solution for a better system thermal/acoustic management solution. Intel QST architecture consists of a Simple Serial Transfer (SST) bus, Platform Environment Control Interface (PECI), four TACH pins and three Pulse
Width Modulation (PWM) output pins to monitor, control and manage the system target temperature through a sets of thermal sensors.
QST is run by the manageability engine (ME) residing in MCH and requires SPI flash to host the QST firmware.
Detailed of the QST configurations, please contact your nearest Intel representatives for the QST OEM Bring up Guide.
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Setting Up & Configuring the Development Kit—Intel Q965 Express Chipset
4.0
Setting Up & Configuring the Development Kit
4.1
Figure 5.
This chapter identifies the evaluation kit basic board’s set up and operation. Please refer to
for the board layout, jumper setting location and the component reference designator.
Overview
The following hardware is included in the development kit:
• One Intel® Q965 Express Chipset Development Kit reference board.
• One Intel® Core™2 Duo processor E6400 2.13GHz
• One BTX Type I Thermal Module Assembly (TMA) CPU fan heatsink
• One Support and Retention Module ( SRM) heatsink mounting plate
• Two 512 Mbyte DDR2 667MHz unbuffered DIMMs
• One Pre-programmed and installed 2 MB SPI Flash
Development Kit Board
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4.2
4.3
Note:
Additional Hardware & Software Required
Before you set up and configure your evaluation board, you may want to gather some additional hardware and software.
VGA or LCD Monitor
You can use any standard VGA or multi-resolution LCD monitor. The setup instructions in this chapter assume that you are using a standard VGA monitor.
Keyboard
You will need a PS/2 style or USB keyboard.
Mouse
You will need a PS/2 style or USB mouse.
Hard Drives, Floppy Drives, and SATA or USB Optical Disk Drives
You can connect up to six SATA drives to the evaluation board. A floppy drive or compact disc drive may be used to load the OS. No drives or cables are included in the kit; the user must provide them as necessary. All the storage devices may be attached to the board simultaneously.
Video Adapter
Integrated video is provided via the back panel of the system board. Alternately, users can choose to use any standard external PCI Express* x16 graphics card or MEC. It is user responsibility to install the appropriate drivers and correctly configure any software for video adapters used. Check the BIOS for the proper video settings.
Power Supply
The evaluation board is recommended to power up using a standard desktop BTX/ATX
12 V Rev 2.2
power supply that support enhanced BTX system thermal performance. It is recommended the power supply have a minimum of 500 W output and active PFC
(power factor correction). The power supply selected must also provide an auxiliary
2x2 12 V connector.
Other Devices and Adapters
The evaluation board functions much like a standard desktop computer motherboard.
Most PC-compatible peripherals can be attached and configured to work with the evaluation board.
Setting Up the Evaluation Board
Once the hardware described in
is gathered, follow the steps below to set up the evaluation board. This manual assumes you are familiar with the basic concepts involved with installing and configuring hardware for a personal computer system.
To locate items discussed in the procedure below, please refer to Chapter 3.0
1. Create a safe work environment.
2. Make sure you are in a static-free environment before removing any components from their anti-static packaging. The evaluation board is susceptible to electrostatic discharge damage, and such damage may cause product failure or unpredictable operation.
Inspect the contents of your kit.
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Caution:
Caution:
Note:
Figure 6.
3. Check for damage that may have occurred during shipment. Contact your sales representative if any items are missing or damaged.
Connecting the wrong cable or reversing the cable can damage the evaluation board and may damage the device being connected. Since the board is not in a protective chassis, use caution when connecting cables to this product.
Standby voltage is constantly applied to the board. Therefore, do not insert or remove any hardware unless the system is unplugged.
The evaluation board is a μBTX form factor. A μBTX chassis may be used if a protected environment is desired.
4. Check the jumper settings (refer to Chapter 3.0
). Jumper J6LB is used to clear the
CMOS memory. Make sure this jumper is set for normal operation.
5. Insert the processor (enclosed in the kit is Intel
® into the LGA775 socket
Core™2 Duo processor E6400)
6. Attach the BTX Thermal Module Assembly (TMA) over the processor to the Support and Retention Module (SRM) by following procedures described below.
7. Place the uBTX board on the Support and Retention Module (SRM) so that the holes
A, B, C and D on the PCB line up with the corresponding locations on the SRM (see
Align the Development Kit Board and SRM
D
A
SRM
B
C
A
D
B
C
BTX Board
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Figure 7.
The board and SRM assembly should look like the figure below.
Assembled SRM and board
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Figure 8.
Place the heatsink on top of the processor. The heatsink should align with the holes on
the SRM and board as shown below in Figure 7 . Please clean the surface of the
processor with isopropyl alcohol before attaching the heatsink.
Align the heatsink with holes on the SRM and board
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Figure 9.
Use two 6-32 screws to partially tighten the rear end of the heatsink to the board and the SRM as shown in
. The screw uses the threaded holes of the SRM for retention.
Tighten the heatsink on the SRM and board
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Use two 6-32 nuts and two bolts to secure the front side of the heatsink to the SRM.
The screw can be dropped from the top and use a nut at the bottom or the screw can be inserted from the base of the SRM into the heatsink (based on the accessibility of the system).
Figure 10.
Secure the front side of the heatsink to the SRM
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Tighten the screws at the rear end of the heatsink as shown in the figure below.
Figure 11.
Secure the read end of heatsink to the SRM
Note: Please make sure all the screws are tightened before using the system.
8. Plug the processor heat sink fan into J3TH.
9. Connect the SATA drive through SATA cable into J24LB (SATA 0). Connect a power cable to the SATA drive.
10. (Optional) Plug the floppy disk drive through the ribbon cable into J4LH. Connect a power cable to the floppy drive.
11. Insert the two DDR2 memory (enclosed in the kit are two 512 Mbyte DDR2 667MHz unbuffered DIMMs) into slots J1MY and J3MY. Optional to insert DDR2 memory into slots J2MY and J4MY.
12. Insert a USB CD or DVD into one of the USB ports (J17LB) at the back panel.
Optional to plug a SATA CD or DVD into J22LB.
13. Connect a PS/2 Keyboard into J5LH (purple connector) at the back panel. Optional to connect a USB keyboard into J17LB.
14. Connect a PS/2 Mouse into J5LH (green connector) or a USB Mouse into one of the
USB ports (J17LB) at the back panel.
15. Optional to connect a PCI Express x16 graphics card into J6UB. Optional to install a
MEC card into J6UB.
16. Plug the front panel header cable into J28LB.
17. Plug the monitor into the VGA connector J4UB or Plug the monitor into the add in graphics card’s video connector.
18. Optional to connect the audio speakers to J4AU and J5AU (Please refer to
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19. Optional to connect an Ethernet cable to LAN MagJack connector at J18LB.
20. Connect a standard recommended BTX power supply to the board. Plug the BTX
2x12 connector into J2BV power supply header. Plug the BTX 2x2 12V connector into J1BV.
21. Press the J9LB Power Button to power up the board. Turn on the power to the monitor and evaluation board. Ensure that the fan sink on the processor is operating.
4.3.1
Memory Configurations
The Intel Q965 MCH supports two types of memory organization:
Dual channel (Interleaved) mode. This mode offers the highest throughput for real world applications. Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal. Technology and device width can vary from one channel to the other but the installed memory capacity for each channel must be equal.
If different speeds DIMMs are used between channels, the slowest memory timing will be used.
Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth operation for real world applications. This mode is used when only a single
DIMM is installed or the memory capacities are unequal. Technology and device width can vary from one channel to the other. If different speeds DIMMs are used between channels, the slowest memory timing will be used.
Figure 12.
Memory Channel and DIMM Configuration
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4.3.1.1
Dual Channel (Interleaved) Mode Configurations
Figure 13 shows a dual channel configuration using two DIMMs. In this example, the
DIMM 0 sockets of both channels are populated with identical DIMMs.
Figure 13.
Dual Channel (Interleaved) Mode Configuration with two DIMMs
Figure 14 shows a dual channel configuration using three DIMMs. In this example, the
combined capacity of the two DIMMs in Channel A equal the capacity of the single
DIMM in the DIMM 0 socket of Channel B.
Figure 14.
Dual Channel (Interleaved) Mode Configuration with three DIMMs
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shows a dual channel configuration using four DIMMs. In this example, the combined capacity of the 2x DIMMs in Channel A equals the combined capacity of the
2x DIMMs in Channel B. Also, the DIMMs are matched between DIMM 0 and DIMM 1 of both channels.
Figure 15.
Dual Channel (Interleaved) Mode Configuration with four DIMMs
4.3.1.2
Single Channel (Asymmetric) Mode Configurations
shows a single channel configuration using 1x DIMM. In this example, only the DIMM 0 socket of Channel A is populated. Channel B is not populated.
Figure 16.
Single Channel (Asymmetric) Mode Configuration with one DIMM
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Intel Q965 Express Chipset—Setting Up & Configuring the Development Kit
Figure 17 shows a single channel configuration using 3x DIMMs. In this example, the
combined capacity of the 2x DIMMs in Channel A does not equal the capacity of the single DIMM in the DIMM 0 socket of Channel B.
Figure 17.
Single Channel (Asymmetric) Mode Configuration with 3x DIMMs
4.4
Audio Subsystem Configurations
The board supports the Intel ® High Definition Audio subsystem based on the
ADI1988A or 1988B audio codec. The
ADI1988
series provides eight channels of DAC (Digital to
Analog Converter) that simultaneously support 7.1 sound playback.
The board contains audio connectors on the back panel and two channels of independent stereo sound output at the side of the board. The functions of the back panel audio connectors are dependent on the eight-channel audio subsystem, as described in
For more information such as specification, schematic, layout and driver on the
ADI1988 audio codec, please refer to the ADI website at www.adi.com
4.4.1
Eight-Channel (7.1) Audio Subsystem
Figure 18 shows the back panel audio connector for the eight-Channel (7.1) Audio
Subsystem. The eight-channel (7.1) audio subsystem includes the following:
• Intel
®
82801G I/O Controller Hub (ICH8DO)
•
ADI1988
audio codec
Figure 18.
Back Panel Audio Connector Options for Eight-channel Audio Subsystem
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Table 21.
4.5
4.5.1
describes the lists of back panel task.
Back panel task (Audio)
Symbols
C
D
K (Gray)
J (Black)
M (Orange)
O (Light Blue)
P (Green)
N (Pink)
Task
S/PDIF Out
S/PDIF In
Side Speaker Out
Rear Speaker Out
Center channel and Subwoofer audio out
Audio Line In
Audio Line Out (Front Speaker Out)
Mic In
LAN Subsystem Configurations
The LAN subsystem consists of the following:
• Physical layer interface device. The development kit include the following LAN devices:
— Intel ® 82566DM for Gigabit (10/100/1000 Mbits/sec) Ethernet LAN connectivity.
• RJ-45 LAN connector with integrated status LEDs.
Gigabit LAN Subsystem
The Gigabit (10/100/1000 Mbits/sec) LAN subsystem includes the Intel® 82566DM controller and a RJ-45 LAN connector with integrated status LEDs.
The Intel
®
82566DM Gigabit Ethernet Controller supports the following features:
• PCI Express* link
• 10/100/1000 IEEE 802.3 compliant
• Compliant to IEEE 802.3x flow control support
• TCP, IP, UDP checksum offload
• Transmit TCP segmentation
• Advanced packet filtering
• Full device driver compatibility
• PCI Express* Power Management Support
• Jumbo frame support
• Intel
®
Active Management Technology
• Alert Standard Format (ASF) 2.0
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4.5.2
RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector as shown in
describes the LED states when the board is powered up and the Gigabit LAN subsystem is operating.
Figure 19.
LAN Connector LED locations
Table 22.
4.6
4.6.1
4.6.2
LAN Connector LED status
Left
Right
LED Color
Green
N/A
Green
Yellow
LED State
Off
On
Blinking
Off
On
On
Condition
LAN link is not established.
LAN link is established.
LAN activity is occurring.
10 Mbits/sec data rate is selected
100 Mbits/sec data rate is selected
1000 Mbits/sec data rate is selected
Software Kit Installation
Installation of a new Operating System
The user will required to install a new operating system on a SATA hard disk using an optical drive or loading an image to the hard disk.
Drivers Installation
Once the image is loaded onto the platform and the clean build of OS is done,
Install all the relevant drivers:
• Intel first
® Chipset Software Installation Utility – Chipset INF files needs to be installed
• Intel
®
Embedded Graphics Drivers or Intel
®
Graphics Media Accelerator Drivers
• Intel
®
PRO Network Connections LAN Driver
• Others optional – HECI driver, AMT Serial Over LAN, Intel
®
Interface Driver (QST), Intel Matrix Storage Manager
Management Engine
After installation, go to device manager and make sure there are no “!” (Yellow bangs) on the devices.
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5.0
Error Messages and Beep Codes
5.1
5.2
Table 23.
5.3
This chapter describes the various progress codes that are reported by the BIOS and the corresponding LED Codes.
The LED codes are 8-bit quantities and can be used as Port 80 codes if the platform supports Port 80 capturing device. The higher nibble alone is used for a 4-bit LED.
The Status code driver is responsible for translating the Standard Progress/Error code into a one-byte value. The particular enumeration scheme is set up so that the Port 80 code values will typically increase during the boot process. The early codes are for subsystems closer to the processor and the later codes are for peripherals.
Typically, the order of initialization is Processor -> Memory -> Busses -> Output/Input
Devices -> Boot Devices or
Processor -> Memory -> Recovery -> Busses ->
Output/Input Devices -> Boot Devices
The sequence of POST is platform-specific.
Speaker
The board-mounted speaker provides audible error code (beep code) information during POST. For information about the location of the onboard speaker refer to
BIOS Beep Codes
Whenever a recoverable error occurs during POST, the BIOS “beep” as described in the
.
Beep codes
Type
Memory error
Thermal warning
Pattern
Three long beeps
Four alternating beeps:
High tone, low tone, high tone, low tone
Frequency
1280 Hz
High tone: 2000 Hz
Low tone: 1600 Hz
BIOS Error Messages
Table below show the lists of BIOS error messages and brief description of each.
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Table 24.
5.4
Table 25.
0x20 – 0x2F
0x30 – 0x3F
0x40 – 0x4F
0x50 – 0x5F
0x60 – 0x6F
0x70 – 0x7F
0x80 – 0x8F
0x90 – 0x9F
0xA0 – 0xAF
0xB0 – 0xBF
0xC0-0xCF
0xD0-0xDF
Lists of error messages and brief description of each
Error Message
CMOS Battery low
CMOS Checksum Bad
Memory Size Decreased
No Boot device available
Explanation
The battery may be losing power. Replace the battery soon.
The CMOS checksum is incorrect. CMOS memory may have been corrupted.
Run Setup to reset values.
Memory size has decreased since the last boot. If no memory was removed, then memory may be bad.
System did not find a device to boot.
Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST-codes) to I/O port 80h. If the POST fails, execution stops and the last POST code generated is left at port 80h. This code is useful for determining the point where an error occurred.
The following tables provide information about the POST codes generated by the BIOS:
•
lists the Port 80h POST code ranges
•
lists the Port 80h Progress Code Enumeration
•
lists the Port 80h POST sequence
Port 80h POST Code Ranges
Range Subsystem
0x00 – 0x0F
0x10 – 0x1F
Debug codes: Can be used by any PEIM/driver for debug. Blocked on production builds per DFT rule. Not covered in the EPS.
Host Processors: 0x1F is unrecoverable CPU error.
Memory/Chipset: 0x2F is no memory detected or no useful memory detected.
Recovery: 0x3F indicated recovery failure.
Reserved for future.
IO Busses: PCI, USB, ISA, ATA etc. 0x5F is unrecoverable error. Start with PCI.
Reserved for future (for new busses).
Output Devices: All output consoles. 0x7F is unrecoverable error.
Reserved for future (new output console codes).
Input devices: Keyboard/Mouse. 0x9F is unrecoverable error.
Reserved for future (new input console codes).
Boot Devices: Includes Fixed media and removable media. Not that critical since consoles should be up at this point. 0xBF is unrecoverable error.
Reserved for future.
Boot Device Selection.
0xE0 – 0xFF
0xF0 – 0xFF: 0xFF processor exception. 0xE0- 0xEE: Miscellaneous codes. See below. 0xEF boot/S3: resume failure.
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Table 26.
Port 80h Progress Code Enumeration
Port 80 code
0x10
0x11
0x12
Progress Code Enumeration
HOST PROCESSOR:
Power-on initialization of the host processor (Boot Strap Processor)
Host processor Cache initialization (including APs)
Starting Application processor initialization
Port 80 code
0x21
0x22
0x23
0x24
Progress Code Enumeration
Chipset
Initializing a chipset component
Memory
Reading SPD from memory DIMMs
Detecting presence of memory DIMMs
Programming timing parameters in the memory controller and the DIMMs
0x27
0x50
0x51
0x52
0x53-0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
Initializing memory, such as ECC init
PCI Bus
Enumerating PCI busses
Allocating resources to PCI bus
Hot Plug PCI controller initialization
Reserved for PCI Bus
USB
Resetting USB bus
Reserved for USB
ATA/ATAPI/SATA:
Resetting PATA/SATA bus and all devices
Reserved for ATA
SMBUS
Resetting SMBUS
Reserved for SMBUS
LOCAL CONSOLE:
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0xB9
0xBA
0xBC
0xDy
0xE0
0x9
0x9
0x9
0x9
Port 80 code
0x70
0x71
0x72
0x78
0x79
0x7A
Progress Code Enumeration
Resetting the VGA controller
Disabling the VGA controller
Enabling the VGA controller
Remote Console
Resetting the console controller
Disabling the console controller
Enabling the console controller
Keyboard (PS2 or USB)
Disabling the keyboard
Detecting the presence of the keyboard
Clearing keyboard input buffer
Instructing keyboard controller to run Self Test (PS2 only)
Mouse (PS2 OR USB)
0x9A
0x9B
0xB1
0xB2
0xB3
Detecting presence of mouse
Enabling mouse
Fixed Media
Disabling fixed media
Detecting presence of a fixed media (IDE hard drive detection etc.)
Enabling/configuring a fixed media
Removable Media
Disabling removable media
Detecting presence of a removable media (IDE, CDROM detection etc.)
Enabling/configuring a removable media
BDS
Trying boot selection y (y=0 to 15)
PEI Core
Started dispatching PEIMs (emitted on first report of EFI_SW_PC_INIT_BEGIN
EFI_SW_PEI_PC_HANDOFF_TO_NEXT
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Port 80 code
0xE5
0xE5
0xE7
Progress Code Enumeration
DXE Core
Started dispatching drivers
Started connecting drivers
DXE Drivers
Waiting for user input
0xEA
0xEB
0xEE
0xEF
0xF4
0xF8
0xF9
0xFA
0x30
TBD – Flash Update
Calling Legacy Option ROMs
TBD – Calling Int 19. One beep unless silent boot is enabled.
TBD – Unrecoverable Boot failure/S3 resume failure
RUNTIME PHASE/EFI OS BOOT
Entering Sleep state
EFI boot service ExitBootServices ( ) has been called
EFI runtime service SetVirtualAddressMap ( ) has been called
EFI runtime service ResetSystem ( ) has been called
PEIMS/RECOVERY
Crisis Recovery has initiated per User request
Port 80 code
0x31
0x34
0x35
0x3F
Progress Code Enumeration
Crisis Recovery has initiated by software (corrupt flash)
Loading recovery capsule
Handing off control to the recovery capsule
Unable to recover
Table 27.
Typical Port 80h POST Sequence (Sheet 1 of 2)
Port 80 code
0x21
0x22
0x23
Progress Code Enumeration
Initializing a chipset component
Reading SPD from memory DIMMs
Detecting presence of memory DIMMs
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Table 27.
Typical Port 80h POST Sequence (Sheet 2 of 2)
Port 80 code
0xE4
0x12
Progress Code Enumeration
Entered DXE phase
Starting Application processor initialization
0x50
0x51
0x92
Enumerating PCI busses
Allocating resources to PCI bus
Detecting the presence of the keyboard
0x94
0x95
0xEB
0x58
0x5A
0x92
0x94
0x5A
Clearing keyboard input buffer
Keyboard Self Test
Calling Video BIOS
Resetting USB bus
Resetting PATA/SATA bus and all devices
Detecting the presence of the keyboard
Clearing keyboard input buffer
Resetting PATA/SATA bus and all devices
0x94
0xE7
Clearing keyboard input buffer
Waiting for user input
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