advertisement
µ
19-0509; Rev 0; 4/06
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
General Description
The MAX9777/MAX9778 combine a stereo 3W bridgetied load (BTL) audio power amplifier, stereo singleended (SE) headphone amplifier, headphone sensing, and a 2:1 input multiplexer all in a tiny 28-pin thin QFN package. These devices operate from a single 4.5V to
5.5V supply and feature an industry-leading 100dB
PSRR, allowing these devices to operate from noisy supplies without the addition of a linear regulator. An ultra-low 0.002% THD+N ensures clean, low-distortion amplification of the audio signal. Click-and-pop suppression minimizes audible transients on power and shutdown cycles. Power-saving features include low
4mV V
OS
(minimizes DC current drain through the speakers), low 13mA supply current, and a 10µA shutdown mode. A MUTE function allows the outputs to be quickly enabled or disabled.
A headphone sense input detects the presence of a headphone jack and automatically configures the amplifiers for either speaker or headphone mode. In speaker mode, the amplifiers can deliver up to 3W of continuous average power into a 3Ω load. In headphone mode, the amplifier can deliver up to 200mW of continuous average power into a 16Ω load. The gain of the amplifiers is externally set, allowing maximum flexibility in optimizing output levels for a given load. The amplifiers also feature a 2:1 input multiplexer, allowing multiple audio sources to be selected. The multiplexer can also be used to compensate for limitations in the frequency response of the loud speakers by selecting an external equalizer network. The various functions are controlled by either an I 2 C-compatible (MAX9777) or simple parallel control interface (MAX9778).
The MAX9777/MAX9778 are available in a thermally efficient 28-pin thin QFN package (5mm x 5mm x
0.8mm). These devices have thermal-overload protection (OVP) and are specified over the extended -40°C to +85°C temperature range.
Applications
Notebooks
Portable DVD Players
Tablet PCs
PC Audio Peripherals
Camcorders
Multimedia Monitor
Features
♦ Industry-Leading, Ultra-High 100dB PSRR
♦ 3W BTL Stereo Speaker Amplifier
♦ 200mW Stereo Headphone Amplifier
♦ Low 0.002% THD+N
♦ Click-and-Pop Suppression
♦ ESD-Protected Outputs
♦ Low Quiescent Current: 13mA
♦ Low-Power Shutdown Mode: 10µA
♦ MUTE Function
♦ Headphone Sense Input
♦ Stereo 2:1 Input Multiplexer
♦ Optional 2-Wire, I 2
C-Compatible or Parallel
Interface
♦ Tiny 28-Pin Thin QFN (5mm x 5mm x 0.8mm)
Package
Ordering Information
PART
CONTROL
INTERFACE
PIN-
PACKAGE
PK G
C O D E
MAX9777ETI+ I 2 C Compatible 28 Thi n QFN - E P * T2855-6
MAX9778ETI+ Parallel 28 Thi n QFN - E P * T2855-6
Note: All devices are specified over the -40°C to +85°C operating temperature range.
+Denotes lead-free package.
*EP = Exposed paddle.
Pin Configurations and Functional Diagrams appear at end of data sheet.
Simplified Block Diagram
SINGLE SUPPLY
4.5V TO 5.5V
LEFT IN
1
LEFT IN
2
RIGHT IN
1
RIGHT IN
2
CONTROL
SE/
BTL
I 2 C-
COMPATIBLE
MAX9777
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
AB SO UT E M AX M R TIIN S
V
DD
PV
DD to GND ...........................................................................+6V to V
DD
.......................................................................±0.3V
PGND to GND.....................................................................±0.3V
All Other Pins to GND.................................-0.3V to (V
DD
+ 0.3V)
Continuous Input Current (into any pin except power-supply and output pins) ...............................................................±20mA
OUT__ Short Circuit to GND, V
DD
..........................................10s
Short Circuit Between OUT_+ and OUT_- .................Continuous
Continuous Power Dissipation (T
A
28-Pin TQFN, Multilayer Board
= +70°C)
(derate 34.5mW/°C above +70°C) ..........................2758.6mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= PV
DD
= 5.0V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, R
IN
= R
F
= 15kΩ, R
L
= ∞. T
A
= T
MIN to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
Supply Voltage Range
SYMBOL
V
DD
/PV
DD
CONDITIONS
Inferred from PSRR test
Quiescent Supply Current
(I
VDD
+ I
PVDD
)
Shutdown Current
Switching Time
I SHDN t
SW
BTL mode, HPS = 0V, MAX9777/MAX9778
Turn-On Time t
I
DD
ON
Single-ended mode, HPS = V
DD
SHDN = GND
Gain or input switching
C
BIAS
= 1µF
C
BIAS
= 0.1µF
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
OUTPUT AMPLIFIERS (SPEAKER MODE, HPS = GND)
Output Offset Voltage
Power-Supply Rejection Ratio
(Note 2)
Output Power
Total Harmonic Distortion Plus
Noise
PSRR
P
V OS
OUT
THD+N
OUT_+ - OUT_-, A V = 1V/V
V
DD
= 4.5V to 5.5V
f = 1kHz, V
RIPPLE
= 200mV
P-P f = 20kHz, V
RIPPLE
= 200mV
P-P f
IN
= 1kHz,
THD+N < 1%,
R L = 8
Ω
R
L
= 4
Ω
T
A
= +25°C f
IN
= 1kHz, BW =
22Hz to 22kHz
R
L
= 3
Ω
P
OUT
= 1W, R
L
= 8
Ω
P
OUT
= 2W, R
L
= 4
Ω
R
L
= 8
Ω, P
OUT
= 1W, BW = 22Hz to 22kHz Signal-to-Noise Ratio
Slew Rate
Maximum Capacitive Load Drive
SNR
SR
C
L
No sustained oscillations
Crosstalk f
IN
= 10kHz
Click/Pop Level K
CP
Peak voltage, A-weighted,
32 samples per second
(Notes 2, 6)
Into shutdown
Out of shutdown
MIN
4.5
75
TYP
13
7
10
10
300
30
+160
15
±4
100
82
70
1.4
2.6
3
0.005
0.01
95
1.6
1
73
-50
-65
MAX UNITS
5.5
V
32
18
50 mA
µA
µs
±32 ms o
C o C mV dB
W
% dB
V/µs nF dB dBV
2 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= PV
DD
= 5.0V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, R
IN
= R
F
= 15kΩ, R
L
= ∞. T
A
= T
MIN to T
MAX
, unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)
MIN TYP MAX UNITS PARAMETER SYMBOL CONDITIONS
OUTPUT AMPLIFIERS (HEADPHONE MODE, HPS = V
DD
)
Power-Supply Rejection Ratio
(Note 2)
Output Power
PSRR
P
OUT
V
DD
= 4.5V to 5.5V
f = 1kHz, V
RIPPLE
= 200mV
P-P f f = 20kHz, V
RIPPLE
= 200mV
P-P
IN
= 1kHz, THD+N <
1%, T
A
= +25°C
R
L
= 32 Ω
R
L
= 16
Ω
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
THD+N
SNR f
IN
= 1kHz,
BW = 22Hz to 22kHz
P
R
OUT
= 60mW,
L
= 32
Ω
P
R
OUT
= 125mW,
L
= 16
Ω
R
L
= 32
Ω, BW = 22Hz to 22kHz,
V
OUT
= 1V
RMS
Slew Rate
Maximum Capacitive Load Drive
SR
C
L
No sustained oscillations
Crosstalk
BIAS VOLTAGE (BIAS) f
IN
= 10kHz
BIAS Voltage V
BIAS
Output Resistance R
BIAS
DIGITAL INPUTS (MUTE, SHDN, HPS_EN, GAINA/B, IN1111/2)
Input-Voltage High
Input-Voltage Low
Input Leakage Current
V
IH
V
IL
I
IN
HEADPHONE SENSE INPUT (HPS)
75
2.35
2
106
88
76
88
200
0.002
0.002
92
1.8
2
78
2.5
50
2.65
0.8
±1 dB mW
% dB
V/µs nF dB
V k Ω
V
V
µA
Input-Voltage High V
IH
0.9 x
V
DD
V
Input-Voltage Low
Input Leakage Current
V
IL
I
IN
0.7 x
V DD
±1
V
µA
Click/Pop Level K
CP
Peak voltage, A-weighted,
32 samples per second
(Notes 2, 4)
Into shutdown
Out of shutdown
-70
-52 dBV
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 3
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= PV
DD
= 5.0V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, R
IN
= R
F
= 15kΩ, R
L
= ∞. T
A
= T
MIN to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
MIN TYP MAX UNITS PARAMETER SYMBOL CONDITIONS
2-WIRE SERIAL INTERFACE (SCL, SDA, ADD,
INT) (MAX9777)
Input-Voltage High
Input-Voltage Low
Input Hysteresis
V
IH
V
IL
Input High Leakage Current
Input Low Leakage Current
Input Capacitance
Output-Voltage Low
Output Current High
I
IH
I
IL
C
IN
V
OL
I
OH
TIMING CHARACTERISTICS (MAX9777)
I
V
IN
= 5V
V
IN
= 0V
V
OL
= 3mA
OH
= 5V
Serial Clock Frequency f
SCL
Bus Free Time Between STOP and START Conditions t
BUF
START Condition Hold Time
START Condition Setup Time
Clock Period Low
Clock Period High
Data Setup Time
Data Hold Time t
HD:STA t
SU:STA t
LOW t
HIGH t
SU:DAT t
HD:DAT
(Note 3)
2.6
1.3
0.6
0.6
1.3
0.6
100
0
0.2
10
0.8
±1
±1
0.4
1
400
0.9
kHz
µs
µs
µs
µs
µs ns
µs
V
V
V
µA
µA pF
V
µA
Receive SCL/SDA Rise Time
Receive SCL/SDA Fall Time
Transmit SDA Fall Time t r t f t f
(Note 4)
(Note 4)
(Note 4)
20 +
0.1C
B
20 +
0.1C
B
20 +
0.1C
B
300
300
250 ns ns ns
Pulse Width of Suppressed
Spike t
SP
(Note 5) 50 ns
Note 1: All devices are 100% production tested at +25°C. All temperature limits are guaranteed by design.
Note 2: Inputs AC-coupled to GND.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling edge.
Note 4: C
B
= total capacitance of one of the bus lines in picofarads. Device tested with C
B from SDA/SCL to V DD .
Note 5: Input filters on SDA, SCL, and ADD suppress noise spikes of less than 50ns.
= 400pF. 1kΩ pullup resistors connected
Note 6: Headphone mode testing performed with 32Ω resistive load connected to GND. Speaker mode testing performed with 8Ω resistive load connected to GND. Mode transitions are controlled by SHDN. KCP level is calculated as 20log[(peak voltage during mode transition, no input signal)/1V
RMS
]. Units are expressed in dBV.
4 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Operating Characteristics
(V
DD
= PV
DD
= 5V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, T
A
= +25°C, unless otherwise noted.)
1
0.1
0.01
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE)
R
L
= 3 Ω
A
V
= 2V/V
0.1
P
OUT
= 500mW P
OUT
= 1W
0.01
P
OUT
= 2W P
OUT
= 2.5W
0.001
10 100 1k
FREQUENCY (Hz)
10k 100k
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE)
R
L
= 4 Ω
A
V
= 4V/V
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE)
R
L
A
V
= 3 Ω
= 4V/V
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE)
R
L
= 4 Ω
A
V
= 2V/V
0.1
P
OUT
= 500mW P
OUT
= 1W
0.01
P
OUT
= 2W
P
OUT
= 2.5W
0.001
10 100 1k
FREQUENCY (Hz)
10k 100k
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE)
R
L
= 8 Ω
A
V
= 2V/V
0.1
P
OUT
= 250mW
P
OUT
= 500mW
0.01
P
OUT
= 1W
P
OUT
= 2W
0.001
10 100 1k
FREQUENCY (Hz)
10k 100k
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (SPEAKER MODE)
R
L
= 8 Ω
A
V
= 4V/V
0.1
P
OUT
= 250mW P
OUT
= 500mW
0.01
P
OUT
= 1W
P
OUT
= 2W
0.001
10 100 1k
FREQUENCY (Hz)
10k 100k
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE)
A
V
R
L
= 2V/V
= 3 Ω
10
0.001
0 f = 20Hz f = 10kHz f = 1kHz
1 2
OUTPUT POWER (W)
3 4
0.1
0.1
P
OUT
= 250mW P
OUT
= 500mW
0.01
P
OUT
= 250mW
P
OUT
= 500mW
0.01
0.001
10
P
OUT
= 1W
P
OUT
= 1.2W
100 1k
FREQUENCY (Hz)
10k 100k
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE)
A
V
R
L
= 4V/V
= 3 Ω
10
P
OUT
= 1W
P
OUT
= 1.2W
0.001
10 100 1k
FREQUENCY (Hz)
10k 100k
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE)
A
V
= 2V/V
R
L
= 4 Ω
10
1
0.1
f = 1kHz f = 10kHz
0.01
f = 20Hz
0.001
0 1 2
OUTPUT POWER (W)
3 4
1
0.1
f = 1kHz f = 10kHz
0.01
f = 20Hz
0.001
0 0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT POWER (W)
3.5
_______________________________________________________________________________________ 5
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Operating Characteristics (continued)
(V
DD
= PV
DD
= 5V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, T
A
= +25°C, unless otherwise noted.)
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE)
A
V
R
L
= 4V/V
= 4 Ω
10 f = 10kHz
1 f = 1kHz
0.1
0.01
f = 20Hz
0.001
0 0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT POWER (W)
3.5
OUTPUT POWER vs. AMBIENT TEMPERATURE
(SPEAKER MODE)
4
THD+N = 10%
3
2
THD+N = 1%
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE)
10
A
V
= 2V/V
R
L
= 8 Ω
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (SPEAKER MODE)
10
A
V
R
L
= 4V/V
= 8 Ω
1 f = 10kHz
0.1
f = 1kHz
0.01
0.001
0 f = 20Hz
0.5
1.0
OUTPUT POWER (W)
1.5
2.0
OUTPUT POWER vs. AMBIENT TEMPERATURE
(SPEAKER MODE)
4
1 f = 10kHz
0.1
f = 1kHz
0.01
f = 20Hz
0.001
0 0.5
1.0
OUTPUT POWER (W)
1.5
2.0
OUTPUT POWER vs. AMBIENT TEMPERATURE
(SPEAKER MODE)
2.0
THD+N = 10%
THD+N = 10%
3 1.5
THD+N = 1%
THD+N = 1%
2 1.0
1
0
-40 f = 1kHz
R
L
= 3 Ω
-15 10 35 60
AMBIENT TEMPERATURE ( °C)
5
OUTPUT POWER vs. LOAD RESISTANCE
(SPEAKER MODE) f = 1kHz
4 THD+N = 10%
3
2
1
0
1
THD+N = 1%
85
10 100 1k
LOAD RESISTANCE ( Ω)
10k
1
0
-40 f = 1kHz
R
L
= 4 Ω
-15 10 35 60
AMBIENT TEMPERATURE ( °C)
100k
85
0.5
0
-40 f = 1kHz
R
L
= 8 Ω
-15 10 35 60
AMBIENT TEMPERATURE ( °C)
1.4
1.2
1.0
0.8
0.6
0.4
1.6
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
0.2
0
0
R
L
= 4 Ω f = 1kHz
0.5
1.0
1.5
OUTPUT POWER (W)
2.0
2.5
6 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
85
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Operating Characteristics (continued)
(V
DD
= PV
DD
= 5V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, T
A
= +25°C, unless otherwise noted.)
40
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (SPEAKER MODE)
V
RIPPLE
= 200mV
P-P
50
60
70
80
90
100
10 100 1k
FREQUENCY (Hz)
10k 100k
CROSSTALK vs. FREQUENCY
(SPEAKER MODE)
-40
-50
-60
-70
-80
-90
-100
-110
-120
10
V
IN
R
L
= 200mV
= 8 Ω
P-P
RIGHT TO LEFT
100
LEFT TO RIGHT
1k
FREQUENCY (Hz)
10k 100k
ENTERING SHUTDOWN (SPEAKER MODE)
MAX9777/78 toc20
EXITING SHUTDOWN (SPEAKER MODE)
MAX9777/78 toc21
V
DD
2V/div
SHDN
2V/div
OUT_+ AND OUT_-
1V/div
OUT_+ - OUT_-
200mV/div
OUT_+ AND OUT_-
1V/div
OUT_+ - OUT_-
500mV/div
400ms/div 100ms/div
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (HEADPHONE MODE)
R
L
= 16 Ω
A
V
= 1V/V
0.1
0.01
P
OUT
= 25mW
P
OUT
= 50mW
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (HEADPHONE MODE)
R
L
A
V
= 16 Ω
= 2V/V
0.1
P
OUT
= 25mW
P
OUT
= 50mW
0.01
0.001
P
OUT
= 100mW
0.0001
10 100 1k
P
OUT
= 150mW
FREQUENCY (Hz)
10k 100k
0.001
P
OUT
= 100mW
0.0001
10
P
OUT
= 150mW
100 1k
FREQUENCY (Hz)
10k 100k
_______________________________________________________________________________________ 7
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Operating Characteristics (continued)
(V
DD
= PV
DD
= 5V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, T
A
= +25°C, unless otherwise noted.)
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (HEADPHONE MODE)
R
L
A
V
= 32 Ω
= 1V/V
0.1
0.01
P
OUT
= 25mW
P
OUT
= 50mW
1
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (HEADPHONE MODE)
R
L
A
V
= 32 Ω
= 2V/V
0.1
P
OUT
= 25mW
P
OUT
= 50mW
0.01
0.001
P
OUT
= 100mW
P
OUT
= 150mW
0.001
P
OUT
= 150mW
P
OUT
= 100mW
0.0001
10 100 1k
FREQUENCY (Hz)
10k 100k
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (HEADPHONE MODE)
10
A
V
= 2V/V
R
L
= 16 Ω
0.0001
10 100 1k
FREQUENCY (Hz)
10k 100k
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (HEADPHONE MODE)
A
V
R
L
= 1V/V
= 32 Ω
10
1 1 f = 10 kHz f = 10 kHz
0.1
0.01
f = 20Hz
0.1
0.01
f = 20Hz f = 1kHz 0.001
0.0001
0 50 100 150 200
OUTPUT POWER (mW)
250 300
0.001
0.0001
0 f = 1kHz
25 50 75
OUTPUT POWER (mW)
100 125
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (HEADPHONE MODE)
10
A
V
R
L
= 1V/V
= 16 Ω
1
0.1
0.01
0.001
0.0001
0 f = 20Hz f = 10 kHz
50 f = 1kHz
100 150 200
OUTPUT POWER (mW)
250 300
100
TOTAL HARMONIC DISTORTION PLUS NOISE vs. OUTPUT POWER (HEADPHONE MODE)
10
A
V
R
L
= 2V/V
= 32 Ω f = 1kHz
1
0.1
f = 20Hz f = 10 kHz
0.01
0.001
0.0001
0 25 50 75
OUTPUT POWER (mW)
100 125
OUTPUT POWER vs. AMBIENT TEMPERATURE
(HEADPHONE MODE)
300
THD+N = 10%
250
200
150
THD+N = 1%
OUTPUT POWER vs. AMBIENT TEMPERATURE
(HEADPHONE MODE)
150
125 THD+N = 10%
100
75
THD+N = 1%
600
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE) f = 1kHz
500
400
THD+N = 10%
300
100 50 200 THD+N = 1%
50
0
-40 f = 1kHz
R
L
= 16 Ω
-15 10 35 60
AMBIENT TEMPERATURE ( °C)
85
25
0
-40 f = 1kHz
R
L
= 32 Ω
-15 10 35 60
AMBIENT TEMPERATURE ( °C)
85
100
0
1 10 100
LOAD RESISTANCE ( Ω)
1k
8 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
10k
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Operating Characteristics (continued)
(V
DD
= PV
DD
= 5V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, T
A
= +25°C, unless otherwise noted.)
120
100
80
60
40
20
POWER DISSIPATION vs. OUTPUT POWER
0
0
(HEADPHONE MODE)
50 100
OUTPUT POWER (mW)
150
R
L
= 16 Ω f = 1kHz
200
CROSSTALK vs. FREQUENCY
(HEADPHONE MODE)
-40
-50
-60
-70
-80
-90
-100
-110
-120
10
V
IN
= 200mV
R
L
= 16 Ω
P-P
RIGHT TO LEFT
100
LEFT TO RIGHT
1k
FREQUENCY (Hz)
10k 100k
SHDN
2V/div
30
20
10
0
0
60
50
40
70
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
20 40 60
OUTPUT POWER (mW)
R
L
= 32 Ω f = 1kHz
80 100
ENTERING SHUTDOWN (HEADPHONE MODE)
MAX9777/78 toc38
SHDN
2V/div
OUT_+
1V/div
HP JACK
200mV/div
40
50
60
70
80
90
100
10
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (HEADPHONE MODE)
V
RIPPLE
= 200mV
P-P
100 1k
FREQUENCY (Hz)
10k
EXITING SHUTDOWN (HEADPHONE MODE)
MAX9777/78 toc37
R
L
= 16 Ω
100ms/div
INPUT AC-COUPLED TO GND
25
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(SPEAKER MODE)
T
A
= +85 °C
20
100k
15 T
A
= +25 °C
OUT_+
1V/div
10
T
A
= -40 °C
5
HP JACK
100mV/div
100ms/div
0
4.50
4.75
5.00
SUPPLY VOLTAGE (V)
5.25
5.50
_______________________________________________________________________________________ 9
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Operating Characteristics (continued)
(V
DD
= PV
DD
= 5V, GND = PGND = 0V, V SHDN = 5V, C
BIAS
= 1µF, T
A
= +25°C, unless otherwise noted.)
4
2
8
6
12
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(HEADPHONE MODE)
10
T
A
= +85 °C
T
A
= +25 °C
T
A
= -40 °C
0
4.50
4.75
5.00
SUPPLY VOLTAGE (V)
5.25
5.50
0.5
0.4
0.3
0.2
0.1
0
0
0.8
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
0.7
0.6
R
L
= 8 Ω f = 1kHz
0.25
0.50
0.75
1.00
1.25
OUTPUT POWER (W)
1.50
V
DD
2V/div
OUT_+ AND OUT_-
1V/div
OUT_+ - OUT_-
1V/div
12
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(HEADPHONE MODE)
10
8
T
A
= +85 °C
6
4
T
A
= +25
2
0
4.50
T
A
= -40 °C
4.75
5.00
SUPPLY VOLTAGE (V)
5.25
°C
5.50
EXITING POWER-DOWN
(SPEAKER MODE)
MAX9777/78 toc43
100ms/div
10 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
—
—
EP
17
18
19
20
21
22
24
26
28
—
—
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Pin Description
MAX9777
1
2
3, 4
5
6
7
8
9, 13, 23, 27
PIN
MAX9778
—
—
3, 4
5
6
7
8
9, 13, 23, 27
10
11, 25
12
14
15
10
11, 25
12
14
—
16 16
15
28
EP
17
18
19
20
21
22
24
26
—
1
2
BIAS
GND
INR1
INR2
GAINRA
GAINRB
OUTR+
OUTR-
SCL
MUTE
HPS_EN
GAINA/B
IN1/2
EP
NAME
SDA
INT
V
DD
INL1
INL2
GAINLA
GAINLB
PGND
OUTL+
PV
DD
OUTL-
SHDN
ADD
HPS
FUNCTION
Serial Data I/O
Interrupt Output
Power-Supply Input
Left-Channel Input 1
Left-Channel Input 2
Left-Channel Gain Set A
Left-Channel Gain Set B
Power Ground. Connect to GND.
Left-Channel Bridged Amplifier Positive Output. OUTL+ also serves as the left-channel headphone amplifier output.
Output Amplifier Power Supply
Left-Channel Bridged Amplifier Negative Output
Active-Low Shutdown Input. Connect SHDN to V DD for normal operation.
Address Select. A logic-high sets the address LSB to 1, a logic-low sets the address LSB to zero.
Headphone Sense Input. A logic-high configures the device as a singleended headphone amp. A logic-low configures the device as a BTL speaker amp.
DC Bias Bypass Terminal. See the BIAS Capacitor section for capacitor selection. Connect C
BIAS
from BIAS to GND.
Ground. Connect to PGND.
Right-Channel Input 1
Right-Channel Input 2
Right-Channel Gain Set A
Right-Channel Gain Set B
Right-Channel Bridged Amplifier Positive Output. OUTR+ also serves as the right-channel headphone amplifier output.
Right-Channel Bridged Amplifier Negative Output
Serial Clock Line
Active-High Mute Input
Headphone Enable. A logic-high enables HPS. A logic-low disables HPS and the device is always configured as a BTL speaker amplifier.
Gain Select. A logic-low selects the gain set by GAIN_A. A logic-high selects the gain set by GAIN_B.
Input Select. A logic-low selects amplifier input 1. A logic-high selects amplifier input 2.
Exposed Paddle. Connect to GND.
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 11
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Detailed Description
The MAX9777/MAX9778 feature 3W BTL speaker amplifiers, 200mW headphone amplifiers, input multiplexers, headphone sensing, and comprehensive clickand-pop suppression. The MAX9777/MAX9778 are stereo BTL/headphone amplifiers. The MAX9777 is controlled through an I 2 C-compatible, 2-wire serial interface. The MAX9778 is controlled through five logic inputs: MUTE, SHDN, HPS_EN, GAINA/B, and IN1/2
(see the Selector Guide ). The MAX9777/MAX97778 feature exceptional PSRR (100dB at 1kHz), allowing these devices to operate from noisy digital supplies without the need for a linear regulator.
The speaker amplifiers use a BTL configuration. The signal path is composed of an input amplifier and an output amplifier. Resistor R
IN sets the input amplifier’s gain, and resistor R
F sets the output amplifier’s gain.
The output of these two amplifiers serves as the input to a slave amplifier configured as an inverting unity-gain follower. This results in two outputs, identical in magnitude, but 180 ° out of phase. The overall gain of the speaker amplifiers is twice the product of the two amplifier gains (see the Gain-Setting Resistors section).
A feature of this architecture is that there is no phase inversion from input to output.
When configured as a headphone (single-ended) amplifier, the slave amplifier is disabled, muting the speaker and the main amplifier drives the headphone. The
MAX9777/MAX9778 can deliver 3W of continuous power into a 3 Ω load with less than 1% THD+N in speaker mode, and 200mW of continuous average power into a
16 Ω load with less than 1% THD+N in headphone mode.
These devices also feature thermal-overload protection.
BIAS
These devices operate from a single 5V supply, and feature an internally generated, power-supply independent, common-mode bias voltage of 2.5V referenced to GND.
BIAS provides both click-and-pop suppression and sets the DC bias level for the audio outputs. BIAS is internally connected to the noninverting input of each speaker amplifier (see the Typical Application Circuits and
Functional Diagrams ). Choose the value of the bypass capacitor as described in the BIAS Capacitor section.
No external load should be applied to BIAS. Any load lowers the BIAS voltage, affecting the overall performance of the device.
Input Multiplexer
Each amplifier features a 2:1 input multiplexer, allowing input selection between two stereo sources. Both multiplexers are controlled by bit 1 in the control register
(MAX9777) or by the IN1/2 pin (MAX9778). A logic-low selects input IN_1 and a logic-high selects input IN_2.
The input multiplexer can also be used to further expand the number of gain options available from the
MAX9777/MAX9778 family. Connecting the audio source to the device through two different input resistors (Figure 1) increases the number of gain options from two to four. Additionally, the input multiplexer allows a speaker equalization network to be switched into the speaker signal path. This is typically useful in optimizing acoustic response from speakers with small physical dimensions.
Headphone Sense Enable
The HPS input is enabled by HPS_EN (MAX9778) or the
HPS_D bit (MAX9777). HPS_D or HPS_EN determines whether the device is in automatic detection mode or fixed-mode operation (see Tables 1a and 1b).
AUDIO
INPUT
15k Ω
30k Ω
IN_1
MAX9777
MAX9778
IN_2
Figure 1. Using the Input Multiplexer for Gain Setting
Table 1a. MAX9777 HPS Setting
INPUTS
HPS_D
BIT
0
HPS
SPKR/HP
BIT
X
MODE
GAIN
PATH*
0 BTL A
0
1
1
X
X
0
SE
BTL
B
A or B
1 X 1 SE A or B
*Note:
A—GAINA path selected
B—GAINB path selected
A or B—Gain path selected by GAINAB control bit in register
02h
12 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Table 1b. MAX9778 HPS Setting
HPS_EN
0
1
1
INPUTS
HPS
X
0
1
MODE
BTL
BTL
SE
*Note:
A or B—Gain path selected by external GAINAB
GAIN PATH*
A or B
A or B
A or B
MAX9777
MAX9778
HPS
OUTL+
OUTR+
R3
47k Ω
R2
10k Ω
R2
10k Ω
V
DD
R1
680k Ω
Headphone Sense Input (HPS)
With headphone sense enabled, a voltage on HPS less than 0.7 x V
DD sets the device to speaker mode. A voltage greater than 0.9 x V
DD disables the inverting bridge amplifier (OUT_-), which mutes the speaker amplifier and sets the device into headphone mode.
For automatic headphone detection, enable headphone sense and connect HPS to the control pin of a 3-wire headphone jack as shown in Figure 2. With no headphone present, the resistive voltage-divider created by
R1 and R2 sets the voltage on HPS to be less than 0.7 x
V
DD
, setting the device to speaker mode and the gain setting defaults to GAINA (MAX9777). When a headphone plug is inserted into the jack, the control pin is disconnected from the tip contact, and HPS is pulled to V
DD through R1, setting the device into headphone mode and the gain-setting defaults to GAINB (MAX9777) (see the
Gain Select section). Place a resistor in series with the control pin and HPS (R3) to prevent any audio signal from coupling into HPS when the device is in speaker mode.
Shutdown
The MAX9777/MAX9778 feature a 10µA, low-power shutdown mode that reduces quiescent current consumption and extends battery life. The drive amplifiers and bias circuitry are disabled, the amplifier outputs
(OUT_) go high impedance, and BIAS is driven to
GND. Driving SHDN low places the devices into shutdown mode, disables the interface, and resets the I 2 C registers to a default state. A logic-high on
SHDN enables the devices.
MAX9777 Software Shutdown
A logic-high on bit 0 of the SHDN register places the
MAX9777 in shutdown mode. A logic-low enables the
Figure 2. HPS Configuration Circuit device. The digital section of the MAX9777 remains active when the device is shut down through the interface. All devices feature a logic-low on the SHDN input.
MUTE
The MAX9777/MAX9778 feature a mute mode. When the device is muted, the input is disconnected from the amplifiers. MUTE does not shut down the device.
MAX9777 MUTE
The MAX9777 MUTE mode is selected by writing to the
MUTE register (see the Mute Register section). The left and right channels can be independently muted.
MAX9778 MUTE
The MAX9778 features an active-high MUTE input that mutes all channels.
Click-and-Pop Suppression
The MAX9777/MAX9778 feature Maxim’s comprehensive click-and-pop suppression. When entering or exiting shutdown, the common-mode bias voltage of the amplifiers is slowly ramped to and from the DC bias point using an S-shaped waveform. In headphone mode, this waveform shapes the frequency spectrum, minimizing the amount of audible components present at the headphone. In speaker mode, the BTL amplifiers start up in the same fashion as in headphone mode.
When entering shutdown, both amplifier outputs ramp to GND quickly and simultaneously. To maximize clickand-pop suppression, drive SHDN to 0V before powerup or power-down transitions.
______________________________________________________________________________________ 13
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Digital Interface
The MAX9777 features an I 2 C/SMBus™-compatible 2wire serial interface consisting of a serial data line
(SDA) and a serial clock line (SCL). SDA and SCL facilitate bidirectional communication between the
MAX9777 and the master at clock rates up to 400kHz.
Figure 3 shows the 2-wire interface timing diagram. The
MAX9777 is a transmit/receive slave-only device, relying upon a master to generate a clock signal. The master (typically a microcontroller) initiates data transfer on the bus and generates SCL to permit that transfer.
A master device communicates to the MAX9777 by transmitting the proper address followed by a command and/or data words. Each transmit sequence is framed by a START (S) or REPEATED START (S r
) condition and a STOP (P) condition. Each word transmitted over the bus is 8 bits long and is always followed by an acknowledge clock pulse.
SDA and SCL are open-drain outputs requiring a pullup resistor (500 Ω or greater) to generate a logic-high voltage. Series resistors in line with SDA and SCL are optional. These series resistors protect the input stages of the
SMBus is a trademark of Intel Corp.
devices from high-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL clock cycle. The data on SDA must remain stable during the high period of the SCL clock pulse. Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section). SDA and SCL idle high when the I 2 C bus is not busy.
START and STOP Conditions
When the serial interface is inactive, SDA and SCL idle high. A master device initiates communication by issuing a START condition. A START condition is a high-tolow transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high
(Figure 4). A START condition from the master signals the beginning of a transmission to the MAX9777. The master terminates transmission by issuing the STOP condition; this frees the bus. If a REPEATED START condition is generated instead of a STOP condition, the bus remains active.
SDA t
SU, DAT t
LOW
SCL t
HD, STA t
R t
HIGH t
F
START
CONDITION
Figure 3. 2-Wire Serial-Interface Timing Diagram t
HD, DAT
S
SCL t
HD, STA
S r
REPEATED
START
CONDITION t
HD, STA
P t
SP t
SU, STO t
BUF
STOP
CONDITION
START
CONDITION
SDA
Figure 4. START/STOP Conditions
14 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Early STOP Conditions
The MAX9777 recognizes a STOP condition at any point during the transmission except if a STOP condition occurs in the same high pulse as a START condition (Figure 5). This condition is not a legal I 2 C format; at least one clock pulse must separate any START and
STOP condition.
REPEATED START Conditions
A REPEATED START (S r
) condition may indicate a change of data direction on the bus. Such a change occurs when a command word is required to initiate a read operation. S r may also be used when the bus master is writing to several I 2 C devices and does not want to relinquish control of the bus. The MAX9777 serial interface supports continuous write operations with or without an S r condition separating them. Continuous read operations require S r conditions because of the change in direction of data flow.
SCL
SDA
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
STOP START
LEGAL STOP CONDITION
Acknowledge Bit (ACK)
The acknowledge bit (ACK) is the ninth bit attached to any 8-bit data word. The receiving device always generates ACK. The MAX9777 generates an ACK when receiving an address or data by pulling SDA low during the night clock period. When transmitting data, the
MAX9777 waits for the receiving device to generate an
ACK. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master should reattempt communication at a later time.
Slave Address
The bus master initiates communication with a slave device by issuing a START condition followed by a 7-bit slave address (Figure 6). When idle, the MAX9777 waits for a START condition followed by its slave address. The LSB of the address word is the
Read/Write (R/W) bit. R/W indicates whether the master is writing to or reading from the MAX9777 (R/W = 0 selects the write condition, R/W = 1 selects the read condition). After receiving the proper address, the
MAX9777 issues an ACK by pulling SDA low for one clock cycle.
The MAX9777 has a factory-/user-programmed address. Address bits A6–A2 are preset, while A0 and
A1 is set by ADD. Connect ADD to either V
DD
, GND,
SCL, or SDA to change the last 2 bits of the slave address ( Table 2).
SCL
SDA
START ILLEGAL
STOP
ILLEGAL EARLY STOP CONDITION
Figure 5. Early STOP Condition
S A6 A5 A4 A3 A2 A1 A0 R/W
Figure 6. Slave Address Byte Definition
Table 2. MAX9777 I
2
C Slave Addresses
ADD CONNECTION
GND
V
DD
SDA
SCL
I
2
C ADDRESS
100 1000
100 1001
100 1010
100 1011
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 15
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Write Data Format
There are three registers that configure the MAX9777: the MUTE register, SHDN register, and control register.
In write data mode (R/W = 0), the register address and data byte follow the device address (Figure 7).
MUTE Register
The MUTE register (01hex) is a read/write register that sets the MUTE status of the device. Bit 3 (MUTEL) of the MUTE register controls the left channel; bit 4
(MUTER) controls the right channel. A logic-high mutes the respective channel; a logic-low brings the channel out of mute.
SHDN Register
The SHDN register (02hex) is a read/write register that controls the power-up state of the device. A logic-high in bit 0 of the SHDN register shuts down the device; a logic-low turns on the device. A logic-high is required in bits 2 to 7 to reset all registers to their default settings.
Control Register
The control register (03hex) is a read/write register that determines the device configuration. Bit 1 (IN1/IN2) controls the input multiplexer, a logic-high selects input 1; a logic-low selects input 2. Bit 2 (HPS_D) controls the headphone sensing. A logic-low configures the device in automatic headphone detection mode. A logic-high disables the HPS input. Bit 3 (GAINA/B) controls the gainselect multiplexer. A logic-low selects GAINA. A logichigh selects GAINB. GAINA/B is ignored when HPS_D =
0. Bit 4 (SPKR/HP) selects the amplifier operating mode when HPS_D = 1. A logic-high selects speaker mode, and a logic-low selects headphone mode.
S ADDRESS
7 BITS
WR
I
2
C SLAVE ADDRESS.
SELECTS DEVICE.
ACK COMMAND
8 BITS
ACK
REGISTER ADDRESS.
SELECTS REGISTER TO BE
WRITTEN TO.
DATA
8 BITS
ACK
REGISTER DATA
P
1
S ADDRESS
7 BITS
WR
I
2
C SLAVE ADDRESS.
SELECTS DEVICE.
ACK COMMAND
8 BITS
ACK
REGISTER ADDRESS.
SELECTS REGISTER
TO BE READ.
S ADDRESS
7 BITS
WR
I
2
C SLAVE ADDRESS.
SELECTS DEVICE.
ACK DATA
8 BITS
DATA FROM
SELECTED REGISTER
P
1
Figure 7. Write/Read Data Format Example
Table 3. MAX9777 MUTE Register Format
REGISTER
ADDRESS
BIT
7
6
5
4
3
NAME
X
X
X
MUTER
MUTEL
2
1
0
*Default state.
X
X
X
VALUE
Don’t Care
Don’t Care
Don’t Care
0*
1
0*
1
Don’t Care
Don’t Care
Don’t Care
0000 0001
DESCRIPTION
—
—
—
Unmute right channel
Mute right channel
Unmute left channel
Mute left channel
—
—
—
Table 4. MAX9777 SHDN Register Format
REGISTER ADDRESS
BIT NAME
7
6
5
4
3
2
1
0
RESET
RESET
RESET
RESET
RESET
RESET
X
SHDN
VALUE
0*
1
0*
1
0*
1
0*
1
0*
1
0*
1
Don’t Care
0*
1
0000 0010
DESCRIPTION
—
Reset device
—
Reset device
—
Reset device
—
Reset device
—
Reset device
—
Reset device
—
Normal operation
Shutdown
*Default state.
16 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Table 5. MAX9777 Control Register Format
REGISTER ADDRESS
BIT NAME
7
6
5
X
X
X
VALUE
Don’t Care
Don’t Care
Don’t Care
0*
0000 0011
DESCRIPTION
—
—
—
Speaker mode selected
4 SPKR/HP
3 GAINA/B
1
0*
1
Headphone mode selected
Gain-setting A selected
Gain-setting B selected
0*
Automatic headphone detection enabled
2 HPS_D
1
Automatic headphone detection disabled
(HPS ignored)
1
0
*Default
IN1/IN2
X
0*
1
Don’t Care
Input 1 selected
Input 2 selected
—
Table 6. MAX9777 Status Register Format
BIT
REGISTER ADDRESS
NAME
7
6
5
4
3
2
1
0
THRM
AMPR-
AMPR+
AMPL-
AMPL+
HPSTS
X
X
VALUE
0
1
0
1
0
1
0
1
0
1
0
1
Don’t Care
Don’t Care
Read Data Format
In read mode (R/W = 1), the MAX9777 writes the contents of the selected register to the bus. The direction of the data flow reverses following the address acknowledge by the MAX9777. The master device reads the contents of all registers, including the read-only status register. Table 6 shows the status register format.
Interrupt Output ( INT)
The MAX9777 includes an interrupt output (INT) that can indicate to a master device that an event has occurred. INT is triggered when the state of HPS changes. During normal operation, INT idles high. If a headphone is inserted/removed from the jack and that action is detected by HPS, INT pulls the line low. INT remains low until a read data operation is executed.
I 2 C Compatibility
The MAX9777 is compatible with existing I 2 C systems.
SCL and SDA are high-impedance inputs; SDA has an open drain that pulls the data line low during the ninth clock pulse. The communication protocol supports the standard I 2 C 8-bit communications. The general call address is ignored. The MAX9777 slave addresses are compatible with the 7-bit I 2 C addressing protocol only.
0000 0000
DESCRIPTION
Device temperature below thermal limit
Device temperature exceeding thermal limit
OUTR- current below current limit
OUTR- current exceeding current limit
OUTR+ current below current limit
OUTR+ current exceeding current limit
OUTL- current below current limit
OUTL- current exceeding current limit
OUTL+ current below current limit
OUTL+ current exceeding current limit
Device in speaker mode
Device in headphone mode
—
—
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 17
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Applications Information
BTL Speaker Amplifiers
The MAX9777/MAX9778 feature speaker amplifiers designed to drive a load differentially, a configuration referred to as bridge-tied load (BTL). The BTL configuration (Figure 8) offers advantages over the singleended configuration, where one side of the load is connected to ground. Driving the load differentially doubles the output voltage compared to a singleended amplifier under similar conditions. Thus, the devices’ differential gain is twice the closed-loop gain of the input amplifier. The effective gain is given by:
A
VD
R
R
F
IN
Substituting 2 x V
OUT(P-P) for V
OUT(P-P) into the following equations yields four times the output power due to doubling of the output voltage:
V
RMS
=
V
OUT P P )
2 2
P
OUT
=
V
RMS
2
R
L
Since the differential outputs are biased at midsupply, there is no net DC voltage across the load. This eliminates the need for DC-blocking capacitors required for single-ended amplifiers. These capacitors can be large and expensive, consume board space, and degrade low-frequency performance.
When the MAX9777 is configured to automatically detect the presence of a headphone jack, the device defaults to gain setting A when the device is in speaker mode.
+1
-1
V
OUT(P-P)
2 x V
OUT(P-P)
V
OUT(P-P)
Single-Ended Headphone Amplifier
The MAX9777/MAX9778 can be configured as singleended headphone amplifiers through software or by sensing the presence of a headphone plug (HPS). In headphone mode, the inverting output of the BTL amplifier is disabled, muting the speaker. The gain is
1/2 that of the device in speaker mode, and the output power is reduced by a factor of 4.
In headphone mode, the load must be capacitively coupled to the device, blocking the DC bias voltage from the load (see the Typical Application Circuits ) .
Power Dissipation and Heat Sinking
Under normal operating conditions, the MAX9777/
MAX9778 can dissipate a significant amount of power.
The maximum power dissipation for each package is given in the Absolute Maximum Ratings section under
Continuous Power Dissipation or can be calculated by the following equation:
P
DISSPKG MAX )
=
T
J MAX )
θ
JA
− T
A where T
J(MAX) is +150°C, T
A is the ambient temperature, and θ
JA is the reciprocal of the derating factor in
°C/W as specified in the
+29°C/W.
Absolute Maximum Ratings section. For example, θ
JA of the TQFN package is
The increase in power delivered by the BTL configuration directly results in an increase in internal power dissipation over the single-ended configuration. The maximum power dissipation for a given V
DD and load is given by the following equation:
P
DISS MAX )
=
2 V
DD
2
π 2
R
L
If the power dissipation for a given application exceeds the maximum allowed for a given package, either reduce
V
DD
, increase load impedance, decrease the ambient temperature, or add heatsinking to the device. Large output, supply, and ground PC board traces improve the maximum power dissipation in the package.
Thermal-overload protection limits total power dissipation in these devices. When the junction temperature exceeds +160°C, the thermal-protection circuitry disables the amplifier output stage. The amplifiers are enabled once the junction temperature cools by 15°C.
This results in a pulsing output under continuous thermal-overload conditions as the device heats and cools.
Figure 8. Bridge-Tied Load Configuration
18 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Component Selection
Gain-Setting Resistors
External feedback components set the gain of the
MAX9777/MAX9778. Resistor R
IN sets the gain of the input amplifier (A
VIN
), and resistor R
F sets the gain of the second stage amplifier (A
VOUT
):
A
VIN
= −
⎛
⎝⎜
10 k Ω ⎞
R
IN
⎠⎟
, A
VOUT
= −⎛
⎝⎜
R
F
10 k Ω ⎠⎟
⎞
Combining A
VIN and A
VOUT
, R
IN and R
F set the singleended gain of the device as follows:
A
V
=
A
VIN
×
A
VOUT
= −
⎝⎜
⎛
10 k Ω ⎞
R
IN
⎠⎟
× −⎛
⎝⎜
R
F
10 k Ω ⎠⎟
⎞
= +
⎛
⎝⎜
R
F
R
IN
⎠⎟
⎞
As shown, the two-stage amplifier architecture results in a noninverting gain configuration, preserving absolute phase through the MAX9777/MAX9778. The gain of the device in BTL mode is twice that of the single-ended mode. Choose R
IN between 10k Ω and 15kΩ and R
F between 15kΩ and 100k Ω.
Input Filter
The input capacitor (C
IN
), in conjunction with R
IN
, forms a highpass filter that removes the DC bias from an incoming signal. The AC-coupling capacitor allows the amplifier to bias the signal to an optimum DC level.
Assuming zero-source impedance, the -3dB point of the highpass filter is given by: f −
3 dB
=
1
2 π R C
Choose R
IN according to the Gain-Setting Resistors section. Choose the C
IN such that f
-3dB is well below the lowest frequency of interest. Setting f
-3dB too high affects the amplifier’s low-frequency response. Use capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with highvoltage coefficients, such as ceramics, may result in an increased distortion at low frequencies.
Other considerations when designing the input filter include the constraints of the overall system, the actual frequency band of interest, and click-andpop suppression.
Output-Coupling Capacitor
The MAX9777/MAX9778 require output-coupling capacitors to operate in single-ended (headphone) mode. The output-coupling capacitor blocks the DC component of the amplifier output, preventing DC current from flowing to the load. The output capacitor and the load impedance form a highpass filter with a -3dB point determined by: f −
3 dB
=
1
2 π R C
As with the input capacitor, choose C
OUT such that f
-3dB is well below the lowest frequency of interest.
Setting f
-3dB too high affects the amplifier‘s low-frequency response.
Load impedance is a concern when choosing C
OUT
.
Load impedance can vary, changing the -3dB point of the output filter. A lower impedance increases the corner frequency, degrading low-frequency response.
Select C
OUT such that the worst-case load/C
OUT combination yields an adequate response. Select capacitors with low ESR to minimize resistive losses and optimize power transfer to the load.
If layout constraints require a physically smaller outputcoupling capacitor, decrease the value of C
OUT and add series resistance to the output of the MAX9777/MAX9778
(see Figure 9). With the added series resistance at the output, the cutoff frequency of the highpass filter is: f
− 3 dB
=
2 π
(
1
R
L
+ R
SERIES
)
C
OUT
Since the cutoff frequency of the output highpass filter is inversely proportional to the product of the total load resistance seen by the outputs (R L + R SERIES ) and
C
OUT
, increase the total resistance seen by the
MAX9777/MAX9778 outputs by the same amount C OUT is decreased to maintain low-frequency performance.
Since the added series resistance forms a voltagedivider with the headphone speaker resistance for frequencies within the passband of the highpass filter, there is a loss in voltage gain. To compensate for this loss, increase the voltage gain setting by an amount equal to the attenuation due to the added series resistance. Use the following equation to approximate the required voltage gain compensation:
A
OUT_+
C
OUT
= 20 log
⎛
⎝⎜
R
L
+ R
SERIES
⎞
R
L
⎠⎟
R
SERIES
R
L
Figure 9. Reducing C
OUT by Adding R
SERIES
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 19
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
BIAS Capacitor
BIAS is the output of the internally generated 2.5VDC
bias voltage. The BIAS bypass capacitor, C
BIAS
, improves PSRR and THD+N by reducing power supply and other noise sources at the common-mode bias node, and also generates the clickless/popless, startup/shutdown DC bias waveforms for the speaker amplifiers. Bypass BIAS with a 1µF capacitor to GND.
Supply Bypassing
Proper power-supply bypassing ensures low-noise, lowdistortion performance. Place a 0.1µF ceramic capacitor from V
DD to GND. Add additional bulk capacitance as required by the application, typically 100µF. Bypass
PV
DD with a 100µF capacitor to GND. Locate bypass capacitors as close to the device as possible.
Gain Select
The MAX9777/MAX9778 feature multiple gain settings on each channel, making available different gain and feedback configurations. The gain-setting resistor (R
F
) is connected between the amplifier output (OUT_+) and the gain set point (GAIN_). An internal multiplexer switches between the different feedback resistors depending on the status of the gain control input. The stereo
MAX9777/MAX9778 feature two gain options per channel. See Tables 1a and 1b for the gain-setting options.
Bass Boost Circuit
Headphones typically have a poor low-frequency response due to speaker and enclosure size limitations.
A bass boost circuit compensates the poor low-frequency response (Figure 10). At low frequencies, the capacitor C
F is an open circuit, and the effective impedance in the feedback loop (R
F(EFF)
) is R
F(EFF)
= R
F1
.
At the frequency:
1
2 πR C
F where the impedance, C
F, begins to decrease, and at high frequencies, the C
F is a short circuit. Here the impedance of the feedback loop is:
R
F EFF )
=
R
F 1
R
F 1
×
+
R
F 2
R
F 2
Assuming R
F1
= R
F2
, then R
F(EFF) at low frequencies is twice that of R
F(EFF) at high frequencies (Figure 11).
Thus, the amplifier has more gain at lower frequencies, boosting the system’s bass response. Set the gain rolloff frequency based upon the response of the speaker and enclosure.
To minimize distortion at low frequencies, use capacitors with low-voltage coefficient dielectrics when selecting C F . Film or C0G dielectric capacitors are good choices for C
F
. Capacitors with high-voltage coefficients, such as ceramics (non-C0G dielectrics), can result in increased distortion at low frequencies.
Layout and Grounding
Good PC board layout is essential for optimizing performance. Use large traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance, as well as route heat away from the device. Good grounding improves audio performance, minimizes crosstalk between channels, and prevents any digital switching noise from coupling into the audio signal. If digital signal lines must cross over or under audio signal lines, ensure that they cross perpendicular to each other.
The MAX9777/MAX9778 TQFN package features an exposed thermal pad. This pad lowers the package’s thermal resistance by providing a direct heat conduction path from the die to the PC board. Connect the pad to signal ground (0V) by using a large pad or multiple vias to the ground plane.
GAIN
C
F
R
F1
R
F2
R
F1
R
IN
R
IN
V
BIAS
R
F1
R
IN
R
F2
1
2
π R
F2
C
F
Figure 11. Bass Boost Response Figure 10. Bass Boost Circuit
20 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
FREQUENCY
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Application Circuits
4.5V TO 5.5V
CODEC
MICROCONTROLLER
1 µF
0.1
µF
15k Ω
HPF
0.68
µF
0.68
µF
15k Ω
0.68
µF
15k Ω
HPF
0.68
µF
15k Ω
4.5V TO 5.5V
1k Ω 1k Ω 10k Ω
100 µF
17
3, 4
BIAS
V
DD
11, 25
PV
DD
GAINLB
8
GAINLA
7
OUTL+
10
0.047
µF
27.4k
Ω
33.2k
Ω
15k
Ω
5
INL1
OUTL-
12
6
INL2
19
INR1
MAX9777
OUTR-
26
20
INR2
OUTR+
24
GAINRA
21
GAINRB
22
28
15
SCL
1
SDA
ADD
2
INT
14
SHDN
GND
18
HPS
16
PGND
9, 13, 23, 27
0.047
µF
15k Ω
33.2k
Ω
27.4k
Ω
47k Ω
220 µF
10k Ω
220 µF
10k Ω
4.5V TO 5.5V
680k Ω
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 21
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Typical Application Circuits (continued)
4.5V TO 5.5V
CODEC
MICROCONTROLLER
1 µF
0.1
µF
15k Ω
HPF
0.68
µF
0.68
µF
15k
Ω
0.68
µF
15k Ω
HPF
0.68
µF
15k Ω
100 µF
17
3, 4
BIAS
V
DD
11, 25
PV
DD
GAINLB
8
GAINLA
7
OUTL+
10
0.047
µF
27.4k
Ω
33.2k
Ω
15k Ω
5
INL1
OUTL-
12
6
INL2
19
INR1
MAX9778
OUTR-
26
20
INR2
OUTR+
24
GAINRA
21
GAINRB
22
28
IN1/2
1
MUTE
15
2
14
GAINA/B
HPS_EN
SHDN
GND
18
HPS
16
PGND
9, 13, 23, 27
0.047
µF
15k Ω
33.2k
Ω
27.4k
Ω
47k Ω
220 µF
10k Ω
220 µF
10k Ω
4.5V TO 5.5V
680k Ω
22 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Functional Diagrams
4.5V TO 5.5V
100 µ F
AUDIO
INPUT
AUDIO
INPUT
0.68
µ F 15k
Ω
0.68
µ F 15k Ω
5 INL1
6 INL2
2:1
INPUT
MUX
11, 25 3, 4
PV
DD
V
DD
10k Ω
0.1
µ F
10k Ω
GAIN
SET
MUX
17 BIAS
10k Ω
BIAS
1 µ F
10k Ω
GAINLB 8
GAINLA 7
OUTL+ 10
15k Ω
33.2k
Ω
0.047
µF
27.4k
Ω
220 µF
10k Ω
OUTL12
AUDIO
INPUT
AUDIO
INPUT
0.68
µ F
0.68
µ F
4.5V TO 5.5V
15k Ω
15k Ω
19 INR1
20 INR2
2:1
INPUT
MUX
10k Ω 1k Ω 1k Ω
TO
µCONTROLLER
14
28
1
15
2
SHDN
SCL
SDA
ADD
INT
LOGIC
MAX9777
GND
18
10k Ω
10k Ω
GAIN
SET
MUX
GAINRB 22
GAINRA 21
15k Ω
33.2k
Ω
0.047
µF
27.4k
Ω
OUTR+ 24
220 µF
10k Ω
10k Ω
10k Ω
OUTR26
PGND
HPS
9, 13, 23, 27
HPS 16
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 23
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Functional Diagrams (continued)
4.5V TO 5.5V
100 µ F
AUDIO
INPUT
AUDIO
INPUT
0.68
µ F 15k Ω
0.68
µ F 15k Ω
5 INL1
6 INL2
2:1
INPUT
MUX
11, 25 3, 4
PV
DD
V
DD
10k Ω
0.1
µ F
10k Ω
GAIN
SET
MUX
17 BIAS
BIAS
10k Ω
1 µ F
10k Ω
GAINLB 8
GAINLA 7
15k Ω
33.2k
Ω
0.047
µF
27.4k
Ω
OUTL+ 10
220
µF
10k Ω
OUTL12
AUDIO
INPUT
AUDIO
INPUT
0.68
µ F
0.68
µ F
4.5V TO 5.5V
15k Ω
15k
Ω
19 INR1
20 INR2
2:1
INPUT
MUX
10k
Ω 1k Ω 1k Ω
TO
µCONTROLLER
14
28
1
15
2
SHDN
IN1/2
MUTE
GAINA/B
HPS_EN
LOGIC
MAX9778
GND
18
10k Ω
10k Ω
GAIN
SET
MUX
GAINRB 22
GAINRA 21
15k Ω
33.2k
Ω
0.047
µF
27.4k
Ω
OUTR+ 24
220
µF
10k Ω
10k Ω
10k Ω
OUTR26
PGND
HPS
9, 13, 23, 27
HPS 16
24 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Pin Configurations
TOP VIEW TOP VIEW
21 20 19 18 17 16 15
GAINRB 22
PGND 23
OUTR+ 24
PV
DD
25
OUTR26
PGND 27
SCL 28
+
MAX9777
1 2 3 4 5 6 7
10
9
8
12
11
14 SHDN
13 PGND
OUTL-
PV
DD
OUTL+
PGND
GAINLB
THIN QFN
21 20 19 18 17 16 15
GAINRB 22
PGND 23
OUTR+ 24
PV
DD
OUTR-
25
26
PGND 27
IN1/2 28
+
MAX9778
1 2 3 4 5 6 7
10
9
8
12
11
14 SHDN
13 PGND
OUTL-
PV
DD
OUTL+
PGND
GAINLB
THIN QFN
_ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _ 25
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages .)
26 _ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ _
Stereo 3W Audio Power Amplifiers with
Headphone Drive and Input Mux
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages .)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 27
© 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
advertisement
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Related manuals
advertisement