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LCD TV
SERVICE MANUAL
CHASSIS : LA06H
MODEL : 32LD340H
32LD340H-UA
MODEL :
32LD330H
32LD330H-UA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67207503 (1106-REV00) Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION............................................................... 11
EXPLODED VIEW .................................................................................. 20
SVC. SHEET ...............................................................................................
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 2 -
LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks.
It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc.
If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1M
Ω and 5.2M
Ω
.
When the exposed metal has no return path to the chassis the reading must be infinite.
An other abnormality exists that must be corrected before the receiver is returned to the customer.
Leakage Current Hot Check
(See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit
AC Volt-meter
To Instrument's exposed
METALLIC PARTS
0.15uF
1.5 Kohm/10W
Good Earth Ground such as WATER PIPE,
CONDUIT etc.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 3 LGE Internal Use Only
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power source before; a. Removing or reinstalling any component, circuit board module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard.
unit under test.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static type solder removal device. Some solder removal devices not classified as "anti-static" can generate electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed.
CAUTION: Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
2. Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its assemblies.
4. Unless specified otherwise in this service manual, clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable non-abrasive applicator; 10% (by volume) Acetone and 90% (by volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its electrical assemblies unless all solid-state device heat sinks are correctly installed.
7. Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor "chip" components. The following techniques should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500°F to 600°F.
2. Use an appropriate gauge of RMA resin-core solder composed of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique a. Allow the soldering iron tip to reach normal temperature.
(500°F to 600°F) b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500°F to 600°F) b. First, hold the soldering iron tip and solder the strand against the component lead until the solder melts.
c.
Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil, and hold it there only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit board printed foil.
d.
Closely inspect the solder area and remove any excess or splashed solder with a small wire-bristle brush.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 4 LGE Internal Use Only
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts.
2. Draw away the melted solder with an anti-static suction-type solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding leads extending from the circuit board and crimp the "U" with long nose pliers to insure metal to metal contact then solder each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit board.
3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5.
Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow stake.
2. Securely crimp the leads of replacement component around notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced component and adjacent components and the circuit board to prevent excessive component temperatures.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 5 -
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or "lift-off" the board. The following guidelines and procedures should be followed whenever this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board. (Use this technique only on IC connections).
1. Carefully remove the damaged copper pattern with a sharp knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper pattern and let it overlap the previously scraped end of the good copper pattern. Solder the overlapped area and clip off any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern at connections other than IC Pins. This technique involves the installation of a jumper wire on the component side of the circuit board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges.
LGE Internal Use Only
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied all of the 32”, 37”, 42” LCD TV with
LA06G/H chassis and 26” LCD TV with LA06H chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, IEC specification
- EMC: FCC, ICES, IEC specification
1) Temperature: 25 ºC ± 5 ºC
2) Relative Humidity: 65 ± 10 %
3) Power Voltage : Standard input voltage(100-240V~, 50/60Hz)
* Standard Voltage of each product is marked by models
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to the adjustment.
4. General Specification(TV)
No Item
1 Receivable System
2 Available Channel
3 Input Voltage
4 Market
5 Screen Size
6 Aspect Ratio
7 Tuning System
8 LCD Module
9 Operating Environment
10 Storage Environment
1) ATSC / NTSC-M
1) VHF : 02 ~ 13
2) UHF : 14 ~ 69
Specification
3) DTV : 02 ~ 69
4) CATV : 01 ~ 135
5) CADTV : 01 ~ 135
1) AC 100 ~ 120V 50/60Hz
North America
32 / 37 / 42 inches
16:9
FS
LC370WUE-SCA1
LC320WXE-SCA2
LC420WUE-SCA2
Temp : 0 ~ 40 deg
Humidity : ~ 80 %
Temp : -20 ~ 60 deg
Humidity : -85 %
Remark
Mark : 110V, 60Hz
37LD340H-UA/37LD330H-UA
32LD340H-UA/37LD330H-UA
42LD340H-UA
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 6 LGE Internal Use Only
5. Chrominance & Luminance
5.1. 42LD340H-UA : LC420WUG-SCA2(LGD)
No.
1 White brightness
Item
2 Luminance uniformity
3 Color coordinate RED
(Default)
GREEN
BLUE
WHITE
Y
X
Y
X
X
Y
X
Y
Min
200
Typ.
-0.03
4 Contrast ratio
6 Color Temperature Cool
Medium
Warm
1100
10,000:1
Typ.
-0.015
Typ
-0.015
Typ
-0.015
Typ
250
0.292
1450
50,000:1
0.269
0.273
0.285
0.293
0.313
0.329
0.636
0.335
0.291
0.603
0.146
0.061
0.279
Max
1.25
Typ.
+0.03
Unit cd/m 2 EPA 4.0
Remarks
5point
Typ
+0.015
Typ
+0.015
Typ
+0.015
EPA 4.0, except RGB mode
The W/B Tolerance is
±0.015 for Adjustment
5.2. 37LD340H-UA/37LD330H-UA : LC370WUE-SCA1(LGD)
No.
1 White brightness
Item
2 Luminance uniformity
3 Color coordinate RED
(Default)
GREEN
4 Contrast ratio
BLUE
WHITE
6 Color Temperature Cool
Medium
Warm
X
Y
X
Y
X
Y
X
Y
Min
250
Typ.
-0.03
1100
10,000:1
Typ.
-0.015
Typ
-0.015
Typ
-0.015
Typ
300
0.639
0.334
0.289
0.606
0.145
0.065
0.279
0.292
1500
50,000:1
0.269
0.273
0.285
0.293
0.313
0.329
Max
Typ.
+0.03
Typ
+0.015
Typ
+0.015
Typ
+0.015
Unit cd/m 2 EPA 4.0
5point
Remarks
EPA 4.0, except RGB mode
The W/B Tolerance is
±0.015 for Adjustment
- EPA 4.0
Luminance : To qualify as ENERGY STAR under this specification, the peak luminance of the product in the ‘home” mode, or in the default mode as shipped, shall not be less than 65% of the peak luminance of the “retail” mode, or the brightest selectable preset mode, of the product.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 7 LGE Internal Use Only
5.3. 32LD340H-UA/32LD330H-UA : LC320WXN-SCA2(LGD)
No.
1 White brightness
Item
2 Luminance uniformity
3 Color coordinate RED
(Default)
GREEN
4 Contrast ratio
BLUE
WHITE
6 Color Temperature Cool
Medium
Warm
X
Y
X
Y
X
Y
X
Y
Min
200
Typ.
-0.03
900
10,000:1
Typ.
-0.015
Typ
-0.015
Typ
-0.015
Typ
250
0.636
0.335
0.291
0.603
0.146
0.061
0.279
0.292
1200
50,000:1
0.269
0.273
0.285
0.293
0.313
0.329
Max
Typ.
+0.03
Typ
+0.015
Typ
+0.015
Typ
+0.015
Unit cd/m 2 EPA 4.0
5point
Remarks
EPA 4.0, except RGB mode
The W/B Tolerance is
±0.015 for Adjustment
- EPA 4.0
Luminance : To qualify as ENERGY STAR under this specification, the peak luminance of the product in the ‘home” mode, or in the default mode as shipped, shall not be less than 65% of the peak luminance of the “retail” mode, or the brightest selectable preset mode, of the product.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 8 LGE Internal Use Only
6. Component Video Input (Y, C
B/
P
B
, C
R
/P
R
)
No Resolution
1. 720*480
2. 720*480
3. 720*480
4. 720*480
5. 1280*720
6.
1280*720
7. 1920*1080
8. 1920*1080
9. 1920*1080
10.
1920*1080
11.
1920*1080
12.
1920*1080
13.
1920*1080
14.
1920*1080
15.73
15.73
31.50
31.47
45.00
44.96
33.75
33.72
67.500
67.432
27.000
26.97
33.75
33.71
60
59.94
60
59.94
60.00
59.94
60.00
59.94
60
59.94
24.000
23.976
30.000
29.97
7. RGB Input (PC)
No Resolution
PC
1. 640*350
2. 720*400
3. 640*480
4.
800*600
5. 1024*768
6. 1280*768
7. 1360*768
8. 1280*1024
9. 1600*1200
10.
1920*1080
31.468
31.469
31.469
37.879
48.363
47.776
47.712
63.981
75.000
70.09
70.08
59.94
60.31
60.00
59.87
60.015
60.020
60.000
13.5135
13.5
27.027
27.0
74.25
74.176
74.25
74.176
148.50
148.352
74.25
74.176
74.25
740176
Proposed
SDTV ,DVD 480I
SDTV ,DVD 480I
SDTV 480P
SDTV 480P
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
25.17
28.32
25.17
40.00
65.00
79.50
85.50
108.00
162
EGA
DOS
Proposed
DDC
X
O
VESA(VGA)
VESA(SVGA)
VESA(XGA)
CVT(WXGA)
VESA(WXGA)
VESA (SXGA)
O
O
O
X
X
O
O
O
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 9 LGE Internal Use Only
8. HDMI input (PC/DTV)
No Resolution
PC
1.
2.
3.
640*350
720*400
640*480
4.
800*600
5. 1024*768
6. 1280*768
7. 1360*768
8. 1280*1024
9. 1600*1200
63.981
75.000
10.
1920*1080 67.500
31.468
31.469
31.469
37.879
48.363
47.776
47.712
DTV
1 720*480
2 720*480
3 1280*720
4 1280*720
5 1920*1080
6 1920*1080
7 1920*1080
8 1920*1080
9 1920*1080
10 1920*1080
11 1920*1080
12 1920*1080
31.50
31.47
45.00
44.96
33.75
33.72
67.500
67.432
27.000
26.97
33.75
33.71
60
59.94
60.00
59.94
60.00
59.94
60
59.939
24.000
23.976
30.000
29.97
70.09
70.08
59.94
60.31
60.00
59.870
60.015
60.020
60.000
25.17
28.32
25.17
40.00
65.00
79.5
85.50
108.00
162
Proposed
DDC
EGA
DOS
VESA(VGA)
X
O
X
VESA(SVGA)
VESA(XGA)
CVT(WXGA)
VESA (WXGA)
VESA (SXGA)
O
O
O
O
O
X
27.027
27.00
74.25
74.176
74.25
74.176
148.50
148.352
74.25
74.176
74.25
74.176
SDTV 480P
SDTV 480P
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
O
O
O
O
O
O
O
O
O
O
O
O
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 10 LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application range
This spec. sheet applies to LA06G Chassis applied LCD TV all models manufactured in TV factory
4. Automatic Adjustment
4.1. ADC Adjustment
(1) Overview
ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate
RGB deviation.
2. Specification
2.1 Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument.
2.2 AdjThe adjustment must be performed in the circumstance of 25 ±5 C of temperature and
65±10% of relative humidity if there is no specific designation.
2.4 The input voltage of the receiver must keep
100~240V, 50/60Hz.
2.5 The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15
In case of keeping module is in the circumstance of
0°C, it should be placed in the circumstance of above
15°C for 2 hours
(2) Equipment & Condition
1) Jig (RS-232C protocol)
2) Inner Pattern
- Resolution : 1080P (Inner Pattern)
- Resolution : 1024*768 RGB (Inner Pattern)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
(3) Adjustment
1) Adjustment method
- Using RS-232, adjust items listed in 3.1 in the other shown in “4.1.3.3”
2) Adj. protocol
Ref.) ADC Adj. RS232C Protocol_Ver1.0
In case of keeping module is in the circumstance of below -20°C, it should be placed in the circumstance of above 15°C for 3 hours,.
3) Adj. order
Protocol Command
Enter adj. mode aa 00 00 a 00 OK00x
Set ACK
Source change xb 00 40 b 00 OK40x (Adjust 480i Comp1 )
Caution) When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area.
3. Adjustment items
3.1 Board Level Adjustment
• Adjust 480i Comp1 (ADC)
• EDID/DDC download
Above adjustment items can be also performed in Final
Assembly if needed. Both Board-level and Final assembly adjustment items can be check using In-Star Menu 1.ADJUST
CHECK.
Component 1080p RGB-PC Adjust will be calculated by 480i adjust value.
3.2 Final assembly adjustment
• White Balance adjustment
• RS-232C functionality check
• Factory Option setting per destination
• Ship-out mode setting (In-Stop)
Begin adj.
Return adj. result xb 00 60 b 00 OK60x (Adjust 1080p RGB) ad 00 10
OKx (Case of Success)
Read adj. data (main)
NGx (Case of Fail)
(main) ad 00 20 000000000000000000000000007c007b006dx
Confirm adj.
(sub) (sub) ad 00 21 000000070000000000000000007c00830077x ad 00 99 NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj.
aa 00 90 a 00 OK90x
- aa 00 00 [Enter ADC adj. mode]
- xb 00 40 [Change input source to Component1(480i)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 60 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- ad 00 90 End adj.
3.3 Etc
• Ship-out mode
• Tool option menu
• USB Download(S/W Update, Option, Service only)
• ISP Download(Option)
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- 11 LGE Internal Use Only
5. Manual Adjustment
5.1 ADC(Saturn5) Adjustment
5.1.1 Overview
ADC adjustment is needed to find the optimum black level and gain in Analog-to-Digital device and to compensate
RGB deviation.
5.1.2 Equipment & Condition
1) Adjust Remocon
2) 801GF(802B, 802F, 802R) or MSPG925FA Pattern
Generator
- Resolution: 480i Comp1 (MSPG-925FA:model-209, pattern-65)
- Resolution: 1024*768 RGB(Inner Pattern)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7±0.1 Vp-p
- Image
3) Must use standard cable
5.1.3 Adjust method
5.1.3.1 ADC 480i/1080p Comp1 RGB
1) Check connected condition of Comp1 cable to the equipment
2) Give a 480i Mode, Horizontal 100% Color Bar Pattern to
Comp1.
(MSPG-925FA -> Model: 209, Pattern: 65)
3) Change input mode as Component1 and picture mode as “Standard”
4) Press the In-start Key on the ADJ remote after at least 1 min of signal reception. Then, select 5. ADC Calibration.
And Press OK Button on the menu “Start”. The adjustment will start automatically.
5) If ADC Comp 480i is successful, “ADC Component
Success” is displayed and Comp480i/1080p is completed.
If ADC calibration is failure, “ADC Component Fail” is displayed.
6) If ADC calibration is failure, after rechecking ADC pattern or condition, retry calibration.
7) After completing ADC Component, input mode will be changed to RGB automatically.
8) If ADC calibration is successful, “ADC RGB Success” is displayed.
If ADC calibration is failure, “ADC RGB Fail” is displayed.
9) If ADC calibration is failure, after recheck ACD pattern or condition, retry calibration.
Identification Data) / DDC (Display
Data Channel) download
5.2.1 Overview
It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of “Plug and Play”
5.2.2 Equipment
• Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
• Adjust remocon
5.2.3 Download method
1) Press Adj. key on the Adj. R/C,
2) Select EDID D/L menu.
3) By pressing Enter key, EDID download will begin
4) If Download is successful, OK is display, but If
Download is failure, NG is displayed.
5) If Download is failure, Re-try download.
• Caution) When EDID Download, must remove
RGB/HDMI Cable.
5.2.4 EDID DATA
HDMI-1 EDID table
HDMI-2 EDID table
Analog (RGB) EDID table
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 12 LGE Internal Use Only
5.3. White Balance Adjustment
(1) Overview
• W/B adj. Objective & How-it-works
- Objective: To reduce each Panel’s W/B deviation
- How-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic
Range. In order to prevent saturation of
Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find the desired value.
- Adj. condition : normal temperature
1) Surrounding Temperature: 25±5ºC
2) Warm-up time: About 5 Min
3) Surrounding Humidity: 20% ~ 80%
(2) Equipment
1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12)
2) Adj. Computer(During auto adj., RS-232C protocol is needed)
3) Adjust Remocon
4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model:217, Pattern:78)
-> Only when internal pattern is not available
• Color Analyzer Matrix should be calibrated using CS-1000
(3) Equipment connection MAP
Probe
Co lo r An alyzer
RS -232C
Co m p ut er
RS -232C
RS -232C
Pat t ern Gen erat o r
Signal Source
* If TV internal pattern is used, not needed
Connection Diagram of Automatic Adjustment
(4) Adj. Command (Protocol)
1) RS-232C Command used during auto-adj.
RS-232C COMMAND
[CMD ID DATA] wb wb
00
00
00 ff
Meaning
Begin White Balance adj.
End White Balance adj.(Internal pattern disappeared)
Ex) wb 00 00 -> Begin white balance auto-adj.
wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data jb 00 c0
...
...
wb 00 1f -> Gain adj. complete
*(wb 00 20(start), wb 00 2f(end)) -> Off-set adj.
wb 00 ff -> End white balance auto adj.
2) Adjustment Map
Applied Model : LA06A Chassis All models.
ITEM Command
Cool R-Gain
G-Gain
B-Gain
R-Cut
G-Cut
B-Cut
Medium R-Gain
G-Gain
Warm
B-Gain
R-Cut
G-Cut
B-Cut
R-Gain
G-Gain
B-Gain
R-Cut
G-Cut
Cmd 1 Cmd 2 j g j j i h j j j j j j a b c d e f
Data Range
(Hex.)
Min
00
Max
C0
00
00
C0
C0
00
00
00
00
00
00
C0
C0
C0
C0
C0
C0
Default
(Decimal)
(5) Auto adj. method
1) Set TV in adj. mode using POWER ON key
2) Zero calibrate probe then place it on the center of the
Display
3) Connect Cable(RS-232C)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sing), check adj. status pre mode (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
* W/B Adj. must begin as start command “wb 00 00” , and finish as end command “wb 00 ff”, and Adj. offset if need
(6) Manual adj. method
1) Set TV in Adj. mode using POWER ON
2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface..
3) Press ADJ key -> EZ adjust using adj. R/C > 6. White-
Balance then press the cursor to the right (KEY
G
).
(When KEY(
G
) is pressed 216 Gray internal pattern will be displayed)
4) One of R Gain / G Gain / B Gain should be fixed at
192, and the rest will be lowered to meet the desired value.
5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature.
- If internal pattern is not available, use RF input. In EZ
Adj. menu 6.White Balance, you can select one of 2
Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216
Gray pattern.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 13 LGE Internal Use Only
* Adj. condition and cautionary items
1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding.
2) Probe location
- LCD: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80°~ 100°)
3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no signal or Full-white pattern.
(7) Reference (White Balance Adj. coordinate and color temperature)
• Luminance: 216 Gray
• Standard color coordinate and temperature using CS-
1000
Mode Temp
∆
UV
COOL
MEDIUM
WARM x
Color Coordination y
0.269
0.285
0.273
0.293
0.313
0.329
11000K
9300K
6500K
0.0000
0.0000
0.0000
5.5 Option selection per country
5.5.1 Overview
• Option selection is only done for models in Non-USA North
America due to rating
• Applied model: LA06A Chassis applied None USA model(CANADA, MEXICO)
5.5.2 Method
1) Press ADJ key on the Adj. R/C, then select Country
Group Meun
2) Depending on destination, select KR or US, then on the lower Country option, select US, CA, MX. Selection is done using +, - KEY
5.6 Tool Option selection
• Method : Press Adj. key on the Adj. R/C, then select Tool option.
Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5
32LD320H-UA 16864 8786 32772 2305 0
37LD320H-UA 20960 8786 32772 2305 0
42LD320H-UA 25056
26LD320H-UA 12768
8786
8786
32772
32772
2305
2305
0
0
• Standard color coordinate and temperature using CA-
210(CH 14)
Mode Color Coordination Temp
∆
UV
COOL
MEDIUM
WARM x
0.269±0.002
0.285±0.002
0.313+0.002
y
0.273±0.002
0.293±0.002
0.329±0.002
13000K
9300K
6500K
0.0000
0.0000
0.0000
5.7 hip-out mode check (In-stop)
• After final inspection, press In-Stop key of the Adj. R/C and check that the unit goes to Stand-by mode.
• After final inspection, Always turn on the Mechanical S/W.
Contents Protection) SETTING
- HDCP setting is not necessary in This Chassis.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 14 LGE Internal Use Only
6. GND and Internal Pressure check
6.1. Method
1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process.
6.2. Checkpoint
• TEST voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
• TEST time: 1 second
• TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE & NEUTRAL
• LEAKAGE CURRENT: At 0.5mArms
7. Audio
Remark
32/37/42LD320H-UA
26LD320H-UA
1. Audio practical max 9.0 10.0 Measurement
Output, L/R 8.5
(Distortion=10% 6.3
8.9
7.0
9.8
8.4
Vrms
W condition
EQ Off max Output)
2. Speaker (8
Ω
7.09
7.48
8.19
10.0 15.0
Impedance) 5.0
15.0
Vrms AVL Off
Clear Voice Off
W Measurement
W condition
EQ Off
AVL Off
Clear Voice Off
Measurement condition:
1. RF input : Mono, 1KHz sine wave signal, 100% Modulation
2. CVBS, Component : 1KHz sine wave signal 0.4Vrms
3. RGB PC : 1KHz sine wave signal 0.7Vrms
32/37/42LD320H-UA
26LD320H-UA
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 15 LGE Internal Use Only
8. Etc
Power Status
Main B/D Shipping Condition AC Swithch condtion
Chassis Module Assembly ON N/A
Front Module Assembly N/A OFF
Factory incoming ON OFF
Final Assembly ON
Ship-Out OFF
ON
ON
(4) Updating is staring.
9. USB S/W Download (option)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is Low, it didn’t work.
But your downloaded version is High, USB data is automatically detecting
(3) Show the message “Copying files from memory”
(5) Updating Completed, The TV will restart automatically
(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.
* After downloading, have to adjust TOOL OPTION again.
1) Push "IN-START" key in service remote controller.
2) Select "Tool Option 1" and Push “OK” button.
3) Punch in the number. (Each model has their number.)
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 16 LGE Internal Use Only
10. Test factor for commercial model
10.1 IR IN/Out, Lodgenet Check
10.1.1 Check Order “OK” Judgment
1) The method of Cable connecting from jig to TV. a) Power Cable is connected to jig for supplying voltage. (as below picture point2) b) Phone jack is Connected for IR out test from TV
REMOTE CONTROL OUT(JK900) to jig. (as below picture point1) c) In the right side of check jig, 11pin SPI/MPI signal cable is connected to MPI dummy board. (as below picture point3)
2) Test sequence a) Press EYE using adjust remote-control. b) Then, tuning the channel 96- 1.(Lodgenet digital1.) automatically. c) Check it whether the video is clear and 1~5 factor
“OK” like below picture.
(IR IN / IR OUT / SPI TEST / MPI TEST / 12V IN)
If you find any problem, press <Eye> button and retest.
IR IN
Power
MPI/SPI
SIGNAL 11P
No.3 Pin on nSPI mode
10.1.2 Needs JIG & Equip. & Cable
1) adjust remote-control
2) commercial check jig & adapter
3) 11 pin cable
4) Phone jack Cable
10.2 Auto camport test
After D-box on, AC power Off and On.
When available AV signal comes to side AV jack, input mode changing to AV2 automatically.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 17 LGE Internal Use Only
10.3 b_LAN Main board Check
10.3.1 Overview
It is LNET RF modem & FTG card
10.3.2 Equipment
1) b_LAN Checker: UTC-1000 (with Cable accessory)
2) Computer(for test result monitoring)
3) Connection JIG
10.3.3 Equipnent connection map & b_LAN Check
Pow er
RJ12
TOP b_LAN RF IN
Phone Jack (2)
Computer LA N
PORT
AC 110V
TOP1
TOP2
UTC-1000
LAN PORT
4) Check
=========================================
1. Setting Procedure
1) Setting JIG
(1) Connect UTC-1000 Equipment to JIG device as a like left picture
- Connection Line:
UTC-1000 TOP1 <--> Game port(RJ21)
-> TV-LINK CFG (Phone Jack)
UTC-1000 TOP2 <--> JIG 11pin Connection
UTC-1000 RF1 <--> b_LAN RF IN
UTC-1000 LAN <--> PC LAN Port
2. Working procedure
1) Connection
UTC-1000 LAN <--> PC LAN Port
UTC-1000 TOP1 <--> Game port(RJ21)
-> TV-LINK CFG (Phone Jack)
UTC-1000 RF1 <--> b_LAN RF IN
2) Power on JIG
3) Test Start
UTC-1000 TOP2 <--> JIG 11pin Connection
4) Checking b-LAN MAC Address
Check whether it is same their address numbers or not between B-LAN Label and on the pc address numbers.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 18 LGE Internal Use Only
* Checking JIG contents
1. Check whether displaying all “Pass” or not at the number 3.4.6.7.9 contents of UTC-1000 on the PC
2. Check “Version 6.0” of the 1. b_LAN Application version
3. Check whether it is same their address numbers or not between B-LAN Label and 2. MAC Address on the pc.
11. Serial number download.
Connect Bar Code scan equipment and TV set by RS-232C cable.
1) E2PROM Data Write
2) E2PROM Data Read
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 19 LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Copyright LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 20 -
LGE Internal Use Only
+12V/+15V
FROM LIPS & POWER B/D
PANEL_POWER
+3.5V_ST
C436
0 . 0 1 u F
25V
C438
0 . 1 u F
16V
C442
10uF
16V
OPT
New item
+3.5V_ST
C465
1uF
10V
Q409
AO3407A
RT1P141C-T112
Q402
C404
0 . 1 u F
16V
PANEL_VCC
RL_ON
+3.5V_ST
C401
100uF
16V
+12V/+15V
C402
100uF
16V
R408
2.2K
R401
10K
L402
MLB-201209-0120P-N2
C407
0 . 1 u F
16V
<OS MODULE PIN MAP>
PIN No
LGD(PSU) o r L I P S
18
20
22
24
23
B Q401
2SC3052
L404
MLB-201209-0120P-N2
C406
0 . 1 u F
16V
INV_ON
VBR-A
GND
R406
4.7K
C408
0 . 1 u F
16V
CMO
(PSU)
A-DIM
NC
GND
1 3
GND
PWR ON
24V
GND
GND
3.5V
3.5V
GND
GND
12V
12V
12V
GND/P.DIM2
52/60:ERROR
26/32HD:NC
GND
9
11
13
15
17
19
21
23
5
7
1
3
14
16
18
20
22
24
6
8
2
4
10
12
GND
R429
47K
B
C443
4 . 7 u F
16V
G
C
E
2
AUO
(PSU)
INV_ON
E r r _ o u t
NC
E r r _ o u t
INV_ON PWM_DIM
OPT
P403
FW20020-24S
SHARP
(PSU)
INV_ON
26/32/52:PWM
60:NC
NC
P404
FM20020-24
24V
24V
GND
GND
3.5V
3.5V
GND
GND/V-sync
INV ON
A.DIM
P.DIM1
Err OUT
L407
MLB-201209-0120P-N2
C418
0 . 1 u F
50V
OPT
R477
0
OPT
P401
SMAW200-H24S2
IPS-@
(PSU)
INV_ON
E r r _ o u t
26/32/52:GND
PWM_DIM
60:PWM
V_SYNC
+24V
C426
68uF
35V
+3.3V_Normal
PANEL_CTL
001:AJ25;016:AD13
R430
10K
C
E
R431
22K
Q406
2SC3052
B
R435
22K
C
E
Q407
2SC3052
0
C451
1uF
25V
OPT
C455
0 . 1 u F
16V
R405
2.2K
OPT
OPT
R407
2.2K
POWER_18_INV_CTL
R415
100
R419
1K
+3.5V_ST
R426
10K
OPT
+3.5V_ST
R425
100
C
R418
POWER_24_INV_CTL
6.8K
OPT
E
B
R421
10K
INV_CTL
Q405
2SC3052
R427
10K
POWER_18_A_DIM
R451
0
POWER_22_A_DIM
R485 0
POWER_20_A_DIM
POWER_20_PWM_DIM
R453
0
A_DIM
POWER_24_PWM_DIM
R472 0
R479
0
R484
0
C419-*1
3.9K
PWM_DIM
R471 0
POWER_22_PWM_DIM
OPT
C416
0 . 1 u F
16V
OPT
PWM_PULL-DOWN
C419
R422 0
1uF
25V
OPT
SCAN_BLK1/OPC_OUT
R470
OPT
0
+3.3V_Normal
OPC_OUT
Placed on SMD-TOP
POWER_20_ERROR_OUT
R437 100
POWER_24_ERROR_OUT
R420
100
ERROR_OUT
C IN
C461
22uF
10V
CIC21J501NE
L420
R449
11K
1/10W
5%
R2
S7M DDR 1.5V
FB
GND
IN
BS
1
2
3
4
IC407
MP2212DN
3A
8
7
6
5
R e p l a c e d P a r t
R457
10K
C l o s e t o I C
EN/SYNC
SW_2
SW_1
VCC
1%
R1
C467
0 . 1 u F
50V
10K
R464
L423
3.6uH
+3.5V_ST
NR8040T3R6N
C472
22uF
10V
1074 mA
V o u t = 0 . 8 * ( 1 + R 1 / R 2 )
+1.5V_DDR
POWER_ON/OFF1
C476
0 . 1 u F
Placed on SMD-TOP
R452
R455
10
1/10W
1%
+12V/+15V
C405
10uF
25V
+5V_USB
+5V_USB
MAX 2000mA
IC401
MP8706EN-C247-LF-Z
IN
1
SW_1
2
SW_2
C410
0 . 1 u F
BST
R487
22
3
4
3A
8
GND
7
6
VCC
FB
5
EN/SYNC
C414
1uF
50V
R410
10K
+3.5V_ST
OPT
C482
100pF
50V
L406
3.6uH
NR8040T3R6N
R411
10K
POWER_ON/OFF2_1
+5V_USB
R1
OPT
C429
100pF
50V
R2
C420
22uF
10V
C424
0 . 1 u F
16V
V o u t = ( 1 + R 1 / R 2 ) * 0 . 8
C428
0 . 1 u F
16V
+3.3V_Normal
IC402
AZ2940D-2.5TRE1
C432
0 . 1 u F
16V
VIN
1
Vd=550mV
3
2
GND
VOUT
C403
10uF
10V
C440
0 . 1 u F
16V
+2.5V/+1.8V
+2.5V_Normal
300 mA
S T _ 3 . 5 V - - > 3 . 3 7 5 V
20V-->3.51V
24V-->3.64V
12V-->3.58V
1 8 . 5 V - - > 3 . 5 V
POWER_+24V
POWER_+24V
+24V
R404
100K
IC409
NCP803SN293
OPT
POWER_+20V
POWER_+18.5V
VCC
3
GND
1
POWER_+20V
POWER_+18.5V
Only for 32/37LED MODEL
2
OPT
RESET
OPT
R480
100
Power_DET
+12V/+15V
C457
10uF
25V
C459
10uF
25V
+3.3V_Normal
IC405
AOZ1073AIL
PGND
1
VIN
2
AGND
3
3A
FB
4
8
LX_2
7
LX_1
6
EN
5
COMP
L421
3.6uH
NR8040T3R6N
+3.5V_ST
R1
R456
10K
POWER_ON/OFF2_2
R454
C464
9.1K
2200pF
OPT
C423
100pF
50V
1934 mA
C469
22uF
10V
R2
V o u t = ( 1 + R 1 / R 2 ) * 0 . 8
+3.3V_Normal
3 . 3 V _ b e a d
L424
CIC21J501NE
3.3V_REGISTER
L424-*1
0
C473
0 . 1 u F
16V
1/10W
5%
C485
0 . 1 u F
16V
+12V/+15V
C458
10uF
25V
C460
10uF
25V
+24V +12V/+15V u s i n g 3 2 " n e w p a n n e l
+3.5V_ST
+ 3 . 5 V _ S T - > 3 . 3 7 5 V
R488
100K
IC408
NCP803SN293
VCC
3
GND
1
2
RESET
+3.5V_ST
R402
100
POWER_DET
C474
0 . 1 u F
+5V_Normal
PGND
1
VIN
2
AGND
3
FB
4
MAX 1A
IC406
AOZ1073AIL
8
LX_2
7
LX_1
3A
6
5
EN
COMP
R459
10K
L422
3.6uH
NR8040T3R6N
+3.5V_ST
R1
R423
10K
POWER_ON/OFF2_2
OPT
C427
100pF
50V
C471
22uF
10V
R2
V o u t = 0 . 8 * ( 1 + R 1 / R 2 )
+5V_Normal
C477
0 . 1 u F
16V
+3.5V_ST
S 7 M c o r e 1 . 2 6 V v o l t
2026 mA
Placed on SMD-TOP
C IN
C430
22uF
10V
L413
R e p l a c e d P a r t
R1
IC403
MP2212DN
R442
R444
22K 1%
24K 1%
C l o s e t o I C
R432
75K
1/8W
1%
R2
FB
1 8
EN/SYNC
GND
IN
2
3
3A
7
6
SW_2
SW_1
BS
4 5
VCC
C448
0 . 1 u F
50V
V o u t = 0 . 8 * ( 1 + R 1 / R 2 )
+3.5V_ST
10K
R445
L415
3.6uH
NR8040T3R6N
C453
22uF
10V
POWER_ON/OFF2_1
+1.26V_VDDC
C456
0 . 1 u F
C486
0 . 1 u F
Placed on SMD-TOP
R436
R441
10
1/10W
1%
0
C444
1uF
10V
C411
22uF
10V
OPT
+5V_TUNER
+12V/+15V
C487
10uF
25V
C488
10uF
25V
IC410
AOZ1072AI
PGND
1
VIN
2
AGND
3
2A
FB
4
8
LX_2
7
LX_1
6
5
EN
COMP
R490
10K
L431
3.6uH
NR8040T3R6N
+3.5V_ST
R1
R491
10K
POWER_ON/OFF2_2
OPT
C490
100pF
50V
R2
V o u t = 0 . 8 * ( 1 + R 1 / R 2 )
C491
22uF
10V
026:Y7
+5V_TUNER
C492
0 . 1 u F
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
Power
2 0 1 0 . 1 2 . 2 2
4
P6100
12507WS-12L
1
LED_B
2
LED_R
3
GND
4
KEY1
5
KEY2
6
5V_ST
7
GND
8
NC
9
IR
10
GND
11
NC
12
NC
13
GND
ZD6100
UDZS5.1B
5.1V
ZD6103
UDZS5.1B
5.1V
50V
1000pF
C6103
50V
1000pF
C6105
R6107
0
R6108
0
ZD6102
5 . 6 B
ZD6101
5 . 6 B ZD6104
5 . 6 B
C6107
1000pF
50V
C6102
100pF
50V
L6100
BG2012B080TF
IR
002:Q4;016:AH14
016:Q20
LED_B/LG_LOGO
LED_R/BUZZ
016:Q19
L6101
CB3216PA501E
+3.5V_ST
L6102
BG2012B080TF
L6103
BG2012B080TF
KEY2
016:O18
KEY1
016:O18
C6108
0 . 1 u F
16V
RJP
+12V/+15V
RJP
L6000
MLB-201209-0120P-N2
RJP
C6000
47uF
25V
RJP
C6001
47uF
25V
RJP
JK6000
C6002
0 . 0 1 u F
MJ-657PT-8-SD
RJP
C6004
47uF
25V
RJP
C6005
0 . 0 1 u F
R6006
10K
OPT
C6010
4 . 7 u F
25V
R6008
5.1K
R6009
5.1K
1
2
3
4
5
6
1
RJP_JK
2
3
R6002OPT 100
100
R6000
RJP
100
4
5
R6004
RJP
100
RJP
R6001 100
6 R6005
RJP
100
7
7
8
8
RJP
9
9
RJP_AOS
Q6000-*1
AO4813
S2 1
G2 2
S1 3
8 D2_2
7 D2_1
6 D1_2
S1
1
G1
2
S2
3
G2
4
R6015
0 OPT
100K
RJP_VISHAY
Q6000
SI4925BDY
G1
8
D1_2
7
D1_1
6
D2_2
5
D2_1
4
RJP_CTRL0
RJP_CTRL1
RJP_CTRL2
RJP_CTRL3
5 D1_1
RJP
C6018
47uF
25V
R6014
10K
016:B19
0 1 6 : E 1 8
0 1 6 : E 1 5
RJP_CTRL4
016:B16
016:B13
RJP
RJP
RJP
RJP
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
I R / R J P
2 0 1 0 . 1 2 . 2 2
6
B-LAN
BLAN
TU1002
TMMB-H001P(W/O Tuner)
J P 1 - P 5
J P 1 - P 6
J P 1 - P 7
J P 1 - P 1 0
J 2 - P 1
J 2 - P 2
J 2 - P 3
J 2 - P 4
J 2 - P 6
J P 2 - P 4
J 1 - P 2
J 1 - P 3
J 1 - P 4
J 1 - P 5
PTS
J P 1 - P 3
J P 1 - P 4
RF_OUT[NC]
GND_1
+3.3V
TSCL
TSDA
GND_2
IF_AGC
DIF-P
DIF-N
+5V
GND_3
J P 2 - P 1
22
23
24
25
18
19
20
21
26
27
28
29
14
15
16
17
10
11
12
13
7
8
9
5
6
1
2
3
4
30
BLAN
R2529
0
SHIELD
GND
BLAN
R2519 0
BLAN
R1439
BLAN
0
R1440
0
011:AM20 b_com_PWCTRL
011:AD6
MPI_DIN
0 1 1 : A J 7
MPI_DOUT
R1400BLAN
BLAN
R1441
BLAN
0
R1443
R1442BLAN
0
0
0
GND
SPI_DOUT
011:AD13
SPI_DIN
SPI_CLOCK
0 1 1 : A J 1 4
0 1 1 : A J 1 3
016:AN12 bLAN_IR_IN_MODEM
BLAN
0
R1407 0
L1401
BLAN
MLB-201209-0120P-N2
R1406 BLAN 0
R1401BLAN 0
BEXT_MPI_OUT
BEXT_MPI_DIN
011:V11
011:V10
BEXT_Game_Control_Latch
BEXT_IR_MODEM
011:U8
011:U9
BLAN
R1418
R1414
R1413
R1415
R1416
R1417
0
GND
BEXT_5V
3
T_TERMINAL1
6A
B_TERMINAL1
7A
R_SPRING
4
T_SPRING
5
B_TERMINAL2
7B
T_TERMINAL2
6B
JK6001
P E J 0 2 7 - 0 1
+5V_ST
RJ12_MPI_DIN
0 1 6 : A I 8
RJ12_MPI_DOUT
016:AH11
1
3
5
BLAN
P1400
YFDW254-06S
2
4
6
BLAN
R2530 0
RJ12_MPI
R616 0
R613
RJ12_MPI
R614
RJ12_MPI
R615
RJ12_MPI
0
+5V_BLAN
L1404
MLB-201209-0120P-N2
BLAN
BLAN
C1411
100uF
16V
BLAN
C1412
0 . 2 2 u F
50V
BLAN
C1413
100uF
16V
RJ12_MPI
C601
220pF
RJ12_MPI
C600
220pF
3
T_TERMINAL1
6A
B_TERMINAL1
7A
R_SPRING
4
T_SPRING
5
B_TERMINAL2
7B
T_TERMINAL2
6B
JK6001-*1
P E J 0 2 7 - 0 4
5
6
3
4
1
2
B-LAN POWER
+5V_ST
BLAN
L1405
+5V_ST_PTC
5VST_JIG
BLAN CHECK
+5V_ST_PTC
+5V_ST_PTC
MLB-201209-0120P-N2
+5V_BLAN
BLAN_VISHAY
Q1482
SI4925BDY
5VST_JIG
BLAN CHECK
R1492
22K
2 . 2 u F
25V
S1
C1483
100uF
16V
BLAN
G1
S2
1
2
3
8 D1_2
7 D1_1
6 D2_2
+12V_C_MPI bLAN_POWER_MANAGE
0 1 6 : N 1 7 ; 0 1 1 : T 2 0
BLAN
R1485
47K
R1491
0
Q1481
C
R1493
2.2K
G2 4 5 D2_1
E
BLAN
C1484
22uF
25V
+12V_C
+12V_C
BLAN_AOS
Q1482-*1
AO4813 bLAN_POWER_MANAGE
0 1 6 : N 1 7 ; 0 1 1 : V 2 4 b_LAN Game control JACK
Normal MPI JACK
RJ12_MPI
JK1401-*1
MJ-623PT-6-S-SD
5VST_JIG
BLAN CHECK
BLAN
R1480
47K
POWER LINE
R1487
47K
BLAN
R1484
0
R1488
47K
Q1480 C
E
C1480
2 . 2 u F
25V
C1481
47uF
25V
BLAN
S2 1
G2 2
S1 3
G1 4
8 D2_2
7 D2_1
6 D1_2
5 D1_1
016:AM22 b_SPI_DIN
0 1 1 : J 2 0
SPI_DOUT
016:AM22 b_SPI_DOUT
R1434 OPT 0
R1435BLAN 0
R1436 OPT
0
R1437BLAN
0
R1438BLAN
0 b_LAN MPI pin3 p o w e r c o n t r o l
Q1470
2SC3875S(ALY)
C
E
Y1B
1
Y0B
2
Y1C
3
ZC
4
Y0C
5
E
6
VEE
7
VSS
8
BLAN
IC1401
HEF4053B
16
VDD
15
ZB
14
ZA
13
Y1A
12
Y0A
11
SA
10
SB
9
SC
+12V_C_MPI
12V_JIG
BLAN CHECK
JP1483
BLAN
3.3K
R1472
BLAN
B
E
C
2N3906S-RTK
Q1471
L1470
MLB-201209-0120P-N2
BLAN
BLAN
R1474
3.3K
BLAN
C1470
220pF
50V
1/10W
5%
BEXT_5V
MPI_5V or 12V b_com_PWCTRL
0 1 1 : I 2 1 f o r b _ L A N J I G t e s t
M P I _ 5 V o r 1 2 V ( P I N 3 ) S e l e c t C o n t r o l f r o m b - L A N
BLAN
C1415
0 . 1 u F
R1454BLAN 0
SPI_DIN
+5V_ST_PTC
BLAN
L1403
MLB-201209-0120P-N2
R1453BLAN
0
SPI_DIN
0 1 1 : J 2 0
SPI_CLOCK
0 1 1 : J 1 9
R1452 OPT
0
016:AM23 b_SPI_CLOCK
R1451BLAN
0
R1448BLAN
0
R1449BLAN 0
R1450BLAN 0
+5V_ST_PTC
R1411
10K
5VST_JIG
OPT
BLAN CHECK
RJ12_IR_MPI_MODEM
016:AN15 RJ12_MPI
C602
220pF
7
BEXT_5V
R1412
10K
BLAN
BLAN
JK1401
MJ-623PT-6-S-SD
R J 1 2 _ M P I o p t i o n : u s i n g N o b - l a n s t a t u s
MPI_DOUT
MPI_DIN
5V
NC
GND
IR_OUT
7
1
4
5
2
3
6
0 1 1 : J 1 8
BEXT_MPI_OUT
BEXT_MPI_DIN
0 1 1 : J 1 8
0 1 1 : J 1 7
BEXT_Game_Control_Latch
BEXT_IR_MODEM
0 1 1 : J 1 7
016:AN18 b_MPI_DOUT
MPI_DIN
0 1 1 : I 2 1 b_MPI_DIN
0 1 6 : A I 1 9
R1419 OPT
0
R1420BLAN
0
R1421 OPT
0
R1422BLAN
0
R1423BLAN 0
Y1B
1
Y0B
2
Y1C
3
ZC
4
Y0C
5
E
6
VEE
7
VSS
8
BLAN
IC1400
HEF4053B
16
VDD
15
ZB
14
ZA
13
Y1A
12
Y0A
11
SA
10
SB
9
SC
R1431BLAN
0
R1430 OPT
0
R1429 OPT
0
R1428 OPT 0
R1425BLAN 0
R1426BLAN
0
R1427BLAN
0
BLAN
C1414
0 . 1 u F
MPI_DOUT
0 1 1 : I 2 1
+5V_ST_PTC
BLAN
L1402
MLB-201209-0120P-N2
+5V_ST_PTC
R1424
10K OPT
5VST_JIG
BLAN CHECK
R1432
10K
BLAN
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
B - l a n
2 0 1 0 . 1 2 . 2 2
11
EXTERNAL SPEAKER OUT
EXT_SPK
002:V11
C1130
15pF
50V
B
E
2SA1530A-T112-1R
Q1117
C
B
C
Q1116
2SC3875S(ALY)
E
R1118
1.6K
OPT
C1132
0 . 1 u F
009:X24 EXT_SPK_L-
C1134
10uF
16V
C1135
0 . 1 u F
PGND_1
1
ROUT-
2
PVDD_1
3
RHPIN
4
RLINEIN
5
RIN
6
VDD
7
LIN
8
LLINEIN
9
LHPIN
10
PVDD_2
11
LOUT-
12
IC1100
TPA6011A4PWPRG4
24
ROUT+
23
SE/BTL
22
21
HP/LINE
R1122
0
VOLUME
20
SEDIFF
19
18
SEMAX
AGND
R1120
OPT
17
BYPASS
16
15
FADE
OPT
R1121
SHUTDOWN
14
LOUT+
13
PGND_2
R1125
3.3K
C1136
1uF
50V
OPT
R1126
EXT_SPK_L+
009:X24
L1100
CB3216PA501E
+5V_Normal
SUB_MUTE
009:U20;016:AE15
+5V_Normal
4.7K
R1131
R1128
100
R1130
9.1K
C
E
B
Q1118
2SC3052
SUB_MUTE
009:R25;016:AE15
EXT_SPK_L-
009:H20
EXT_SPK_L+
009:O20
0
R1144
0
R1145
OPT
C1137
1uF
10V
OPT
C1138
1uF
10V
T_TERMINAL2
6B
B_TERMINAL2
7B
T_SPRING
5
R_SPRING
4
B_TERMINAL1
7A
T_TERMINAL1
Au
6A
E_SPRING
3
P E J 0 2 7 - 0 4
JK1100-*1
T_TERMINAL2
6B
B_TERMINAL2
7B
T_SPRING
5
R_SPRING
4
B_TERMINAL1
7A
T_TERMINAL1
Sn
6A
E_SPRING
3
P E J 0 2 7 - 0 1
JK1100
DSUB_VSYNC
DSUB_HSYNC
DSUB_B+
DSUB_B-
DSUB_G+
DSUB_G-
DSUB_R+
DSUB_R-
RGB PC (250 APPLY)
IC1105-*1
AT24C02C-SSHM-T
A0
1
A1
2
A2
3
GND
4
8
VCC
7
WP
6
SCL
5
SDA
D1115
ENKMC2838-T112
A1
C
A2
A0
1
A1
2
A2
3
GND
4
IC1105
AT24C02BN-SH-T
8
VCC
7
WP
6
SCL
5
SDA
R1139
4.7K
R1140
4.7K
C1127
18pF
50V
C1128
18pF
50V
R1141
22
R1142
10K
C1129
0 . 1 u F
16V
R1143
22
+5V_Normal
EDID_WP
RGB_DDC_SCL
RGB_DDC_SDA
C1122
68pF
50V
OPT
R1148
0
D1109
30V
C1126
68pF
50V
OPT
R1150
0
D1113
30V
D1114
5.6V
OPT
R1133
75
OPT
C1123
OPT
D1110
30V
R1135
75
OPT
C1124
OPT
D1111
30V
R1137
75
OPT
C1125
OPT
D1112
30V
D1116
5.6V
OPT
D1117
5.6V
OPT
R1147
1K
+3.3V_Normal
R1146
10K
DSUB_DET
PC AUDIO
JK1102
P E J 0 2 7 - 0 1
3
6A
T_TERMINAL1
7A
B_TERMINAL1
4
R_SPRING
5
T_SPRING
7B
B_TERMINAL2
6B
T_TERMINAL2
JK1102-*1
P E J 0 2 7 - 0 4
3
6A
T_TERMINAL1
7A
B_TERMINAL1
4
R_SPRING
5
T_SPRING
7B
B_TERMINAL2
6B
T_TERMINAL2
D1101
AMOTECH
5.6V
OPT
D1102
AMOTECH
5.6V
OPT
C1107
100pF
50V
R1102
470K
R1107
15K
R1112
0
R1110
10K
R1108
15K
C1108
100pF
50V
R1103
470K
R1113
0
R1111
10K
PC_R_IN
0 0 2 : S 1 2
PC_L_IN 0 0 2 : S 1 2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
E x t e r n a l s p e a k e r
2 0 1 0 . 1 2 . 2 2
9
S7M_DIVX
IC101
LGE107D (S7M Divx_Non RM)
R317
820
AE1
AF16
AF1
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AF3
AF14
AD1
AD13
AE14
AE13
AE4
AD5
AF4
AD4
AE2
AF8
AD9
AE9
AF9
AE11
AF6
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_A12/DDR2_A8
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AB22
AB23
AC23
AC22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
Y19
FRC_REXT
FRC_TESTPIN
FRC_GPIO0/UART_RX
FRC_GPIO1
FRC_GPIO3
AB16
AA14
AC15
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
Y16
AC16
AC14
FRC_I2CM_DA
FRC_I2CM_CK
FRC_PWM0
FRC_PWM1
AA16
AA15
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
AB15
AB14
R336
OPT
0
R332
004:K24
V_SYNC
0
RXBCK+
RXBCK-
RXB0+
RXB0-
RXB1+
RXB1-
RXB2+
RXB2-
RXB3+
RXB3-
RXB4+
RXB4-
RXACK+
RXACK-
RXA0+
RXA0-
RXA1+
RXA1-
RXA2+
RXA2-
RXA3+
RXA3-
RXA4+
RXA4-
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
Main 3
2 0 1 0 . 1 2 . 2 2
[ 5 1 P i n L V D S C o n n e c t o r ]
( F o r F H D 6 0 / 1 2 0 H z )
PANEL_VCC
L700
120-ohm
WAFER_FHD
P700
TF05-51S
WAFER_FHD
28
29
30
31
24
25
26
27
20
21
22
23
16
17
18
19
12
13
14
15
10
11
8
9
4
5
6
7
1
2
3
C700
10uF
16V
OPT
C701
1000pF
C702
0 . 1 u F
50V
WAFER_FHD
16V
WAFER_FHD
RXACK-
RXACK+
RXA2-
RXA2+
RXA1-
RXA1+
RXA0-
RXA0+
RXB4-
RXB4+
RXB3-
RXB3+
RXA4-
RXA4+
RXA3-
RXA3+
BIT_SEL
R710
10K
BIT_SEL_LOW
49
50
51
46
47
48
32
33
RXBCK-
RXBCK+
34
35
36
37
RXB2-
RXB2+
38
39
40
41
42
43
44
45
RXB1-
RXB1+
RXB0-
0
R701
R700
NON_SCAN
R702
R703
0
SCAN
0
OPT
0
SCAN
R704
OPT
0
RXB0+
SCAN_BLK2
OPC_EN
LVDS_SEL
+3.3V_Normal
SCAN_BLK1/OPC_OUT
PWM_DIM
R711
3.3K
LVDS_SEL_HIGH
R712
10K
LVDS_SEL_LOW
52
[ 3 0 P i n L V D S C o n n e c t o r ]
(For HD 60Hz_Normal)
P701
FI-X30SSL-HF
WAFER_HD
33
14
15
16
17
10
11
12
13
6
7
8
9
1
2
GND
4
5
3
WAFER_HD
R714
OPT
R715
OPT
R716
0
0
0
22
23
24
25
18
19
20
21
26
27
28
29
30
31
32
GND
R713
OPT
0
PWM_DIM
OPC_OUT
RXA3-
RXA3+
RXACK-
RXACK+
RXA2-
RXA2+
RXA1-
RXA1+
RXA0-
RXA0+
LVDS_SEL
+3.3V_Normal
OPC_EN
LVDS_SEL_HIGH
R717
3.3K
PANEL_VCC
LVDS_SEL_LOW
L701
120-ohm
WAFER_HD
R718
10K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GASKET
M1 GASKET1
MDS61887701
M2 GASKET2
MDS61887701
M3
GASKET3
MDS61887701
M4
GASKET4
MDS61887701
M5
GASKET5
MDS61887701
M6
GASKET6
MDS61887701
37LD320H
LVDS
2 0 1 0 . 1 2 . 2 2
7
HDMI_1
SHIELD
20
$0.253
19
18
7
6
5
9
8
4
3
2
1
17
16
15
14
13
12
11
10
5V_HDMI_1
R896
1K
R804
1.8K
5V_DET_HDMI_1
C802
0 . 1 u F
16V
R825
22
R826
22
R824
R847
100
0
R846
0
R845
0
R844
0
R843
0
R842
0
R850
0
R848
0
Q802
2SC3052
C
E
B
R830
10K
YKF45-7058V
JK802
HPD1
DDC_SDA_1
DDC_SCL_1
HDMI_CEC
CK-_HDMI1
CK+_HDMI1
D0-_HDMI1
D0+_HDMI1
D1-_HDMI1
D1+_HDMI1
D2-_HDMI1
D2+_HDMI1
HDMI_2
SHIELD
20
$0.253
19
18
17
16
15
14
13
12
11
10
9
8
7
2
1
4
3
6
5
YKF45-7058V
JK801
5V_HDMI_2
R895
1K
R803
1.8K
5V_DET_HDMI_2
C801
0 . 1 u F
16V
R805
R806
22
22
R815
R831
0
100
R834
0
R822
0
R832
0
R827
0
R829
0
R823
0
R833
0
Q801
2SC3052
C
E
B
R828
10K
HPD2
DDC_SDA_2
DDC_SCL_2
HDMI_CEC
CK-_HDMI2
CK+_HDMI2
D0-_HDMI2
D0+_HDMI2
D1-_HDMI2
D1+_HDMI2
D2-_HDMI2
D2+_HDMI2
HDMI EEPROM
IC801
AT24C02BN-SH-T
A0
1
A1
2
VCC
8
$0.055
7
WP
A2
3
GND
4
6
SCL
5
SDA
R876 22
R875 22
C806
0 . 1 u F
5V_HDMI_1
+5V_Normal
ENKMC2838-T112
D821
EDID_WP
R884
4.7K
R888
4.7K
DDC_SCL_1
DDC_SDA_1
IC801-*1
AT24C02C-SSHM-T
A0
1
A1
2
A2
3
GND
4
8
VCC
7
WP
6
SCL
5
SDA
5V_HDMI_2 +5V_Normal
ENKMC2838-T112
D822
IC802
AT24C02BN-SH-T
A0
1
A1
2
8
VCC
$0.055
7
WP
A2
3
GND
4
6
SCL
5
SDA
C807
0 . 1 u F
R878 22
R877 22
R885
4.7K
R889
4.7K
EDID_WP
DDC_SCL_2
DDC_SDA_2
IC802-*1
AT24C02C-SSHM-T
A0
1
A1
2
A2
3
GND
4
8
VCC
7
WP
6
SCL
5
SDA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
HDMI
2 0 1 0 . 1 2 . 2 2
8
S e r i a l P o r t
0 1 0 : E 1 6 ; 0 1 6 : N 1 5 ; 0 1 6 : Y 2 5 ; 0 1 6 : A A 3
UART3_TX
R1003
0
R1002
0
016:X9
PTC_TX
0 0 1 : A J 2 6
EXT_PTC_RESET
R1000
0
RESET_high
016:H27
R1001
0
+3.5V_ST
C1001
0 . 1 u F
1
Y0
2
Z1
3
Z
4
Z0
5
INH
6
VEE
7
VSS
8
IC1000
MC14053BDR2G
16
VDD
15
Y
14
X
13
X1
12
X0
11
A
10
B
9
C
R1005 100
R1042
0
PTC_TX_S7 0 0 1 : A J 2 4
0 0 1 : A J 2 4
PTC_RX_S7_3.3V
R1006 100
R1007
0 0 1 0 : R 2 2 ; 0 1 6 : X 7
PTC_RX_5V
+3.5V_ST
R1008 100
R1022
10K
R1009 100
R1010 100
Q1001
C
2SC3875S(ALY)
E
B
SELECT PTC OAD OR NOT
R1027 1K
016:AA21
UART_SWB
Y1B
1
Y0B
2
Y1C
3
ZC
4
Y0C
5
E
6
VEE
7
VSS
8
BT
IC1001-*1
HEF4053B
16
VDD
15
ZB
14
ZA
13
Y1A
12
Y0A
11
SA
10
SB
9
SC
Y1B
1
Y0B
2
Y1C
3
ZC
4
Y0C
5
E
6
VEE
7
VSS
8
BT
IC1000-*1
HEF4053B
16
VDD
15
ZB
14
ZA
13
Y1A
12
Y0A
11
SA
10
SB
9
SC
0 1 0 : K 2 3 ; 0 1 6 : X 7
PTC_RX_5V
+5V_ST
+5V_ST
Q1003
R1031 10K B
R1033
22K
R1036 1K
Q1004
B
R1040
22K
E
E
+5V_ST
+5V_ST
R1030 10K
Q1002
B
R1032
22K
R1037 1K B
Q1005
E
R1041
22K
E
C1006
0 . 3 3 u F
C1008
C1+
1
C1007
0 . 0 4 7 u F
V+
2
C1-
3
C1009
C2+
4
0 . 3 3 u F
C2-
5
0 . 3 3 u F
V-
6
DOUT2
7
RIN2
8
IC1003
MAX3232CDR
16
VCC
15
GND
14
DOUT1
13
RIN1
12
ROUT1
11
DIN1
10
DIN2
9
ROUT2
R1038 OPT
+3.5V_ST
C1010
0 . 1 u F
R1034
R1035
R1039
R1043
0
100
100
100
D1006
A1
SDC15
C
A2
D1004
A1
SDC15
C
A2
RxD
C1011
220pF
C1012
220pF
JP1002
D1005
A1
SDC15
C
A2
D1007
A1
SDC15
C
A2
P1000
SPG09-DB-009
1
6
2
7
3
8
4
9
10
5
+3.5V_ST
001:X17
S7_TX
R1044
0 1 0 : E 2 5 ; 0 1 6 : N 1 5 ; 0 1 6 : Y 2 5 ; 0 1 6 : A A 3
UART3_TX
R1045
0 0 1 : A J 2 1
EXT_PTC_UPDATE
0 1 6 : F 2 2
Update_SW
0
0
47K
R1049
1
Y0
2
Z1
3
Z
4
Z0
5
INH
6
VEE
7
VSS
8
IC1001
MC14053BDR2G
16
VDD
15
Y
14
X
13
X1
12
X0
11
A
10
B
9
C
C1000
0 . 1 u F
+3.5V_ST
R1015 100
RS232_TX010:V16
RS232_RX010:V16
S7_RX
001:X17
R1019 100
R1020 100
+3.5V_ST
R1011 100
R1012 100
R1013 100
Q1000
C
2SC3875S(ALY)
E
R1021
10K
B
R1026
SELECT PTC OR BCM DEBUG
1K
UART_SWA
016:AA21
O b j e c t i v e
M-STAR DEBUG
PTC DEBUG
PTC OAD
COM/MON
SIMULATION
SW_A
0
1
0
X
X
SW_B
X
1
0
1
1
PC_SIM
X
X
X
1
0
( N e w I t e m D e v e l o p m e n H : 9 . 2 m m )
SIDE_AV
SIDE_AV_OPT
L3303
BLM18PG121SN1D
5A
[YL]E-LUG
4A
[YL]O-SPRING
3A [YL]CONTACT
4B
[WH]O-SPRING
3C [RD]CONTACT
4C
[RD]O-SPRING
P P J 2 3 5 - 0 1
JK1000
SIDE_AV_OPT
5C
[RD]E-LUG
SIDE_AV_OPT
D1000
30V
SIDE_AV_OPT
R1014
75
SIDE_AV_OPT
D1001
5.6V
C1002
100pF
SIDE_AV_OPT
+3.3V_Normal
SIDE_AV_OPT
10K
R1018
SIDE_AV_OPT
R1023
1K
SIDE_AV_OPT
D1002
5.6V
SIDE_AV_OPT
D1003
5.6V
C1005
100pF
OPT
SIDE_AV_OPT
R1017
470K
SIDE_AV_OPT
R1016
470K
SIDE_AV_OPT
L3301
BLM18PG121SN1D
SIDE_AV_OPT
R1024
SIDE_AV_OPT
L3302
BLM18PG121SN1D
SIDE_AV_OPT
10K
C1003
100pF
50V
SIDE_AV_OPT
R1025
SIDE_AV_OPT
C1004
100pF
50V
10K
SIDE_AV_OPT
R1028
12K
SIDE_AV_OPT
R1029
12K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SIDEAV_CVBS_IN
SIDEAV_DET
SIDEAV_L_IN
SIDEAV_R_IN
37LD320H
RS232C
2 0 1 0 . 1 2 . 2 2
10
USB_DIODES
L1451
MLB-201209-0120P-N2
120-ohm
C1500
22uF
10V
IC1500
AP2191SG-13
NC
8
OUT_2
7
OUT_1
6
FLG
5
$ 0 . 0 7 7
R1500 47
1
2
3
4
GND
IN_1
IN_2
EN
+5V_USB
C1501
10uF
10V
R1503
10K
USB1_OCD
C1502
0 . 1 u F
+3.3V_Normal
R1504
4.7K
OPT
R1505 0
USB1_CTL
R1502 0
R1501 0
SIDE_USB_DM
SIDE_USB_DP
D1500
CDS3C05HDMI1
5.6V
D1501
CDS3C05HDMI1
5.6V
TP1451
TP1452
/RST_HUB
/RST_PHY
MPI
P1500
SMW200-11
1
12V
MPI
2
GND
3
BUFFERED_MPI
4
MPI_DOUT
5
SPI_DATA_OUT
6
SPI_DATA_IN
7
SPI_CLOCK
8
GND
9
VCC
10
IR_IN_MODEM
11
GAME CONT
+12V_C
R1524 MPI 0
R1525 MPI 0
R1522 MPI
0
R1526 MPI
R1523
MPI
0
0
DUM_MPI_DIN
0 1 6 : A I 9
DUM_SPI_DOUT
DUM_SPI_DIN
DUM_SPI_CLOCK
016:Q5
016:Q6
016:Q6
MPI
R1514
0
1/16W
5%
L1500
MLB-201209-0120P-N2
MPI
016:AN14
IR_IN_MODEM
MPI
C1510
10uF
+5V_ST
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
USB/MPI 14
2 0 1 0 . 1 2 . 2 2
+5V_ST
+3.5V_ST_PTC
12V power
+3.5V_ST_PTC
0 OPT
R6102
0
R6106
PTC power
+5V_ST
C1603
10uF
25V
OPT OPT
C1690
47uF
10V
C1691
47uF
10V
016:N17
DC_DC_EN
R1608
0
100 R1604
C
Q1615
2SC3875S(ALY)
E
C1618
2200pF
R1623
4.7K
L1605
BLM18PG121SN1D
+3.5V_ST_PTC
+3.5V_ST_PTC
1 2
3 4
SKHMPWE010
SW501
R1619
4.7K
5
+3.5V_ST_PTC
Update_SW
0 1 0 : E 1 5
4.7K
R1615
B
E
C
2N3906S-RTK
Q1612
R1618
4.7K
1
3
2
4
5
SKHMPWE010
SW502
R1621
4.7K
RJP_CTRL0
0 0 6 : A I 2 3
RJP_CTRL3
0 0 6 : A I 2 2
RJP_CTRL4
0 0 6 : A I 2 1
RJP
R1652
+3.3V_Normal
+3.3V_Normal
R1671
10K
RJP
R1654
10K
RJP
RJP
R1666
B RJP
C
4.7K
Q1616
2SC3875S(ALY)
C
Q1621
RJP_CTRL0_buffer 016:N13
+3.3V_Normal
RJP
R1645
1K
B RJP
E
E
R1706
10K
RJP
RJP
R1709
R1715
10K
RJP
C
016:N13
RJP_CTRL1_buffer
RJP
R1682
Q1624
2SC3875S(ALY)
C
4.7K
Q1622
2SC3875S(ALY)
E
1K
0 0 6 : A I 2 3
E
+3.3V_Normal
RJP
R1648
1K
R1655
10K
RJP
C
4.7K
Q1617
2SC3875S(ALY)
E
Q1619
+3.3V_Normal
2SC3875S(ALY)
E
RJP_CTRL2
+3.3V_Normal
0 0 6 : A I 2 2
RJP
R1683
B
1K
RJP
R1708
10K
RJP
RJP
R1710
B RJP
C
4.7K
Q1623
2SC3875S(ALY)
E
+3.3V_Normal
R1667
10K
RJP
C
RJP_CTRL3_buffer 016:N12
+3.3V_Normal
R1722
10K
RJP
C
E
RJP_CTRL2_buffer 016:N13
Q1625
2SC3875S(ALY)
R1668
10K
RJP
RJP_CTRL4_buffer 016:N12
RJP
10K
C
B
RJP
C
4.7K
Q1618
2SC3875S(ALY)
E
Q1620
2SC3875S(ALY)
1K
E
PTC_UPDATE
004:A26
0 1 6 : I 3
006:R25
006:R25
0 0 1 : A J 2 6 ; 0 1 0 : T 7
RL_ON
DC_DC_EN
KEY1
SIDEAV_DET
UART3_RX
0 1 6 : E 2 0 RJP_CTRL0_buffer
016:H19 RJP_CTRL1_buffer
016:H16
RJP_CTRL2_buffer
0 1 6 : E 1 7
RJP_CTRL3_buffer
0 1 6 : E 1 4 RJP_CTRL4_buffer
KEY2
RJP
RJP
RJP
RJP
RJP
+3.5V_ST_PTC
R1627
4.7K
0 R1632
0 R1631
0 R1630
0 R1629
0 R1628
PTC_RESET
R1635
4.7K
100
100
+3.5V_ST_PTC
R1649
R1650
R1624
0
100
R1634 100
R1637 100
R1639 100
R1651
PTC_CRYSTAL_TXC
C1609
27pF
R1626
R1636
0
100
X1600
32.768KHz
C1610
20pF
OPT
X1600-*1
32.768KHz
PTC_CRYSTAL_EPSON
R1638
0
+3.5V_ST_PTC
OPT
4.7K
R1762
R1657
100
R1658
100
R1659
100
P 6 . 4 / A 4
P 6 . 5 / A 5
P 6 . 6 / A 6
1
2
3
P 6 . 7 / A 7
4
P 7 . 4 / A 1 2
5
P 7 . 5 / A 1 3
6
P 7 . 6 / A 1 4
7
P 7 . 7 / A 1 5
8
P5.0/VREF+/VEREF+
9
P5.1/VREF-/VEREF-
10
0 R1663
AVCC
P2.0/TA1CLK/MCLK
11
AVSS
P 1 . 7
12
P 7 . 0 / X I N
P1.6/SMCLK
13
P7.1/XOUT
P 1 . 5 / T A 0 . 4
14
DVSS
P 1 . 4 / T A 0 . 3
15
DVCC
P 1 . 3 / T A 0 . 2
16
P1.0/TA0CLK/ACLK
P 1 . 2 / T A 0 . 1
17
P 1 . 1 / T A 0 . 0
18
19
20
21
22
23
24
25
+3.5V_ST
C1600
2 . 2 u F
10V
MBRA340T3G
+12V_C
D1600
D1601
MBRA340T3G
+3.5V_ST
IC1600
SC632ULTRT
[EP]GND
GND
1
C1+
2
C1-
3
IN
4
+12V/+15V
+12V_ST
+3.5V_ST_PTC
8
C2-
7
C2+
6
OUT
5
EN
C1601
2 . 2 u F
10V
RESET_high
0 1 0 : E 2 3
L1601
22uH
4.7K
R1601
B
IC1601
BD9306AFVM
FB
8
C1602
0 . 1 u F
R1606
1K
COMP
GND
7
6
1
RT
2
CT
R1609
20K
C1606
100pF
50V
3
ENB
VCC
5 4
GD
D8
8
D7
7
D6
6
D5
5
D1602
MBRA340T3G
40V
Q1600
Si4800BDY
1
S1
2
S2
3
S3
4
G
+12V_ST
R1612
100K
1%
R1620
1K
C1608
22uF
25V
R1613
30K
1%
C1607
100pF
50V
R1617
15K
1%
+3.5V_ST_PTC
+3.5V_ST_PTC
OPT
4.7K
R1643
004:AN28;038:S14
R1640
MPI
100
DUM_SPI_CLOCK
014:W16
DUM_SPI_DIN
014:W16
DUM_SPI_DOUT
014:W17
R1642
MPI
100
R1641
MPI
+3.5V_ST_PTC
100
MPI
4.7K
R1653
R1664
100K
POWER_DET
+5V_ST
VCCB
14
B1
13
B2
12
B3
11
B4
10
NC_2
9
MPI
OE
8
C1615
0 . 1 u F
IC1603
+3.5V_ST_PTC
1
VCCA
2
A1
3
A2
4
A3
5
A4
6
NC_1
7
GND
R1673
100 MPI
MPI
100
R1669
C1617
0 . 1 u F
R1675
100
MPI
R1684
0
R1689
0
0
0
R6100
R6101
+3.5V_ST_PTC
C6100
0 . 1 u F
VCCA
1
A1
2
A2
3
A3
4
A4
5
NC_1
6
GND
7
IC1607
TXS0104EDR
14
VCCB
13
B1
12
B2
11
B3
10
B4
9
NC_2
8
OE
C6101
0 . 1 u F
+3.5V_ST_PTC
R6105
4.7K
VDD
8
WP
7
SCL
6
SDA
5
1
2
NC_2
3
NC_3
4
VSS
VDD
8
WP
7
SCL
6
SDA
5
1
2
NC_2
3
NC_3
4
VSS
+3.5V_ST_PTC
OPT
OPT
MISO_1
R6120
0
R6121
0
+3.5V_ST_PTC
C1627
BLAN
0 . 1 u F
BLAN
R1741
100
BLAN
R1744
100
BLAN
R1742
100
VCCA
1
A1
2
A2
3
A3
4
A4
5
NC_1
6
GND
7
BLAN
IC1606
TXS0104EDR
+5V_ST
14
VCCB
13
B1
BLAN
R1756
100
12
B2
11
B3
BLAN
R1757
100
BLAN
R1758
100
10
B4
9
8
NC_2
OE
BLAN
R1753
BLAN
4.7K
C1629
0 . 1 u F b_SPI_CLOCK b_SPI_DIN b_SPI_DOUT
+3.5V_ST_PTC
011:AD12
011:X13
011:X12
0
R1694
330 R1701
UART_SWB
010:O21
330 R1702
UART_SWA
010:O12
UART SW CONTROL B
+3.5V_ST_PTC
470
R1703
LD502
UART SW CONTROL A
R1731
10K
470
R1704
LD503
BLAN
R1728
0
BLAN
R1733
100
C1626
47pF
50V
P 9 . 7
75
P 9 . 6
74
P9.5/UCA2RXDUCA2SOMI
73
P9.4/UCA2TXD/UCA2SIMO
72
71
70
I C _ m i c r o c o n t r o l l e r
69
P9.2/UCB2SOMI/UCB2SCL
P9.1/UCB2SIMO/UCB2SDA
P9.0/UCB2STE/UCA2CLK
IC1602
68
P9.3/UCB2CLK/UCA2STE
67
P 8 . 7
MSP430F5419IPZR
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P 8 . 5 / T A 1 . 0
DVCC2
DVSS2
VCORE
P 8 . 4 / T A 0 . 4
P 8 . 3 / T A 0 . 3
P 8 . 2 / T A 0 . 2
P 8 . 1 / T A 0 . 1
0 . 1 u F
C1621
C1620
0 . 4 7 u F
P 8 . 0 / T A 0 . 0
P 7 . 3 / T A 1 . 2
P7.2/TBOUTH/SVMOUT
P5.7/UCA1RXD/UCA1SOMI
P5.6/UCA1TXD/UCA1SIMO
P5.5/UCB1CLK/UCA1STE
P5.4/UCB1SOMI/UCB1SCL
MISO_1
MISO_0
R1717
0
R1727 OPT
470
R1726
470
R1721
330
470
R1725
R1718
0
+3.5V_ST_PTC
AMP_MUTE
SUB_MUTE
POWER_ON/OFF2_2
INV_CTL
PANEL_CTL
+5V_ST
C
E
+5V_ST
BLAN
R1740
4.7K
Q1606
2SC3875S(ALY)
R1739
100K
R1738
100K b_MPI_DIN
011:X5
BLAN
C1628
47pF
50V
BLAN
R1747
4.7K
+5V_ST
+3.5V_ST_PTC
R1745
10K
B
OPT
R1778
10K
R1746
OPT
L1604
C
4.7K
E
Q1607
R1748
10K
2SC3875S(ALY)
R1750
10K
+5V_ST
BLAN
R1754
100
C
+3.5V_ST_PTC
Q1608
2SC3875S(ALY)
E
L1602
B b_MPI_DOUT
011:X7
C
E
Q1611
2SC3875S(ALY)
C1630
0 . 0 1 u F
R1755
10K
B
R1760
100K
RJ12_MPI
R1783
0
RJ12_IR_MPI_MODEM
0 1 1 : F 1 1
100 R1761
C
Q1609 +3.5V_ST_PTC
2SC3875S(ALY)
IR_IN_MODEM
014:W14
E
L1603
R1677
100
+3.5V_ST_PTC
C1623
50V
R1776
10K
R1777
10K
R1723
4.7K
B
R1732
100
C
Q1604
2SC3875S(ALY)
E
+5V_ST
DUM_MPI_DOUT
014:W17
0 1 1 : F 1 2
0
RJ12_MPI_DOUT
0
BLAN
R1752
R1759
100K OPT
C
E
Q1610
2SC3875S(ALY) bLAN_IR_IN_MODEM
011:M17
R1734
1K
4.7K
R1699
B
C
Q1602
2SC3875S(ALY)
E
+3.5V_ST_PTC
R1719
0
R1720
0
R1724
10K
R1729
100
C1625
47pF
50V
IC1608
FM24C16A
IC1608-*1
FM24C16B
C
E
B
Q1605
R1736
4.7K
2SC3875S(ALY)
014:W18
DUM_MPI_DIN
RJ12_MPI
R1781
0
RJ12_MPI_DIN 0 1 1 : F 1 3
R1700
4.7K
B
E
C
2SA1504S
Q1603
C1619
10uF
16V
330
R1707
UART3_RX
100
R1711
100
R1712
UART3_TX
0 1 0 : E 2 5 ; 0 1 0 : E 1 6 ; 0 1 6 : N 1 5 ; 0 1 6 : Y 2 5
+3.5V_ST_PTC
C1622
0 . 1 u F
50V
R1716
0
JP1612
JP1613
JP1611
T_TERMINAL2
6B
B_TERMINAL2
7B
T_SPRING
5
R_SPRING
4
B_TERMINAL1
7A
D1604
BAT54C
A2
C
A1
T_TERMINAL1
Sn
6A
E_SPRING
3
P E J 0 2 7 - 0 1
JK501
D1603
BAT54C
A2
C
A1
T_TERMINAL2
6B
B_TERMINAL2
7B
T_SPRING
5
R_SPRING
4
B_TERMINAL1
7A
T_TERMINAL1
Au
6A
E_SPRING
3
P E J 0 2 7 - 0 4
JK501-*1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
PTC
2 0 1 0 . 1 2 . 2 2
16
VCC_1.5V_DDR
A-MVREFDQ
CLose to DDR3
VCC_1.5V_DDR
A-MVREFCA
VCC_1.5V_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
Close to DDR Power Pin
CLose to Saturn7M IC
VCC_1.5V_DDR
+1.5V_DDR
L1201
C1225
10uF
10V
C1226
0 . 1 u F
16V
IC1201-*1
H5TQ1G63BFR-H9C-C
J 2
J 8
M1
M9
A9
B3
E1
G8
P1
P9
T1
T9
E2
E8
F9
G1
G9
B1
B9
D1
D8
M8
VREFCA
D2
E9
F1
H2
H9
A1
A8
C1
C9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
J 1
J 9
L1
L9
T7
NC_1
NC_2
NC_3
NC_4
NC_6
H1
VREFDQ
L8
K8
N1
N9
R1
R9
B2
D9
G7
K2
ZQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
H y n i x C h i n a
A8
A9
A10/AP
A11
A12/BC
A13
A4
A5
A6
A7
A0
A1
A2
A3
T8
R3
L7
R7
N7
T3
P8
P2
R8
R2
N3
P7
P3
N2
A15
M7
BA0
BA1
BA2
M2
N8
M3
CK
CK
CKE
J 7
K7
K9
CS
ODT
RAS
CAS
WE
L2
K1
J 3
K3
L3
T2
RESET
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL
DQSL
F3
G3
DQSU
DQSU
C7
B7
DML
DMU
E7
D3
H3
H8
G2
H7
E3
F7
F2
F8
A7
A2
B8
A3
D7
C3
C8
C2
L8
ZQ
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
J 1
J 9
L1
L9
T7
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
J 8
M1
M9
P1
P9
T1
T9
A9
B3
E1
G8
J 2
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
IC1201-*2
H5TQ1G63DFR-H9C
M8
VREFCA
H1
VREFDQ
A5
A6
A7
A8
A0
Hynix_3
N3
P7
A1
A2
A3
A4
P3
N2
P8
P2
R8
R2
T8
R3
A9
A10/AP
A11
A12/BC
A13
L7
R7
N7
T3
M7
NC_5
BA0
BA1
BA2
M2
N8
M3
CK
CK
CKE
J 7
K7
K9
CS
ODT
RAS
CAS
WE
L2
K1
J 3
K3
L3
T2
RESET
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL
DQSL
F3
G3
DQSU
DQSU
C7
B7
DML
DMU
E7
D3
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
A-MVREFCA
A-MVREFDQ
VCC_1.5V_DDR
R1203
240
1%
IC1201
H5TQ1G63BFR-H9C
M8
VREFCA
H y n i x K o r e a
H1
L8
K8
N1
N9
R1
R9
B2
D9
G7
K2
A1
A8
C1
C9
D2
E9
F1
H2
H9
J 1
J 9
L1
L9
T7
VREFDQ
ZQ
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A0
A1
A2
A3
A4
A5
A6
A15
M7
BA0
BA1
BA2
M2
N8
M3
R2
T8
R3
L7
R7
N7
T3
N3
P7
P3
N2
P8
P2
R8
CK
CK
CKE
J 7
K7
K9
CS
ODT
RAS
CAS
WE
L2
K1
J 3
K3
L3
T2
RESET
DQSL
DQSL
F3
G3
J 2
J 8
M1
M9
A9
B3
E1
G8
P1
P9
T1
T9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
C7
B7
E7
D3
E2
E8
F9
G1
G9
B1
B9
D1
D8
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
H3
H8
G2
H7
E3
F7
F2
F8
D7
C3
C8
C2
A7
A2
B8
A3
A-MA0
A-MA2
A-MA11
A-MA1
A-MA8
A-MA6
A-MA0
A-MA1
A-MA2
A-MA3
A-MA4
A-MA5
A-MA6
A-MA7
A-MA8
A-MA9
A-MA10
A-MA11
A-MA12
A-MA13
A-MBA0
A-MA3
A-MA5
A-MA7
A-MA4
A-MA12
A-MBA1
A-MA10
A-MRESETB
A-MBA2
A-MA13
A-MA9
A-MCK
A-MBA0
A-MBA1
A-MBA2
C1209
A-MCK
0 . 0 1 u F
25V A-MCKB
A-MCKE
A-MODT
A-MRASB
A-MCASB
A-MWEB
A-MRESETB
A-MCKB
A-MRASB
A-MCASB
VCC_1.5V_DDR
A-MODT
A-MWEB
R1231
10K
A-MDQSL
A-MDQSLB
A-MDQSL
A-MDQSLB
A-MDQSU
A-MDQSUB
A-MDQSU
A-MDQSUB
A-MDML
A-MDMU
A-MDQL1
A-MDQL3
A-MDML
A-MDQU2
A-MDQL0
A-MDQL1
A-MDQL2
A-MDQL3
A-MDQL4
A-MDQL5
A-MDQL6
A-MDQL7
A-MCKE
A-MDQL7
A-MDQL5
A-MDQU0
A-MDQU1
A-MDQU2
A-MDQU3
A-MDQU4
A-MDQU5
A-MDQU6
A-MDQU7
A-MDQL0
A-MDQL2
A-MDQL6
A-MDQL4
A-MDQU7
A-MDQU3
A-MDQU5
A-MDMU
A-MDQU6
A-MDQU0
A-MDQU4
A-MDQU1
A-MCKE
R1213
10
R1214
10
AR1208
A-TMA0
A-TMA2
A-TMA11
A-TMA1
A-TMA8
A-TMA6
10
AR1203
A-TMBA0
A-TMA3
A-TMA5
A-TMA7
10
AR1204
A-TMA4
A-TMA12
A-TMBA1
A-TMA10
10
AR1201
A-TMRESETB
A-TMBA2
A-TMA13
A-TMA9
10
R1206
10
R1207
10
AR1202
A-TMCK
A-TMCKB
A-TMRASB
A-TMCASB
A-TMODT
A-TMWEB
10
R1208
10
R1209
10
R1211
10
R1212
10
AR1209
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDQL1
A-TMDQL3
A-TMDML
A-TMDQU2
10
AR1210
A-TMCKE
A-TMDQL7
A-TMDQL5
10
AR1205
A-TMDQL0
A-TMDQL2
A-TMDQL6
A-TMDQL4
10
AR1206
A-TMDQU7
A-TMDQU3
A-TMDQU5
A-TMDMU
10
AR1207
A-TMDQU6
A-TMDQU0
A-TMDQU4
10
R1210
10
R1233 10K
A-TMDQU1
A-TMBA0
A-TMBA1
A-TMBA2
A-TMCK
A-TMCKB
A-TMCKE
A-TMODT
A-TMRASB
A-TMCASB
A-TMWEB
A-TMRESETB
A-TMDQSL
A-TMDQSLB
A-TMDQSU
A-TMDQSUB
A-TMDML
A-TMDMU
A-TMDQL0
A-TMDQL1
A-TMDQL2
A-TMDQL3
A-TMDQL4
A-TMDQL5
A-TMDQL6
A-TMDQL7
A-TMDQU0
A-TMDQU1
A-TMDQU2
A-TMDQU3
A-TMDQU4
A-TMDQU5
A-TMDQU6
A-TMDQU7
A-TMA0
A-TMA1
A-TMA2
A-TMA3
A-TMA4
A-TMA5
A-TMA6
A-TMA7
A-TMA8
A-TMA9
A-TMA10
A-TMA11
A-TMA12
A-TMA13
VCC_1.5V_DDR
DDR3 1.5V By CAP - Place these Caps near Memory
VCC_1.5V_DDR
B-MVREFCA
Close to DDR Power Pin
CLose to Saturn7M IC
B-MVREFDQ
VCC_1.5V_DDR
CLose to DDR3
IC101
LGE107D (S7M Divx_Non RM)
B22
C9
C23
B11
A9
C10
B23
B8
B9
A8
C21
B10
A22
A10
S7M_DIVX
A_DDR3_A0/DDR2_A13
A_DDR3_A1/DDR2_A8
A_DDR3_A2/DDR2_A9
A_DDR3_A3/DDR2_A1
A_DDR3_A4/DDR2_A2
A_DDR3_A5/DDR2_A10
A_DDR3_A6/DDR2_A4
A_DDR3_A7/DDR2_A3
A_DDR3_A8/DDR2_A6
A_DDR3_A9/DDR2_A12
A_DDR3_A10/DDR2_RASZ
A_DDR3_A11/DDR2_A11
A_DDR3_A12/DDR2_A0
A_DDR3_A13/DDR2_A7
B_DDR3_A0/DDR2_A13
B_DDR3_A1/DDR2_A8
B_DDR3_A2/DDR2_A9
B_DDR3_A3/DDR2_A1
B_DDR3_A4/DDR2_A2
B_DDR3_A5/DDR2_A10
B_DDR3_A6/DDR2_A4
B_DDR3_A7/DDR2_A3
B_DDR3_A8/DDR2_A6
B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
B_DDR3_A12/DDR2_A0
B_DDR3_A13/DDR2_A7
R24
B25
T26
D24
A26
C25
T25
A25
B24
A24
P25
C24
P26
B26
B21
A11
A23
A_DDR3_BA0/DDR2_BA2
A_DDR3_BA1/DDR2_CASZ
A_DDR3_BA2/DDR2_A5
A12
C11
B12
A_DDR3_MCLK/DDR2_MCLK
A_DDR3_CKE/DDR2_DQ5
B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ
B_DDR3_BA2/DDR2_A5
B_DDR3_MCLK/DDR2_MCLK
B_DDR3_CKE/DDR2_DQ5
P24
C26
R26
D26
D25
E24
C20
A20
B20
A21
A_DDR3_ODT/DDR2_ODT
A_DDR3_RASZ/DDR2_WEZ
A_DDR3_CASZ/DDR2_BA1
A_DDR3_WEZ/DDR2_BA0
C22
A_DDR3_RESETB
B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1
B_DDR3_WEZ/DDR2_BA0
B_DDR3_RESETB
N25
M26
N24
N26
R25
C16
B16
A15
A17
B14
C17
B15
A18
C14
B17
A_DDR3_DQSL/DDR2_DQS0 B_DDR3_DQSL/DDR2_DQS0
A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSLB/DDR2_DQSB0
A16
C15
A14
B18
A_DDR3_DML//DDR2_DQ13
A_DDR3_DMU/DDR2_DQ6
C18
B13
A19
C13
C19
A13
B19
C12
A_DDR3_DQSU/DDR2_DQSB1
A_DDR3_DQSUB/DDR2_DQS1
B_DDR3_DQSU/DDR2_DQSB1
B_DDR3_DQSUB/DDR2_DQS1
A_DDR3_DQL0/DDR2_DQ3
A_DDR3_DQL1/DDR2_DQ7
A_DDR3_DQL2/DDR2_DQ1
A_DDR3_DQL3/DDR2_DQ10
A_DDR3_DQL4/DDR2_DQ4
A_DDR3_DQL5/DDR2_DQ0
A_DDR3_DQL6/DDR2_CKE
A_DDR3_DQL7/DDR2_DQ2
B_DDR3_DML/DDR2_DQ13
B_DDR3_DMU/DDR2_DQ6
B_DDR3_DQL0/DDR2_DQ3
B_DDR3_DQL1/DDR2_DQ7
B_DDR3_DQL2/DDR2_DQ1
B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4
B_DDR3_DQL5/DDR2_DQ0
B_DDR3_DQL6/DDR2_CKE
B_DDR3_DQL7/DDR2_DQ2
A_DDR3_DQU0/DDR2_DQ15
A_DDR3_DQU1/DDR2_DQ9
A_DDR3_DQU2/DDR2_DQ8
A_DDR3_DQU3/DDR2_DQ11
A_DDR3_DQU4/DDR2_DQM1
A_DDR3_DQU5/DDR2_DQ12
A_DDR3_DQU6/DDR2_DQM0
A_DDR3_DQU7/DDR2_DQ14
B_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU4/DDR2_DQM1
B_DDR3_DQU5/DDR2_DQ12
B_DDR3_DQU6/DDR2_DQM0
B_DDR3_DQU7/DDR2_DQ14
J 2 5
J 2 4
H26
H25
F26
L24
L25
F24
L26
F25
M25
E26
M24
E25
G26
J 2 6
G24
K25
H24
K26
G25
K24
B-TMA0
B-TMA1
B-TMA2
B-TMA3
B-TMA4
B-TMA5
B-TMA6
B-TMA7
B-TMA8
B-TMA9
B-TMA10
B-TMA11
B-TMA12
B-TMA13
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMDML
B-TMDMU
B-TMDQL0
B-TMDQL1
B-TMDQL2
B-TMDQL3
B-TMDQL4
B-TMDQL5
B-TMDQL6
B-TMDQL7
B-TMDQU0
B-TMDQU1
B-TMDQU2
B-TMDQU3
B-TMDQU4
B-TMDQU5
B-TMDQU6
B-TMDQU7
B-TMBA0
B-TMBA1
B-TMBA2
B-TMCK
B-TMCKB
B-TMCKE
B-TMODT
B-TMRASB
B-TMCASB
B-TMWEB
B-TMRESETB
B-TMBA0
B-TMA3
B-TMA5
B-TMA7
B-TMA4
B-TMA12
B-TMBA1
B-TMA10
B-TMCK
B-TMCKB
B-TMRASB
B-TMCASB
B-TMODT
B-TMWEB
B-TMDQSL
B-TMDQSLB
B-TMDQSU
B-TMDQSUB
B-TMA0
B-TMA2
B-TMA11
B-TMA1
B-TMA8
B-TMA6
B-TMRESETB
B-TMBA2
B-TMA13
B-TMA9
B-TMDQL1
B-TMDQL3
B-TMDML
B-TMDQU2
B-TMCKE
B-TMDQL7
B-TMDQL5
B-TMDQL0
B-TMDQL2
B-TMDQL6
B-TMDQL4
B-TMDQU7
B-TMDQU3
B-TMDQU5
B-TMDMU
B-TMDQU6
B-TMDQU0
B-TMDQU4
R1215
10
R1216
10
AR1211
10
AR1214
10
AR1215
10
AR1219
10
R1222
10
R1223
10
AR1220
10
R1219
10
R1220
10
R1217
10
R1218
10
AR1212
10
AR1213
10
AR1216
10
AR1217
10
AR1218
B-MA0
B-MA2
B-MA11
B-MA1
B-MA8
B-MA6
B-MBA0
B-MA3
B-MA5
B-MA7
B-MA4
B-MA12
B-MBA1
B-MA10
B-MRESETB
B-MBA2
B-MA13
B-MA9
B-MCK
B-MBA0
B-MBA1
B-MBA2
B-MCK
C1240
0 . 0 1 u F
25V
B-MCKB
B-MCKB
B-MRASB
B-MCASB
B-MODT
B-MWEB
VCC_1.5V_DDR
R1232
10K
B-MDQSL
B-MCKE
B-MODT
B-MRASB
B-MCASB
B-MWEB
B-MRESETB
B-MDQSLB
B-MA0
B-MA1
B-MA2
B-MA3
B-MA4
B-MA5
B-MA6
B-MA7
B-MA8
B-MA9
B-MA10
B-MA11
B-MA12
B-MA13
B-MDQSU
B-MDQSL
B-MDQSLB
B-MDQSUB
B-MDQSU
B-MDQSUB
B-MDQL1
B-MDQL3
B-MDML
B-MDQU2
B-MDML
B-MDMU
B-MCKE
B-MDQL7
B-MDQL5
B-MDQL0
B-MDQL1
B-MDQL2
B-MDQL3
B-MDQL4
B-MDQL5
B-MDQL6
B-MDQL7
B-MDQL0
B-MDQL2
B-MDQL6
B-MDQL4
B-MDQU7
B-MDQU3
B-MDQU5
B-MDMU
B-MDQU0
B-MDQU1
B-MDQU2
B-MDQU3
B-MDQU4
B-MDQU5
B-MDQU6
B-MDQU7
B-MDQU6
B-MDQU0
B-MDQU4
B-TMDQU1
10
R1221
10
10K R1234
B-MDQU1
B-MCKE
IC1202
H5TQ1G63BFR-H9C
F3
G3
DQSL
DQSL
D7
C3
C8
C2
A7
A2
B8
A3
H3
H8
G2
H7
E3
F7
F2
F8
C7
B7
DQSU
DQSU
E7
D3
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
T8
R3
L7
R7
N7
T3
P8
P2
R8
R2
N3
P7
P3
N2
A4
A5
A6
A7
A0
A1
A2
A3
A8
A9
A10/AP
A11
A12/BC
A13
H y n i x K o r e a
VREFCA
VREFDQ
M7
M2
N8
M3
A15
BA0
BA1
BA2
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
M8
H1
ZQ
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
J 7
K7
K9
L2
K1
J 3
K3
L3
CK
CK
CKE
CS
ODT
RAS
CAS
WE
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
A1
A8
C1
C9
D2
E9
F1
H2
H9
T2
RESET
NC_1
NC_2
NC_3
NC_4
NC_6
J 1
J 9
L1
L9
T7
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
E2
E8
F9
G1
G9
B1
B9
D1
D8
J 2
J 8
M1
M9
A9
B3
E1
G8
P1
P9
T1
T9
B-MVREFCA
B-MVREFDQ
R1226
240
1%
VCC_1.5V_DDR
IC1202-*2
H5TQ1G63DFR-H9C
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
K8
N1
N9
R1
B2
D9
G7
K2
R9
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
NC_1
NC_2
NC_3
NC_4
NC_6
J 1
J 9
L1
L9
T7
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS_1
VSS_2
A9
B3
E1
G8
VSS_3
VSS_4
VSS_5
VSS_6
J 2
J 8
M1
M9
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
P1
P9
T1
T9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
B1
B9
D1
D8
E2
E8
F9
G1
G9
F3
G3
DQSL
DQSL
C7
B7
DQSU
DQSU
E7
D3
DML
DMU
E3
F7
F2
F8
H3
H8
G2
H7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A7
A2
B8
A3
D7
C3
C8
C2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
R3
L7
R7
N7
T3
P2
R8
R2
T8
P7
P3
N2
P8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
M7
NC_5
M2
N8
M3
BA0
BA1
BA2
J 7
K7
K9
CK
CK
CKE
L2
K1
J 3
K3
L3
CS
ODT
RAS
CAS
WE
T2
RESET
IC1202-*1
H5TQ1G63BFR-H9C-C
C7
B7
E7
D3
A7
A2
B8
A3
D7
C3
C8
C2
H3
H8
G2
H7
E3
F7
F2
F8
L2
K1
J 3
K3
L3
T8
R3
L7
R7
N7
T3
P8
P2
R8
R2
N3
P7
P3
N2
M7
A15
M2
N8
M3
BA0
BA1
BA2
J 7
K7
K9
CK
CK
CKE
A4
A5
A6
A7
A0
A1
A2
A3
A8
A9
A10/AP
A11
A12/BC
A13
H y n i x C h i n a
CS
ODT
RAS
CAS
WE
VREFCA
VREFDQ
ZQ
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
M8
H1
L8
B2
D9
G7
K2
K8
N1
N9
R1
R9
D2
E9
F1
H2
H9
A1
A8
C1
C9
T2
F3
G3
RESET
DQSL
DQSL
NC_1
NC_2
NC_3
NC_4
NC_6
J 1
J 9
L1
L9
T7
DQSU
DQSU
DML
DMU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
B1
B9
D1
D8
E2
E8
F9
G1
G9
J 2
J 8
M1
M9
A9
B3
E1
G8
P1
P9
T1
T9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
DDR
2 0 1 0 . 1 2 . 2 2
21
/FLASH_WP
+3.3V_Normal
/SPI_CS
SPI_SDO
R1301
0
R1300
OPT
0
B
C
Q1300
KRC103S
E
+3.3V_Normal
+3.3V_Normal
IC200
MX25L8005M2I-15G
CS#
1
SO
2
WP#
3
GND
4
8
VCC
7
HOLD#
6
SCLK
5
S I
R1304
33
C1200
0 . 1 u F
SPI_SCK
SPI_SDI
IC200-*1
MX25L8006EM2I-12G
CS#
1
SO/SIO1
2
WP#
3
GND
4
8
VCC
7
HOLD#
6
SCLK
5
S I / S I O 0
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
S - f l a s h
2 0 1 0 . 1 2 . 2 2
23
LGIT CAN H/N TUNER for US&KOR&BRAZIL&TAIWAN&AUS
RF_S/W_CTL
1
BST_CTL
2
+B1[5V]
3
NC_1[RF_AGC]
4
NC_2
5
SCLT
6
7
NC_3
8
S I F
9
NC_4
10
VIDEO
11
GND
12
+ B 2 [ 1 . 2 V ]
13
14
+ B 3 [ 3 . 3 V ]
RESET
15
IF/AGC
16
DIF_1[N]
17
SDAT
D I F _ 2 [ P ]
18
19
SHIELD
TU5001-*1
TDTR-T035F
NTSC_2INPUT_H_LGIT
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
S I F
9
NC
10
VIDEO
11
GND
12
1.2V
13
14
3.3V
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
SHIELD
TU5001-*2
TDVJ-H031F
NTSC_1INPUT_V_LGIT
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
S I F
9
NC
10
VIDEO
11
GND
12
1.2V
13
14
3.3V
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
SHIELD
TU5001-*3
TDVJ-H001F
NTSC_1INPUT_H_LGIT
NTSC_1INPUT_H_SANYO
TU5001-*4
UDA45AL
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
S I F
9
NC
10
VIDEO
11
GND
12
1.2V
13
14
3.3V
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
19
SHIELD
DVB_1INPUT_H_LGIT
TU5001
TDTJ-S001D
19
SHIELD
ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC[IF_TP]
8
S I F
9
NC
10
VIDEO
11
GND
12
1.2V
13
14
3.3V
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18
R5003
0
+5V_TU
C5001
100pF
50V
C5003
0 . 1 u F
16V
+1.2V/+1.8V_TU
+3.3V_TU
C5006
100pF
50V
C5007
0 . 1 u F
16V
R5035
0
+3.3V_TU
NON_BR_TU_I2C
R5018
1.2K
33 R5015
C5012
18pF
50V
NON_BR_TU_I2C
33 R5016
C5013
18pF
50V
NON_BR_TU_I2C
NON_BR_TU_I2C
R5020
1.2K
TU_SCL
TU_SDA
NON_BR_TU_I2C NON_BR_TU_I2C
+3.3V_TU
R5009
100
R5011
100K
C5010
0 . 1 u F
16V
TUNER_RESET
R5034
0
IF_N_MSTAR
IF_P_MSTAR
Option name:BR_TU_I2C
B R A Z I L m o d e l u s e I 2 C S t a n d a r d M o d e
BR_TU_I2C
R5018-*1
3.3K
BR_TU_I2C
R5020-*1
3.3K
BR_TU_I2C
R5015-*1
100
1/16W
5%
BR_TU_I2C
C5012-*1
47pF
50V
BR_TU_I2C
R5016-*1
100
1/16W
5%
BR_TU_I2C
C5013-*1
47pF
50V
R5022
1K
C5016
0 . 1 u F
16V
OPT
C l o s e t o t h e t u n e r
IF_AGC_MAIN s h o u l d b e g u a r d e d b y g r o u n d
C5025
0 . 1 u F 16V
R5300
0
R5025
4.7K
+5V_TU
R5029
470
B
R5032
82
E
C
Q5004
ISA1530AC1
+5V_TU
R5026
1K
OPT
R5030
220
OPT
R5031
220
R5039
0
TU_CVBS_BYPASS
E
R5027
1K
OPT
B
OPT
C
Q5005
ISA1530AC1
TU_SIF
TU_CVBS
+3.3V_TU
C5031
0 . 1 u F
16V
VIN
IC5001
AZ1117H-ADJTRE1
3
2
VOUT
1
ADJ/GND
R5038
1.2K
R5036
10
+1.2V/+1.8V_TU
R5033
1
C5029
10uF
10V
C5028
0 . 1 u F
16V
200mA
60mA
+5V_TUNER
+5V_TU
L5002
BLM18PG121SN1D
C5019
22uF
16V
C5021
0 . 1 u F
16V
C5023
0 . 1 u F
16V
+3.3V_Normal
+3.3V_TU
L5003
BLM18PG121SN1D
C5020
22uF
16V
C5022
0 . 1 u F
16V
C5024
0 . 1 u F
16V
* C h a n g e H i s t o r y .
V e r 1 . 0 - - > 1 . 1 : C h a n g e o f c h i p t y p e , 0 9 1 0 1 9 , w . s . j e o n g
V e r 1 . 1 - - > 1 . 2 : C h a n g e o f c h i p t y p e , A d d o f T u n e r P / N f o r N T S C _ 1 I N P U T
1 . D e - r e t i n g
1 ) R 5 0 2 9 , R 5 0 3 0 , R 5 0 3 1 : 1 0 0 5 T y p e = = > 1 6 0 8 T y p e ( w . s . J e o n g _ 1 0 1 9 )
2 ) R 5 0 3 0 , R 5 0 3 1 : 2 0 0 / 1 6 0 8 T y p e = = > 2 2 0 / 2 0 1 2 T y p e ( w . s . J e o n g _ 1 1 1 6 )
2 . A D D o f T U N E R P / N ( w . s . J e o n g _ 1 1 1 6 )
P / N f o r N T S C _ 1 I N
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
T u n e r
2 0 1 0 . 1 2 . 2 2
26
COMPONENT1,AV1
R3114
470K
R3115
10K
C3106
1000pF
50V
R3116
12K
AV_R_IN
D3106
5.6V
JK3100
P P J 2 3 8 - 0 1
6C
[RD1]E-LUG
5C
[RD1]O-SPRING
4C
[RD1]CONTACT
5B
[WH1]O-SPRING
4A
[YL1]CONTACT
5A
[YL1]O-SPRING
6A
[YL1]E-LUG
6H
[RD2]E-LUG
5H
[RD2]O-SPRING_2
4H
[RD2]CONTACT
5G
[WH2]O-SPRING
5F
[RD2]O-SPRING_1
7F
[RD2]E-LUG-S
5E
[BL2]O-SPRING
7E
[BL2]E-LUG-S
4D
[GN2]CONTACT
5D
[GN2]O-SPRING
6D
[GN2]E-LUG
D3104
30V
R3108
75
D3101
5.6V
R3101
470K
D3100
5.6V
R3100
470K
R3105
0
C3101
1000pF
50V
R3107
10K
R3113
12K
C3100
1000pF
50V
R3106
10K
R3112
12K
OPT
C3104
10pF
50V
D3107
5.6V
R3117
470K
R3118
10K
C3107
1000pF
50V
R3119
12K
AV_CVBS_IN
+3.3V_Normal
R3121
10K
1K
OPT R3120
D3108
5.6V
C3108
100pF
50V
OPT
COMP1_R_IN
COMP1_L_IN
D3102
30V
R3103
0
R3110
75
C3102
10pF
50V
OPT
COMP1_Pr+
COMP1_Pr-
D3103
30V
R3102
0
R3109
75
OPT
C3103
10pF
50V
COMP1_Pb+
COMP1_Pb-
D3105
30V
R3104
0
R3111
75
OPT
C3105
10pF
50V
COMP1_Y+
COMP1_Y-
AV_L_IN
AV_CVBS_DET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
C o m p . j a c k
2 0 1 0 . 1 2 . 2 2
31
AUDIO AMP
+1.8V_AMP
+3.3V_Normal
IC404
AP1117E18G-13
C434
0 . 1 u F
16V
IN
3
Vd=1.4V
1
2
OUT
ADJ/GND
120 mA +24V
C421
10uF
10V
C446
0 . 1 u F
16V
+3.3V_Normal
L504
C514
22000pF
50V
C515
0 . 1 u F
50V
C519
0 . 1 u F
50V
C521
10uF
35V
C518
22000pF
50V
C520
1uF
25V
OPT
R535
3 . 3
OPT
C547
0 . 0 1 u F
50V
AUD_LRCH
AUD_LRCK
AUD_SCK
AMP_SDA
AMP_SCL
OPT
C501
10uF
10V
AMP_RESET
+1.8V_AMP
AUD_MASTER_CLK
+1.8V_AMP
L501
L502
C506
1000pF
50V
C509
0 . 1 u F
C504
100pF
50V
C508
1000pF
50V
R508
3.3K
C502
0 . 1 u F
16V
OPT
C503
10uF
10V
C505
0 . 1 u F
16V
R503
R504
R505
R506
R507
100
100
100
33
33
C507
18pF
50V
C510
18pF
50V
C546
22pF
50V
OPT
BST1A
C512
1uF
VDR1A
25V
/RESET
AD
DGND_1
GND_IO
CLK_I
VDD_IO
DGND_PLL
AGND_PLL
LF
AVDD_PLL
DVDD_PLL
GND
9
10
11
12
13
14
7
8
5
6
3
4
1
2
THERMAL
57
IC501
EAN60969603
NTP-7100
+1.8V_AMP
OPT
C511
10uF
10V
C513
0 . 1 u F
16V
C544
22pF
50V
OPT
C545
22pF
50V
OPT
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
VDR2A
BST2A
PGND2A_2
PGND2A_1
OUT2A_2
OUT2A_1
C522
25V 1uF
PVDD2A_2
PVDD2A_1
PVDD2B_2
PVDD2B_1
OUT2B_2
OUT2B_1
PGND2B_2
C525
22000pF
50V
+24V
C517
1uF
25V
C516
1000pF
50V
C526
0 . 1 u F
50V
C527
0 . 1 u F
50V
C524
22000pF
50V
R513
0
OPT_Only_32"Hos.Power
POWER_DET
+3.5V_ST
R514 100
R515
10K
C
Q501
2SC3052
E
B
R517
10K
D501
1N4148W
100V
OPT
D502
1N4148W
100V
OPT
R519
12
C529
390pF
50V
C530
390pF
50V
R520
12
R526
12
R524
12
D503
1N4148W
100V
OPT
D504
1N4148W
100V
OPT
R521
12
C531
390pF
50V
C532
390pF
50V
R522
12
R525
12
R523
12
C528
10uF
35V
AMP_MUTE
2S
L507
AD-9060
2F
1S 1F
15uH
2S
L506
AD-9060
2F
1S 1F
15uH
C534
0 . 4 7 u F
50V
C536
0 . 1 u F
50V
C537
0 . 1 u F
50V
R527
4.7K
R528
4.7K
C540 OPT
0 . 0 1 u F
50V
R531 OPT
3 . 3
R532 OPT
3 . 3
C541 OPT
0 . 0 1 u F
50V
SPK_L+
SPEAKER_L
SPK_L-
C535
0 . 4 7 u F
50V
C538
0 . 1 u F
50V
C539
0 . 1 u F
50V
R529
4.7K
R530
4.7K
C542 OPT
0 . 0 1 u F
50V
R533 OPT
3 . 3
R534 OPT
3 . 3
C543 OPT
0 . 0 1 u F
50V
SPK_R+
SPK_R-
SPEAKER_R
SPK_L+
SPK_L-
SPK_R+
SPK_R-
R536
0
R537
0
R538
0
R539
0
WAFER-ANGLE
4
3
2
1
P501
4
3
2
1
SMAW250-04
P502
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
AMP
2 0 1 0 . 1 2 . 2 2
38
NON CI Region
/PCM_CD
PCM_5V_CTL
/PCM_CE
/PCM_IRQA
/PCM_REG
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
PCM_RST
/PCM_WAIT
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
PCM_D[0-7]
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
26LD320H GP2 2 0 1 0 . 0 8 . 1 1
46
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
R/B
RE
CE
14
15
16
17
11
12
13
18
19
20
21
22
23
24
5
6
3
4
1
2
7
8
9
10
/PF_WP
NAND FLASH MEMORY
512MBIT
/PF_CE0
H : S e r i a l F l a s h
L : N A N D F l a s h
/PF_CE1
H : 1 6 b i t
L : 8 b i t
/F_RB
/PF_OE
/PF_CE0
+3.5V_ST
R103
0
+3.3V_Normal
/PF_CE1
PF_ALE
/PF_WE
R105
1K
OPT
B
C
E
Q101
KRC103S
OPT
I C 1 0 2 - * 1
HY27US08121B-TPCB
NC_28
48
47
NC_27
NC_26
46
45
NC_25
I / O 7
44
43
I / O 6
I / O 5
42
41
I / O 4
NC_24
40
39
NC_23
PRE
38
37
VCC_2
36
VSS_2
NC_22
35
34
NC_21
NC_20
33
32
I / O 3
I / O 2
31
30
I / O 1
I / O 0
29
28
NC_19
NC_18
27
26
NC_17
NC_16
25
NC_1
1
NC_2
NC_3
2
NC_4
3
4
NC_5
NC_14
NC_15
5
NC_6
RB
6
R
E
WP
NC_11
9
NC_7
NC_8
10
VDD_1
VSS_1
NC_9
13
NC_10
CL
14
15
AL
16
17
W
11
12
18
19
NC_12
20
21
NC_13
7
8
22
23
24
+3.3V_Normal
C101
0 . 1 u F
NC_1
NC_2
1
NC_3
NC_4
4
2
3
NC_5
5
NC_6
R/B
6
RE
CE
7
8
NC_7
NC_8
9
10
VCC_1
VSS_1
11
12
NC_9
NC_10
13
14
CLE
ALE
15
16
17
WE
WP
18
NC_11
19
20
NC_12
21
NC_13
NC_14
22
NC_15
23
24
IC102
HY27UF082G2B-TPCB
2GBIT
NC_24
NC_23
VCC_2
VSS_2
NC_22
NC_21
NC_20
I / O 3
I / O 2
I / O 1
I / O 0
NC_19
NC_18
NC_17
NC_16
NC_29
NC_28
NC_27
NC_26
I / O 7
I / O 6
I / O 5
I / O 4
NC_25
42
41
40
39
38
37
36
35
48
47
46
45
44
43
34
33
32
31
30
29
28
27
26
25
+3.3V_Normal
AR101
C102
10uF
C103
0 . 1 u F
AR102
PCM_A[7]
PCM_A[6]
PCM_A[5]
22
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
22
PCM_A[0]
I C 1 0 2 - * 2
NAND01GW3B2CN6E
1GBIT
33
32
31
30
29
28
27
26
25
38
37
36
35
34
48
47
46
45
44
43
42
41
40
39
NC_29
NC_28
NC_27
NC_26
I / O 7
I / O 6
I / O 5
I / O 4
NC_25
NC_24
NC_23
VDD_2
VSS_2
NC_22
NC_21
NC_20
I / O 3
I / O 2
I / O 1
I / O 0
NC_19
NC_18
NC_17
NC_16
S7M_NON_DIVX & MS10
IC101-*2
LGE107 (S7M Non Divx/RM)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_A12/DDR2_A8
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
U26
U25
A0M/RLV0N/RED[8]
A4M/RLV5N/GREEN[8]
W26
W25
U24
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
V26
V25
V24
A2M/RLV2N/RED[4]
W24
A3P/RLV4P/RED[1]
Y26
A3M/RLV4N/RED[0]
Y25
A4P/RLV5P/GREEN[9]
Y24
AF3
AF14
AD1
AD13
AE14
AE13
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AE4
AD5
AF4
AD4
AE2
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
AF6
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE23
AE26
AE25
C0M/LLV0N/BLUE[4]
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
AE24
C2P/LLV2P/BLUE[1]
AF24
AF23
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
AD22
AE22
AF22
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
DCKP/TCON5
D3M/TCON2
D4P/TCON1
D4M/TCON0
AD19
AE19
AD21 DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AB22
AB23
AC23
AC22
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
Y19
FRC_REXT
FRC_TESTPIN
FRC_GPIO0/UART_RX
FRC_GPIO1
FRC_GPIO3
AB16
AA14
AC15
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
Y16
AC16
AC14
FRC_I2CM_DA
FRC_I2CM_CK
AA16
AA15
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_PWM0
FRC_PWM1
AB15
AB14
PCM_A[0-7]
<T3 CHIP Config>
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
M I P S _ n o _ E J _ N O R 8 : 4 ’ h 3 ( M I P S a s h o s t . N o E J P A D . B y t e m o d e N A N D f l a s h . )
M I P S _ E J 1 _ N O R 8 : 4 ’ h 4 ( M I P S a s h o s t . E J u s e P A D 1 . B y t e m o d e N A N D f l a s h . )
M I P S _ E J 2 _ N O R 8 : 4 ’ h 5 ( M I P S a s h o s t . E J u s e P A D 2 . B y t e m o d e N A N D f l a s h . )
B 5 1 _ S e c u r e _ n o s c r a m b l e : 4 ’ h b ( 8 0 5 1 a s h o s t . I n t e r n a l S P I f l a s h s e c u r e b o o t , n o s c r a m b l e )
B 5 1 _ S e s u r e _ s c r a m b l e : 4 ’ h c ( 8 0 5 1 a s h o s t . I n t e r n a l S P I f l a s h s e c u r e b o o t w i t h s c a r m b l e )
PCM_A[0-14]
+3.3V_Normal
S7M_DIVX & DD
IC101-*1
LGE107DB-LF-1 (S7M Divx_Non RM/MS10)
AE3
AD14
AD3
AF15
AF2
AE15
AD2
AD16
AE1
AF16
AF1
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
AD15
AE16
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_A12/DDR2_A8
ACKP/RLV3P/RED[3]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]
A4M/RLV5N/GREEN[8]
W26
W25
U26 ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AF3
AF14
AD1
AD13
AE14
AE13
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
AC26
AC25
AA26
AA25
AA24 B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
AB26
AB25
AB24
AC24
AD26
AD25
AD24
B4M/TCON8/BLUE[6] AE4
AD5
AF4
AD4
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
AE2
FRC_DDR3_RESETB/DDR2_A3
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
AF6
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
AE6
AF11
AD6
AD12
AE5
AF12
AF5
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
AE12
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE26
AE25
C0M/LLV0N/BLUE[4]
AD23
AE23
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
AE24
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AF24
AF23
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
AD22
AE22
AF22
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
D2M/LLV8N
D3P/TCON3
D3M/TCON2
D4P/TCON1
D4M/TCON0
AF19
AD18
AE18
AF18
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AB22
AB23
AC23
AC22
AE8
Y11
Y19
FRC_DDR3_NC/DDR2_DQM0
FRC_REXT
FRC_TESTPIN
FRC_GPIO0/UART_RX
FRC_GPIO1
FRC_GPIO3
AB16
AA14
AC15
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
Y16
AC16
AC14
FRC_I2CM_DA
FRC_I2CM_CK
AA16
AA15
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_PWM0
FRC_PWM1
AB15
AB14
& M S 1 0 : R e g i o n t h a t s u p p o r t M S 1 0 ( e x : D T V C o u n t r y )
AUD_LRCH
AUD_SCK
AUD_MASTER_CLK
PWM1
PWM0
/PF_CE0
/PF_CE1
/PF_OE
/PF_WE
PF_ALE
/PF_WP
/F_RB for SYSTEM/HDCP
EEPROM&URSA3
S7_TX
S7_RX
I2C_SDA
I2C_SCL
RGB_DDC_SDA
RGB_DDC_SCL
& D D : R e g i o n t h a t s u p p o r t o n l y D o l b y D i g i t a l ( e x : A I S A A n a l o g / K O R E A )
/PCM_REG
+5V_Normal
/PCM_OE
/PCM_WE
/PCM_IORD
/PCM_IOWR
R132
10K
R133
10K
/PCM_CE
/PCM_IRQA
/PCM_CD
/PCM_WAIT
PCM_RST
AR104
AR103
22
22
R130
R131
22
22
R134
R135
R136
R137
R138
R139
PWM0
PWM1
PWM2
22
22
22
22
22
22
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_A[13]
PCM_A[14]
PCM_D[0]
PCM_D[1]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
U22
T21
T22
AB18
AC18
AC19
AC20
AC21
PCM_D0
PCM_D1
PCM_D2
PCM_D3
PCM_D4
PCM_D5
PCM_D6
PCM_D7
U21
V21
Y22
AA22
R22
R21
T23
T24
AA23
Y20
AB17
AA21
U23
Y23
W23
PCM_A0
PCM_A1
PCM_A2
PCM_A3
PCM_A4
PCM_A5
PCM_A6
PCM_A7
PCM_A8
PCM_A9
PCM_A10
PCM_A11
PCM_A12
PCM_A13
PCM_A14
W22
AA20
V23
P23
R23
P22
PCM_REG_N
AA17
V22
W21
Y21
PCM_OE_N
PCM_WE_N
PCM_IORD_N
PCM_IOWR_N
PCM_CE_N
PCM_IRQA_N
PCM_CD_N
PCM_WAIT_N
PCM_RESET
C108
0 . 1 u F
OPT
C109
0 . 1 u F
AC17
AB20
AA18
AB21
AB19
AD17
AA19
PCM_PF_CE0Z
PCM_PF_CE1Z
PCM_PF_OEZ
PCM_PF_WEZ
PCM_PF_ALE
PCM_PF_AD[15]
PCM_PF_RBZ
M23
N23
A5
B5
UART_TX2/GPIO65
UART_RX2/GPIO64
M22
N22
DDCR_DA/GPIO71
DDCR_CK/GPIO72
DDCA_DA/UART0_TX
DDCA_CK/UART0_RX
K23
K22
G23
G22
G21
PWM0/GPIO66
PWM1/GPIO67
PWM2/GPIO68
PWM3/GPIO69
PWM4/GPIO70
S7M_DIVX & MS10
GPIO143/TCON0
GPIO145/TCON2
GPIO147/TCON4
GPIO149/TCON6
GPIO151/TCON8
N21
M21
L22
L21
P21
R161
R162
22
OPT
22
5V_DET_HDMI_1
5V_DET_HDMI_2
EXT_PTC_RESET
SIDEAV_DET
GPIO36/UART3_RX
GPIO37/UART3_TX
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
K21
L23
K20
L20
M20
G20
G19
R163 OPT
R164
R168 OPT
R165 OPT
GPIO50/UART1_RX
GPIO51/UART1_TX
F20
F19
GPIO6/PM0/INT0
GPIO7/PM1/PM_UART_TX
GPIO8/PM2
GPIO9/PM3
GPIO10/PM4
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2
GPIO15/PM9
PM_SPI_CS2/GPIO16/PM10
GPIO17/PM11/INT3
GPIO18/PM12/INT4
E9
F7
F6
D8
G12
F10
E7
D7
E11
G9
F9
C5
E8 33
22
22
0
PM_SPI_CK/GPIO1
GPIO0/PM_SPI_CZ
PM_SPI_DI/GPIO2
PM_SPI_DO/GPIO3
D9
D11
E10
D10
33
33
0
0
22
22
R148
R149
R114
R150
R110
R146
R147
R151
INV_CTL
PANEL_CTL
AV_CVBS_DET
ERROR_OUT
MODEL_OPT_0
PTC_TX_S7
PTC_RX_S7_3.3V
USB1_OCD
USB1_CTL
MODEL_OPT_6
MODEL_OPT_1
/FLASH_WP
MODEL_OPT_2
TUNER_RESET
SYS_RESET
AV_CVBS_DET
EXT_PTC_UPDATE
SPI_SCK
/SPI_CS
SPI_SDI
SPI_SDO for SERIAL FLASH
PM_TS_CLK
PM_TS_VALID
PM_TS_SYNC
PM_TS[0-7] f r o m P r o I d i o m
TS0_CLK
TS0_VLD
TS0_SYNC
TS1_CLK
TS1_VLD
TS1_SYNC
AA9
AA5
AA10
TS0_D0
TS0_D1
TS0_D2
TS0_D3
TS0_D4
TS0_D5
TS0_D6
TS0_D7
AB5
AC4
Y6
AA6
W6
AA7
Y9
AA8
AC5
AC6
AB6
TS1_D0
TS1_D1
TS1_D2
TS1_D3
TS1_D4
TS1_D5
TS1_D6
TS1_D7
AC10
AB10
AC9
AB9
AC8
AB8
AC7
AB7
PM_TS[0]
PM_TS[1]
PM_TS[2]
PM_TS[3]
PM_TS[4]
PM_TS[5]
PM_TS[6]
PM_TS[7]
TS_CLK
TS_VALID
TS_SYNC
TS_0
TS_1
TS_2
TS_3
TS_4
TS_5
TS_6
TS_7
I n t e r n a l d e m o d o u t
/ P r o I d i o m i n
S7M_NON_DIVX & DD
IC101-*3
LGE107B-LF-1 (S7M Non Divx/RM/MS10)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4
FRC_DDR3_A12/DDR2_A8
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
A0P/RLV0P/RED[9]
U26
U25
A0M/RLV0N/RED[8]
A4M/RLV5N/GREEN[8]
W26
W25
U24
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]
V26
V25
V24
A2M/RLV2N/RED[4]
W24
A3P/RLV4P/RED[1]
Y26
A3M/RLV4N/RED[0]
Y25
A4P/RLV5P/GREEN[9]
Y24
AF3
AF14
AD1
AD13
AE14
AE13
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12
FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
BCKP/TCON13/GREEN[1]
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AE4
AD5
AF4
AD4
AE2
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
FRC_DDR3_RESETB/DDR2_A3
AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0
AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
AE11
AF6
FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11
C2M/LLV2N/BLUE[0]
C3P/LLV4P
AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
AE23
AE26
AE25
C0M/LLV0N/BLUE[4]
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
AE24
C2P/LLV2P/BLUE[1]
AF24
AF23
C3M/LLV4N
C4P/LLV5P
C4M/LLV5N
AD22
AE22
AF22
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1
FRC_DDR3_DQL3/DDR2_DQ2
FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
FRC_DDR3_DQL7/DDR2_DQ5
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
FRC_DDR3_DQU0/DDR2_DQ8
FRC_DDR3_DQU1/DDR2_DQ14
FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1
DCKP/TCON5
D3M/TCON2
D4P/TCON1
D4M/TCON0
AD19
AE19
AD21 DCKM/TCON4
D0P/LLV6P
D0M/LLV6N
D1P/LLV7P
D1M/LLV7N
D2P/LLV8P
D2M/LLV8N
D3P/TCON3
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AB22
AB23
AC23
AC22
AE8
FRC_DDR3_NC/DDR2_DQM0
Y11
Y19
FRC_REXT
FRC_TESTPIN
FRC_GPIO0/UART_RX
FRC_GPIO1
FRC_GPIO3
AB16
AA14
AC15
FRC_GPIO8
FRC_GPIO9/UART_TX
FRC_GPIO10
Y16
AC16
AC14
FRC_I2CM_DA
FRC_I2CM_CK
AA16
AA15
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_PWM0
FRC_PWM1
AB15
AB14
<T3 CHIP Config(AUD_LRCH)>
B o o t f r o m S P I f l a s h : 1 ’ b 0
B o o t f r o m N O R f l a s h : 1 ’ b 1
AF3
AF14
AD1
NC_61
NC_71
NC_27
AD13
AE14
AE13
NC_39
NC_56
NC_55
AE4
AD5
AF4
AD4
NC_46
NC_31
NC_62
NC_30
AE2
NC_44
AF8
AD9
NC_66
NC_35
AE9
AF9
NC_51
NC_67
AE11
AF6
NC_53
NC_64
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
NC_48
NC_69
NC_32
NC_38
NC_47
NC_70
NC_63
NC_54
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_52
NC_65
NC_37
NC_33
NC_36
NC_49
NC_68
NC_34
S7T_DIVX & MS10
IC101-*4
LGE105D(S7-Tcon Divx_ Non_RM)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
NC_43
NC_73
NC_59
NC_45
NC_40
NC_29
NC_72
NC_60
NC_57
NC_28
NC_42
NC_41
NC_58
AE8
NC_50
Y11
Y19
NC_12
GND_105
AD23
LLV3P
LLV3N
LLV0P
LLV0N
LLV1P
LLV1N
LLV2P
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23 LLV2N
LLVCKP
LLVCKN
LLV4P
LLV4N
AD22
AE22
AF22
GOE/GCLK1
AD19
AE19
AD21 GSC/GCLK3
LLV5P
LLV5N
LLV6P
LLV6N
LLV7P
LLV7N
GSPR
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18 GSP/VST
SOE
POL
AF18
RLV3P
RLV3N
RLV0P
RLV0N
W26
W25
U26
U25
U24
RLV1P
RLV1N
RLV2P
RLV2N
RLVCKP
RLVCKN
RLV4P
V26
V25
V24
W24
Y26
Y25
Y24
RLV4N
WPWM
OPTP/FLK2
AC26
AC25
RLV5P
RLV5N
AA26
AA25
RLV6P
AA24
AB26
AB25 RLV6N
RLV7P
RLV7N
OPTN/FLK3
FLK
GCLK6
GCLK5
AB24
AC24
AD26
AD25
AD24
VDD_ODD
VDD_EVEN
GCLK4
GCLK2
AB22
AB23
AC23
AC22
NC_23
DPM
HCON
AB16
AA14
AC15
NC_15
NC_26
LEDON
Y16
AC16
AC14
NC_20
NC_19
AA16
AA15
NC_11
NC_17
Y10
AA11
SCAN_BLK
SCAN_BLK1
AB15
AB14
AF3
AF14
AD1
NC_61
NC_71
NC_27
AD13
AE14
AE13
NC_39
NC_56
NC_55
AE4
AD5
AF4
AD4
NC_46
NC_31
NC_62
NC_30
AE2
NC_44
AF8
AD9
NC_66
NC_35
AE9
AF9
NC_51
NC_67
AE11
AF6
NC_53
NC_64
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
NC_48
NC_69
NC_32
NC_38
NC_47
NC_70
NC_63
NC_54
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_52
NC_65
NC_37
NC_33
NC_36
NC_49
NC_68
NC_34
S7T_DIVX & DD
IC101-*5
LGE105DB-LF-1 (S7-Tcon Divx_ Non_RM/MS10)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
NC_43
NC_73
NC_59
NC_45
NC_40
NC_29
NC_72
NC_60
NC_57
NC_28
NC_42
NC_41
NC_58
AE8
NC_50
Y11
Y19
NC_12
GND_105
RLV3P
RLV3N
RLV0P
RLV0N
W26
W25
U26
U25
U24
RLV1P
RLV1N
RLV2P
RLV2N
RLVCKP
RLVCKN
RLV4P
V26
V25
V24
W24
Y26
Y25
Y24
RLV4N
WPWM
OPTP/FLK2
RLV5P
RLV5N
RLV6P
RLV6N
RLV7P
RLV7N
OPTN/FLK3
FLK
GCLK6
GCLK5
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
LLV3P
LLV3N
LLV0P
LLV0N
LLV1P
LLV1N
LLV2P
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23 LLV2N
LLVCKP
LLVCKN
LLV4P
LLV4N
AD22
AE22
AF22
GOE/GCLK1
AD19
AE19
AD21 GSC/GCLK3
LLV5P
LLV5N
LLV6P
LLV6N
LLV7P
LLV7N
GSPR
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18 GSP/VST
SOE
POL
AF18
VDD_ODD
VDD_EVEN
GCLK4
GCLK2
AB22
AB23
AC23
AC22
NC_23
DPM
HCON
AB16
AA14
AC15
NC_15
NC_26
LEDON
Y16
AC16
AC14
NC_20
NC_19
AA16
AA15
NC_11
NC_17
Y10
AA11
SCAN_BLK
SCAN_BLK1
AB15
AB14
S7T_NON_DIVX & MS10
IC101-*6
LGE105 (S7-Tcon Non_Divx/RM)
AE1
AF16
AF1
AE3
AD14
AD3
AF15
NC_43
NC_73
NC_59
NC_45
NC_40
AF2
AE15
AD2
AD16
AD15
AE16
NC_29
NC_72
NC_60
NC_57
NC_28
NC_42
NC_41
NC_58
AF3
AF14
AD1
NC_61
NC_71
NC_27
AD13
AE14
AE13
NC_39
NC_56
NC_55
AE4
AD5
AF4
AD4
NC_46
NC_31
NC_62
NC_30
AE2
NC_44
AF8
AD9
NC_66
NC_35
AE9
AF9 NC_51
NC_67
AE11
AF6
NC_53
NC_64
AE6
AF11
AD6
NC_48
NC_69
AD12
AE5
AF12
AF5
AE12
NC_32
NC_38
NC_47
NC_70
NC_63
NC_54
AE10
AF7
NC_52
AD11
AD7
AD10
AE7
AF10
AD8
NC_65
NC_37
NC_33
NC_36
NC_49
NC_68
NC_34
AE8
NC_50
Y11
Y19
NC_12
GND_105
RLV3P
RLV3N
RLV0P
RLV0N
RLV1P
RLV1N
RLV2P
RLV2N
RLVCKP
RLVCKN
RLV4P
RLV4N
W26
W25
U26
U25
U24
V26
V25
V24
W24
Y26
Y25
Y24
AC26
WPWM
OPTP/FLK2
AC25
AA26
RLV5P
RLV5N
AA25
AA24
RLV6P
RLV6N
AB26
AB25
RLV7P
RLV7N
OPTN/FLK3
AB24
AC24
FLK
GCLK6
AD26
AD25
AD24
GCLK5
LLV3P
AD23
AE23
AE26 LLV3N
LLV0P
LLV0N
LLV1P
LLV1N
LLV2P
LLV2N
LLVCKP
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22 LLVCKN
LLV4P
LLV4N
AF22
GOE/GCLK1
GSC/GCLK3
LLV5P
AD19
AE19
AD21
AE21
LLV5N
LLV6P
LLV6N
LLV7P
LLV7N
GSPR
GSP/VST
SOE
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
POL
VDD_ODD
VDD_EVEN
GCLK4
GCLK2
AB22
AB23
AC23
AC22
NC_23
DPM
HCON
AB16
AA14
AC15
NC_15
NC_26
LEDON
Y16
AC16
AC14
NC_20
NC_19
AA16
AA15
NC_11
NC_17
Y10
AA11
SCAN_BLK
SCAN_BLK1
AB15
AB14
S7T_NON_DIVX & DD
IC101-*7
LGE105B-LF-1 (S7-Tcon Non_Divx/RM/MS10)
AE1
AF16
AF1
AE3
AD14
AD3
NC_43
NC_73
NC_59
NC_45
AF15
AF2
AE15
AD2
AD16
AD15
AE16
NC_40
NC_29
NC_72
NC_60
NC_57
NC_28
NC_42
NC_41
NC_58
AF3
AF14
AD1
NC_61
NC_71
NC_27
AD13
AE14
AE13
NC_39
NC_56
NC_55
AE4
AD5
AF4
AD4
NC_46
NC_31
NC_62
NC_30
AE2
NC_44
AF8
AD9
NC_66
NC_35
AE9
AF9
NC_51
NC_67
AE11
AF6
NC_53
NC_64
AE6
AF11
NC_48
AD6
AD12
AE5
AF12
AF5
AE12
NC_69
NC_32
NC_38
NC_47
NC_70
NC_63
NC_54
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_52
NC_65
NC_37
NC_33
NC_36
NC_49
NC_68
NC_34
AE8
NC_50
Y11
Y19
NC_12
GND_105
RLV3P
RLV3N
RLV0P
RLV0N
W26
W25
U26
U25
U24
V26 RLV1P
RLV1N
RLV2P
RLV2N
RLVCKP
RLVCKN
RLV4P
RLV4N
V25
V24
W24
Y26
Y25
Y24
WPWM
OPTP/FLK2
RLV5P
RLV5N
RLV6P
RLV6N
RLV7P
RLV7N
OPTN/FLK3
FLK
GCLK6
GCLK5
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
LLV3P
LLV3N
LLV0P
LLV0N
LLV1P
LLV1N
LLV2P
LLV2N
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22 LLVCKP
LLVCKN
LLV4P
LLV4N
AE22
AF22
GOE/GCLK1
GSC/GCLK3
AD19
AE19
AD21
LLV5P
LLV5N
LLV6P
LLV6N
LLV7P
LLV7N
GSPR
GSP/VST
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
SOE
POL
AF18
VDD_ODD
VDD_EVEN
GCLK4
GCLK2
AB22
AB23
AC23
AC22
NC_23
DPM
HCON
AB16
AA14
AC15
NC_15
NC_26
LEDON
Y16
AC16
AC14
NC_20
NC_19
AA16
AA15
NC_11
NC_17
Y10
AA11
SCAN_BLK
SCAN_BLK1
AB15
AB14
PCM_D[0-7]
DSUB_DET
MODEL_OPT_3
PCM_5V_CTL
/RST_PHY
/RST_HUB
LGE107D (S7M Divx_Non RM)
C6
B6
C8
C7
A6
SAR0/GPIO31
SAR1/GPIO32
SAR2/GPIO33
SAR3/GPIO34
SAR4/GPIO35
IC101
MPIF_CLK
MPIF_CS_N
D12
D14
E14
MPIF_BUSY
MPIF_D0
MPIF_D1
MPIF_D2
MPIF_D3
E12
F12
D13
E13
R160
1K
S7R
AF3
AF14
AD1
NC_66
NC_76
NC_32
AD13
AE14
AE13
NC_44
NC_61
NC_60
AE4
AD5
AF4
AD4
NC_51
NC_36
NC_67
NC_35
AE2
NC_49
AF8
AD9
NC_71
NC_40
AE9
AF9
NC_56
NC_72
AE11
AF6
NC_58
NC_69
AE6
AF11
AD6
NC_53
AD12
AE5
AF12
AF5
AE12
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_57
NC_70
NC_42
NC_38
NC_41
NC_54
NC_73
NC_39
AE1
AF16
AF1
AE3
AD14
AD3
NC_48
NC_78
NC_64
NC_50
AF15
AF2
AE15
AD2
AD16
AD15
AE16
NC_45
NC_34
NC_77
NC_65
NC_62
NC_33
NC_47
NC_46
NC_63
S7R_BASIC
IC101-*12
LGE101C-R-1 [S7R BASIC]
AE8
NC_55
Y11
Y19
NC_12
GND_105
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
W26
W25
U26
U25
U24
V26 LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVA4P/LLV8P
LVA4N/LLV8N
V25
V24
W24
Y26
Y25
Y24
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
AB22
AB23
AC23
AC22
NC_26
NC_19
NC_30
AB16
AA14
AC15
NC_15
NC_31
NC_29
Y16
AC16
AC14
NC_21
NC_20
AA16
AA15
NC_11
NC_17
Y10
AA11
NC_25
NC_24
AB15
AB14
I2C
EEPROM
+3.3V_Normal
HDCP EEPROM
+3.3V_Normal
Addr:10101--
R113
4.7K
C a t a l y s t
IC103
CAT24WC08W-T
A0
A1
1 8
$0.199
2 7
VCC
WP
R127
A2
3
VSS
4
6
SCL
5
SDA
C107
0 . 1 u F
4.7K
R128
22
R129 22
I2C_SCL
I2C_SDA
M s t a r
IC103-*1
CAT24C08WI-GT3-H-RECV(TV)
NC_1
1
NC_2
2
A2
3
VSS
4
8
VCC
7
WP
6
SCL
5
SDA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IC104
M24M01-HRMN6TP
NC
1
VSS
4
8
VCC
E1
2 7
WP
E2
3
A0’h
6
SCL
5
SDA
C105
0 . 1 u F
C104
8pF
OPT
R111
R112
C106
8pF
OPT
22
22
I2C_SCL
I2C_SDA
AF3
AF14
AD1
NC_66
NC_76
NC_32
AD13
AE14
AE13
NC_44
NC_61
NC_60
AE4
AD5
AF4
AD4
NC_51
NC_36
NC_67
NC_35
AE2
NC_49
AF8
AD9
NC_71
NC_40
AE9
AF9
NC_56
NC_72
AE11
AF6
NC_58
NC_69
AE6
AF11
AD6
NC_53
AD12
AE5
AF12
AF5
AE12
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_57
NC_70
NC_42
NC_38
NC_41
NC_54
NC_73
NC_39
S7_DIVX & MS10
IC101-*8
LGE101D (S7 Non_Tcon/RM)
AE1
AF16
AF1
AE3
AD14
AD3
NC_48
NC_78
NC_64
NC_50
AF15
AF2
AE15
AD2
AD16
AD15
AE16
NC_45
NC_34
NC_77
NC_65
NC_62
NC_33
NC_47
NC_46
NC_63
AE8
NC_55
Y11
Y19
NC_12
GND_105
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
W26
W25
U26
U25
U24
V26 LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVA4P/LLV8P
LVA4N/LLV8N
V25
V24
W24
Y26
Y25
Y24
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
RLV2N/RED[8]
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22 RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
AE22
AF22
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
AB22
AB23
AC23
AC22
NC_26
NC_19
NC_30
AB16
AA14
AC15
NC_15
NC_31
NC_29
Y16
AC16
AC14
NC_21
NC_20
AA16
AA15
NC_11
NC_17
Y10
AA11
NC_25
NC_24
AB15
AB14
AF3
AF14
AD1
NC_66
NC_76
NC_32
AD13
AE14
AE13
NC_44
NC_61
NC_60
AE4
AD5
AF4
AD4
NC_51
NC_36
NC_67
NC_35
AE2
NC_49
AF8
AD9
NC_71
NC_40
AE9
AF9
NC_56
NC_72
AE11
AF6
NC_58
NC_69
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
NC_53
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_57
NC_70
NC_42
NC_38
NC_41
NC_54
NC_73
NC_39
S7_DIVX & DD
IC101-*9
LGE101DB-LF-1 (S7 Non_Tcon/RM/MS10)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
NC_48
NC_78
NC_64
NC_50
NC_45
NC_34
NC_77
NC_65
NC_62
NC_33
NC_47
NC_46
NC_63
AE8
NC_55
Y11
Y19
NC_12
GND_105
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
LVA0N/LLV3N/BLUE[8]
W26
W25
U26
U25
U24
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVA4P/LLV8P
LVA4N/LLV8N
V26
V25
V24
W24
Y26
Y25
Y24
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
AD23
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23 RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
AD22
AE22
AF22
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AD19
AE19
AD21
AF18
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
AB22
AB23
AC23
AC22
NC_26
NC_19
NC_30
AB16
AA14
AC15
NC_15
NC_31
NC_29
Y16
AC16
AC14
NC_21
NC_20
AA16
AA15
NC_11
NC_17
Y10
AA11
NC_25
NC_24
AB15
AB14
S7_NON_DIVX & MS10
IC101-*10
LGE101 (S7 NON_TON/DiX/RM)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
NC_48
NC_78
NC_64
NC_50
NC_45
NC_34
NC_77
NC_65
NC_62
NC_33
NC_47
NC_46
NC_63
AF3
AF14
AD1
NC_66
NC_76
NC_32
AD13
AE14
AE13
NC_44
NC_61
NC_60
AE4
AD5
AF4
AD4
NC_51
NC_36
NC_67
NC_35
AE2
NC_49
AF8
AD9
NC_71
NC_40
AE9
AF9
NC_56
NC_72
AE11
AF6
NC_58
NC_69
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
NC_53
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_57
NC_70
NC_42
NC_38
NC_41
NC_54
NC_73
NC_39
AE8
NC_55
Y11
Y19
NC_12
GND_105
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
U26
U25
LVA0N/LLV3N/BLUE[8]
W26
W25
U24
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
V26
V25
V24
LVA2N/LLV5N/BLUE[4]
W24
LVA3P/LLV7P/BLUE[1]
Y26
LVA3N/LLV7N/BLUE[0]
Y25
LVA4P/LLV8P
Y24
LVA4N/LLV8N
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
AA26
AA25
LVB0N/RLV6N/RED[0]
AC26
AC25
AA24
LVB1P/RLV7P/GREEN[9]
AB26
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
AB25
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
AB24
AC24
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
AD26
AD25
AD24
LVB4N/LLV0N/GREEN[0]
AD23
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23 RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
AD22
AE22
AF22
TCON3/OE/GOE/GCLK2
AD19
AE19
AD21 TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18 TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AF18
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
AB22
AB23
AC23
AC22
NC_26
NC_19
NC_30
AB16
AA14
AC15
NC_15
NC_31
NC_29
Y16
AC16
AC14
NC_21
NC_20
AA16
AA15
NC_11
NC_17
Y10
AA11
NC_25
NC_24
AB15
AB14
AF3
AF14
AD1
NC_66
NC_76
NC_32
AD13
AE14
AE13
NC_44
NC_61
NC_60
AE4
AD5
AF4
AD4
NC_51
NC_36
NC_67
NC_35
AE2
NC_49
AF8
AD9
NC_71
NC_40
AE9
AF9
NC_56
NC_72
AE11
AF6
NC_58
NC_69
AE6
AF11
AD6
AD12
AE5
AF12
AF5
AE12
NC_53
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59
AE10
AF7
AD11
AD7
AD10
AE7
AF10
AD8
NC_57
NC_70
NC_42
NC_38
NC_41
NC_54
NC_73
NC_39
S7_NON_DIVX & DD
IC101-*11
LGE101B-LF-1(S7 Non_Tcon/Divx/RM/MS10)
AD3
AF15
AF2
AE15
AD2
AD16
AD15
AE16
AE1
AF16
AF1
AE3
AD14
NC_48
NC_78
NC_64
NC_50
NC_45
NC_34
NC_77
NC_65
NC_62
NC_33
NC_47
NC_46
NC_63
AE8
NC_55
Y11
Y19
NC_12
GND_105
LVACLKP/LLV6P/BLUE[3]
LVACLKN/LLV6N/BLUE[2]
LVA0P/LLV3P/BLUE[9]
W26
W25
U26
U25
U24 LVA0N/LLV3N/BLUE[8]
LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]
LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]
LVA3N/LLV7N/BLUE[0]
LVA4P/LLV8P
V26
V25
V24
W24
Y26
Y25
Y24
LVA4N/LLV8N
LVBCLKP/LLV0P/GREEN[5]
LVBCLKN/LLV0N/GREEN[4]
LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]
LVB4N/LLV0N/GREEN[0]
AC26
AC25
AA26
AA25
AA24
AB26
AB25
AB24
AC24
AD26
AD25
AD24
RLV3P/RED[7]
RLV3N/RED[6]
RLV0P/LVSYNC
RLV0N/LHSYNC
RLV1N/LCK
RLV2P/RED[9]
RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]
RLV4N/RED[4]
RLV5P/RED[3]
RLV5N/RED[2]
AD23
AE23
AE26
AE25
AF26
AF25
AE24
AF24
AF23
AD22
AE22
AF22
TCON3/OE/GOE/GCLK2
TCON15/SCAN_BLK1
TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AD19
AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18
TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON
TCON17/CS6/GCLK4
AB22
AB23
AC23
AC22
NC_26
NC_19
NC_30
AB16
AA14
AC15
NC_15
NC_31
NC_29
Y16
AC16
AC14
NC_21
NC_20
AA16
AA15
NC_11
NC_17
Y10
AA11
NC_25
NC_24
AB15
AB14
+3.3V_Normal
AMP_SDA
AMP_SCL
I2C_SDA
I2C_SCL
FE_DEMOD_SDA
FE_DEMOD_SCL
DIMMING
A_DIM
PWM_DIM
C111
2 . 2 u F
R156
R157
10K
100
37LD320H
Main
PWM0
PWM2
2 0 1 0 . 1 2 . 2 2
1
R201
R202
R203
R204
R210
R213
OPT
100
100
OPT
OPT
100
100
OPT
100
OPT
100
OPT
+3.3V_Normal
MODEL OPTION
MODEL_OPT_0
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_4
MODEL_OPT_5
MODEL_OPT_6
PIN NAME
MODEL_OPT_0
MODEL_OPT_4
MODEL_OPT_1
MODEL_OPT_2
MODEL_OPT_3
MODEL_OPT_5
MODEL_OPT_6
MODEL OPTION
PIN NO.
G19
E18
C5
F7
B6
D18
F9
HIGH
FRC
LOW
NO FRC
100/120Hz LVDS
MINI LVDS
DDR_512MB
FHD
GIP
50/60Hz LVDS
LVDS
DDR_256MB
HD
NON_GIP
OLED LCD
OPT_0 OPT_4
N O _ F R C : L O W L O W
U 3 _ I N T E R N A L : H I G H L O W
U 3 _ E X T E R N A L : H I G H H I G H
PWIZ TCON with LG FRC : HIGH HIGH
RSDS Power OPT
+2.5V_Normal
VDD_RSDS:88mA
OPT
VDD_RSDS
L213
BLM18PG121SN1D
VDD33
L214
BLM18PG121SN1D
OPT
C4005
0 . 1 u F
+1.26V_VDDC
CK+_HDMI1
CK-_HDMI1
D0+_HDMI1
D0-_HDMI1
D1+_HDMI1
D1-_HDMI1
D2+_HDMI1
D2-_HDMI1
DDC_SDA_1
DDC_SCL_1
HPD1
CK+_HDMI2
CK-_HDMI2
D0+_HDMI2
D0-_HDMI2
D1+_HDMI2
D1-_HDMI2
D2+_HDMI2
D2-_HDMI2
DDC_SDA_2
DDC_SCL_2
HPD2
DSUB_HSYNC
DSUB_VSYNC
DSUB_R+
DSUB_R-
DSUB_G+
DSUB_G-
DSUB_B+
DSUB_B-
SCART1_RGB/COMP1
COMP1_Pr+
COMP1_Pr-
COMP1_Y+
COMP1_Y-
COMP1_Pb+
COMP1_Pb-
TU_CVBS
AV_CVBS_IN
SIDEAV_CVBS_IN
Close to MSTAR
R288 100 C257 0 . 1 u F
R289 100 C258 0 . 1 u F
DTV_IF
IF_P_MSTAR
IF_N_MSTAR
IC101
LGE107D (S7M Divx_Non RM)
C250
C251
0 . 1 u F
0 . 1 u F
R4002
R4003
47
47
TU_SIF
EDID_WP
C203
1000pF
OPT
R260
R259
OPT
0
0
R4024
22
R4025
22
R228
R229
R230
R231
R232
R233
R234
+3.3V_Normal
33
68
33
68
33
68
0
C204
C205
C206
C207
C208
C209
C210
R261
1K
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
1000pF
H3
G1
H1
H2
F1
F2
G2
G3
F5
F4
E6
A_RXCP
A_RXCN
A_RX0P
A_RX0N
A_RX1P
A_RX1N
A_RX2P
A_RX2N
DDCDA_DA/GPIO24
DDCDA_CK/GPIO23
HOTPLUGA/GPIO19
S7M_DIVX
B1
B2
C2
C3
A2
A3
B3
A1
B4
C4
E5
D6
AA2
AA1
AB1
AA3
AB3
AB2
AC2
AC1
AB4
AA4
AC3
E2
E3
F3
E1
D3
C1
D1
D2
D4
E4
D5
B_RXCP
B_RXCN
B_RX0P
B_RX0N
B_RX1P
B_RX1N
B_RX2P
B_RX2N
DDCDB_DA/GPIO26
DDCDB_CK/GPIO25
HOTPLUGB/GPIO20
C_RXCP
C_RXCN
C_RX0P
C_RX0N
C_RX1P
C_RX1N
C_RX2P
C_RX2N
DDCDC_DA/GPIO28
DDCDC_CK/GPIO27
HOTPLUGC/GPIO21
D_RXCP
D_RXCN
D_RX0P
D_RX0N
D_RX1P
D_RX1N
D_RX2P
D_RX2N
DDCDD_DA/GPIO30
DDCDD_CK/GPIO29
HOTPLUGD/GPIO22
CEC/GPIO5
G5
G6
K1
L3
K3
K2
J 3
J 2
J 1
HSYNC0
VSYNC0
RIN0P
RIN0M
GIN0P
GIN0M
BIN0P
BIN0M
SOGIN0
VIFP
VIFM
QP
QM
W2
W1
I P
IM
V2
V1
S S I F / S I F P
Y2
Y1
SSIF/SIFM
U3
V3
IFAGC
RF_TAGC
Y5
Y4
TGPIO0/UPGAIN
TGPIO1/DNGAIN
TGPIO2/I2C_CLK
TGPIO3/I2C_SDA
U1
U2
R3
T3
XTALIN
XTALOUT
T2
T1
SPDIF_IN/GPIO177
SPDIF_OUT/GPIO178
G14
G13
DM_P0
DP_P0
B7
A7
DM_P1
DP_P1
AF17
AE17
F14
I2S_IN_BCK/GPIO175
I2S_IN_SD/GPIO176
F13
F15
I2S_IN_WS/GPIO174
I2S_OUT_BCK/GPIO181
I2S_OUT_MCK/GPIO179
I2S_OUT_SD/GPIO182
I2S_OUT_SD1/GPIO183
I2S_OUT_SD2/GPIO184
I2S_OUT_SD3/GPIO185
I2S_OUT_WS/GPIO180
D20
E20
D19
F18
E18
D18
E19
LINE_IN_0L
LINE_IN_0R
LINE_IN_1L
LINE_IN_1R
LINE_IN_2L
LINE_IN_2R
LINE_IN_3L
LINE_IN_3R
LINE_IN_4L
LINE_IN_4R
LINE_IN_5L
LINE_IN_5R
P4
P5
R6
T6
N1
P3
P1
P2
U5
V5
U6
V6
R253
R254
R255
R256
R257
R258
R236
33
68
33
68
33
68
0
C211
C212
C213
C214
C215
C216
C217
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
0 . 0 4 7 u F
1000pF
G4
H6
K5
K4
J 4
K6
H4
J 6
J 5
HSYNC1
VSYNC1
RIN1P
RIN1M
GIN1P
GIN1M
BIN1P
BIN1M
SOGIN1
H5
N3
N2
M2
M1
L2
L1
M3
HSYNC2
RIN2P
RIN2M
GIN2P
GIN2M
BIN2P
BIN2M
SOGIN2
LINE_OUT_0L
LINE_OUT_2L
LINE_OUT_3L
LINE_OUT_0R
LINE_OUT_2R
LINE_OUT_3R
MIC_DET_IN
MICCM
MICIN
AUCOM
VRM
VAG
VRP
U4
W3
W4
V4
Y3
W5
R4
T5
R5
T4
C234
OPT
C235
2 . 2 u F
2 . 2 u F
OPT
P7
R7
P6
C236
C237
C238
C239
C4059
C4060
C244
C245
C246
C247
TP201
TP202
TP203
TP204
TP205
R4032
0
R4033
0
DEMOD_OPT
DEMOD_OPT
R291
R292
R4028
R296
2 . 2 u F
2 . 2 u F
2 . 2 u F
2 . 2 u F
2 . 2 u F
2 . 2 u F
2 . 2 u F
2 . 2 u F
2 . 2 u F
OPT
2 . 2 u F OPT
TP208
C249
4 . 7 u F
R4029
R216
R217
0 OPT
100
C253
1uF
0 OPT
100
100
C256
0 . 1 u F
ANALOG SIF
Close to MSTAR
+3.3V_Normal
L227
BLM18PG121SN1D
X201
24MHz
AMP_SCL
AMP_SDA
22
22
C4064
0 . 1 u F
R4019
1K
Close to MSTAR
R4020
10K
IF_AGC_MAIN
TU/DEMOD_I2C
FE_DEMOD_SCL
FE_DEMOD_SDA
C4065
0 . 0 2 2 u F
16V
TU_SCL
TU_SDA
C261
C262
MODEL_OPT_4
MODEL_OPT_5
C263
10uF
27pF
27pF
AMP_SDA
B/T USB
SIDE_USB_DM
SIDE_USB_DP
SIDE USB
COMP1_L_IN
COMP1_R_IN
AV_L_IN
AV_R_IN
SIDEAV_L_IN
SIDEAV_R_IN
PC_L_IN
PC_R_IN
L202
BLM18SG121TN1D
AUD_SCK
AUD_MASTER_CLK
AUD_LRCH
AMP_SCL
AUD_LRCK
EXT_SPK
HP_OUT_1L
HP_OUT_1R
R1
R2
HP OUT
R244
R246
R4016
R250
R251
33 C225 0 . 0 4 7 u F
33
33
C227
C4057
0 . 0 4 7 u F
0 . 0 4 7 u F
33
33
C231
C232
0 . 0 4 7 u F
0 . 0 4 7 u F
N4
N6
L4
L5
L6
M4
M5
K7
CVBS0P
CVBS1P
CVBS2P
CVBS3P
CVBS4P
CVBS5P
CVBS6P
CVBS7P
ET_RXD0
ET_TXD0
ET_RXD1
ET_TXD1
E21
E22
R278
D21
F21
R280
33
33
R252
TP210
68 C233 0 . 0 4 7 u F
M6
M7
N5
CVBS_OUT1
CVBS_OUT2
VCOM0
ET_REFCLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS
E23
D22
F22
D23
F23
R282
R283
R284
R285
OPT
OPT
OPT
OPT
33
33
33
33
Close to MSTAR
AVLINK
IRINT
TESTPIN
RESET
U3_RESET
F8
G8
K8
A4
Y17
TP206
R298
OPT
100
IR
+3.3V_Normal
SOC_RESET
OPT
22
R4018
OPT
R205
10K
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
VDDC 1.26V
IC101
+1.26V_VDDC
LGE107D (S7M Divx_Non RM)
+3.3V_Normal
VDD33
L204
BLM18PG121SN1D
AVDD_MEMPLL:24mA
FRC_LPLL:13mA
FRC_LPLL
L206
BLM18PG121SN1D
VDD33_DVI:163mA
+3.3V_Normal
VDD33_DVI
L207
BLM18PG121SN1D
N o r m a l 2 . 5 V
AVDD2P5/ADC2P5:162mA
+2.5V_Normal
+2.5V_Normal
AU25:10mA
RSDS Power OPT
+1.26V_VDDC
L228
BLM18SG700TN1D
VDD33
C287
10uF
MIU1VDDC
L226
BLM18SG700TN1D
VDD33
AVDD2P5
L211
BLM18PG121SN1D
L212
BLM18PG121SN1D
+1.5V_DDR
N o r m a l P o w e r 3 . 3 V
VDD33_T/VDDP/U3_VD33_2:47mA
L215
BLM18PG121SN1D
AU25
AVDD_DDR0:55mA
FRC_MPLL:4mA
AVDD_DMPLL
L217
BLM18PG121SN1D
AVDD_DDR0
MIU0VDDC
AU33:31mA
AU33
C4015
0 . 1 u F
AVDD2P5
C288
0 . 1 u F
R4022
0
1/10W
5%
+2.5V_Normal
AVDD25_PGA:13mA
DDR3 1.5V
FRC_AVDD:60mA
+2.5V_Normal
FRC_AVDD
ADC2P5
L221
BLM18PG121SN1D
FRC_VDD33_DDR:50mA
VDD33
FRC_VDD33_DDR
L222
BLM18PG121SN1D
AVDD_DMPLL/AVDD_NODIE:7.362mA
AVDD25_PGA
L219
BLM18PG121SN1D
AVDD_DDR0
AVDD_DDR0
+1.26V_VDDC
OPT
AVDD_DDR1:55mA
MVREF
L225
BLM18SG700TN1D
AVDD_DDR1
FRCVDDC
AVDD2P5
AVDD2P5
FRC_AVDD
FRC_LPLL
VDD33
MIU0VDDC
MIU1VDDC
FRCVDDC
C4045
ADC2P5
AU25
AVDD25_PGA
AVDD_DMPLL
VDD33_DVI
AVDD_DMPLL
AU33
VDD33
VDD_RSDS
AVDD_DDR0
AVDD_DDR1
MVREF
1uF
FRC_VDD33_DDR
H11
H12
H13
H14
H15
J 1 2
J 1 3
J 1 4
J 1 5
J 1 6
L18
H16
K19
L19
M18
M19
N18
N19
N20
P18
P19
P20
Y12
J 1 1
L7
H7
J 7
J 8
L8
W15
Y15
U8
M8
AB11
AB12
AC11
AC12
AA12
D15
D16
E15
E16
E17
F16
F17
G16
G17
H17
N9
P9
N8
P8
T7
U7
T9
R8
R9
T8
V20
W20
U19
U20
V19
W19
U18
T20
Y14
R19
W14
G15
Y7
Y8
S7M_DIVX
VDDC_1 GND_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
A_DVDD
B_DVDD
FRC_VDDC_0
FRC_VDDC_1
FRC_VDDC_2
FRC_VDDC_3
FRC_VDDC_4
FRC_VDDC_5
FRC_VDDC_6
FRC_VDDC_7
FRC_VDDC_8
U3_DVDD_DDR
AVDD1P2
DVDD_NODIE
AVDD2P5_ADC_1
AVDD2P5_ADC_2
AVDD25_REF
AVDD_AU25
PVDD_1
PVDD_2
AVDD25_PGA
AVDD_NODIE
AVDD_DVI_1
AVDD_DVI_2
AVDD3P3_CVBS
AVDD_DMPLL
AVDD_AU33
AVDD_EAR33
AVDD33_T
VDDP_1
VDDP_2
VDDP_3
FRC_VD33_2_1
FRC_VD33_2_2
FRC_AVDD_RSDS_1
FRC_AVDD_RSDS_2
FRC_AVDD_RSDS_3
FRC_AVDD
FRC_AVDD_LPLL
FRC_AVDD_MPLL
FRC_VDD33_DDR
AVDD_MEMPLL
FRC_AVDD_MEMPLL
AVDD_DDR0_D_1
AVDD_DDR0_D_2
AVDD_DDR0_D_3
AVDD_DDR0_D_4
AVDD_DDR0_C
AVDD_DDR1_D_1
AVDD_DDR1_D_2
AVDD_DDR1_D_3
AVDD_DDR1_D_4
AVDD_DDR1_C
FRC_AVDD_DDR_D_1
FRC_AVDD_DDR_D_2
FRC_AVDD_DDR_D_3
FRC_AVDD_DDR_D_4
FRC_AVDD_DDR_C
MVREF
NC_1
NC_2
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_FU
PGA_VCOM
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
V13
V14
V15
V16
V17
V18
W7
W8
U16
U17
V7
V8
V9
V10
V11
V12
T18
T19
U10
U11
U12
U13
U14
U15
T11
T12
T13
T14
T15
T16
T17
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J 9 L223
U9
BLM18SG121TN1D
R12
R13
R14
R15
R16
R17
R18
T10
P12
P13
P14
P15
P16
P17
R10
R11
N12
N13
N14
N15
N16
N17
P10
P11
M12
M13
M14
M15
M16
M17
N10
N11
L13
L14
L15
L16
L17
M9
M10
M11
K15
K16
K17
K18
L9
L10
L11
L12
J 1 8
J 1 9
K9
K10
K11
K12
K13
K14
G18
H9
H10
H18
H19
J 1 0
J 1 7
37LD320H
Main
VDDC : 2026mA
+1.26V_VDDC
2 0 1 0 . 1 2 . 2 2
2
FPGA POWER
+3.3V_Normal
3 . 3 V _ P r o i d i o m
L1227
MLB-201209-0120P-N2
3 . 3 V _ P r o i d i o m
MLB-201209-0120P-N2
L1228
0 1 2 : S 2 6 ; 0 1 2 : A J 2 6
+VCCINT_1.5V
C2177
100uF
16V
XMARK_1.8V
3 . 3 V _ P r o i d i o m
AZ1117H-1.8TRE1(EH13A)
1
ADJ/GND INPUT
3
XMARK
C2263
22uF
16V
XMARK
C2260
0 . 1 u F
16V
OUTPUT
2
XMARK_1.8V
GND
XMARK
C2262
0 . 1 u F
16V
XMARK
C2261
22uF
16V
RESET
FPGA_RESET
012:Q17
VSB_RESET
3 . 3 V _ P r o i d i o m
OPT
R2390
10K
1N4148W
D1250
OPT
R2393
100
C2179
OPT
1uF
25V
OPT
R2394
100
OPT
IC1210
MAX809RTR
RESET
2
012:B17
VSB_RESET
0 0 1 : A J 2 1
SYS_RESET
3 . 3 V _ P r o i d i o m
3
1
GND
VCC
C2255
1uF
25V
27MHz
3 . 3 V _ P r o i d i o m
012:Q17 DE_H_SYSCLK
C2176
10uF
16V
R2387 22
C2178
0 . 1 u F
16V
6
5
4
X1006
27MHz
1
2
3
I2C
MSCL_3.3V
FE_DEMOD_SCL
0 0 1 : A G 5 ; 0 0 2 : S 2 0
MSDA_3.3V
FE_DEMOD_SDA
0 0 1 : A G 5 ; 0 0 2 : S 2 0
3 . 3 V _ P r o i d i o m
+5V_Normal
0
0
R2446
R2447
D
B
S
Q1114
BSS83
3 . 3 V _ P r o i d i o m
G
C2180
0 . 1 u F
16V
OPT
0
0
R2448
R2449
D
B
S
Q1115
BSS83
G
C2181
0 . 1 u F
16V
OPT
Pro:Idiom (XMARK)
+VCCINT_1.5V
MLB-201209-0120P-N2
L1231
005:AF17
005:AF17
005:AF17
005:AF17
005:AF16
005:AF16
005:AF16
005:AF16
MLB-201209-0120P-N2
L1230
C2186
4 . 7 u F
16V
R2424 0
3 . 3 V _ P r o i d i o m
TS_0
TS_1
TS_2
TS_3
TS_4
TS_5
TS_6
TS_7
R2418
4.7K
005:AN19
005:AN19
005:AN19
TS_0
TS_1
TS_2
TS_3
TS_4
TS_5
TS_6
TS_7
TS_CLK
TS_VALID
TS_SYNC
R2570
CLK1
IO2_29/TP_SOP
IO2_21/TP_VALID
IO2_17/TP_ERR
IO2_41/TP_DATA[7]
IO2_36/TP_DATA[6]
IO2_31/TP_DATA[5]
IO2_25/TP_DATA[4]
IO2_23/TP_DATA[3]
IO2_18/TP_DATA[2]
IO2_14/TP_DATA[1]
IO2_8/TP_DATA[0]
IO1_29
IO1_2
IO1_3
IO1_4
P L L v o l t a g e
XMARK_1.8V
XMARK
L1255
10K
XMARK
R2583
0
XMARK
BLM18PG121SN1D
3 . 3 V _ P r o i d i o m
C2268
4 . 7 u F
010:C16
010:B23
3 . 3 V _ P r o i d i o m
1K
R2402
1K
XMARK
3 . 3 V _ P r o i d i o m
XMARK
R2573
0
10K
R2422
DE_H_SYSCLK
GND
FPGA_RESET
MSCL_3.3V
MSDA_3.3V
R2406
OPT
10K
R2415
R2416
R2417
R2571
0
XMARK
22
22
22
IO1_5
IO1_6
IO1_7
IO1_8
IO1_9
IO1_10
IO1_11
IO1_12
CLK0
IO2_48/RESET
IO3_37/I2C_SCK
IO3_34/I2C_SDA
DCLK
CONF_DONE
NCONFIG
NCE
R2412
R2413
R2414
LGDT1129
R2409 10K
10K
10K
10K
DATA0
IO1_21SO
IO1_22/ASDO
NCEO
NSTATUS
MSEL0
MSEL1
TCK
TDO
TMS
TDI
IO1_1/INIT_DONE
R2408 10K
LGDT1129
IO1_13
IO1_14
R2403
1K
R2404
GND
LGDT1129
R2582
0
R2572
0
IO1_15
IO1_16
IO1_17
IO1_18
IO1_19
IO1_20
IO1_23
IO1_24
R2587 0
LGDT1129
XMARK
R2589
0
XMARK
IO1_25
IO1_26
IO1_27
IO1_28
IO1_30
IO1_31
IO1_32
IO1_33
IO1_34
IO1_35
L2
N1
M2
N2
M3
L5
M4
K2
L3
K1
L1
G2
F1
H5
J 1
F3
G3
F2
E1
H15
J 1 5
H14
D4
D1
H2
G4
K3
H4
J 1 3
J 3
J 2
J 1 4
G1
B2
D14
E14
K4
K13
H3
J 4
F5
E3
D2
E2
G5
F4
D3
E4
M1
C3
C2
B1
C9
C10
C11
C12
C5
C6
C7
C8
H1
B8
B9
B10
C2189
4 . 7 u F
16V
16V 50V
16V
IC1209
LGDT1129
LGDT1129
16V 16V
3 . 3 V _ P r o i d i o m
+VCCINT_1.5V
R11
R8
R9
R10
P5
P6
P7
P8
P9
P10
P11
P12
E7
A6
B7
A4
B4
E10
C4
D9
D7
A8
E8
D8
A9
D10
A11
B11
B3
D11
D12
E9
E11
E12
A2
B12
A13
B13
C13
B14
A15
B15
D13
C14
C15
B16
G12
H13
E13
F12
D15
D16
E15
E16
F15
F13
F14
F16
G15
G13
G14
H12
G16
H16
IO2_10
IO2_9
IO2_47
IO2_7
IO2_6
IO2_5
IO2_4
IO2_3
IO2_2
IO2_1
IO3_43
IO3_42
IO3_41
IO3_40
IO3_39
IO3_38
IO3_36
IO3_35
IO3_33
IO3_32
IO3_31
IO3_30
IO3_29
IO3_28
IO3_27
IO3_26
IO3_25
IO3_24
IO3_23
IO3_22
CLK2
CLK3
IO2_30
IO2_28
IO2_27
IO2_26
IO2_44
IO2_24
IO2_45
IO2_22
IO2_20
IO2_19
IO2_16
IO2_15
IO2_46
IO2_13
IO2_12
IO2_11
IO4_34/CH_CLK
IO4_20/CH_VALID
IO4_26/CH_SOP
IO4_30/CH_ERR
IO4_8/CH_DATA[0]
IO4_13/CH_DATA[1]
IO4_18/CH_DATA[2]
IO4_24/CH_DATA[3]
IO4_28/CH-DATA[4]
IO4_33/CH_DATA[5]
IO4_35/CH_DATA[6]
IO4_41/CH_DATA[7]
IO2_34
IO2_33
IO2_32
IO2_43
XMARK
L1253
BLM18PG121SN1D
XMARK
0 . 1 u F
C2267
R2441
R2442
R2443
R2444
100
100
100
100
PM_TS[0]
PM_TS[1]
PM_TS[2]
PM_TS[3]
PM_TS[4]
PM_TS[5]
PM_TS[6]
PM_TS[7]
OPT
C2219
62pF
50V
008:AP25
PM_TS_CLK
008:AP25
PM_TS_VALID
008:AP25
PM_TS_SYNC
008:AP27
PM_TS[0-7]
INNER LAYER PATERN
XMARK_1.8V
XMARK
R2580
0
XMARK
R2586
0
XMARK
R2581
0
XMARK_1.8V
XMARK_1.8V
XMARK
L1252
BLM18PG121SN1D
XMARK
C2271
4 . 7 u F
XMARK XMARK
GND
R2574 0
LGDT1129
XMARK
R2575
0
XMARK
R2585
0
XMARK
R2588
0
XMARK_1.8V
XMARK
BLM18PG121SN1D
L1254
LGDT1129 not use XMARK
XMARK LG1001(XMARK)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
37LD320H
P r o i d i o m
2 0 1 0 . 1 2 . 2 2
12
Power-Up Boot Fail Trouble Shooting guide
Check P401 All
Voltage Level (3.5V, 12V, 24V)
Y
Check IC1602 RESET and
UPDATE pin
Y
N
N
Check X1600 Clock
32.768MHz
Y
N
Check IC1602 IIC communication state
N
Y
Check power connector and
RL_ON signal OK ?
Check switch SW501, SW502
Check X1600 application circuit or Replace X1600
Check IIC line or replace IC1602
Y
Check IR input state of IC1602
57pin
Y
N
Check IR board
Re-download PTC Micom
Replace Power board
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
No OSD Trouble Shooting guide
Check P401 All
Voltage Level (5V, 12V, 16V)
N Check power connector and
RL_ON(pin1) signal OK ?
Y
Check Q409 output Voltage(12V)
N
Check Q409 application circuit or replace Q409
Y
N
Replace Cable
Check LVDS Cable
Y
Check LCD Module
Control board
Replace Power board
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Analog RF Video Trouble shooting guide
Check RF cable & signal
YES
Check TU5001 Pin11(Video output)
Can you see the normal signal?
NO
YES
Could you measure voltage of TU5001 & IIC lines?
Are they all normal?
NO
YES
You should replace TUNER.
You should check power line
& IIC lines.
Check tuner 5V power L5002
YES
Check tuner 3.3V power L5003
Check tuner 1.2V power IC5001
2pin : 1.2V
YES
NO
NO
Check IC401
YES
Replace L5003
NO
Replace IC5001
Check Mstar LVDS output
NO
Replace
Mstar(IC101) or main board
NO
Replace IC401
Replace L5002
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Digital RF Trouble shooting guide
Check RF Cable
Y
Check Tuner 5V Power
IC401
Y
Check IIC Signal
TU5001 #7, 8 Pin
Y
Check IF Signal
TU5001 #10, 11 Pin
Y
Check X201 and application circuit
Y
Replace IC101
N
N
N
N
Replace IC401
Check IIC line and level shifter circuit
Check tuner application circuit or replace tuner.
Replace X201
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
AV Video Trouble shooting guide
Check input signal format.
Is it supported?
YES
Check AC cable for damage
For damage or open conductor
YES
Check JK3100
Can you see the normal waveform?
NO
JK3100 may have problem. Replace this Jack.
YES
Check the input of Mstar(IC101).
Measure waveform at C227 because it’s more easy to check.
Can you see the normal waveform?
YES
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Component Video Trouble shooting guide
Check input signal format.
Is it supported?
YES
Check AC cable for damage
For damage or open conductor
YES
Check JK3100
Can you see the normal waveform?
NO
JK3100 may have problem. Replace this Jack.
YES
Check the input of Mstar(IC101).
Measure waveform at C213 because it’s more easy to check.
Can you see the normal waveform?
YES
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
HDMI Video Trouble shooting guide
Check input signal format.
Is it supported?
YES
Check AC cable for damage
For damage or open conductor
YES
Check EDID & EEPROM
IC801/IC802 I2C signal
R876, R875/ R878,R877(SDA,SCL)
NO
YES
Check JK801/JK802
Can you see the normal waveform?
NO
YES
Check HDCP key NVRAM(IC103)
Power & I2C signal
NO
YES
Check the input of Mstar(IC101).
Measure waveform at R4024, R4025 because it’s more easy to check.
Can you see the normal waveform?
Replace the defective IC or re-download EDID data
JK801/JK802 may have problem. Replace this Jack.
Replace the defective IC
YES
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
RGB-PC Video Trouble shooting guide
Check input signal format.
Is it supported?
YES
Check AC cable for damage
For damage or open conductor
YES
Check EDID & EEPROM
IC1105 I2C signal
R1141, R1143(SDA,SCL)
NO
YES
Check P1103
Can you see the normal waveform?
NO
YES
Check the input of Mstar(IC101).
Measure waveform at R4024, R4025 because it’s more easy to check.
Can you see the normal waveform?
Replace the defective IC or re-download EDID data
P1103 may have problem. Replace this Jack.
YES
This board has big problem because Main chip (Mstar) have some troubles.
After checking thoroughly all path once again, You should decide to replace Mstar or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Analog RF Audio Trouble shooting guide
Check TU5001 Pin9(SIF)
Can you see the normal signal?
YES
NO
Check the input of Mstar (IC101).
Measure waveform at C250 because it’s more easy to check.
Can you see the normal waveform?
NO
Could you measure voltage of TU5001& IIC lines?
Are they all normal?
NO
YES
You should replace TUNER.
You should check power line
& IIC lines.
After checking audio signal line, you should decide to replace item or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
AV/Component/RGB-PC Audio(in)Trouble shooting guide
NO
Check JK3100, JK1102.
Can you see the normal waveform?
YES
JK3801, JK1102. may have problem. Replace this Jack.
Check the input of Mstar(IC101).Measure waveform at
C236,C237,C238,C239,C4059,C4060,C244,C245 because it’s more easy to check. Can you see the normal waveform?
NO
After checking audio signal line, you should decide to replace item or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
HDMI Audio(in) Trouble shooting guide
NO
JK801/JK802 may have problem. Replace this Jack.
Check input connect JK801/JK802
Can you see the normal waveform?
YES
Check HDCP key NVRAM(IC103)
Power & I2C signal
NO
After checking the Power of this chip, you should decide to replace this or not.
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Audio out Trouble shooting guide
Check the output of Mstar(IC101).
Measure waveform at R503, R504, R505. because it’s more easy to check. Can you see the normal signal?
YES
Check the input (Pin 17,18,19) of NTP7100(IC501).
Can you see the normal waveform?
YES
Check the output (Pin 30,31,36,37,47,48,53,54) of NTP7100((IC501).
Can you see the normal waveform?
YES
Check the speaker output wafer P501.
Can you see the normal waveform?
YES
NO
This board has big problem because Main chip (MStar) have some troubles.
After checking thoroughly all path once again,
You should decide to replace Mstar or not.
NO
After checking audio signal line, you should decide to replace item or not.
NO
After checking the Power & I2C & Reset of this chip, you should decide to replace this or not.
NO
After checking audio signal line, you should decide to replace item or not.
Check the connector & Speaker
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
xxLD340H-UA Block Diagram
< Contents >
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LG Electronics/ BS Division
Commercial Display H/W Gr.
LGE Internal Use Only
RF
TDVJ
- S001D
IF N/P
TU_CVBS
SIF
SDA/SCL_5V
Reset / IF_AGC …
Mini LVDS
P-Gamma
Power Shift
Power Control
TS_CLK,VALID,SYNC,0~7
PM_TS_CLK,VALID,SYNC,0~7
LCD Module
(FHD,M+S, 60Hz)
Pro:Idom
LGDT1129
IC1209
TMMB
-H001P
B-LAN
JK6001
JK1401
AV1
Component 1
HDMI 2
HDMI 1
USB
Side AV2
RGB PC
PC Audio
P1103
RS-232C
(SVC)
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
JK1102
DP/DM/ +5V
CVBS, L/R
CVBS, L/R
Y Pb Pr, L/R
RGB/H/V
Audio L/R
RX/TX
MAX3232
RX/TX
S7(LGE105DB-LF-1)
IC101
A_Data[0:15],
Addr.[ ], ctrl, DQS, DM …
B_Data[0:15],
PCM_A [0 … 7]
CS ,RE,WE……
SCL, SDA_3.3V
EXT_OUT
I2S
DDR2 (1 G bit)
H5TQ1G63BFR-H9C
IC1201
DDR2 (1 G bit)
H5TQ1G63BFR-H9C
IC1202
NAND Flash(2 G bit)
HY27UF082G2B-TPCB
IC102
S_FLASH (8M bit)
MX25L8005M2I-15G
IC200
Power AMP
TPA6011A4PWPRG4
IC1100
Digital AMP
NTP7000
IC501
Reset Switch
JK6000
RJP_CTRL
I2C(SCL/SDA)
S/W Reset
Micom
(MSP430F5419IPZR)
IC1602
24MHz
X-tal
JK501
JK1100
LGE Internal Use Only
RF
TMMB
-H001P
TDVJ
- S001D
IF_N/P_MSTAR
IF_AGC_MAIN
TU_SIF
TU_CVBS
IP/IM
IFAGC
SIFP
CVBS0P
A_RXCP/N
A_RX0P/N
A_RX1P/N
A_RX2P/N
DSUB_R
DSUB_G
DSUB_B
DSUB_HSYNC
DSUB_VSYNC
COMP1_Y
COMP1_Pr
COMP1_Pb
RIN0P/M
GIN0P/M
BIN0P/M
HSYNC0
VSYNC0
S7(LGE105DB-LF-1)
GIN1P/M
RIN1P/M
BIN1P/M
B_RXCP/N
B_RX0P/N
B_RX1P/N
B_RX2P/N
AV_CVBS_IN
SIDEAV_CVBS_IN
CVBS2P
CVBS3P
CK+/-_HDMI1
D0+/-_HDMI1
D1+/-_HDMI1
D2+/-_HDMI1
CK+/-_HDMI2
D0+/-_ HDMI2
D1+/-_HDMI2
D2+/-_HDMI2
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
RF
TDVJ
- S001D
IF_N/P_MSTAR
IF_AGC_MAIN
TU_SIF
TU_CVBS
TMMB
-H001P
AV_L_IN
AV_R_IN
COMP1_L_IN
COMP1_R_IN
SIDEAV_L_IN
SIDEAV_R_IN
PC_L_IN
PC_R_IN
IP/IM
IFAGC
SIFP
CVBS0P
I2S_OUT_MCK
LINE_IN_1L
LINE_IN_1R
I2S_OUT_SD1
I2S_OUT_BCK
I2S_OUT_SD
LINE_IN_0L
I2S_OUT_WS
LINE_IN_0L
S7(LGE105DB-LF-1)
AUD_MASTER_CLK
AMP_SCL
AMP_SCK
AUD_LRCH
AUD_LRCK
Digital AMP
NTP7000
LINE_IN_
LINE_IN_4L
LINE_IN_4R
LINE_OUT_3L
EXT_SPK
Power AMP
TPA6011A4PWPRG4
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
NAND FLASH
(HY27UF082G2B-TPCB)
RB
RE
CE
CLE
ALE
WE
WP
/F_RB
/PF_OE
/PF_CE0
/PF_CE1
PF_ALE
/PF_WE
/PF WP
PCM_A[0-7]
8
PCM_A0
PCM_A1
PCM_A2
PCM_A3
PCM_A4
PCM_A5
PCM_A6
PCM_A7
S7(LGE105DB-LF-1)
PCM_PF_RBZ
PCM_PF_CE1Z
PCM_PF_CE0Z
PCM_PF_CE1Z
PCM_PF_CE0Z
PCM_PF_WEZ
PCM PF_AD15
+3.5V_ST
RESET
SOC_RESET
Micom
(MSP430F5419IPZR)
Reset Switch
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
+3.3V_TU
+3.3V_Normal
Tuner
(TDTJ-S001D)
TU5001
33 ohm
33 ohm
TU_SCL/SDA
+3.3V_Normal
TGPIO2/I2C_CLK
TGPIO3/I2C_SDA
EEPROM
(M24M01)
IC104
HDCP EEPROM
(CAT24WC08W)
IC103
22 ohm
22 ohm
I2C_SCL/SDA
22 ohm
22 ohm
+5V_Normal
22 ohm
22 ohm
DDCR_CK/GPIO72
DDCR_DA/GPIO71
EEPROM
(BAT24C02BN)
IC1105
RGB_DDC_SCL/SDA
+5V_Normal.
22 ohm
22 ohm
DDCA_CK/UART0_RX
DDCA_DA/UART0_TX
S7(LGE105DB-LF-1)
TGPIO0/UPGAIN
TGPIO1/DNGAIN
AMP_SCL/SDA
0 ohm
0 ohm
FE_DEMOD_SCL/SDA
22ohm
22 ohm
+3.3V_Normal
33ohm
33 ohm
22ohm
22 ohm
MSCL_3.3V
MSDA_3.3V
AUDIO AMP
(NTP7000)
IC501
P-GAMMA
(MAX9668ETP+)
IC601
LGDT1129
(Pro:Idiom)
IC1209
+5V_ST
EEPROM
(AT24C02BN)
IC801
22 ohm
22 ohm
DDC_SCL_1/SDA_1
+5V_Normal
DDCDA_CK/GPIO23
DDCDA_DA/GPIO24
CMOS
(TXS0104EDR)
IC1608
FRAM
(FM24C16A)
IC1608
EEPROM
(AT24C02BN)
IC802
22 ohm
22 ohm
DDC_SCL_2/SDA_2
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
DDCDB_CK/GPIO25
DDCDB_DA/GPIO26
PTC Micom
(MSP430F5419IPZR)
IC1602
LGE Internal Use Only
VGH(+25V)
VDD_LCM(+16V)
VCC_LCM(+3.3V)
VGL(-5V)
MAX17113
(4CH DCDC)
IC603
Panel_Vcc(+12V)
Enable1 For VGL
Enable2 For VGH/VDD
HVDD
TPS62110
(DCDC)
IC600
Enable2 For HVDD
Panel_Vcc(+12V)
VGH(+25V)
VGL(-5V)
VCC_LCM(+3.3V)
CLK
6
VDD_EVEN/ODD
VST (VGL to VGH)
MAX17119
(Level shifter)
IC602
GCLK_I
6
GVDD_EVEN/ODD_I
GSP/GVST_I
VDD_LCM(+16V)
VCC_LCM(+3.3V)
GMA(3,4,6,7,12,1
3,15,16)
VCOML
VCOM
MAX9668
(P_GAMMA)
IC601
VCOMR
AMP_SCL
AMP_SDA
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
S7(LGE105DB-LF-1)
Mini LVDS
OUT Block
CLK / VDD_EVEN_ODD/VST
VCOML / GMA (gamma voltage)
VGH / VDD / VCC / VGL / HVDD
T_con signal ( POL / SOE )
LVDS RXC0+/-
LVDS RXC1+/-
LVDS RXC2+/-
LVDS RXC3+/-
LVDS RXC4+/-
LVDS RXD0+/-
LVDS RXD1+/-
GSP/GVST_I
P701(30pin)
Mini LVDS
H_CONV
H_CONV
GSP/GVST_I
LVDS RXB0+/-
LVDS RXB1+/-
LVDS RXB2+/-
LVDS RXB3+/-
LVDS RXB4+/-
LVDS RXA0+/-
LVDS RXA1+/-
T_con signal ( POL / SOE )
CLK / VDD_EVEN_ODD/VST
VCOMR / GMA (gamma voltage)
VGH / VDD / VCC / VGL / HVDD
P702(30pin)
Mini LVDS
LGE Internal Use Only
+3.5V_ST
P401 or
P403 or P404
(#9~12)
1168mA
L404
+3.5V_ST
L413
L420
IC1602
MSP430F5419IPZR
(Micom)
IC1600
SC632ULTRT
(DCDC)
IC408
NCP803SN293
(RESET IC)
+5V_ST
IC1601
BD9306AFVM
(DCDC)
Power_DET
+12V_ST
IC403
MP2212DN
(DCDC)3A
+1.26V_VDDC
IC101
(Main SOC)
AVDD_DDR0,1
LGE105B-LF-1
IC407
MP2212DN
(DCDC)3A
IC1003
MAX3232CDR
(RS-232C)
IC1000, 1001
MC14053BDR2G
(UART)
P6000
(#6)
+1.5V_DDR
L1209
L1201
VCC_1.5V_DDR
IC1201, IC1202
H5TQ1G63BFR-H9C
DDR3
Control IR & LED
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
+20V
P401 or
P403 or P404
(#2~4)
800mA
L407
+24V
+12V
P401 or
P403 or P404
(#17,19,21)
684mA
L402
+12V/+15V
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
IC408
NCP803SN293
(RESET IC)
IC409
NCP803SN293
(RESET IC)
IC501
NTP-7000
Power_DET
L401
L6000
L416
L417
L430
L1412
IC401
MP8706EN
(DCDC)3A
+5V_USB
IC1500
AP2191SG-13
(OPC)
L1451
Q6000
SI4925BDY
(FET)
D1600
JK6000
(RJP)
+12V_C
Q1482
SI4925BDY
(FET)
+12V_C_MPI
Q1471
2N3906S-RTK
(BJT)
JK1450
USB JACK
BEXT_5V
L1407
TU1002
TMMB-H001P
(b-LAN)
L1401
IC408
NCP803SN293
Power_DET
JK1401
(b-LAN
MPI JACK)
+3.3V_Normal
IC405
AOZ1073AIL
(DCDC)3A
IC406
AOZ1072AI
(DCDC)2A
IC406
AOZ1072AI
(DCDC)2A
L424
+5V_Normal
+5V_TUNER
PANEL_VCC
Q409
AO3407A
(FET)
LGE Internal Use Only
+3.3V
_Normal
IC405
AOZ1073AIL
(DCDC)3A
L424
+3.3V_Normal
IC402
AZ2940D-2.5TRE1
LDO
L204
L207
VDD33
+2.5V_Normal
L206,L205,L222
AVDD2P5/ADC2P5
L211
AU25
L212
AVDD25_PGA
L219
FRC_AVDD
L221
FRC_LPLL, AU33
FRC_VDD33_DDR
VDD33_DVI
AVDD_DMPLL
L207
L1227
3.3V_Proidiom
L1228
+VCCINT_1.5V
IC200
MX25L8005M2I-15G
(S-FLASH)
L5003
L504
+3.3V_TU
IC404
AP1117E18G-13
(LDO)
IC1209
LGDT1129
(Pro:Idiom)
IC5001
AZ1117H-ADJTRE1
(LDO)
+1.2V/+1.8V_TU
TU5001
TDTJ-S001D
(Tuner)
IC501
NTP7000
(Audio AMP)
+1.8V_AMP
IC103
CAT24WC08W
(HDCP EEPROM)
IC104
M24M01-HRMN6TP
(EEPROM)
IC102
HY27UF082G2B-TPCB
(NAND Flash)
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE105B-LF-1
IC101
(Main SOC)
LGE Internal Use Only
+5V
_Normal
IC406
AOZ1073AI
(DCDC)2A
+5V_Normal
IC801~802
AT24C02BN
(EDID EEPROM)
IC1105
AT24C02BN
(EDID EEPROM)
L1100
For HDMI
For RGB PC
IC1100
TPA6011A4PWPRG4
(External SPK AMP)
L5002
+5V_TU
TU5001
TDTJ-S001D
(Tuner)
+5V
_Tuner
IC406
AOZ1073AI
(DCDC)2A
+5V_Tuner
PANEL
_VCC
Q409
AO3407A
(FET)
L604
PANEL_VCC(+12V)
z z
IC600
TPS62110RSAR
(MINI LVDS HVDD)
z
IC603
MAX17113ETL+
(MINI LVDS PMIC)
L701,702
L600
HVDD
D602
VGH(+25V)
z z
VDD_LCM(+16V)
L601
VCC_LCM(+3.3V)
z
D603
VGL(-5V)
IC601
MAX9668ETP+
(MINI LVDS P-GMA)
VCOM
P701, 702
(MINI LVDS)
z
IC602
MAX17119DS
(Level Shifter)
Copyright ⓒ 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
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