LiPPERT Cool RoadRunner LX800 PC/104-Plus CPU board Technical Manual
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Cool RoadRunner-LX800
PC/104-Plus CPU Board
Technical Manual
TME-104P-CRR_LX800-R2V7.doc
Revision 2.7 / March 11
© LiPPERT Embedded Computers GmbH
Hans-Thoma-Str. 11
D-68163 Mannheim http://www.lippertembedded.com/
Technical Manual Cool RoadRunner-LX800
LiPPERT Document: TME-104P-CRR_LX800-R2V7.doc Revision 2.7
Copyright ©2011 LiPPERT Embedded Computers GmbH, All rights reserved
Contents and specifications within this manual are subject of change without notice.
Trademarks
MS-DOS, Windows, Windows 95, Windows 98, Windows NT and Windows XP are trademarks of Microsoft
Corporation. PS/2 is a trademark of International Business Machines, Inc. Intel and Solid State Drive are trademarks of Intel Corporation. Geode is a trademark of Advanced Micro Devices. PC/104 is a registered trademark of PC/104 Consortium. All other trademarks appearing in this document are the property of their respective owners.
Disclaimer
Contents and specifications within this technical manual are subject of change without notice.
LiPPERT Embedded Computers GmbH provides no warranty with regard to this technical manual or any other information contained herein and hereby expressly disclaims any implied warranties of merchantability or fitness for any particular purpose with regard to any of the foregoing. LiPPERT Embedded Computers GmbH assumes no liability for any damages incurred directly or indirectly from any technical or typographical errors or omissions contained herein or for discrepancies between the product and the technical manual. In no event shall LiPPERT
Embedded Computers GmbH be liable for any incidental, consequential, special, or exemplary damages, whether based on tort, contract or otherwise, arising out of or in connection with this user’s guide or any other information contained herein or the use thereof.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7
Table of Contents
1 Overview
1
2 Getting Started
6
3 Module Description
11
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 i
4 Using the Module
31
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 ii
5 Address Maps
44
Appendix A, Contact Information A
Appendix B, Additional Information
B
Appendix C, Getting Help
Appendix D, Revision History
C
D
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 iii
1 Overview
1.1 Introduction
The Cool RoadRunner-LX800 is a high-performance PC/104-Plus board with AMD’s Geode™ LX processor, having very low power requirements. The board comprises all peripherals needed for an embedded PC on a small
3.775" by 4.050" printed circuit board. It is fully plug-in compatible with the Cool RoadRunner 2, which was obsolete due to end-of-life of the Geode GX1.
The Cool RoadRunner integrates a powerful yet efficient AMD Geode™ LX800 processor together with a CS5536
I/O companion and a Super I/O chip to form a complete PC, with all the standard peripherals already on board.
There is graphics controller with VGA, LVDS, and parallel TFT adapters to connect many sorts of display terminals.
Backlighting is provided for LCD modules.
A fast 100/10BaseT Ethernet port, RS232/RS422/RS485 serial ports, and four USB 2.0 host ports handle the communication with external devices. There are PS/2 connectors for keyboard and mouse as well as a parallel printer port available. Sound I/O according to AC97 is supported, too. An IDE ATA100 adapter allows connection of hard disk or CD drives. Applications that require non-moving storage can use the integrated Compact Flash socket.
System expansion is easily done using the PC/104 and PC/104-Plus connectors . I2C bus, PWM outputs, and programmable general purpose digital signals are available on a supervisory connector.
The Cool RoadRunner-LX800 is powered by a 5V-only supply and supports ACPI, advanced power management and PCI power management. Security critical applications take advantage of the Geode LX processor, too. It has an on-chip AES 128-bit crypto acceleration block capable of 44 Mbps throughput on either encryption or decryption. The AES block runs asynchronously to the processor core and is DMA based.
The Cool RoadRunner-LX800 runs Windows, Linux and VxWorks operating systems.
Features
CPU
· AMD Geode™ LX [email protected] (500MHz)
· Cache Memory with:
· 64 KB/64 KB level 1 I/D caches
· TLB (Translation Look-aside Buffer):
· 128 KB level 2 cache
· Efficient Prefetch
Chipset
· AMD CS5536 companion device
Interfaces
· Ethernet 10/100BaseT
· Compact Flash Type III header
· ATA-6 EIDE (Ultra DMA-100)
· PS/2 Keyboard
· PS/2 Mouse
· 4 x USB 2.0 ports
· 2 x RS232/RS485, software selectable
· 1 x parallel port
Other configurations are possible at high volumes.
Main Memory
· One DDR333 SODIMM Module, up to 1GB
· Recommended: 256MB at minimum
Extension slots
· 1 x 32-bit PC/104-Plus
· 1 x 16-bit PC/104 with full DMA capability
· SVGA monitor
· 18 Bit Flat Panel
· 24 Bit LVDS for displays
· Supervisory port: external power button, live signal, watchdog, hardware monitoring and some general purpose signals
· Power supply
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Block Diagram
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1.2 Ordering Information
Cool RoadRunner-LX800 Models
Order number
803-0010-10
903-0010-10
Description
Cool RoadRunner-LX800 (CRR-LX800) with LCD+VGA-CRT, AMD GEODE [email protected]
(500 MHz), low power consumption, up to 1GB DDR SDRAM, 4x USB2.0, IrDA, RTC,
GoldCap, EIDE, 3x COM, LPT (EPP/EPC), PS/2 Keyboard, PS/2 Mouse, WDOG, PC/104 bus, PC/104+ bus, VGA controller (TFT Displays supported), bitparallel and LVDS Interface,
Fast Ethernet 100/10BaseT, 8Bit GPIO, Compact Flash Type II Socket, Sound I/O AC97 compliant.
Operating temperature range: -20°C .. +60°C
Cool RoadRunner-LX800 (CRR-LX800) with LCD+VGA-CRT, AMD GEODE [email protected]
(500 MHz), low power consumption, up to 1GB DDR SDRAM, 4x USB2.0, IrDA, RTC,
GoldCap, EIDE, 3x COM, LPT (EPP/EPC), PS/2 Keyboard, PS/2 Mouse, WDOG, PC/104 bus, PC/104+ bus, VGA controller (TFT Displays supported), bitparallel and LVDS Interface,
Fast Ethernet 100/10BaseT, 8Bit GPIO, Compact Flash Type II Socket, Sound I/O AC97 compliant.
Operating temperature range: -40°C .. +85°C
Cable Sets and Accessories
There are some options available for the Cool RoadRunner-LX800. Please check their availability before ordering.
Order number
863-0011-10
Description
Adapter Cable Set
Cable set for Cool Roadrunner LX800, power, keyboard, 2.5" IDE, cable adapter 2.5" > 3.5", adapter 3.5" > 2.5", printer, 2 x serial, VGA-CRT, Ethernet, 2 x USB, sound I/O, mouse.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 3 of 47
1.3 Specifications
Electrical Specifications
Supply voltage
Rise time
Supply voltage tolerance
Inrush current
Supply current
+5 V DC
10ms..100 ms
± 5%
4.5 A max. 1.5 A depending on operating system and RAM typ. 0.9 A (Windows XP idle mode) typ. 0.06 A (running Windows XP Suspend to RAM)
Environmental Specifications
Operating:
Temperature range
Temperature change
Humidity (relative)
Pressure
-20 … 60 °C (standard version)
-40 … 85 °C (extended version) max. 10K / 30 minutes
10 … 90 % (non-condensing)
450 … 1100 hPa
Non-Operating/Storage/Transport:
Temperature range -40 … 85 °C
Temperature change
Humidity (relative)
Pressure max. 10K / 30 minutes
5 … 95 % (non-condensing)
450 … 1100 hPa
MTBF
MTBF at 25°C 364.293 hours
In order to perform a failure rate assessment, several assumptions have to be made to minimize the complexity of the analysis.
Basis for the calculation was „Parts-Stress" method according to MIL-HDBK-217 F Notice 2. Although this method requires stress values for all components, mean stress values have been used.
Environmental factor „Ground Benign" according to MIL-HDBK-217 has been used as well as an environmental temperature of 25 °C.
Failure rate of mechanical components (screws, chassis, etc) is negligible.
The detailed analysis report is available on request.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 4 of 47
Mechanical
Dimensions (L x W)
Height
Weight
Mounting
95.9 mm x 115.6 mm (including I/O extension) max. 14 mm on top side above PCB max. 12 mm on bottom side above PCB
150 g (including RAM)
4 mounting holes
Note: It is strongly recommend using plastic spacers instead of metal spacers to mount the board. With metal spacers, there is a possible danger to create a short circuit with the components located around the mounting holes.
This can damage the board!
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2 Getting Started
2.1 Connector Locations
Top
COM1 LPT COM2
PC/104-Plus
PC/104
USB/Audio/Mouse
The connectors' pin 1 is marked RED
ETH VGA
IDE
Keyboard
Power
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 6 of 47
Bottom
Supervisory
Connector
Backlight
Voltage
Backlight JTAG
The connectors' pin 1 is marked RED
LVDS
TFT
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2.2 Jumper Locations
Jumper X24 Jumper X12
Jumper X8
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 8 of 47
2.3 LED indicators
The onboard LED indicators provide a very comfortable way to check the board’s status. The boot success, power status, IDE accesses, and Ethernet accesses are all visible.
The LED indicators are located on top of the board, near the PC/104 connector. External LED indicators in a custom system can easily be connected using the related pins of the Supervisory Connector
Link:
Activity:
Speed:
Green LED shows the Ethernet Link status.
Red LED flashes at Ethernet activity.
Yellow LED lights up if 100Mbit connection is established.
Power Mode: Red LED is constantly lit if the boot process is complete and the board is running normally.
Red LED flashes when board goes in suspend mode.
Main Power: Green LED lights up when Main Power is supplied.
SBY Power: Green LED lights up when Standby Power is supplied.
Live-LED:
IDE LED:
Red LED is on at startup while the board executes the BIOS power on self test (POST). After that it is freely usable by application programs. Chapter 4.4 shows a small sample program how to control it.
Orange LED flashes when IDE activity is recognized.
Watchdog: Red LED lights up when Watchdog was triggered. Can only be reset by a power off.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 9 of 47
2.4 Hardware Setup
Caution Be sure to observe the EMC security measures. Make sure you are always at the same potential as the module.
Caution Never connect or disconnect peripherals like HDD's while the board's power supply is connected and switched on!
Use the cable set provided by LiPPERT to connect the Cool RoadRunner-LX800 to a VGA monitor. Connect either PS/2 or USB keyboard and mouse, respectively. Use the 40-wire flat ribbon cable to connect the hard disk.
Make sure that the pins match their counterparts correctly and are not twisted. If you plan to use additional other peripherals, now is the time to connect them, too.
Connect a 5 volt, 3 amps power supply with large output capacitors (>5000µF) or a 5 amps power supply to the power connector and switch the power on. The power supply’s rise time should be between 10 ms and 100 ms.
Note The 3 amps value is the minimum you should have for the standard peripherals mentioned. If you want to use more and/or others, please plan your power budget first! The system will not work if there is not enough supply current for all your devices.
The display shows the BIOS messages. If you want to change the standard BIOS settings, press the <F1> key to
enter the BIOS menu. See chapter 4.1 for BIOS setup details.
”Trouble Shooting BIOS Settings”, about how to do it.
The Cool RoadRunner-LX800 boots from CD drives, USB floppy, USB stick, or hard disk. Provided that any of these is connected and contains a valid operating system image, the display then shows the boot screen of your operating system.
The Cool RoadRunner-LX800 does not need any cooling measures, neither at standard environment temperatures from –20 °C … +60 °C nor in the extended range of -40 °C … +85 °C.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 10 of 47
3 Module Description
3.1 Processor
The AMD Geode LX [email protected] processor delivers the best performance per watt in the industry today, providing
X86 power and versatility to embedded products. Its architecture and high level of integration guarantees longer battery life and allows very small designs, while delivering full X86 functionality.
The AMD Geode LX 800 processor consumes a maximum power of 3.9W and 1.8W typical at 500 MHz, enabling systems that only need to be passively cooled.
The x86 compatibility allow designers to focus on developing end products that efficiently meet consumer needs without being concerned with software porting or compatibility issues.
Coupled with the AMD Geode™ CS5536 companion device, the combined chipset, which operates at 1.9W typical at 433MHz and at 2.4W typical at 500MHz, offers a complete set of features that deliver full desktop functionality to embedded and portable devices.
Processor functional blocks are
·
CPU Core
· GeodeLink™ Control Processor
·
GeodeLink Interface Units
· GeodeLink Memory Controller
·
Graphics Processor
· Display Controller
·
Video Processor
· Video Input Port
·
GeodeLink PCI Bridge
·
Security Block
For further information, please refer to the data book of the AMD Geode TM
LX 800
3.2 Companion
AMD Geode™ CS5536 companion device
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 11 of 47
The AMD Geode™ CS5536 companion device is designed to work with an integrated processor North Bridge component such as the AMD Geode™ GX/LX processor. Together, the Geode GX/LX processor and Geode
CS5536 companion device provide a system-level solution well suited for the high-performance and low-power needs of a host of embedded devices including digital set-top boxes, mobile computing devices, thin client applications, and single board computers.
The internal architecture uses a single, high-performance modular structure based on GeodeLink™ architecture.
This architecture yields high internal speed (over 4 GB/s) data movement and extremely versatile internal power management. The GeodeLink architecture is transparent to application software. Communication with the Geode
GX/LX processor is over a 33/66 MHz PCI bus.
The Geode CS5536 companion device incorporates many I/O functions, including some found in typical Super-I/O chips, simplifying many system designs. Since the graphics subsystem is entirely contained in the Geode GX/LX processor, system interconnect is simplified. The device contains state-of-the-art power management that enables systems, especially battery powered systems, to significantly reduce power consumption.
Audio is supported by an internal controller, designed to connect to multiple AC97 compatible codecs. An IR
(infrared) port supports all popular IR communication protocols. The IR port is shared with one of two industrystandard serial ports that can reach speeds of 115.2 kbps. An LPC (low pin count) port is provided to facilitate connections to a Super-I/O should additional expansion, such as a floppy drive, be necessary, and/or to an LPC
ROM for the system BIOS
The hard disk controller is compatible to the ATA-5 specification. The bus mastering IDE controller includes support for two ATA-compliant devices on one channel. The CS5536 companion device provides four Universal
Serial Bus (USB) 2.0 compliant ports, supporting low speed, full speed, and high speed connections. All four ports are individually automatically associated with either the Open Host Controller Interface (OHCI) or the Enhanced
Host Controller Interface (EHCI) depending on the attached device type. A real-time clock (RTC) keeps track of time and provides calendar functions.
A suite of 82xx devices provides the legacy PC functionality required by most designs, including two PIC's
(programmable interrupt controllers), one PIT (programmable interval timer) with three channels, and DMA (direct memory access) functions. The CS5536 companion device contains eight MFGPT's (multi-function general purpose timers) that can be used for a variety of functions. A number of GPIOs (general purpose input/outputs) are provided, and are assigned to system functions on power-up.
State-of-the-art power management features are attained with the division of the device into two internal power domains. The GPIOs and multi-function timers are distributed into each domain allowing them to act as wakeup sources for the device. The device provides full ACPI (Advanced Configuration Power Interface) compliance and supports industry-standard Wakeup and Sleep modes.
3.3 Watchdog
An internal circuit of the ITE8712 Super I/O implements a watchdog. It is accessible through general-purpose ports of the Super I/O controller.
Please refer to chapter 4.4 for programming watchdog functions.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 12 of 47
3.4 Graphics-Controller
The graphics controller is integrated in the Geode LX and does high performance 2D-graphics handling. CRT monitors can be used as well as TFT- or LVDS displays. Therefore, different connectors are on the board. It is possible to switch between CRT and TFT via BIOS or driver settings. It is also possible to use a CRT and a
TFT/LVDS display simultaneously (driver setting), but only with the same graphics content on both displays.
The Cool RoadRunner-LX800 supports 3,3V and 5V TFT displays up to 18bit, and LVDS displays with 18/24bit interfaces with unconventional signal configuration. The display type and resolution can be selected in BIOS setup: Motherboard Device Configuration à Video and Flat Panel Configuration.
SVGA Configuration
Resolution
640 x 480
800 x 600
1024 x 768
1152x864
Color Depth (bpp)
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16 or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
1280 x 1024
8, 16, or 24/32
8, 16, or 24/32
TME-104P-CRR_LX800-R2V7.doc Rev 2.7
75
85
90
100
60
70
72
90
100
60
70
72
75
85
90
100
60
70
Refresh Rate
(Hz)
60
70
72
70
72
75
85
75
85
90
100
60
Dot Clock (MHz)
60.065
68.179
65.000
75.000
78.750
78.750
94.500
100.187
113.310
81.600
97.520
101.420
108.000
119.650
129.600
144.000
108.000
129.600
25.175
28.560
31.500
31.500
36.000
37.889
43.163
40.000
45.720
49.500
49.500
56.250
100
100
400
400
100
100
200
400
400
75
100
100
200
200
400
400
200
200
Min. GLIU Frequency
(MHz)
75
75
75
75
75
75
75
75
75
400
400
75
Page 13 of 47
Resolution
1600 x 1200
1920x1440
VGA Connector
Connector type:
Matching connector:
Pin
1
3
5
7
9
Color Depth (bpp)
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
Refresh Rate
(Hz)
72
75
85
90
100
60
70
72
75
85
90
100
60
70
72
75
85
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
Signal
Red
Green
Blue
HSYNC
VSYNC
Pin
2
4
6
8
10
Dot Clock (MHz)
133.500
135.000
157.500
172.800
192.000
162.000
189.000
198.000
202.500
229.500
251.182
280.640
234.000
278.400
288.000
297.000
341.349
Signal
GND
GND
GND
GND n.c.
Min. GLIU Frequency
(MHz)
200
200
200
400
400
200
200
233
233
266
400
400
266
400
400
400
400
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 14 of 47
Flat Panel and LVDS Configuration
Flat panel and LVDS have the same display options as shown in the table:
Setting
Flat Panel Type
Resolution
Possible Values
Auto, TFT, LVDS
320x240, 640x480, 800x600, 1024x768, 1152x864,
1280x1024, 1600x1200
Data Bus Type
Refresh Rate
HSYNC Polarity
VSYNC Polarity
9-24 Bits, 1ppc
60 Hz
High, Low
High, Low
LP Active Period Active Only à only active during SYNC
Free Running
à
always active
SHFCLK Active Period Active Only
à
only active during SYNC
Free Running à always active
To ease usage of these displays it’s possible to select the display and backlight supply voltages with the on-board voltage selector jumpers. (Jumper X8, see below)
Flat Panel Connector
Connector type:
Matching connector:
19
21
23
25
11
13
15
17
27
29
Pin
1
3
5
7
9
IDC30 pin header 2.0 mm
IDC30 pin female connector 2.0 mm
Signal
GND
HSYNC
GND
R1
R3
R5
G0
G2
G4
GND
B1
B3
B5
EN
VLCD-SW
20
22
24
26
12
14
16
18
28
30
Pin
2
4
6
8
10
Signal
FPCLK
VSYNC
R0
R2
R4
GND
G1
G3
G5
B0
B2
B4
GND
VLCD-SW
GND
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Flat Panel Backlight Connector
Connector type:
Matching connector:
Hirose DF13 8 pin
Hirose DF13-8S-1.25C, part number 536-0007-0 00
Pin
1
3
5
7
Signal
+12 Volts
+5 Volts
EN
GND
Pin
2
4
6
8
Signal
+12 Volts
+5 Volts
NC
GND
LVDS Connector
Connector type:
Matching connector:
9
11
13
15
17
19
Pin
1
3
5
7
LVDS Color Mapping
Hirose DF14 20-pin header, single row
Hirose DF14-20S-1.25C, part number 538-0059-7 00
Signal
SW-VDD
GND
TX3-
GND
TXCLK+
TX2-
GND
TX1+
TX0-
DDC Clk
Pin
2
4
6
8
10
12
14
16
18
20
Signal
SW-VDD
GND
TX3+
TXCLK-
GND
TX2+
TX1-
GND
TX0+
DDC Data
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 16 of 47
Display Voltage Selector
Jumper X8
Connector type:
Matching parts:
IDC6 pin header 2.0 mm
2.0 mm jumper
Use a 2 mm jumper between 1-3 or 3-5 to select the backlight voltage.
Use a 2 mm jumper between 2-4 or 4-6 to select the display voltage.
Pin
1
3
5
Signal
+12 volts
Backlight voltage
+ 5 volts
Pin
2
4
6
Signal
+5 volts
Display voltage
+3.3 volts
1
3
5
2
4 (Default: Display +3.3V
Backlight +12V)
6
3.5 Compact Flash Connector
On the bottom side of the board a compact flash connector is located that allows the use of compact flash cards instead of a hard disk. This socket is connected to the chipset's EIDE port. As default it is defined as Master.
Compact flash cards are available as solid-state disks starting at 16 Mbytes up to several Gbytes and also as IBM
Micro Drives.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 17 of 47
3.6 Ethernet Controller
Intel 82551IT Fast Ethernet Controller
The 82551IT is an evolutionary addition to Intel’s family of 8255x controllers. It provides excellent performance by offloading TCP, UDP and IP checksums and supports TCP segmentation off-load for operations such as Large
Send. The 82551IT provides an extended operating temperature in addition to all of the same capabilities and features as the 82551ER to address applications requiring a wider operating temperature range.
Its optimized 32-bit interface and efficient scatter-gather bus mastering capabilities enable the 82551IT to perform high speed data transfers over the PCI bus. This capability accelerates the processing of high level commands and operations, which lowers CPU utilization. Its architecture enables data to flow efficiently from the bus interface unit to the 3 KB Transmit and Receive FIFO's, providing the perfect balance between the wire and system bus. In addition, multiple priority queues are provided to prevent data underruns and overruns.
The 82551IT includes both a MAC and PHY. In also has a simple interface to the analog front end, which allows cost effective designs requiring minimal board real estate. The 82551IT is pin compatible with the 82559 family of controllers and is offered with software that provides backwards compatibility with previous 8255xER controllers.
Ethernet Interface
Connector type:
Matching connector:
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
Pin
1
3
5
7
9
Signal
TX+
RX+
PE
PE nc
Pin
2
4
6
8
10
Signal
TX-
PE
RX-
PE nc
3.7 On Board Power Supply
The on board power supply generates all necessary voltages from the single supply voltage of 5 volts. The generated 3.3 volts are available on the connectors "Flat Panel" and "LVDS".
Note This 3.3 V must not be used to supply external electronic devices with power consumption above 3W like other PC/104 boards or displays.
Power Connector
Connector type:
Matching connector:
3.5" FDD Power connector
AMP / Tyco EI series, 171822-4
Pin
1
3
Signal
+5 Volts
GND
Pin
2
4
Signal
GND
+ 12 Volts
3.8 EIDE Port
TME-104P-CRR_LX800-R2V7.doc
An EIDE (Enhanced Integrated Drive Electronics) port is provided by the chipset to connect one drive. The connected device must be set as slave.
Rev 2.7 Page 18 of 47
To enhance the performance, this port has a 100 MB/s IDE controller in UDMA mode per the ATA-5 specification
The EIDE port is available on a standard 44-pin header (2 mm) for 2.5" hard disks. An adapter cable is available to connect standard EIDE devices with a 40 pin IDC header.
EIDE Connector
Connector type:
Matching connector:
IDC44 pin header 2.0 mm
IDC44 pin female connector 2.0 mm
39
41
43
31
33
35
37
23
25
27
29
15
17
19
21
Pin
1
3
5
7
9
11
13
20
22
24
26
12
14
16
18
Pin
2
4
6
8
10
36
38
40
42
44
28
30
32
34
Data2
Data1
Data0
GND
DRQ0
Write
Read
Ready
Signal
/Reset
Data7
Data6
Data5
Data4
Data3
DACK0
IRQ
Address1
Address0
CS1
NC
+5 Volts
GND
Data13
Data14
Data15
NC
GND
GND
GND
CSEL
Signal
GND
Data8
Data9
Data10
Data11
Data12
GND
IOCS16-
PD66
Address2
CS3
GND
+5 Volts
GND
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 19 of 47
3.9 PS/2 Keyboard Interface
The keyboard interface is located on the IDC10 Header "KEYBOARD". An adapter cable is available to use a standard PS/2 keyboard with this connector.
Keyboard Connector
Connector type:
Matching connector:
Pin
1
3
5
7
9
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
Signal
Speaker
Reset#
KB Data
GND
Ext. Battery
Pin
2
4
6
8
10
Signal
GND
N.C.
KB Clock
VCCKB
Reset# (PWRBTN#)
3.10 PS/2 Mouse Interface
The PS/2 mouse signals MCLK and MDAT are located on the IDC16 header "AUDIO". An adapter cable is available to use a standard PS/2 mouse with this connector.
Mouse Connector
Connector type:
Matching connector:
IDC16 pin header 2.54 mm
IDC16 pin female connector 2.54 mm
Pin
1
3
5
7
9
11
13
15
Signal
IRRX
MS Data
USBDT0+
USBDT1+
USBVCC
Line In L
Line Out L
Microphone
Pin
2
4
6
8
10
12
14
16
Signal
IRTX
MS Clock
USBDT0-
USBDT1-
USBGND
Line In R
Line Out R
GND Audio
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 20 of 47
3.11 USB 2.0 Ports
4 standard USB 2.0 host ports are provided at the with Cool RoadRunner-LX800. Two are located on the IDC16 header "AUDIO". An adapter cable is available to use a standard USB devices with this connector. The other two are located at the supervisory connector. There is no standard adapter available.
It is possible to use an USB keyboard under MSDOS without special driver software.
Note: Not all USB keyboard models are supported.
USB 2.0 Connector
Connector type:
Matching connector:
IDC16 pin header 2.54 mm
IDC16 pin female connector 2.54 mm
Pin
1
3
5
7
9
11
13
15
Signal
IRRX
MS Data
USBDT0+
USBDT1+
USBVCC
Line In L
Line Out L
Microphone
Pin
2
4
6
8
10
12
14
16
Signal
IRTX
MS Clock
USBDT0-
USBDT1-
USBGND
Line In R
Line Out R
GND Audio
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 21 of 47
3.12 Serial Ports
The serial ports are located on two IDC headers "COM1" and "COM2". Adapter cables with standard DB9 male connectors are available. The ports either work in RS232 or RS485 mode, selectable in the BIOS. When entering
Motherboard Device Configuration à LPC CARD I/O Device Configuration, COM Port 1 Mode and COM Port 2
Mode can be selected. Termination resistors for RS485 Mode can be set with Jumpers on pin headers X12 and
X24 as described below.
To enable the transmitters of COM1 and COM2 in RS485 mode set the RTS# signal to ‘1’. Depending on your operating system driver’s logic, this may mean setting a (non-inverted) RTS bit to ‘0’ in your application software.
The serial ports are programmable in BIOS setup. When entering Motherboard Device Configuration à LPC CARD
I/O Device Configuration, configuration of the serial ports is accessible.
The following settings are possible for COM1 and COM2:
· Disabled
·
3F8 / IRQ4 (base address / interrupt channel)
· 2F8 / IRQ3 (base address / interrupt channel)
·
3E8 / IRQ4 (base address / interrupt channel)
· 2E8 / IRQ3 (base address / interrupt channel)
The modes can be switched between RS232 and RS485.
COM1/2 Connector
Connector type:
Matching connector:
5
7
9
Pin
1
3
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
RS232
DCD
RXD
TXD
DTR
GND
RS485
Not used
RXD-
TXD-
Not used
GND
Pin
2
4
6
8
10
RS232
DSR
RTS
CTS
Not used
+5 Volts
RS485
RXD+
TXD+
Not used
Not used
+5 Volts
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 22 of 47
RS485-Termination Jumpers
Connector type:
Matching part:
IDC4 pin header 2.0 mm
2.0 mm jumper
There are two jumpers, X12 for COM1, and X24 for COM2, respectively.
Pin
1
3
Signal
TX+
RX+
Pin
2
4
Signal
TX-
RX-
1
3
When the jumper is set, the differential pairs
(e.g. RX+ and RX-) are terminated with 120
W between them.
2
4
Additionally, positive/negative receive lines are pulled up/down with 10k W to 5V/GND in order to protect the transceivers of the Cool RoadRunner-
LX800 from overvoltage.
It is recommended to protect the ports of the external device in the same way!
Caution : Termination Resistors must not be used in RS232 Mode.
Otherwise, the serial ports will not work.
3.13 IrDA Interface
The IrDA interface signals IRRX and IRTX are located on the USB/JJJJ/LKJL connector.
To use the IrDA interface an external transmitter must be connected to the IrDA signals.
Connector type:
Matching connector:
IDC16 pin header 2.54 mm
IDC16 pin female connector 2.54 mm
7
9
11
13
15
Pin
1
3
5
Signal
IRRX
MS Data
USBDT0+
USBDT1+
USBVCC
Line In L
Line Out L
Microphone
Pin
2
4
6
8
10
12
14
16
Signal
IRTX
MS Clock
USBDT0-
USBDT1-
USBGND
Line In R
Line Out R
GND Audio
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 23 of 47
3.14 Parallel Port LPT1
The parallel port is located on an IDC26 header. An adapter cable with a standard DB25 female connector is available.
The parallel port is programmable in BIOS. Entering Motherboard Device Configuration à LPC CARD I/O Device
Configuration, configuration of LPT1 is accessible.
LPT1 Parameter
Base Address
Mode
IRQ
DMA
Possible Settings
Disabled, 0x378
0x3BC and 0x278 are not recommended, because of a possible conflict with the PCI to ISA Bridge
Compatible, PS/2 Bi-directional, EPP 1.7, EPP 1.9
Disabled, IRQ 5, IRQ 7, IRQ 9, IRQ 10, IRQ 11
None, Channel 1, Channel 3
LPT1 Connector X15
Connector type:
Matching connector:
7
9
11
13
15
Pin
1
3
5
17
19
21
23
25
IDC26 pin header 2.54 mm
IDC26 pin female connector 2.54 mm
Signal
Strobe#
Data0
Data1
Data2
Data3
Data4
Data5
Data6
Data7
ACK#
Busy
Paper End
Select
8
10
12
14
16
Pin
2
4
6
18
20
22
24
26
Signal
Auto LF#
Error#
Init#
Select In
GND
GND
GND
GND
GND
GND
GND
GND
+5V_SBY
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 24 of 47
3.15 Speaker
The speaker signal is located on the IDC10 Header "KEYBOARD". A standard PC Speaker can be connected between the signal SPEAKER and VCCKB.
Connector type:
Matching connector:
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
5
7
9
Pin
1
3
Signal
Speaker
Reset#
KB Data
GND
Ext. Battery
Pin
2
4
6
8
10
Signal
GND
N.C.
KB Clock
VCCKB (+5V)
Reset# (PWRBTN#)
3.16 Audio Interface
The audio signals are located on the IDC16 header "AUDIO". The signals are LINE-IN (left/right), LINE-OUT
(left/right) and MICROPHONE-IN of the AC-97audio codec.
There is an adapter cable available with standard audio connectors.
Connector type:
Matching connector:
IDC16 pin header 2.54 mm
IDC16 pin female connector 2.54 mm
Pin
1
3
5
7
9
11
13
15
Signal
IRRX
MS Data
USBDT0+
USBDT1+
USBVCC
Line In L
Line Out L
Microphone
Pin
2
4
6
8
10
12
14
16
Signal
IRTX
MS Clock
USBDT0-
USBDT1-
USBGND
Line In R
Line Out R
GND Audio
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 25 of 47
3.17 External Power-Button
The Power-Button signal is located on the IDC10 Header "KEYBOARD". To power up/down the board the signal
Power-Button must be pulled to GND. It is not available in standard configuration.
Connector type:
Matching connector:
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
Pin
1
3
5
7
9
Signal
Speaker
Reset#
KB Data
GND
Ext. Battery
Pin
2
4
6
8
10
Signal
GND
N.C.
KB Clock
VCCKB
Reset# (PWRBTN#)
3.18 Reset-In Signal
The RESET-IN signal is located on the IDC10 Header "KEYBOARD". To reset the board, the signal RESET-IN must be pulled to GND.
Connector type:
Matching connector:
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
Pin
1
3
5
7
9
Signal
Speaker
Reset#
KB Data
GND
Ext. Battery
Pin
2
4
6
8
10
Signal
GND
N.C.
KB Clock
VCCKB
Reset# (PWRBTN#)
3.19 External Battery
The external battery is used to power the real-time clock and the CMOS RAM. Use a suitable 3.6 V battery.
Connector type:
Matching connector:
IDC10 pin header 2.54 mm
IDC10 pin female connector 2.54 mm
Pin
1
7
9
3
5
Signal
Speaker
Reset#
KB Data
GND
Ext. Battery
Pin
2
4
6
8
10
Signal
GND
N.C.
KB Clock
VCCKB
Reset# (PWRBTN#)
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 26 of 47
3.20 Supervisory Connector
5
7
1
3
9
11
13
23
25
27
29
15
17
19
21
(
The Cool RoadRunner-LX800 provides a 30-pin Supervisory Connector on its bottom side. The table below shows the assignment of the different signals.
The secondary functions are available only with customized versions. Please ask for a quotation
)
Connector type:
Matching connector:
Hirose DF14 30 pin header 1.25 mm, single row
Hirose DF14-30S-1.25C, Part number 538-0012-3 00
Pinout for Boards with serial numbers up to 4307.
xxxxxx
Pin Signal Pin
Primary
+5 Volts
GPIO40
1
GPIO42
1
GPIO44
1
N.C.
PWM2
4
PWM4
4
AGND
N.C.
N.C.
N.C.
VCCUSB2
USB2+
USB3-
USBVCC3
Secondary
SMB CLK
IDE LED²
LIVE LED²
LINK LED²
6
8
2
4
10
12
14
24
26
28
30
16
18
20
22
Primary
+3.3 Volts
GPIO41
1
GPIO43
1
N.C.
GPIO47
1
PWM3
4
PWM5
4
N.C.
N.C.
N.C.
WD ACTIVE
USB2-
USBGND
USB3+
GND
Signal
Secondary
SMB DATA
SBY LED²
ACT_LED²
ETH SPD LED²
PME#³
Notes:
(1) See chapter 4.3 about GPIO programming
(2) Connect cathode of LED to this pin. An external resistor is required
(3) Power Management Signal
(4)
See chapter 4.7 about PWM programming
(5) See chapter 4.5 about ADC programming
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 27 of 47
7
9
11
1
3
5
13
21
23
25
27
29
15
17
19
Pinout for Boards with serial numbers starting from 4807.
xxxxxx
Pin
Primary
+5 Volts
GPIO40
1
GPIO42
1
GPIO44
1
N.C.
PWM2
4
PWM4
4
SMB CLK
IDE LED²
ACT_LED²
ETH SPD LED²
VCCUSB2
USB2+
USB3-
USBVCC3
Signal
Secondary
Pin
14
22
24
26
28
USB HOST PSRNT 30
16
18
20
8
10
12
2
4
6
Notes:
(1) See chapter 4.3 about GPIO programming
(2) Connect cathode of LED to this pin. An external resistor is required
(3) Power Management Signal
(4) See chapter 4.7 about PWM programming
(5) See chapter 4.5 about ADC programming
Primary
+3.3 Volts
GPIO41
1
GPIO43
1
N.C.
GPIO47
1
PWM3
4
PWM5
4
SMB DATA
LIVE LED²
LINK LED²
WD ACTIVE
USB2-
USBGND
USB3+
GND
Signal
Secondary
SBY LED²
PME#³
3.21 PC/104-Plus Bus Interface
The PC/104-Plus bus is a modification of the standard PCI bus. It allows all of the PC/104 features to be used, together with the high speed PCI bus.
The main features are:
·
PC/104-Plus Bus slot, fully compatible with PCI version 2.2 specifications.
· Integrated PCI arbitration interface (32 bit wide, 3.3V).
·
Translation of PCI cycles to ISA bus.
· Translation of ISA master initiated cycle to PCI.
·
Support for burst read/write from PCI master.
· 33 MHz PCI clock.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 28 of 47
27
28
29
30
23
24
25
26
19
20
21
22
15
16
17
18
11
12
13
14
7
8
9
10
5
6
3
4
Pin
1
2
REQ0#
GND
GNT1#
+5 Volts
CLK2
GND
+12 Volts
-12 Volts
AD18
AD21 n.c.
IDSEL0
AD24
GND
AD29
+5 Volts
A
GND
VI/O
AD05
C/BE0#
GND
AD11
AD14 n.c.
SERR#
GND
STOP# n.c.
FRAME#
GND
GND
REQ2#
VI/O
CLK0
+5 Volts
INTD#
INTA#
REQ3 n.c.
AD20
AD23
GND
C/BE3#
AD26
+5 Volts
AD30
B
Reserved
AD02
GND
AD07
AD09
VI/O
AD13
C/BE1#
GND
PERR# n.c.
TRDY#
GND
AD16
REQ1#
+5 Volts
GNT2#
GND
CLK3
+5 Volts
INTB#
GNT3
AD17
GND
AD22
IDSEL
VI/O
AD25
AD28
GND
C
+5 Volts
AD01
AD04
GND
AD08
AD10
GND
AD15 n.c. n.c.
LOCK#
GND
IRDY# n.c.
VI/O
GNT0#
GND
CLK1
GND
RST#
INTC#
GND
GND
AD19 n.c.
IDSEL2
IDSEL3
GND
AD27
AD31
D
AD00
+5 Volts
AD03
AD06
GND n.c.
AD12 n.c.
PAR n.c.
GND
DEVSEL# n.c.
C/BE2#
Note: All VI/O pins are connected to +3.3V.
The voltages +5V and +12V are not generated by the onboard powersupply but routed from the Power Supply Connector. This board does not support -12 Volts. The maximum current is limited to 1.0 amp for each voltage.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 29 of 47
3.22 PC/104 Bus Interface
The PC/104 bus is a modification of the industry standard (ISA) PC bus specified in IEEE P996. The PC/104 bus has different mechanics than P966 to allow the stacking of modules. The main features are:
· Supports programmable extra wait state for ISA cycles
·
Supports I/O recovery time for back-to-back I/O cycles
The following table shows the pin assignment of the PC/104 connector.
Note:
-5 V and –12 V on the PC/104 connector are not supported on this board.
PC/104 Bus Connector
0
1
2
3
Pin
4
5
6
7
8
IRQ11
IRQ12
IRQ15
IRQ14
DACK0#
9 DRQ0
10 DACK5#
11 DRQ5
12 DACK6#
13 DRQ6
14 DACK7#
15 DRQ7
16 +5V
17 MASTER#
18 GND
19 GND
D C
GND GND
MEMCS16# SBHE#
IOCS16#
IRQ10
LA23
LA22
SD10
SD11
SD12
SD13
SD14
SD15
GND
LA21
LA20
LA19
LA18
LA17
MEMR
MEMW
SD8
SD9
Pin
1
2
3
4
A
IOCHCK#
D7
D6
D5
5
6
7
8
D4
D3
D2
D1
9 D0
10 IOCHRDY
11 AEN
12 A19
13 A18
14 A17
15 A16
16 A15
17 A14
18 A13
19 A12
20 A11
21 A10
22 A9
23 A8
24 A7
25 A6
26 A5
27 A4
28 A3
29 A2
30 A1
31 A0
32 GND
B
GND
RSTDRV
+5V see note
IRQ9
-5V
DRQ2
-12V see note
ENDXFER
+12V
KEY
SMEMW#
SMEMR#
IOW#
IOR#
DACK3#
DRQ3
DACK1#
DRQ1
REFRESH#
SYSCLK
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
DACK2#
TC
BALE
+5V
OSC
GND
GND
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 30 of 47
4 Using the Module
4.1 BIOS
The Cool RoadRunner-LX800 is delivered with an Insyde Technology XpressROM BIOS. The default setting guarantees a "ready to run" system, even without a BIOS setup backup battery.
The BIOS is located in flash memory and can be easily updated on board with software under DOS.
All setup changes of the BIOS are stored in the CMOS RAM of the real time clock. A copy of the CMOS RAM, excluding date and time, is stored in the flash memory. This means that even if the backup battery runs out of power, the BIOS settings are not lost. Only date and time will be reset to their default value. Without an external battery, the on board GoldCap is able to buffer the date and time information for about 2 days.
Configuring the XpressROM BIOS
Pressing <F1> on power up starts the BIOS setup utility.
Field Selection
To move between fields in Setup, use the keys listed below:
Key Function
à
, ß, â, á
+, -
Enter
Move between fields
Selects next/previous values in fields
Go to the submenu for the field
Esc To previous field then to exit menu
In order to save your settings, select everything, select
Exit Without Save
.
Save values and Exit and confirm with Y. Should you want to discard
When troubleshooting a system, it is highly recommend to first restore the BIOS's factory settings before any debugging is done. This is achieved with
Load Defaults
in the main setup menu. If you cannot reach the BIOS setup, because of bad system configuration, reset the board five times for loading default values.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 31 of 47
The System Clock / PLL
Base clock is 33MHz.
menu allows configuring the multipliers for CPU clock and Geode Link (DDR RAM) clock.
Note: CPU Multipliers above 15 (500Mhz) may seriously damage the CPU!
The
Drive Configuration
menu allows configuring the settings for the IDE controller.
Hard Drive Setting
80-Conductor Cable Sense
Drive Modes
Choice
GPIO05, NONE, Force 40, Force 80
Auto, PIO0, PIO1, PIO2, PIO3, PIO4,
MDMA0, MDMA1, MDMA2, UDMA0,
UDMA1, UDMA2, UDMA3, UDMA4
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 32 of 47
Settings for serial and parallel ports can be made in Serial and Parallel Port Configuration.
Note: Do not forget the termination jumpers when switching
to RS485 mode.
The
Power Management menu gives control over supported power down modes.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 33 of 47
Miscellaneous Configuration controls various other features.
Enter Graphics Configuration for changing the display settings.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 34 of 47
ISA I/O and Memory Configuration allows setting the board’s ISA memory and I/O map.
By default the following I/O and Memory Ranges are mapped to ISA and NOT accessible for other devices any more:
I/O: Range-0: 100h-17Fh
Range-1: 180h-1BFh
Range-2: 1C0h-1DFh
Range-3: 200h-27Fh
Range-4: 300h-33Fh
Range-5: 340h-35Fh
Memory: Range-0: C8000h-CFFFFh
Range-1: D0000h-DFFFFh
If a PCI device (e.g. on an external adapter) needs some of this ranges, the space has to be freed, because the system is NOT Plug and Play! Otherwise if an external ISA card needs additional I/O or Memory space, the above ranges need to be reconfigured.
Note: You need to know exactly the resources that are needed by external cards in order to setup the BIOS correctly! Otherwise it may happen that some cards do not work properly!
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 35 of 47
PCI Configuration allows settings for IRQ steering and various PCI devices.
Note: If you have an external ISA card that needs e.g. IRQ 5, PCI Interrupt steering must be configured in a way that none of the PCI INTs is steered to IRQ 5. In this example it would be possible to steer PCI INTC# to IRQ
10.
The
Boot Order menu specifies the order in which the BIOS tries the various mass memory devices for a bootable operating system.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 36 of 47
Some safety features can be found under Thermal and Watchdog Configuration .
Trouble Shooting BIOS Settings
It may happen that the BIOS is configured in a way that the Cool RoadRunner-LX800 does not start at all. To repair this, the default values of the BIOS can be automatically loaded at boot time. To load these, the power must be switched on and off again within 2 seconds. This sequence must be repeated 5 times, then the default values get loaded by the BIOS.
Power
On
Off
lllllrhhfllrhhfllrhhfllrhhfllrhh
≤ 2s
Pressing the Reset-Button five times while the system is booting achieves the same result.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 37 of 47
4.2 Drivers
Software drivers for sound, Ethernet, AES and graphics adapter are available for the Cool RoadRunner-LX800.
These drivers can be downloaded from LiPPERT's website http://www.lippertembedded.com.
Follow the installation instructions that come with the drivers.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 38 of 47
4.3 Programming GPIO Signals
The Cool RoadRunner-LX800 general purpose I/O signals (GPIO) are part of the ITE8712 SuperIO. They are located in Logical Device 7 of the SuperIO and can be programmed using in/out statements on Index/Data registers 2Eh/2Fh. GPIOs 1x belong to GPIO set #1, GPIOs 2x to set #2 and so on, up to set #5. The following lines show an example how to program GPIO Bank 4.
The code is meant to be compiled using gcc under Linux.
#include <sys/io.h>
#include <stdio.h>
#define CONF_ADDR 0x2E
#define CONF_DATA 0x2F
#define GPIO_ADDR 0x1223
//**************************************************************
// InitGPIO: initialize GPIO Bank #4
// Parameter: mode: bit=1 -> set to GPIO
// dir: bit=1/0 -> set to output/input
// (char = 8 bit)
// Returns: -
//************************************************************* void InitGPIO(char mode,char dir)
{
// To set the SuperIO into configuration mode, the sequence
// 0x87, 0x01, 0x55, 0x55 must be written to the configuration address.
outb(0x87, CONF_ADDR);
outb(0x01, CONF_ADDR);
outb(0x55, CONF_ADDR);
outb(0x55, CONF_ADDR);
// Enable Logical Device 7 for programming by writing 07h to
// register 07h of the SuperIO:
outb(7, CONF_ADDR); //Set to logic device
outb(7, CONF_DATA); //Number of logic device
// Set GPIO-Set 4 Multifunction Pin Selection Register 28 to GPIO function
// and enable the "simple I/O" function
// Input: mode – each set bit represents a GPIO function
outb(0x28, CONF_ADDR); // set bank #4 to GPIO
outb(0xFF, CONF_DATA); // BIT: 1=GPIO , 0=other function
outb(0xC3, CONF_ADDR); // set to simple I/O
outb(mode, CONF_DATA); // BIT: 1=simple I/O , 0=not simple I/O
// Define the GPIO's data direction
// Input: dir – each set bit represents an output
outb(0xCB, CONF_ADDR); // set direction: output/input
outb(dir, CONF_DATA); // BIT: 1=output, 0=input
outb(0xBB, CONF_ADDR); // enable pull-ups if acting as output
outb(dir, CONF_DATA); // BIT: 1=pull up, 0=no pull up
// Set the logical I/O address 0x1223 for reading and writing values
outb(0x62, CONF_ADDR); //IO base MSB
outb((GPIO_ADDR & 0xFF00) >> 8, CONF_DATA); // -> 0x03
outb(0x63, CONF_ADDR); //IO base LSB
outb((GPIO_ADDR & 0x00FF), CONF_DATA); // -> 0x93
// Reset configuration mode to "wait for Key"
outb(0x02, CONF_ADDR);
outb(0x02, CONF_DATA);
} int main()
{
char value1=0x55,value2; //8 bit values
iopl(3); //get all I/O rights
InitGPIO(0xff,0xff); //Initialize GPIO:
//set all to GPIO and all to output
outb(value1, GPIO_ADDR); //write out value1
printf("Write=%x", value1);
value2 = inb(GPIO_ADDR); //read in value2
printf(", Read=%x\n", value2);
return 0;
}
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 39 of 47
For a more detailed description about programming the ITE8712 super I/O, please refer to chapter 8 of the datasheet.
4.4 Programming the Live-LED
The Live-LED (red) can be controlled with bit 5 of I/O port 1220h (SIO GP15). The BIOS signals with it that the
POST is in progress. After that the LED may be freely used by any application program.
The following Linux program changes the state of the Live-LED.
#include <stdio.h>
#include <sys/io.h>
#define PORT 0x1220
#define MASK 0x20 int main()
{
unsigned char data;
if (iopl(3)) { //get port access permissions (must be root)
perror("iopl"); return 1;
}
data = inb(PORT);
if (data & MASK) {
//read GPIOs
//isolate LED bit (inverse logic!)
printf("Live LED was off, switching it on.\n");
outb(data & ~MASK, PORT);
} else {
printf("Live LED was on, switching it off.\n");
outb(data | MASK, PORT);
}
iopl(0);
return 0;
}
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 40 of 47
4.5 Watchdog Programming
Since the Watchdog is disabled in delivery status, it must be set up for proper use.
The Watchdog is an internal feature of the ITE8712 Super I/O. If the Watchdog is activated and the timer is not set back within a programmed amount of time, the board does a system reset. In order to read back the watchdog event read bit 4 of I/O port 1220h (SIO GP14). This bit is set on watchdog timeout and can only be reset by a power off.
The following C program is an example how to test the Watchdog function. Programming the Watchdog is quite similar to programming the GPIOs.
This routine is meant to be compiled using gcc under Linux.
#include <stdio.h>
#include <sys/io.h>
#include <unistd.h>
#define CONF_ADDR 0x2E
#define CONF_DATA 0x2F int main()
{
unsigned char i;
iopl(3);
outb(0x87, CONF_ADDR); // sets SIO in configuration mode (fixed sequence:
outb(0x01, CONF_ADDR); // 0x87,0x01,0x55,0x55)
outb(0x55, CONF_ADDR);
outb(0x55, CONF_ADDR);
outb(0x07, CONF_ADDR); // LDN=0x07
outb(0x07, CONF_DATA);
outb(0x72, CONF_ADDR); // set time out value to seconds
outb(inb(CONF_DATA)|0x80, CONF_DATA);
outb(0x73, CONF_ADDR); //set time out:
outb(0x03, CONF_DATA); //0x03 -> 3 seconds
printf("Watchdog enabled. Press CTRL+C within 5 seconds to stop disarming.\n");
for(i=0; i<5; i++)
{
outb(0x73, CONF_ADDR); //reset time out
outb(0x03, CONF_DATA);
printf(".");
fflush(stdout);
sleep(1);
}
outb(0x73, CONF_ADDR);
outb(0x00, CONF_DATA); //deactivate watchdog
printf("\nWatchdog disabled\n");
iopl(0);
return 0;
}
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 41 of 47
4.6 Reading Temperatures
There are temperature sensors available that allow measurement of the CPU's chip temperature as well as the board’s ambient temperature. These are shown in the BIOS setup screens, see above.
This example is meant to be compiled using gcc under Linux.
#include <stdio.h>
#include <unistd.h>
#include <sys/io.h>
#define LPC_INDEX 0x295
#define LPC_DATA 0x296 int main()
{
char cputemp = 0;
char ambtemp = 0;
iopl(3);
//******* needed with BIOS prior version 7 ******
outb(0x51,LPC_INDEX); //thermal diode mode
outb(0x03,LPC_DATA);
outb(0x5C,LPC_INDEX); //unlock offset regs
outb(0x80,LPC_DATA);
outb(0x56,LPC_INDEX); //offset adjustment CPU
outb(0x70,LPC_DATA);
outb(0x57,LPC_INDEX); //offset adjustment Ambient
outb(0x3C,LPC_DATA);
outb(0x5C,LPC_INDEX); //lock offset regs
outb(0x00,LPC_DATA);
//******************************************
printf("Press CTRL+C to cancel!\nCPU AMBIENT\n");
while(1)
{
outb( 0x29,LPC_INDEX); //read out CPU temp
cputemp = inb(LPC_DATA);
outb( 0x2A,LPC_INDEX); //read out Ambient temp
ambtemp = inb(LPC_DATA);
printf("%3d %3d\r", cputemp, ambtemp); //printout to the screen
fflush(stdout);
sleep(1);
}
return 0;
}
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 42 of 47
4.7 Handling of PWM Outputs
Programming the PWM outputs works the same way as using GPIOs.
Enter configuration mode and switch to logical device 7 (via 2Eh/2Fh).
-
-
Enable PWM outputs by setting
Bit 6 of register 27h to ‘0’ (SIO_PWM2)
Bit 1 of register 29h to ‘0’ (SIO_PWM3)
-
Bits 3 and 4 of register 2Ch to ‘1’ (SIO_PWM4+5)
Enable channels 1-3 by programming the following registers via LPC-Bus (295h/296h):
-
-
Bits 2,1 and 0 of register 13h to ‘1’
Bits 2,1 and 0 of register 14h to ‘1’
Set the global frequency by programming bits 6-4 of register 14h via LPC-Bus (295h/296h):
Bits 6, 5, 4 PWM frequency
000
001
010
011
100
101
110
375.000 KHz
187.500 KHz
93.750 KHz
62.500 KHz
46.875 KHz
23.430 KHz
11.700 KHz
111 5.870 KHz
Set Bit 3 of register 14h to ‘0’ to allow duty cycles between 0...100%. (PWM/128*100%)
Duty cycles can be set different for each PWM channel by programming an 8 Bit value to registers16h for channel
2, 17h for channel 3, 88h for channel 4 and 89h for channel 5.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 43 of 47
5 Address Maps
This section describes the layout of the CPU memory and I/O address spaces.
Note Depending on enabled or disabled functions in the BIOS, other or more resources may be used
5.1 Memory Address Map
Address range (dec)
1024K - 16384K
896K - 1024K
800K
- 896K
768K - 800K
736K - 768K
704K - 736K
640K - 704K
639K - 640K
0K - 639K
Address range (hex)
100000 - FFFFFF
E0000 - FFFFF
C8000 - DFFFF
C0000 - C7FFF
B8000 - BFFFF
B0000 - B7FFF
A0000 - AFFFF
9FC00 - 9FFFF
0 - 9FBFF
Size Description
15360K Extended memory
128K System BIOS
96K Mapped to ISA (default)
32K Graphics BIOS
32K Color text memory
32K Monochrome text memory
64K Graphics memory
1K EBDA
639K Conventional memory
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 44 of 47
5.2 I/O Address Map
The system chip set implements a number of registers in I/O address space. These registers occupy the following map in the I/O space:
Address range (hex)
0000 - 000F
0020 - 0021
002E - 002F
0040 - 0043
0048 - 004B
0060 - 0060
0061 - 0061
0064 - 0064
0070 - 0073
0080 - 008F
0092 - 0092
00A0 - 00A1
00C0 - 00DF
00F0 - 00FF
0100 - 017F
0180 - 01BF
01C0 - 01DF
01F0 - 01FF
0200 - 027F
0279 - 0279
0290 - 0297
0298 - 029B
02F8 - 02FF
0300 - 033F
0340 - 035F
0378 - 037F
03B0 - 03BA
03C0 - 03DF
03F0 - 03F7
03F8 - 03FF
0480 - 048F
04D0 - 04D1
0A79 - 0A79
0CF8 - 0CFF
Numeric coprocessor
*PCI-ISA bridge positive decode range 1 (default)
*PCI-ISA bridge positive decode range 2 (default)
*PCI-ISA bridge positive decode range 3 (default)
*IDE controller
*PCI-ISA bridge positive decode range 4 (default)
(ISA-PnP data port)
Environment controller
PME direct access
*Serial port 2
*PCI-ISA bridge positive decode range 5 (default)
*PCI-ISA bridge positive decode range 6 (default)
*Parallel port
VGA
VGA
(Floppy controller)
*Serial port 1
DMA controller
Programmable interrupt controller
(ISA-PnP data port)
PCI config space
Description
DMA controller
Programmable interrupt controller
Super I/O
System timer
System timer
Keyboard
System speaker
Keyboard
System CMOS / Real-time clock
DMA controller
System
Programmable interrupt controller
DMA controller
1220 - 1227
1228 - 122F
Simple-I/O
SPI flash
1390 - 13FF
AC1C - AC1F
*DDMA controller
VSA
* Item can be moved or disabled in BIOS Setup
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 45 of 47
5.3 Interrupts
5
6
7
3
4
IRQ
0
1
2
8
9
10
11
12
13
14
15
System Resource
Timer
Keyboard
(Secondary interrupt controller)
Serial port 2
Serial port 1
PCI INTC#
(not used)
Parallel port
Real-time clock
ACPI (Environment controller)
PCI INTA# (Graphics, Ethernet, AES)
PCI INTB# (Audio, misc. CS5536)
PS/2 mouse
Numeric coprocessor
Primary IDE channel
PCI INTD# (USB)
Note
Depending on the BIOS settings, it is possible to reserve several IRQs for the PC/104 or Mini PCI bus
5.4 DMA Channels
DMA
3
4
5
6
7
0
1
2
Data width
8 bits
8 bits
8 bits
8 bits
16 bits
16 bits
16 bits
System Resource
Available
Parallel port (ECP mode)
Available
Available
Reserved, Cascade Channel
Available
Available
Available
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 46 of 47
5.5 PC/104 Bus Address Space
The PC/104 bus address space mapping can be changed in the BIOS setup. The table shows the factory default values. None of these ranges is used by any on-board devices so they all may be changed at will.
Range
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
Mem 0
Mem 1
Mem 2
Mem 3
Start Address
100
180
1C0
200
300
340
C8000
D0000
End Address
17F
1BF
1DF
27F
33F
35F
CFFFF
DFFFF
Size
128 bytes
64 bytes
32 bytes
128 bytes
64 bytes
32 bytes
32 Kbytes
64 Kbytes
-
-
Description
IT8712 Positive Decode I/O Range 1
IT8712 Positive Decode I/O Range 2
IT8712 Positive Decode I/O Range 3
IT8712 Positive Decode I/O Range 4
IT8712 Positive Decode I/O Range 5
IT8888 Positive Decode I/O Range 6
Memory mapped to ISA
Memory mapped to ISA
Disabled
Disabled
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 Page 47 of 47
Appendix A, Contact Information
Headquarters
LiPPERT Embedded Computers GmbH
Hans-Thoma-Straße 11
68163 Mannheim
Germany
Phone
Fax
+49 621 43214-0
+49 621 4321430
E-mail [email protected] [email protected]
Website www.lippertembedded.com
US Office
LiPPERT Embedded Computers, Inc.
5555 Glenridge Connector, Suite 200
Atlanta, GA 30342
USA
Phone
Fax
+1 (404) 459 2870
+1 (404) 459 2871 [email protected] [email protected]
Website www.lippertembedded.com
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 A
Appendix B, Additional Information
B.1 Additional Reading
AMD Geode™ LX Processors Data Book
AMD Geode™ CS5536 Companion Device Data Book
Datasheet LPC interface Winbond 83627HF, available at http://www.winbond.com
B.2 PC/104 and PC/104-Plus Specifications
A copy of the latest PC/104 and PC104-Plus specifications can be obtained from the PC/104 Consortium's website at http://www.pc104.org
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 B
Appendix C, Getting Help
Should you have technical questions that are not covered by the respective manuals, please contact our support department at [email protected]
.
Please allow one working day for an answer!
Technical manuals as well as other literature for all LiPPERT products can be found in the manual.
Products section of
LiPPERT's website www.lippertembedded.com. Simply locate the product in question and follow the link to its
Returning Products for Repair
To return a product to LiPPERT for repair, you need to get a Return Material Authorization (RMA) number first.
Please print the RMA Request Form from http://www.lippertembedded.com/service/repairs.html
fill in the blanks and fax it to +49 621 4321430. We'll return it to you with the RMA number.
Deliveries without a valid RMA number are returned to sender at his own cost!
LiPPERT has a written Warranty and Repair Policy, which can be retrieved from http://www.lippertembedded.com/service/warranty.html
It describes how defective products are handled and what the related costs are. Please read this document carefully before returning a product.
TME-104P-CRR_LX800-R2V7.doc Rev 2.7 C
Appendix D, Revision History
Filename
TME-104P-CRR_LX800-R0V0
TME-104P-CRR_LX800-R0V1
TME-104P-CRR_LX800-R0V2
TME-104P-CRR_LX800R1V0
TME-104P-CRR_LX800R1V1
TME-104P-CRR_LX800R1V2
TME-104P-CRR_LX800R1V3
TME-104P-CRR_LX800R1V4
TME-104P-CRR_LX800R1V5
TME-104P-CRR_LX800R1V6
TME-104P-CRR_LX800R1V7
TME-104P-CRR_LX800R1V8
TME-104P-CRR_LX800R1V9
TME-104P-CRR_LX800R1V10
TME-104P-CRR_LX800R2V0
TME-104P-CRR_LX800R2V1
TME-104P-CRR_LX800R2V2
TME-104P-CRR_LX800R2V3
TME-104P-CRR_LX800R2V4
TME-104P-CRR_LX800-R2V5
TME-104P-CRR_LX800-R2V6
TME-104P-CRR_LX800-R2V7
TME-104P-CRR_LX800-R2V7.doc
Date
2006-10-20
2006-11-28
2006-11-20
2007-02-27
2007-06-23
2007-10-08
2007-10-17
2007-10-24
2007-11-30
2007-12-07
2008-01-20
2008-06-04
2008-08-11
2009-02-17
2009-03-12
2009-03-19
2009-03-31
2009-05-27
2009-11-10
2009-11-26
2010-03-03
2010-07-29
Edited by
OF
OF
PK
PK
PK
CS
PK
PK
MS
PK
PK
PK
OF
JR
PK
CS
OF
MS
OF
OF
MF
JR
OF
JR
OF
MS
Change
Draft
Corrected pinout of LVDS connector, added pinout of KB connector.
New document structure and layout
BIOS screens corrected
Super-I/O programming
ISA mapping added
Supervisory connector corrected
Ch. 3.5: CF description corrected
Ch. 3.8: EIDE description corrected
Ch. 3.17: LED description improved
Ch. 1.3: Inrush current specified
MTBF specified
Ch. 3.4: VGA connector added
Appendix C inserted
New code examples
Chapter "LED indicators" moved
LPT connector, pin 26 corrected
BIOS default loading: description streamlined
Supervisory pinout, ISA-bus, Live-LED,
RS485, ACPI with Linux, various minor changes and typos
New chapter 3.19: External Battery
Ch. 4.1 BIOS screen shots updated
Ch. 4.1 Table updated
Watchdog programming example corrected
Help links corrected
Inrush current corrected
Power supply recommendation corrected
Max. current drawn from 3.3V specified
Several typos corrected
Corrected suggestion for ext. battery
Corrected USB +/- signals on supervisory connector
Added Live-LED example
Corrected address maps
Added LVDS color map
BIOS description adapted to
RRLX0010.BIN
Ch. 5.2: RRLX0012.BIN moved SPI and
DDMA I/O ranges
Corrected pinout of PC/104
Matching parts / connectors added
Ch. 3.14 LPT port corrected
Rev 2.7 D
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