Four-String, White LED Driver for LCD Backlight Applications

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Four-String, White LED Driver for LCD Backlight Applications | Manualzz

Four-String, White LED Driver for LCD Backlight Applications

ADD5211

Data Sheet

FEATURES

White LED driver based on an inductive boost controller

Wide input voltage range: 4.5 V to 40 V

Adaptive output voltage to minimize power dissipation

Adjustable operating frequency: 200 kHz to 1.2 MHz

Programmable UVLO

Programmable soft start time for boost converter

Programmable external MOSFET switching rising/falling time

Drives up to 4 LED current sinks with internal MOSFETs

Brightness control with PWM input

Adjustable LED current: 40 mA to 200 mA

Headroom control to maximize efficiency

LED dimming frequency: up to 25 kHz

PWM dimming at 300 Hz: 1000:1

Open-drain fault indicator

LED open and LED short fault protection

Thermal shutdown

Undervoltage lockout (UVLO)

24-lead, 4 mm × 4 mm LFCSP

APPLICATIONS

LCD monitor and TV LED backlights

Industrial lighting

APPLICATION CIRCUIT

GENERAL DESCRIPTION

The ADD5211 is a four-string, white LED driver for backlight applications based on high efficiency, current mode, step-up converter technology. The boost controller drives an external

MOSFET switch for step-up regulation from an input voltage of 4.5 V to 40 V and a pin adjustable operating frequency from

200 kHz to 1.2 MHz. An adjustable UVLO function is implemented to reduce input current during power-off.

The ADD5211 provides four regulated current sinks for uniform brightness intensity. Each current sink can be driven from 40 mA to 200 mA; the LED driving current is pin adjustable using an external resistor. With an input PWM interface, the ADD5211 drives up to four parallel strings of multiple series connected LEDs.

Additional features include LED short protection, LED open protection, boost output short protection, overvoltage protection, cycle-by-cycle current limit, and thermal shutdown for both the

IC and the LED array. An open-drain fault output is also included.

A programmable soft start is implemented to reduce inrush current during startup.

VIN

+

OFF ON

UVLO

VDR

VIN GATE_P GATE_N

CS

RAMP

PGND

EN

PWM

OVP

FAULT

ADD5211

VDD

LSD

ISET

AGND FREQ COMP

FB4

FB3

FB2

FB1

LGND

SS

Rev. 0 Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Figure 1.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

©2013 Analog Devices, Inc. All rights reserved. www.analog.com

ADD5211

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Application Circuit ........................................................................... 1

Revision History ............................................................................... 2

Detailed Functional Block Diagram .............................................. 3

Specifications ..................................................................................... 4

General Specifications ................................................................. 4

Step-Up Switching Controller Specifications ........................... 5

LED Current Regulation Specifications .................................... 5

Absolute Maximum Ratings ............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution .................................................................................. 6

REVISION HISTORY

10/13—Revision 0: Initial Version

Data Sheet

Pin Configuration and Function Descriptions ..............................7

Typical Performance Characteristics ..............................................8

Theory of Operation ...................................................................... 10

Current Mode, Step-Up Switching Controller ....................... 10

LED Current Regulation ........................................................... 11

Fault Protection .......................................................................... 12

Applications Information .............................................................. 14

Layout Guidelines....................................................................... 14

Boost Component Selection ..................................................... 14

Typical Application Circuits ......................................................... 17

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 18

Rev. 0 | Page 2 of 20

Data Sheet

DETAILED FUNCTIONAL BLOCK DIAGRAM

COMP

OVP

BOOST CONTROL

FB_REF

FB_MIN g m

ERROR

AMP

FREQ

PWM

COMP

OVP

OVP_REF

BOOST

SCP_REF

OVP

SCP

OSC

DCOMP

RAMP

DREF

+

+

ADD5211

OVP

POR

R

S

R

Q

VDR

SWITCH

DRIVER

STARTUP

SOFT START

CURRENT SENSE

ADD5211

GATE_P

GATE_N

PGND

SS

CS

RAMP

FAULT

FAULT

DETECTOR

VDR

VIN DEVICE

ENABLE

EN

500kΩ

AGND

UVLO

AGND

UVLO

DETECTOR

LINEAR

REGULATOR

BAND GAP

REFERENCE

VOLTAGE

REGULATOR

THERMAL

SHUTDOWN

VDD

POR

VDD

PWM

CONTROL LOGIC

500kΩ

AGND

THERMAL

SHUTDOWN

BOOST

SHORT

BOOST CONTROL

STARTUP

DIMMING CONTROL

REF

OPEN

LED

DETECTOR

SHORT

LED

DETECTOR

FB_MIN

CURRENT SOURCE 1

CURRENT SOURCE 2

CURRENT SOURCE 3

×10

UNUSED

STRING

DETECTOR

STRING

VOLTAGE

DETECTOR

CURRENT SOURCE 4

POR

LSD

FB1

FB2

FB3

FB4

DIMMING CONTROL

LGND

ISET

Figure 2.

Rev. 0 | Page 3 of 20

ADD5211

SPECIFICATIONS

V

IN

= 12 V, EN = 3.3 V, T

J

= −40°C to +125°C, unless otherwise noted. Typical values are at T

A

= 25°C.

GENERAL SPECIFICATIONS

Table 1.

Parameter

SUPPLY

Input Voltage Range

Quiescent Current

Shutdown Supply Current

VIN Rising Threshold

VIN Falling Threshold

VDR REGULATOR

Regulated Output

Dropout Voltage

VDD REGULATOR

Regulated Output

PWM INPUT

Input High Voltage

Input Low Voltage

PWM Input Current

PWM High to LED Turn-On Delay 1

PWM Low to LED Turn-Off Delay 1

EN CONTROL

Symbol

V

IN

I

Q

I

SD

V

UVLOR_VIN

V

UVLOF_VIN

V

VDR_REG

V

VDR_DROP

V

VDD_REG

V

PWM_HIGH

V

PWM_LOW

EN Voltage High

EN Voltage Low

EN Pin Input Current

UNDERVOLTAGE LOCKOUT

UVLO Threshold (Rising)

UVLO Hysteresis

FAULT

Sink Resistance

Fault Pin Leakage Current

LED SHORT DETECTION

EN = 5 V

LED Short Detection Enable Threshold V

LSD

LED Short Gain

LED Short Gain Control Range 1

LED FAULT DETECTION DELAY 1

LED Open Fault Delay

LED Short Fault Delay

OVERVOLTAGE PROTECTION

Overvoltage Threshold (Rising)

Overvoltage Hysteresis

Overvoltage Pin Leakage Current

OVP_REF

OVP_HYS

LSD = 1.0 V

Output Short-Circuit Threshold (Falling) V

SCPF

Output Short-Circuit Recovery (Rising) V

SCPR

THERMAL SHUTDOWN 1

Thermal Shutdown Threshold

Thermal Shutdown Hysteresis

1 Guaranteed by design.

T

SD

T

SDHYS

Test Conditions/Comments

EN = 0 V

Minimum V

IN

for startup

V

IN

= 4.5 V

PWM = 5 V

2.2

7.5

0.3

2.3

2.2

1.10

Min

4.5

3.2

4.75

3.0

2.2

2.5

10

5

15

2.5

100

100

150

150

25

40

13

1.19

100

Typ

2.8

4

3.65

5.1

350

11

1.6

0.8

3.3

Rev. 0 | Page 4 of 20

Data Sheet

V

V

µs

µs

V mV nA mV mV

°C

°C

Ω

µA

V

V

µA

V mV

Unit

V mA

µA

V

V

V mV

µA

µs

µs

V

V

V

VDD

13

2.0

2.7

200

17

0.8

30

1.27

100

1.5

Max

40

6

1

4.3

5.45

580

30

3.6

8

0.8

Data Sheet

STEP-UP SWITCHING CONTROLLER SPECIFICATIONS

Table 2.

ADD5211

Switching Frequency Range

Switching Frequency

PWM COMPARATOR

Leading Edge Blanking Time

CURRENT SENSE LIMIT COMPARATOR

Current-Limit Threshold f

SW

R

FREQ

= 50 kΩ

R

FREQ

= 50 kΩ

CS

LIMIT

Independent of duty cycle

200 1200 kHz

280 360 430 kHz

89 94 98 %

145 ns

275 345 400 mV

Peak Slope Compensation Ramp R

RAMP

= 5 kΩ

Transconductance g m

R

COMP Sink Current

COMP Source Current

Source Voltage

Gate On Resistance

Gate Off Resistance

Rising Time

Falling Time

Soft Start Pin Current t

R

DS_GATE_P

R

DS_GATE_N

R t

F

8 V < V

IN

< 40 V

C = 1 nF

C = 1 nF

I

SS

LED CURRENT REGULATION SPECIFICATIONS

Table 3.

45 μA

400

400

μA

μA

5.1 V

26

21 ns ns

Current Sink Range

Current Sink I

I

LED

LED100

String-to-String Tolerance

1

ΔI

FB100

Current Accuracy 2 ΔI

LED100

R

SET

= 15 kΩ, T

A

= 25°C

R

SET

R

SET

= 15 kΩ, T

= 15 kΩ, T

A

A

= 25°C

= 25°C

Minimum Headroom Voltage

Off Current I

V

HR

OFF

R

V

SET

FB

= 15 kΩ, T

A

25°C

= 40 V, EN = 0 V

40

98

0.45

200

102

2.5

2.0 mA

%

%

0.4 0.55 0.85 V

Off State Clamping Current I

CLAMP

V

FB

= 55 V, EN = 0 V 4

1 String-to-string tolerance is the greatest delta between FBx currents with respect to the average of the FBx currents.

I

FB100

Max

I

FB100(MAX)

I

LED100

I

LED100

100 % :

I

FB100(MIN)

I

LED100

I

LED100

100 %

 where I

FB100

is the LED current of each string.

2 Current accuracy is the delta between average current, I

LED100

,

and 100 mA with respect to 100 mA.

I

LED100

I

LED100

100 mA

100 %

100 mA where

I

LED100

I

FB1

I

FB2

I

FB3

I

FB4

4

20

1.5

80

μA

μA

Rev. 0 | Page 5 of 20

ADD5211

ABSOLUTE MAXIMUM RATINGS

T

A

= 25°C, unless otherwise noted.

Table 4.

Parameter

VIN, UVLO

FB1, FB2, FB3, FB4

EN

Rating

−0.3 V to +45 V

−0.3 V to +55 V

−0.3 V to +17 V

PWM, FAULT

VDR, GATE_N, GATE_P

−0.3 V to +8 V

−0.3 V to +7 V

COMP, CS, FREQ, ISET, LSD, OVP, RAMP −0.3 V to +3.6 V

SS −0.3 V to VDD

AGND, PGND, LGND

Maximum Junction Temperature

(T

J

max)

−0.3 V to +0.3 V

150°C

Operating Temperature Range (T

A

)

Storage Temperature Range (T

S

)

Reflow Peak Temperature

(20 sec to 40 sec)

−25°C to +85°C

−65°C to +150°C

260°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Data Sheet

THERMAL RESISTANCE

θ

JA

is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.

Table 5. Thermal Resistance

Package Type θ

JA

24-Lead LFCSP 40.5

ESD CAUTION

θ

JC

3.8

Unit

°C/W

Rev. 0 | Page 6 of 20

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADD5211

VDR 1

UVLO

2

VIN 3

EN 4

PWM 5

FAULT 6

ADD5211

TOP VIEW

18 OVP

17 FB4

16

FB3

15 LGND

14 FB2

13 FB1

NOTES

1. CONNECT THE EXPOSED PAD TO GROUND.

Figure 3. Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Description

1

2

9

10

11

17

18

19

20

21

22

23

24

12

13

14

15

16

3

4

5

6

7

8

VDR

UVLO

VIN

EN

PWM

FAULT

SS

COMP

FREQ

ISET

VDD

LSD

FB1

FB2

LGND

FB3

FB4

OVP

PGND

RAMP

CS

GATE_N

GATE_P

AGND

EP

Switching MOSFET Gate Driver Supply Pin. Bypass VDR to AGND with a 1 µF bypass capacitor.

Input Undervoltage Lockout. Set the start-up and shutdown input voltage level by connecting this pin to the input voltage with a resistor divider.

Supply Input Pin. Bypass VIN to AGND with a 0.1 µF bypass capacitor.

Shutdown Control Pin for PWM Input Operation Mode.

PWM Signal Input.

Open-Drain Fault Output.

Soft Start Pin.

Compensation for the Boost Converter. A capacitor and a resistor are connected in series between ground and this pin for stable operation.

Frequency Select. A resistor from this pin to ground sets the boost switching frequency from 200 kHz to 1.2 MHz.

Full-Scale LED Current Set Pin. A resistor from this pin to ground sets the LED current up to 200 mA.

Internal Linear Regulator Output. This regulator provides power to the ADD5211 . Bypass VDD to AGND with a 1 µF bypass capacitor.

LED Short Voltage Level Setting Pin. To disable LED short protection, connect this pin to VDD.

Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB1 to LGND.

Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB2 to LGND.

LED Current Sink Ground.

Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB3 to LGND.

Regulated Current Sink. Connect the bottom cathode of the LED string to this pin. If unused, connect FB4 to LGND.

Overvoltage Protection. The boost converter output is connected to this pin with a resistor divider.

Power Ground.

Ramp Compensation Pin.

Current Sense Input. Allows the current sensing to control the boost converter and to limit the switching current.

Switching MOSFET Gate Low Driving Pin.

Switching MOSFET Gate High Driving Pin.

Analog Ground.

Exposed Pad. Connect the exposed pad to ground.

Rev. 0 | Page 7 of 20

ADD5211

TYPICAL PERFORMANCE CHARACTERISTICS

112

110

108

106

104

102

100

98

96

94

92

90

88

–35 –25 –15 –5 5 15 25 35 45

TEMPERATURE (°C)

55

Figure 4. I

LED100

vs. Temperature

65 75 85 95

10

8

6

4

2

0

22

20

18

16

14

12

T

A

= –25°C

T

A

= +85°C

0 5 10 15 20 25 30 35 40

FB VOLTAGE (V)

45

Figure 5. FB Leakage Current vs. FB Voltage

50 55

Data Sheet

1.0

0.8

0.6

1.8

1.6

1.4

1.2

0.4

0.2

0

–35 –25 –15 –5 5 15 25 35 45

TEMPERATURE (°C)

55 65 75 85 95

Figure 7. ΔI

FB100

vs. Temperature

4.5

4.0

3.5

3.0

2.5

6.0

5.5

5.0

2.0

1.5

0 5 10 15 20 25

INPUT VOLTAGE (V)

30 35

Figure 8. VDR Voltage vs. Input Voltage

40

1

2

3

4

V

SW

30V/DIV

V

FB

20V/DIV

PWM

3V/DIV

I

FB

100mA/DIV

1ms/DIV

Figure 6. PWM Dimming Waveform, PWM Duty Cycle = 50%

1

2

3

4

V

FB1

20V/DIV

V

FB2

20V/DIV

V

FB3

20V/DIV

V

FB4

20V/DIV

1ms/DIV

Figure 9. FB1 to FB4 Waveforms, PWM Duty Cycle = 50%

Rev. 0 | Page 8 of 20

Data Sheet

1

2

3

4

20ms/DIV

Figure 10. Startup (Brightness = 100%, EN Is High,

V

IN

Goes from Low to High)

V

SW

30V/DIV

V

FB

20V/DIV

EN

3V/DIV

V

IN

20V/DIV

ADD5211

1

2

3

4

20ms/DIV

Figure 13. Startup (Brightness = 100%, V

IN

Is High,

EN Goes from Low to High

V

SW

30V/DIV

V

FB

20V/DIV

EN

3V/DIV

V

IN

20V/DIV

3

4

1

2

20ms/DIV

Figure 11. Startup (Brightness = 10%, EN Is High,

V

IN

Goes from Low to High)

V

SW

30V/DIV

V

FB

20V/DIV

EN

3V/DIV

V

IN

20V/DIV

3

4

1

2

20ms/DIV

Figure 14. Startup (Brightness = 10%, V

IN

Is High,

EN Goes from Low to High

V

SW

30V/DIV

V

FB

20V/DIV

EN

3V/DIV

V

IN

20V/DIV

2

3

4

V

FB1

30V/DIV

PWM

3V/DIV

I

FB1

100mA/DIV

5µs/DIV

Figure 12. LED Current Rising and Falling Waveform

3

4

1

2

1ms/DIV

Figure 15. LED Open Protection (Open LED on FB2)

V

OUT

50V/DIV

V

FB2

20V/DIV

FAULT

3V/DIV

I

FB1

100mA/DIV

Rev. 0 | Page 9 of 20

ADD5211

THEORY OF OPERATION

The ADD5211 uses a PWM boost controller to generate the minimum output voltage required to drive the LED string at the programmed LED current. The current mode control architecture allows a fast transient response while maintaining a stable output voltage. The boost converter provides power to the LED strings, and the four current sinks control the LED current with dynamic headroom control to improve efficiency.

CURRENT MODE, STEP-UP SWITCHING

CONTROLLER

The ADD5211 is a current mode, PWM boost controller that operates at a fixed switching frequency from 200 kHz to

1.2 MHz. The switching frequency is set by an external resistor connected from the FREQ pin to AGND. The minimum headroom voltage—which is monitored at the FB1, FB2, FB3, and

FB4 pins—is compared with the internal reference voltage by the internal transconductance error amplifier to create an error current at COMP. A resistor and capacitor connected from the

COMP pin to AGND convert the error current to an error voltage.

At the beginning of the switching cycle, the MOSFET is turned on and the inductor current ramps up. The MOSFET current is measured and converted to a voltage using the current sense resistor (R

CS

) and is added to the stabilizing slope compensation ramp from the ramp resistor (R

RAMP

). The resulting voltage sum passes through the current sense amplifier to generate the current sense voltage. Under light loads, the converter can also operate in discontinuous mode with pulse skip modulation to maintain output voltage regulation.

The current mode regulation system of the ADD5211 allows fast transient responses while maintaining a stable output voltage. By selecting the proper resistor-capacitor network from

COMP to AGND, the regulator response can be optimized for a wide range of input voltages, output voltages, and load currents.

Input Voltage

The ADD5211 can be powered directly from the VIN pin, which accepts a voltage from 4.5 V to 40 V. The voltage on the

VIN pin must exceed V

UVLOR_VIN

(4.0 V typical) for startup. The

ADD5211 has two linear regulators: a 3.3 V linear regulator

(VDD), which supplies power to the internal control circuitry, and a 5.1 V linear regulator (VDR), which supplies power to the internal GATE_P and GATE_N drivers.

Data Sheet

UVLO Pin

The UVLO pin is used to control the VIN voltage at which the ADD5211 starts up. This function is accomplished using a resistor divider between the input voltage and the UVLO pin,

as shown in Figure 16.

VIN

R

UVLO1

UVLO_REF

R

UVLO2

UVLO

PIN

Figure 16. Undervoltage Lockout Circuit

The startup voltage, as determined by the resistor divider to the

UVLO pin, can be calculated using the following equation:

V

IN(START)

= (1.19 V/R

UVLO2

) × (R

UVLO1

+ R

UVLO2

)

To start the device at the lowest possible VIN level, select an

R

UVLO1

value of 100 kΩ (or greater) and do not connect R

UVLO2

.

If UVLO is controlled from a separate voltage source, make sure that a 100 kΩ (or greater) resistor is in series between the voltage source and the UVLO pin.

Enable and Disable

To enable the ADD5211 , the voltage at the EN pin must be higher than 2.2 V. To disable the ADD5211 , the voltage at the

EN pin must be lower than 0.8 V. An internal 500 kΩ resistor is connected between EN and AGND.

Internal 3.3 V Regulator (VDD)

The ADD5211 contains a 3.3 V linear regulator (VDD) that is used to bias the internal control circuitry. The VDD regulator requires a 1 µF bypass capacitor. Place this bypass capacitor between VDD and AGND, as close as possible to the VDD pin.

Internal 5.1 V Regulator (VDR)

The ADD5211 contains a 5.1 V linear regulator (VDR) that is used to supply the MOSFET gate driver. The VDR regulator requires a 1 µF bypass capacitor. Place this bypass capacitor between VDR and AGND, as close as possible to the VDR pin.

Rev. 0 | Page 10 of 20

Data Sheet

Frequency

The ADD5211 boost converter switching frequency (f

SW

) is user adjustable from 200 kHz to 1.2 MHz using an external resistor,

R

FREQ

(see Figure 17).

1200

1000

800

600

400

200

0

0 10 20 30 40 50

R

FREQ

(kΩ)

60 70 80

Figure 17. Switching Frequency vs. R

FREQ

90 100

The following equation can also be used to calculate the typical switching frequency:

f

SW

(kHz)

=

19 , 000

R

FREQ

(k

)

30

(

R

FREQ

, 000

(k

))

2

Soft Start

At startup, the voltage at the SS pin ramps up slowly by charging the soft start capacitor (C

SS

) from an internal 2.1 μA (typical) current source. The peak inductor current follows the SS pin ramp to provide a controlled start-up profile. The soft start cycle is complete when the SS pin reaches its final value of 1.19 V (typical).

A capacitor must always be connected to the SS pin. The soft start time can be calculated as follows:

t

SS

= (C

SS

× 1.19 V)/2.1 µA

For a typical setup, a 27 nF soft start capacitor results in negligible input current overshoot at startup, making it suitable for most applications. However, if an unusually large output capacitor is used, a longer soft start period is required to prevent input inrush current and output voltage overshoot of the boost switching regulator. Conversely, if fast startup is required, the value of the soft start capacitor can be reduced to allow the boost output to start quickly, but allow greater peak switch current during startup and larger boost output overshoot.

CURRENT CONTROL

DIMMING CONTROL

ADD5211

LED CURRENT REGULATION

Current Sink

The ADD5211 contains four current sinks to provide accurate current sinking for each LED string. The current for each LED string is adjusted from 40 mA to 200 mA using an external resistor. Connect any unused FBx pins to LGND.

If the ADD5211 current sink voltage is greater than 45 V, a

Zener diode and a 410 kΩ resistor in parallel with the current

sink are activated (see Figure 18).

Programming the LED Current

As shown in Figure 22, the

ADD5211 has an LED current set pin

(ISET). A resistor (R

SET

) from the ISET pin to AGND adjusts the

LED current from 40 mA to 200 mA. The LED current level can be set using the following equation:

I

LED

(mA) = 1500/R

SET

(kΩ)

The resulting minimum current sink voltage (FB_REF) is given by

FB_REF = 0.23 + 0.0041 × I

LED

(mA) where 40 mA < I

LED

< 200 mA.

If only one or two LED strings are used, it is most efficient to connect the FBx pins in parallel and adjust R

SET

accordingly.

This configuration gives the lowest V

FB

operating voltage and improves efficiency. For example, to drive two LED strings at

100 mA, connect FB1 and FB2 together for one LED string, and connect FB3 and FB4 together for the other LED string. Then, set R

SET

to 30.1 kΩ (50 mA). The minimum FBx voltage is now

0.44 V (typical) instead of 0.64 V (typical). See Figure 23 for an

example of a two-string application.

PWM Dimming Control

The ADD5211 features LED brightness control using an external

PWM signal applied at the PWM pin. A logic high signal on the

PWM input enables the LED current sinks; a logic low signal disables them. If the PWM input remains low for 50 ms, the

ADD5211 stops boost regulation and enters shutdown mode. If the PWM input returns high after the ADD5211 enters shutdown, the device initiates a new soft start sequence.

FBx

410kΩ

V

Z

= 45V

LGND

Figure 18. Current Sink Circuit

Rev. 0 | Page 11 of 20

ADD5211

FAULT PROTECTION

Fault protections in the ADD5211 include boost output overvoltage protection, LED short protection, LED open protection, boost output short-circuit protection, and thermal shutdown.

The FAULT pin provides an alert for some of these conditions

(see Table 7).

Boost Output Overvoltage Protection (OVP)

The ADD5211 contains an overvoltage protection (OVP) circuit to prevent potential damage if the output voltage becomes excessive for any reason. OVP is implemented with a resistor divider from the boost output to the OVP pin. When the OVP pin voltage reaches 2.5 V (typical), the boost controller stops switching, which causes the output voltage and the OVP pin voltage to decrease. When the OVP pin voltage decreases below the OVP falling threshold (2.4 V typical), the boost converter resumes switching.

BOOST OUTPUT

R

OVP1

OVP_REF

OVP

R

OVP2

OVP

Figure 19. Boost Output Overvoltage Protection Circuit

The OVP threshold can be calculated using the following equation:

V

OUT_OVP

= (2.5 V/R

OVP2

) × (R

OVP1

+ R

OVP2

)

LED Short Protection

If an LED in one of the LED strings is shorted, the voltage of the

FBx pin that is connected to the faulty LED string increases to regulate the LED current. If this FBx pin reaches the LED short protection threshold (10× the voltage at the LSD pin) during normal operation, the ADD5211 disables the FBx pin that is connected to the shorted LED string and pulls down the FAULT pin.

VDD

R

LSD1

LSD_REF LSD ENABLE

R

LSD2

×10

SHORT

STRING

DETECTOR

LSD

FBx

Figure 20. LED Short Protection Circuit

Data Sheet

The LED short protection threshold can be calculated using the following equations:

V

LSD

= (3.3 V/(R

LSD1

+ R

LSD2

)) × R

LSD2

V

LED_SHORT_THRESHOLD

= 10 × V

LSD

To disable LED short protection, set the voltage of the LSD pin to a value greater than 3 V, or connect the pin to the VDD pin.

LED Open Protection

The ADD5211 contains a headroom control circuit to minimize power loss at each current sink. Therefore, the minimum feedback voltage is achieved by regulating the output voltage of the boost converter. If any LED string is open circuit during normal operation, the current sink voltage (V

FBx

) will be near 0 V. LED open protection is activated if V

FBx

is less than 100 mV (typical) and the boost converter output voltage reaches V

OUT_OVP

. The ADD5211 then disables the open LED string and pulls the open-drain fault indicator low. The remaining LED strings continue to operate normally. If all LED strings are open, the ADD5211 shuts down.

Boost Output Short-Circuit Protection (SCP)

The ADD5211 contains an SCP circuit to prevent boost converter damage if the Schottky diode becomes open or the boost converter output is shorted to ground for any reason. When the voltage on the OVP pin falls below 100 mV (typical), the boost converter stops switching until the OVP voltage rises to 150 mV (typical).

The SCP function is disabled during boost converter soft start.

BOOST OUTPUT

R

OVP1

SCP_REF

SCP

R

OVP2

OVP

Figure 21. Boost Output Short-Circuit Protection Circuit

The boost output short-circuit protection threshold can be calculated using the following equation:

V

OUT_SCP

= (0.15 V/R

OVP2

) × (R

OVP1

+ R

OVP2

)

Thermal Shutdown (TSD)

Thermal overload protection prevents excessive power dissipation from overheating and damaging the ADD5211 . When the junction temperature (T

J

) exceeds 150°C (typical), a thermal sensor immediately activates the fault protection, which shuts down the device and allows it to cool. The device restarts when the junction temperature (T

J

) of the die falls below 125°C (typical).

Rev. 0 | Page 12 of 20

Data Sheet

Table 7. Fault Protection

Fault

LED string short

LED string open

R

SET

short to AGND

Boost output short

Thermal shutdown

Description

Boost output overvoltage V

OVP

> OVP_REF

Boost Regulation Response

Stop switching until V

OVP

< 2.4 V (typical)

V

FBx

> 10 × V

LSD

; PWM pin is high

V

FBx

< 0.1 V; V

OVP

> OVP_REF; PWM pin is high Open LED string disabled; other LED strings operate normally

R

SET

is shorted to AGND

Shorted LED string disabled; other LED strings operate normally

V

OVP

< 100 mV (typical) after soft start

ADD5211 shuts down; automatic restart if

R

SET

returns to normal resistance range

ADD5211 shuts down; automatic restart if

V

OVP

rises above 150 mV (typical)

T

J

> 150°C (typical) ADD5211 shuts down; automatic restart after T

J

falls below 125°C (typical)

ADD5211

FAULT Pin State

Open

Pulled down

Pulled down

Open

Pulled down

Pulled down

Rev. 0 | Page 13 of 20

ADD5211

Data Sheet

APPLICATIONS INFORMATION

LAYOUT GUIDELINES

To achieve high efficiency, good regulation, and stability, a good

PCB layout is required. Use the following general guidelines when designing PCBs:

 Ensure that the high current loop from C

IN

to L1 to Q1 to

R

CS

then back to the ground of C

IN

is as short as possible.

 Ensure that the high current loop from C

IN

to L1 to D1 to

C

OUT

then back to the ground of C

IN

is as short as possible.

 Make high current traces as short and wide as possible.

 Keep nodes that are connected to L1, Q1, and D1 away from sensitive traces, such as COMP, to prevent coupling of the traces. If such traces must be run near each other, place a ground trace between the two as a shield.

 Place the compensation components as close as possible to the COMP pin.

 Use thermal vias and a thermal pad with the same dimensions as the exposed pad on the bottom of the package.

Heat Sinking

When using a surface-mount power IC or external power switches, the PCB can often be used as the heat sink. This is achieved by using the copper area of the PCB to transfer heat from the device; maximizing this area optimizes thermal performance.

BOOST COMPONENT SELECTION

Calculating the Peak Inductor Current and Duty Cycle

To select the optimal external components, the first step is to calculate the peak inductor current and maximum duty cycle. The peak inductor current is given by

I

PK

= I

L (AVG)

+ (ΔI

L

/2) where:

ΔI

L

= (V

IN

× D)/(L × f

SW

)

I

L (AVG)

= (4 × I

LED

)/(η × (1 − D))

I

LED

is the LED current per string.

D is the duty cycle (D = (V

OUT

V

IN

)/V

OUT

).

Rev. 0 | Page 14 of 20

Verify that the worst-case duty cycle does not exceed the maxi-

mum allowed value (89%) given in Table 2. For the worst-case

duty cycle, use the minimum V

IN

and the maximum V

OUT

. The maximum V

OUT

is given by

V

OUT_MAX

= N × V

F MAX

+ 1 V where:

N is the number of LEDs per string.

V

F MAX

is the maximum LED forward voltage.

Selecting the Inductor

When selecting the inductor, consider these inductor properties: inductance, maximum saturation current, resistance (DCR), and physical size.

Choose an inductance such that ΔI

L

is 20% to 40% of I

L (AVG)

.

L =

V

IN

0 .

3

D f

SW

( 1

D

I

OUT

) where I

OUT

is the total LED current through all the strings.

The saturation current is generally listed as the current at which the inductance is reduced by 30%. Ensure that this current is greater than the calculated peak inductor current.

Of the inductors that meet the required inductance and saturation current, choose one that provides the best trade-off between DCR and layout footprint for your application. The power dissipation due to the DCR of the inductor is given by

P

L

= DCR × I

L (AVG)

2

Selecting the Current Sense (CS) Resistor

To calculate the worst-case inductor peak current, use the maximum duty cycle, minimum inductance, and minimum switching frequency. Then select the current sense resistor (R

CS

) as follows:

R

CS

= CS

LIMIT (MIN)

/I

PK (MAX)

Ensure that the selected inductor can tolerate the maximum peak current given by this current sense resistor.

I

PK (CS)

= CS

LIMIT (MAX)

/R

CS (MIN)

The power dissipation from the sense resistor is given by

P

RCS

= D × R

CS

× I

L (AVG)

2

Data Sheet

Selecting the NMOS Switch

The external NMOS switch must have an adequate drain-tosource breakdown voltage (BV

DSS

) and rms current rating. The breakdown voltage rating should be at least

BV

DSS

> V

OUT (MAX)

+ 10 V

The rms current rating should exceed the following:

I

NMOS (RMS)

= I

L (AVG)

× √D

The power dissipation from the NMOS switch arises from two components: RDS

ON

losses and switching losses. These losses can be calculated as follows:

P

NMOS (RDSON)

= D × RDS

ON

× I

L (AVG)

2

P

NMOS (SW)

= 0.5 × V

OUT

× I

L (AVG)

× (t

R

+ t

F

) × f

SW

The rise and fall times (t

R

and t

F

) are a function of the strength of the ADD5211 gate drivers and the gate capacitance of the

NMOS. Typical values are given in Table 2, but these times vary

substantially for various power FETs. Therefore, t

R

and t

F

are best measured in the application.

Selecting the Diode

The diode must be selected for a low forward voltage (V

F

) and fast switching times. Generally, a fast Schottky diode provides the best performance for the cost. Ensure that the breakdown voltage (V

D

) is greater than the maximum V

OUT

plus some margin.

Also ensure that the rated current of the diode is greater than the output current (total LED current). The power dissipation of the diode is as follows:

P

DIODE

= V

F

× I

OUT

Selecting C

OUT

To provide stability and reduce the output voltage ripple, particularly when PWM dimming of the LED currents is in effect, the output capacitance should be in the range of 4.7 µF to 22 µF.

Boost Converter Loop Gain Calculations

The total closed-loop gain is given by G

EA

× G

P

(s). G

EA

is the compensation gain. G

P

(s) is the control to output gain. G

P

(s) is the gain of the power stage and includes L, C

OUT

, and the PWM modulator. The G

P

(s) gain is

G

P

(s) =

A

PS

×

1

+

2

×

π

1

s

×

+

f

2

LFP

×

π

×

s

×

f

ZESR

1

+

Q n

×

×

1

2

s

×

π

2

×

×

f

π

n s

×

+

f

(

RHP

2

×

π

s

2

×

f n

where A

PS

is the dc gain and includes the PWM modulator gain, as follows:

)

2

A

PS

=

( 1

2

×

D

)

×

V

OUT

R

CS

×

4

×

×

G

I

LED

CS

ADD5211

The equation for G

P

(s) shows that there are two zeros (f

ZESR

and f

RHP

). The f

ZESR

zero is formed by the ESR of the output capacitance.

Because ceramic capacitors are used in this application, this value should be small and can usually be ignored. The zero is given by

f

ZESR

=

1

2

× π ×

ESR

×

C

OUT

The right half plane zero (f

RHP

) is given by

f

RHP

=

2

× π ×

V

OUT

L

×

4

×

I

LED

×

V

IN

V

OUT

2

This RHP zero results in a gain boost, but a phase drop. Because of its dependence on so many variables, f

RHP

is extremely difficult to compensate for. Therefore, it is best to choose a loop crossover frequency well before the phase drop of this RHP zero is seen.

Typically, this is an order of magnitude less than the frequency of the RHP zero.

G

P

(s) also gives two poles at f

LFP

and f n

. The low frequency pole

(f

LFP

) is formed by the output capacitance and is found at

f

LFP

=

4

×

I

LED

π ×

V

OUT

×

C

OUT

f n

is the double pole formed by the current sense sampling action.

It is always located at half the switching frequency.

The f n

double pole becomes unstable if Q n

(the quality factor) is not sufficiently damped. Q n

is damped by adding external ramp compensation (S e

).

Q n

=

1

π ×

D

+

0 .

5

+

( 1

D

)

×

S e

S n

 where:

S e

is the external ramp compensation = 75% × ((V

OUT

V

IN

)/L).

S n

is the inductor up slope = V

IN

/L.

The external ramp compensation slope is usually set to a value from 50% to 75% of the inductor down slope as reflected across the sense resistor. Given the wide variation in parameters, it is best to stay closer to 75%.

R

RAMP

(

)

=

3

4

×

R

CS

45

×

µ

(

V

A

OUT

×

f

SW

V

IN

×

L

)

Rev. 0 | Page 15 of 20

ADD5211

Compensation Component Selection

To increase the crossover frequency (beyond the LFP frequency), some kind of phase boost is required. Because the ADD5211 operates in current mode, only one zero is needed to counteract f

LFP

. Therefore, a Type II compensator should be sufficient. This

compensator (see Figure 2) has a gain, G

EA

, that is expressed as follows:

G

EA

=

V

FB

V

OUT

×

g m

×

s

×

R

C s

×

C

C

×

C

C

+

1

G

EA

gives one zero and one pole at the origin, as follows:

f zEA

= 1/(2π × R

C

× C

C

)

f pEA

= 1/(2π × R

O

× C

C

) where R

O

is the output impedance of the error amplifier.

Data Sheet

To boost the phase and increase the crossover frequency, place the compensation zero (f zEA

) at or near the LFP pole. This placement gives the following equation for C

C

:

C

C

=

V

OUT

2

×

R

C

×

C

OUT

×

I

OUT

These values may need to be adjusted experimentally to achieve satisfactory phase margin over all operating conditions and toler-

ances. Table 8 provides recommended values for switching

frequencies of 360 kHz and 1 MHz.

Table 8. Recommended Values for Compensation Components f

SW

(kHz) L (µH) C

OUT

(µF) R

RAMP

(kΩ) R

C

(Ω) C

C

(µF)

360

1000

33

22

10

4.7

6.81

6.81

100

100

2.2

1.0

Rev. 0 | Page 16 of 20

Data Sheet

TYPICAL APPLICATION CIRCUITS

VIN

+

C

IN

10µF

C

IN2

0.1µF

L1

33µH

Q1

D1

C

OUT

10µF

22 LEDs/CH, 100mA/CH

C

VDR

1µF

OFF ON

UVLO

VDR

EN

VIN GATE_P GATE_N

CS

R

RAMP

6.8k

Ω

RAMP

R

CS

0.1

Ω

PGND

PWM

VDD

R

FLT

100k

Ω

FAULT

ADD5211

OVP

R

LSD1

24k

Ω

R

LSD2

4.7k

Ω

C

VDD

1µF

R

SET

15k

Ω

R

OVP1

560k

Ω

R

OVP2

16k

Ω

VDD

LSD

ISET

FB4

FB3

FB2

FB1

LGND

SS AGND FREQ COMP

R

FREQ

49.9k

R

C

100Ω

C

C

2.2µF

C

SS

30nF

Figure 22. Typical Four-String Application Circuit

L1

33µH

D1

VIN

+

C

IN

10µF

C

OUT

10µF

22 LEDs/CH, 100mA/CH

C

IN2

0.1µF

Q1

C

VDR

1µF

OFF ON

UVLO

VDR

EN

VIN GATE_P GATE_N

CS

RAMP

R

RAMP

6.8k

Ω

R

CS

0.1

Ω

PGND

PWM

VDD

R

FLT

100k

Ω

FAULT

ADD5211

OVP

R

LSD1

24k

Ω

R

LSD2

4.7k

Ω

C

VDD

1µF

R

SET

30.1k

Ω

R

OVP1

560k

Ω

R

OVP2

16k

Ω

VDD

LSD

ISET

FREQ COMP

FB4

FB3

FB2

FB1

LGND

SS AGND

R

FREQ

49.9k

R

C

100Ω

C

C

2.2µF

C

SS

30nF

Figure 23. Typical Two-String Application Circuit

ADD5211

Rev. 0 | Page 17 of 20

ADD5211

OUTLINE DIMENSIONS

PIN 1

INDICATOR

0.80

0.75

0.70

SEATING

PLANE

4.10

4.00 SQ

3.90

TOP VIEW

0.30

0.25

0.18

18

19 24

1

PIN 1

INDICATOR

0.50

BSC

EXPOSED

PAD

2.65

2.50 SQ

2.45

0.50

0.40

0.30

0.05 MAX

0.20 REF

13

12

BOTTOM VIEW

7

6

0.25 MIN

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

0.02 NOM

COPLANARITY

0.08

COMPLIANT TO JEDEC STANDARDS MO-220-WGGD.

Figure 24. 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

4 mm × 4 mm Body, Very Very Thin Quad

(CP-24-7)

Dimensions shown in millimeters

ORDERING GUIDE

Model 1

ADD5211ACPZ-R7

ADD5211ACPZ-RL

ADD5211CP-EVALZ

1 Z = RoHS Compliant Part.

Temperature Range

−40°C to +125°C

−40°C to +125°C

Package Description

24-Lead LFCSP_WQ, 7” Tape and Reel

24-Lead LFCSP_WQ, 13” Tape and Reel

Evaluation Board and LED Array

Data Sheet

Package Option

CP-24-7

CP-24-7

Rev. 0 | Page 18 of 20

Data Sheet

NOTES

ADD5211

Rev. 0 | Page 19 of 20

ADD5211

NOTES

Data Sheet

©2013 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D10555-0-10/13(0)

Rev. 0 | Page 20 of 20

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Analog Devices Inc.

:

ADD5211ACPZ-R7 ADD5211ACPZ-RL ADD5211EB-EVALZ ADD5211CP-EVALZ

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