AMS TMD2745 Datasheet
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Hirdetés
General Description
TMD2745
ALS and Small Aperture Proximity
Sensor Module
The device features advanced proximity measurement and digital ambient light sensing (ALS). The package has been designed to accommodate a single small aperture approach.
The Proximity detection feature provides object detection (e.g. mobile device screen to user’s ear) by photodiode detection of reflected IR energy (sourced by the integrated LED).
Detect/release events are interrupt driven, and occur whenever proximity result crosses upper and/or lower threshold settings.
The proximity engine features offset adjustment registers to compensate for system offset caused by unwanted IR energy reflections appearing at the sensor. The IR LED intensity is factory trimmed to eliminate the need for end-equipment calibration due to component variations. Proximity results are further improved by automatic ambient light subtraction.
The ALS detection feature provides photopic light intensity data. The ALS photodiode has UV and IR blocking filters and a dedicated data converter producing 16-bit data. This architecture allows applications to accurately measure ambient light which enables devices to calculate illuminance to control display backlight.
and
Content Guide appear at end of
datasheet.
ams Datasheet
[v1-02] 2017-Nov-06
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TMD2745 −
General Description
Key Benefits & Features
The benefits and features of TMD2745, ALS, and Small Aperture
Proximity Sensor Module are listed below:
Figure 1:
Added Value of Using TMD2745
Benefits
•
Single device integrated optical solution
•
Small aperture requirements
•
Accurate ambient light sensing
Features
•
ALS + proximity
• Integrated IR LED
• Power management features
• I²C fast mode interface compatible
•
1.35mm emitter to detector distance
•
Photopic Ambient Light Sensor (ALS)
• UV / IR blocking filters
• Programmable gain and integration time
Applications
The TMD2745 applications include:
•
Ambient Light Sensing
•
Cell Phone Touch Screen Disable
•
Mechanical Switch Replacement
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TMD2745 −
General Description
Figure 2:
TMD2745 Block Diagram
Block Diagram
The functional blocks of this device are shown below:
VDD
GND
LEDA
LEDK
LDR
Visible
Reference
ALS
OSCILLATOR
ADCs
I
2
C
SCL
SDA
East
North
South
West
Proximity
Engine
ADC
Registers
+Limit
PROX
- Limit
+Limit
VISIBLE
- Limit
INT Flags
Digital Core
TMD2745
PWM
INT
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Pin Assignment
(Top View)
Package drawing is not to scale.
TMD2745 −
Pin Assignment
The TMD2745 pin assignments are described below.
Figure 3:
Pin Diagram
9''
6&/
*1'
/('$
6'$
,17
/'5
/('.
Figure 4:
Pin Description
Pin Number
1
6
7
8
4
5
2
3
Pin Name
LEDK
LDR
INT
SDA
V
DD
SCL
GND
LEDA
Description
Supply voltage.
I²C serial clock input terminal.
Ground. All voltages are referenced to GND.
LED Anode.
LED Cathode. Connect to LDR pin when using internal LED driver circuit.
LED drive. Current sink for LED.
Interrupt. Open drain output (active low)
I²C serial data I/O terminal.
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TMD2745 −
Absolute Maximum Ratings
Absolute Maximum Ratings
Stresses beyond those listed under
may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under
Operating Conditions is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Figure 5:
Absolute Maximum Ratings (all voltages with respect to GND)
Symbol
V
DD
V
LEDA
V
LEDK
V
IO
I out
T strg
I
SCR
ESD
HBM
ESD
CDM
Parameter
Supply voltage
Supply voltage
Analog I/O terminal voltage
Digital I/O terminal voltage
Output terminal current
Storage temperature range
Input Current
(latch up immunity)
JEDEC JESD78D
Electrostatic Discharge HBM
JS-001-2014
Electrostatic Discharge CDM
JEDEC JESD22-C101F
Min Max Units Comments
All voltages are with respect to GND
- 0.5
- 1
- 40
3.8
4.6
4.6
3.8
20
85
V
V
V
V mA
ºC
SCL, INT, and SDA
INT and SDA
± 100
± 2000
± 500 m A
V
V
Class II
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TMD2745 −
Electrical Characteristics
Electrical Characteristics
All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical
Quality Control) methods.
Figure 6:
Recommended Operating Conditions
Symbol
V
DD
T
A
V
LEDA
Parameter
Supply voltage
Supply voltage accuracy, V
DD
total error including transients
Operating free-air temperature
Supply voltage on LEDA
Min
2.4
-3
-30
2.5
Typ
3
Max
3.6
3
85
4.6
Units
V
%
ºC
V
Note(s):
1. While the device is operational across the temperature range, performance will vary with temperature. Specifications are stated at
25°C unless otherwise noted.
Figure 7:
Operating Characteristics, V
DD
= 3 V, T
A
= 25ºC (unless otherwise noted)
Symbol
f
OSC
Parameter
Oscillator Frequency
I
DD
V
OL
I
LEAK
V
IH
V
IL
Conditions
Supply current
INT, SDA output low voltage
Leakage current, SDA,
SCL, INT pins
Leakage current, LDR pin
SCL, SDA input high voltage
SCL, SDA input low voltage
Active ALS state
(PON=AEN=1, PEN=0)
Wait state (PON=1,
AEN=PEN=0)
3 mA sink current
6 mA sink current
0
0
−5
−10
1.26
Min
3.525
Typ
3.675
220
Max
3.825
330
Units
MHz
μA
38
1.0
10
0.4
0.6
5
10
V
μA
0.54
V
V
Note(s):
1. Values are shown at the V
DD
pin and do not include current through the IR LED.
2. Sleep state occurs when PON = 0 and I²C bus is idle. If Sleep state has been entered as the result of operational flow, SAI = 1, PON will remain high.
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TMD2745 −
Electrical Characteristics
Figure 8:
ALS Characteristics, V
DD
= 3 V, T
A
= 25ºC, AGAIN = 16×, ATIME = 0XF6 (unless otherwise noted)
Min Typ Max Units Parameter Conditions
Dark ADC count value
E e
= 0, AGAIN : 64×,
ATIME=0xDC (100ms)
ATIME = 0xFF ADC integration time step size
ADC number of integration steps
ADC counts per step
ADC count value ATIME = 0xC0
AGAIN = 1×
Gain scaling, relative to 16× gain setting AGAIN = 4×
Visible channel irradiance responsivity
Reference channel irradiance responsivity
AGAIN = 64×
White LED, 2700K
λ p
= 850 nm
White LED, 2700K
λ p
= 850 nm
ADC noise
White LED, 2700K
AGAIN :16x
0 1 3
2.78
1 256
0 1024
0 65535
0.058
0.062
0.067
0.237
3.75
18.35
0.25
4
21.6
0.263
4.37
24.84
1.5
10.5
10.7
90 100 110
0.005
ms steps counts counts x counts/
(μW/cm
2
)
%
% full Scale
Note(s):
1. The typical value based on 3-sigma distribution. An AGAIN setting of 16x correlates to a typically dark ADC count value less than or equal to 1.
2. Actual step sizes are 1024, however an addition count must be added when calculating the full-scale count value. For example, an
ATIME setting of 0xFF results in a full-scale count value of 1025.
3. Lux accuracy is function of the Visible and Reference channels, and not 100% production tested.
4. Number of data samples is 1000.
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TMD2745 −
Electrical Characteristics
Figure 9:
Proximity Characteristics, V
DD
= 3 V, T
A
= 25ºC, PCMP = 1, PMSK_S = 1, PMSK_W = 1, PMSK_E = 1
(unless otherwise noted)
Parameter
ADC conversion time
LED pulse count
LED pulse width
LED drive current
Proximity offset pulsed
Relative proximity response
Proximity response
Conditions
PPULSE
PPLEN = 0
PPLEN = 1
PPLEN = 2
PPLEN = 3
LDRIVE = 0
LDRIVE = 1
LDRIVE = 2
LDRIVE = 3
LEDBOOST = 0
LEDBOOST = 1
LEDBOOST = 2
LEDBOOST = 3
PGAIN = 2 (4x)
LDRIVE = 0 (100mA)
LEDBOOST = 0 (100%)
PPLEN = 1 (8
μ s)
PPULSE = 3 (4 pulses)
PGAIN = 2 (4x)
LDRIVE = 0 (100mA)
LEDBOOST = 0 (100%)
PPLEN = 2 (16
μ s)
PPULSE= 15 (16 pulses) d=23mm round target at 30mm distance
PGAIN = 2 (4x)
LDRIVE = 0 (100mA)
LEDBOOST = 0 (100%)
PPLEN = 2 (16
μ s)
PPULSE= 28 (29 pulses)
100mm x 100mm 90% reflective Kodak Grey
Card at 100mm distance
Min
1
75
80
Typ
696.6
100
50
25
12.5
4.0
8.0
16.0
32.0
100
150
200
300
100
100
Max
64
10
125
120
Units
μs pulses
μs mA
% counts
% counts
ADC count value 0 255 counts
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TMD2745 −
Electrical Characteristics
Parameter
Gain scaling, relative to 1× gain setting
Conditions
PGAIN : 2x
PGAIN : 4x
PGAIN : 8x
Min Typ
2
4
8
Max Units
x
Note(s):
1. This parameter ensured by design and characterization and is not 100% tested.
2. Value may be as much as 1.36μs longer than specified.
3. Value is factory-adjusted to meet the Proximity response specification. Considerable variation (relative to the typical value) is possible after adjustment.
4. LEDBOOST multiplies LDR current by the percentage selected. LEDBOOST increases current setting (as defined by LDRIVE). For example, if LDRIVE = 0 and LEDBOOST = 300%, LDR current is 300mA.
5. Proximity offset value varies with power supply characteristics and system noise.
6. Production tested value is the average of 5 readings.
Figure 10:
Proximity Test Circuit
22
V
DD
1μF
GND
1
3
4
LEDA
TMD2745
5
6
LEDK
LDR
1μF
22μF
Note(s):
1. The circuit shown above is used during evaluation of the device and during characterization data collection.
Figure 11:
Wait Characteristics, V
DD
= 3 V, T
A
= 25ºC (unless otherwise noted)
Parameter
Wait step size
Conditions Min Typ
2.78
Max Units
ms
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Timing Characteristics
Figure 12:
AC Electrical Characteristics, V
DD
= 3 V, T
A
= 25ºC (unless otherwise noted)
f
SCL t
BUF t
HD;STA t
SU;STA t
SU;STO t
HD;DAT t
SU;DAT t
LOW t
HIGH t
F t
R
C i
Description
Clock frequency (I²C only)
Bus free time between start and stop condition
Hold time after (repeated) start condition. After this period, the first clock is generated.
Repeated start condition setup time
Stop condition setup time
Data hold time
Data setup time
SCL clock low period
SCL clock high period
Clock/data fall time
Clock/data rise time
Input pin capacitance
Note(s):
1. Specified by design and characterization; not production tested.
Figure 13:
Timing Parameter Measurement Drawing
Timing Diagrams
0.6
0.6
0.6
0
100
1.3
0.6
Min
0
1.3
t
HIGH
TMD2745 −
Timing Characteristics t
R
Max
400
300
300
10
Units
kHz
μs
μs ns ns
μs
μs
μs
μs ns ns pF
SCL
V
IH
V
IL t
HD; STA t
LOW
SDA
V
IH
V
IL t
BUF
STOP START t
HD; DAT t
SU; DAT t
SU; STA t
F
START t
SU; STO
STOP
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TMD2745 −
Typical Operating Characteristics
Typical Operating
Characteristics
Figure 14:
Spectral Responsivity
120%
100%
80%
60%
40%
20%
0%
300 400 500
Spectral Response
Visible Ch
Reference Ch
600 700
Wavelength (nm)
800 900 1000 1100
Figure 15:
ALS Responsivity vs. Angular Displacement
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
-90 -75 -60 -45
Normalized Angular Response
-30 -15 0 15
Angle of Incident Light (°)
30
Green LED
Visible Ch
45 60 75 90
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Figure 16:
Typical LDR Current vs. Voltage
TMD2745 −
Typical Operating Characteristics
LDR Voltage - V
Figure 17:
Responsivity Temperature Coefficient
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λ
- Wavelength - nm
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TMD2745 −
Typical Operating Characteristics
Figure 18:
Theoretical Illuminance (Lux) vs. Counts (Visible Channel)
Dynamic Range (ATIME = 100ms)
100000
10000
1000
100
10
1
0.1
0.01
0.001
1 10000
1x
4x
16x
64x
100000 10 100 1000
Visible Channel (counts)
Note(s):
1. Illustration depicts the theoretical relationship between illuminance and the Visible Channel result in Counts.
Figure 19:
940nm LED Forward Voltage vs. Current
LED Forward Voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0 25 50 75 100 125 150 175
Forward Current (mA)
200 225 250 275 300
Note(s):
1. The voltage on the LDR pin (V
LEDA
– V f
) must be sufficiently large to guarantee proper operation of the regulated current sink.
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I²C Protocol
TMD2745 −
I²C Protocol
The device uses I²C serial communication protocol for communication. The device supports 7-bit chip addressing and both standard and fast clock frequency modes. Read and Write transactions comply with the standard set by Philips (now NXP).
Internal to the device, an 8-bit buffer stores the register address location of the desired byte to read or write. This buffer auto-increments upon each byte transfer and is retained between transaction events (I.e. valid even after the master issues a STOP command and the I²C bus is released). During consecutive Read transactions, the future/repeated I²C Read transaction may omit the memory address byte normally following the chip address byte; the buffer retains the last register address + 1.
I²C Write Transaction
A Write transaction consists of a START, CHIP-ADDRESS
WRITE
,
REGISTER-ADDRESS, DATA BYTE(S), and STOP. Following each byte (9
TH
clock pulse) the slave places an ACKNOWLEDGE/NOT-
ACKNOWLEDGE (ACK/NACK) on the bus. If NACK is transmitted by the slave, the master may issue a STOP.
I²C Read Transaction
A Read transaction consists of a START, CHIP-ADDRESS
WRITE
,
REGISTER-ADDRESS, START, CHIP-ADDRESS
READ
, DATA BYTE(S), and STOP. Following all but the final byte the master places an
ACK on the bus (9
TH
clock pulse). Termination of the Read transaction is indicated by a NACK being placed on the bus by the master, followed by STOP.
Alternately, if the previous I²C transaction was a Read, the internal register address buffer is still valid, allowing the transaction to proceed without “re”-specifying the register address. In this case the transaction consists of a START,
CHIP-ADDRESS
READ
, DATA BYTE(S), and STOP. Following all but the final byte the master places an ACK on the bus (9
TH
clock pulse). Termination of the Read transaction is indicated by a
NACK being placed on the bus by the master, followed by STOP.
The I²C bus protocol was developed by Philips (now NXP). For a complete description of the I²C protocol, please review the
NXP I²C design specification at: http://www.i2c-bus.org/references.
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TMD2745 −
Detailed Description
Detailed Description
Proximity detection and ambient light sense functionality are controlled by a state machine, as depicted in
, which reconfigures on-chip analog resources when each functional engine is entered. Functional states/engines can be individually included or excluded from the progression of state machine flow. Each functional engine contains controls (e.g. Gain, ADC integration time, wait time, persistence, thresholds, etc.) that govern operation.
Figure 20:
State Diagram
POR
SAI == 1
&&
INT PIN == 0
?
Y
N
INITIALIZE
(5.7ms)
SLEEP
ALS
ENGINE
Y
N
AEN ==1
?
PEN = 0
AEN= 1
WAIT
(0 – 8.5s)
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Operational States
PON ==1
?
Y
N
N
PEN
AEN==1
?
Y
EXIT SLEEP
(7ms)
IDLE
PON=1
PEN=0
AEN=0
PEN=1
AEN=0/1
PROXIMITY
ENGINE
IDLE
PROXIMITY
WAIT
ALS
Upon power-up, POR, the device initializes and immediately enters the low power SLEEP state. In this operational state the internal oscillator and other circuitry are not active, resulting in ultra-low power consumption. If I²C transaction occurs during this state, the oscillator and I²C core wakeup temporarily to service the communication. Once the Power ON bit, PON, is enabled, the internal oscillator and attendant circuitry are active, but power consumption remains low until one of the functional engine blocks are entered.
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TMD2745 −
Detailed Description
The first time the SLEEP state is exited and any of the analog engines are enabled (PEN, AEN =1) an EXIT SLEEP pause occurs; followed by an immediate entry into the selected engine. If multiple engines are enabled, then the operational flow progresses in the following order: idle, proximity, wait, ALS, and sleep (if SAI = 1 and INT pin is asserted). The wait operational state functions to reduce the power consumption and data collection rate. If wait is enabled, WEN=1, the delay is adjustable from 2.78ms to 8.54s, as set by the value in the WTIME register and WLONG control bit.
Sleep After Interrupt Operation
After all the enabled engines/operational states have executed, causing a hardware interrupt, the state machine returns to either IDLE or SLEEP, as selected by the Sleep After Interrupt bit,
SAI. SLEEP is entered when two conditions are met: SAI = 1, and the
INT
pin has been asserted. Entering SLEEP does not automatically change any of the register settings (e.g. PON bit is still high, but the normal operational state is over-ridden by
SLEEP state). SLEEP state is terminated by an I²C clear of the INT pin or if SAI bit is cleared.
Proximity Operation
The Proximity detection feature provides object detection measurement by photodiode detection of reflected IR energy sourced by the integrated LED. The following registers and control bits govern proximity operation and the operational flow is depicted in
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TMD2745 −
Detailed Description
Figure 21:
Proximity Controls
Register/Bit
ENABLE<PON>
ENABLE<PEN>
ENABLE<PIEN>
PILT
PIHT
PERS<PPERS>
PPULSE<PPLEN>
PPULSE<PPULSE>
CONTROL<PGAIN>
CONTROL<LDRIVE>
CONFIG2<PSIEN>
CONFIG2<LEDBOOST>
STATUS<PSAT>
STATUS<PINT>
STATUS<PVALID>
PDATA
POFFSET_NE
POFFSET_SW
CONFIG3<PCMP>
CONFIG3<PMSK_N>
CONFIG3<PMSK_S>
CONFIG3<PMSK_W>
CONFIG3<PMSK_E>
PICLEAR
AICLEAR
Address
0x8F<3:2>
0x8F<7:6>
0x90<7>
0x90<5:4>
0x93<6>
0x93<5>
0x93<1>
0x9C
0x80<0>
0x80<2>
0x80<5>
0x89
0x8B
0x8C<7:4>
0x8E<7:6>
0x8E<5:0>
0x9D
0x9E
0x9F<5>
0x9F<3>
0x9F<2>
0x9F<1>
0x9F<0>
0xE5
0xE7
Description
Power ON
Proximity Enable
Proximity Interrupt Enable
Proximity low threshold
Proximity high threshold
Proximity Interrupt Persistence
Proximity Pulse Length
Proximity Pulse Count
Proximity Gain Control
LED Drive Strength
Proximity Saturation Interrupt Enable
LED Boost
Proximity Saturation
Proximity Interrupt
Proximity Valid
Proximity Data
Proximity Offset North/East
Proximity Offset South/West
Proximity Gain Compensation Enable
Proximity Mask North Enable
Proximity Mask South Enable
Proximity Mask West Enable
Proximity Mask East Enable
Proximity Interrupt Clear
All Interrupt Clear
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TMD2745 −
Detailed Description
Figure 22:
Detailed Proximity Diagram
PROXIMITY ENGINE
ENTER
PROX
PEN = 1
COLLECT
PROX
DATA
DATA TO
PDATA
PVALID = 1
3,/7 <=
PDATA
<= 3,+7
Y
N
PERSISTANCE++
RESET
PERSISTANCE
PERSISTANCE
>=
PPERS
N
Y
PINT = 1
PIEN ==1
?
N
Y
ASSERT INT PIN
EXIT
PVALID is automatically reset whenever PDATA is read.
PINT must be manually reset by a write-access to PICLEAR or AICLEAR.
ams Datasheet
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TMD2745 −
Detailed Description
Proximity results are affected by three fundamental factors: IR
LED emission, IR reception, and environmental factors, including target distance and surface reflectivity.
The IR reception signal path begins with IR detection from four photodiodes and ends with the 8-bit proximity result in PDATA register. Signal from the photodiodes is combined, amplified, and offset adjusted to optimize performance. Diodes are paired to form two signal paths: North/East and South/West.
Regardless of pairing, any of the photodiodes can be masked to exclude its contribution to the proximity result. Masking one of the paired diodes effectively reduces the signal by half and causes the full-scale result to be reduced from 255 to 127. To correct this reduction in full-scale, the proximity gain compensation bit, PCMP, can be set, returning F.S. to 255. Gain is adjustable from 1x to 8x using the PGAIN control bits. Offset correction or cross-talk compensation is accomplished by adjustment to the POFFSET_NE and POFSET_SW registers. The analog circuitry of the device applies the offset value as a
subtraction
to the signal accumulation; therefore a positive offset value has the effect of decreasing the results.
Optically, the IR emission appears as a pulse train. The number of pulses is set by the PPULSE bits and the period of each pulse is adjustable using the PPLEN bits. The intensity of the IR emission is selectable using the LDRIVE control bits. These bits correspond to four factory calibrated current levels. If a higher intensity is required (e.g. longer detection distance or device placement beneath dark glass) then the LEDBOOST bits can be used to increase LDR current 150%, 200%, or 300% of LDRIVE setting.
LED duty cycle and subsequent power consumption of the integrated IR LED can be calculated using the following table shown in
Figure 23 , and equations. If proximity events are
separated by a wait time, as set by WTIME and WLONG, then the total LED OFF time must be increased by the wait time.
Figure 23:
Approximate Proximity Timing
PPLEN
4
µ s
8
µ s
16
µ s
32
µ s
t
INIT
(µs)
40.8
44.9
53.0
69.4
t
LED ON
(µs)
5.4
9.5
17.7
34.0
t
ACC
(µs)
28.6
36.73
53.1
85.7
t
CNVT
(µs)
796.6
796.6
796.6
796.6
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TMD2745 −
Detailed Description
t
PROX RESULT
= t
INIT
+ t
CNVT
+ PPULSE x t
ACC t
TOTAL LED ON
= PPULSE x t
LED ON t
TOTAL LED OFF
= t
PROX RESULT
– t
TOTAL LED ON
An Interrupt can be generated with each new proximity result or whenever proximity results exceed or fall below levels set in the PILT and/or PIHT threshold registers. To prevent premature/false interrupts an interrupt persistence filter is also included; interrupts will only be asserted if the consecutive number of out-of-threshold results is equal or greater than the value set by PPERS. Each “in-threshold” proximity result, PDATA, will reset the persistence count. If the analog circuitry becomes saturated, the PSAT bit will be asserted to indicate PDATA results may not be accurate. The PINT and PSAT bits are always available for I²C polling, but PIEN bit must be set for PINT to assert a hardware interrupt on the INT pin. Saturation of the analog data converter can be detected by polling PSAT bit; to enable this feature the PSIEN bit must be set. PVALID is cleared by reading
PDATA. PSAT and PINT are cleared by PICLEAR or AICLEAR.
Ambient Light Sense Operation
The Ambient Light Sense detection functionality uses an array of filtered photodiodes to measure the visible content of light, as well as having an unfiltered reference channel. The following registers and control bits govern ALS operation and the operational flow is depicted in
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Detailed Description
Figure 24:
ALS Controls
Register/Bit
ENABLE<PON>
ENABLE<AEN>
ENABLE<AIEN>
ENABLE<WEN>
ATIME
WTIME
AILTL
AILTH
AIHTL
AIHTH
PERS<APERS>
CONFIG1<WLONG>
CONTROL<AGAIN>
CONFIG2<VPSIEN>
STATUS<VPSAT>
STATUS<AINT>
STATUS<AVALID>
VISDATAL
VISDATAH
REFDATAL
REFDATAH
VICLEAR
AICLEAR
Address
0x86
0x87
0x8C<3:0>
0x8D<1>
0x8F<1:0>
0x90<6>
0x93<7>
0x93<4>
0x80<0>
0x80<1>
0x80<4>
0x80<3>
0x81
0x83
0x84
0x85
0x93<0>
0x94
0x95
0x96
0x97
0xE6
0xE7
Description
Power ON
ALS Enable
ALS Interrupt Enable
Wait Enable
ALS ADC Integration Time
Wait Time
ALS low threshold, lower byte
ALS low threshold, upper byte
ALS high threshold, lower byte
ALS high threshold, upper byte
ALS Interrupt Persistence
Wait Long Enable
ALS Gain Control
Visible Diode Saturation Interrupt Enable
Visible Diode Saturation
ALS Interrupt
ALS Valid
Visible Data, Low byte
Visible Data, High byte
Reference Data, Low byte
Reference Data, High byte
Visible Channel Interrupt Clear
All Interrupt Clear
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TMD2745 −
Detailed Description
Figure 25:
ALS State Diagram
ENTER
ALS
AEN = 1
COLLECT
ALS
DATA
DATA TO
VISDATA & REFDATA
AVALID = 1
ALS ENGINE
AILT(L/H) <=
VISDATA
<= AIHT(L/H)
?
Y
N
RESET
PERSISTANCE
PERSISTANCE++
PERS ISTANCE >=
APERS
N
Y
AINT = 1
AIEN ==1
?
N
Y
ASSERT INT PIN
EXIT
AVALID is automatically reset whenever any of ALS DATA registers are read. AINT and
VPSAT are manually reset by a write-access to VICLEAR or AICLEAR.
ams Datasheet
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TMD2745 −
Detailed Description
The ALS reception signal path begins with filtered ALS detection at the photodiodes and ends with the 16-bit results in the ALS data registers. Signal from the photodiode array accumulates for a period of time set by the value in ATIME before the results are placed into the ALSDATA registers. Gain is adjustable from 1x to 64x, and is determined by the setting of
CONTROL<AGAIN>. Performance characteristics such as accuracy, resolution, conversion speed, and power consumption can be adjusted to meet the needs of the application.
Before entering (re-entering) the ALS engine, an adjustable, low power consumption, delay is entered. The wait time for this delay is selectable using the WEN, WTIME and WLONG control bits and ranges from 0 to 8.54s.
An interrupt can be generated whenever Visible Channel results exceed or fall below levels set in the AILT and/or AIHT threshold registers. To prevent premature/false interrupts a persistence filter is also included; interrupts will only be asserted if the consecutive number of out-of-threshold results is equal or greater than the value set by APERS. Each “in-threshold” Visible channel result, VISDATA, will reset the persistence count. If the analog circuitry becomes saturated, the ASAT bit will be asserted to indicate ALSDATA results may not be accurate. The AINT and
VPSAT bits are always available for I²C polling, but AIEN bit must be set for AINT to assert a hardware interrupt on the INT pin.
Saturation of the analog data converter can be detected by polling VPSAT bit; to enable this feature the VPSIEN bit must be set.
AVALID is cleared by reading any of the ALS data registers. ASAT and AINT are cleared by VICLEAR or AICLEAR.
ALS results can be used to calculate ambient light levels (I.e.
Lux).
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TMD2745 −
Register Description
Register Description
The device is controlled and monitored by registers accessed through the I²C serial interface. These registers provide for a variety of control functions and can be read to determine results of the ADC conversions. The register set is summarized in
Figure 26:
Control Register Map
Address Register Name
0x8F
0x90
0x91
0x92
0x8B
0x8C
0x8D
0x8E
0x85
0x86
0x87
0x89
0x80
0x81
0x83
0x84
0x93
0x94
0x95
0x96
0x97
0x9C
0x9D
0x9E
PIHT
PERS
CONFIG1
PPULSE
CONTROL
CONFIG2
REVID
ID
ENABLE
ATIME
WTIME
AILTL
AILTH
AIHTL
AIHTH
PILT
STATUS
VISDATAL
VISDATAH
REFDATAL
REFDATAH
PDATA
POFFSET_NE
POFFSET_SW
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R
R
R
R
R/W
Register Function
Enables states and interrupts
ADC integration time
Wait time
ALS interrupt low threshold low byte
ALS interrupt low threshold high byte
ALS interrupt high threshold low byte
ALS interrupt high threshold high byte
Proximity interrupt low threshold
Proximity interrupt high threshold
Interrupt persistence filters
Configuration register one
Proximity pulse count and length
Gain control register
Configuration Register Two
Revision ID
Device ID
Device status
Visible ADC low data register
Visible ADC high data register
Reference ADC low data register
Reference ADC high data register
Proximity ADC data register
Proximity offset for North and East photodiodes
Proximity offset for South and West photodiodes
Reset
Value
0x00
0x01
Rev
ID
0x00
0x00
0x60
0x40
0xXX
0x00
0x00
0x00
0x00
0xFF
0xFF
0xXX
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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TMD2745 −
Register Description
Address Register Name
0x9F
0xE4
0xE5
0xE6
0xE7
CONFIG3
IFORCE
PICLEAR
VICLEAR
AICLEAR
R/W
R/W
Register Function
Configuration register three
R/W
R/W
R/W
Proximity interrupt clear
ALS interrupt clear
Clear all interrupts
Reset
Value
0x00
0x00
0x00
0x00
0x00
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TMD2745 −
Register Description
Enable Register (ENABLE 0x80)
The Enable Register is used to power the device ON/OFF, enable functions and interrupts.
Figure 27:
Enable Register
7
Reserved
6 5
PIEN
4
AIEN
3
WEN
2
PEN
1
AEN
0
PON
Field
Reserved
PIEN
AIEN
WEN
PEN
AEN
PON
Bits
7:6
5
2
1
4
3
0
Description
Reserved
. Bit must be set to 0.
Proximity Interrupt Enable.
When asserted, permits proximity interrupts to be generated, subject to the persist filter.
ALS Interrupt Enable.
When asserted, permits ALS interrupts to be generated, subject to the persistence filter setting.
Wait Enable.
This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the wait timer.
Proximity Enable.
This bit activates the proximity function. Writing a 1 enables proximity. Writing a 0 disables proximity.
ALS Enable.
This bit activates the ALS functionality (Ambient Light Sense).
Writing a 1 enables ALS. Writing a 0 disables ALS.
Power ON.
This bit activates the internal oscillator to permit the timers and
ADC channels to operate. Writing a 1 activates the oscillator. Writing a 0 disables the oscillator and puts the part into a low power sleep mode. During reads and writes over the I²C interface, this bit is temporarily overridden and the oscillator is enabled, independent of the state of PON.
Note(s):
1. Before enabling, Proximity, or ALS, all of the bits associated with control of the desired function must be set. Changing control register values while operating may result in invalid results.
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TMD2745 −
Register Description
ADC Integration Time Register (ATIME 0x81)
The ATIME Register controls the internal integration time of ALS analog to digital converters. Upon power up, the ADC integration time register is set to 0xFF.
The maximum count (or saturation) value can be calculated based upon the integration time and the size of the count register (i.e. 16 bits). For ALS, the maximum count will be the lesser of either:
•
65535 (based on the 16 bit register size) or
•
The result of equation:
Count
MAX
=
(1024 x CYCLES) - 1
Figure 28:
ADC Integration Time Register
7 6 5 4
ATIME
3 2 1 0
Field
ATIME
Bits
7:0
REGISTER VALUE
0xFF
0xF6
0xDB
= 256 –
2.78ms
0xC0
0x00
CYCLES
1
10
37
Description
….
64
256
TIME
2.78 ms
27.8 ms
103 ms
….
178 ms
712 ms
Max Count
1023
10239
37887
….
65535
65535
Note(s):
1. The ATIME register is only applicable to ALS engine (16-bit data). The integration time for the 8-bit Proximity engine, is a factor of four less than the nominal time (2.78ms), resulting in a fixed time of 0.696ms.
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TMD2745 −
Register Description
Wait Time Register (WTIME 0x83)
The WTIME controls the amount of time in a low power mode between Proximity and/or ALS cycles. It is set 2.78ms increments unless the WLONG bit is asserted in which case the wait times are 12× longer. Upon power up, the wait time register is set to 0xFF.
Figure 29:
Wait Time Register
7 6 5 4
WTIME
3 2 1 0
Field
WTIME
Bits
7:0
REGISTER
VALUE
0xFF
0xAB
= 256 –
2.78ms
0x00
WAIT TIME
1
85
….
256
Description
TIME
(WLONG=0)
2.78 ms
236 ms
….
712 ms
TIME
(WLONG=1)
0.03 s
2.84 s
….
8.54 s
Note(s):
1. The wait time register should be configured before AEN and/or PEN is asserted.
2. During any Proximity and/or ALS cycle, the wait state, depicted in the functional block diagram, is entered. For example, Proximity only, Proximity and ALS, or ALS only cycles always enter the WAIT state and are separated by the time defined by WTIME.
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TMD2745 −
Register Description
ALS Interrupt Threshold Registers (0x84 − 0x87)
ALS level detection uses data generated by the Visible Channel.
The ALS Interrupt Threshold registers provide 16-bit values to be used as the high and low thresholds for comparison to the
16-bit VISDATA values. If AIEN is enabled and VISDATA is not between AILT and AIHT for the number of consecutive samples specified in APERS an interrupt is asserted on the interrupt pin.
Figure 30:
ALS Interrupt Threshold Registers
Registers
AILTL
AILTH
AIHTL
AIHTH
Address
0x84
0x85
0x86
0x87
Bits
7:0
7:0
7:0
7:0
Description
ALS low threshold lower byte
ALS low threshold upper byte
ALS high threshold lower byte
ALS high threshold upper byte
Figure 31:
Proximity Interrupt Threshold Registers
Proximity Interrupt Threshold Registers (0x89,
0x8B)
The Proximity Interrupt Threshold Registers set the high and low trigger points for the comparison function which generates an interrupt. If PDATA, the value generated by proximity channel, crosses below the lower threshold specified or above the higher threshold while PIEN is set then an interrupt may be signaled to the host processor. Interrupt generation is subject to the value set in persistence filter (PPERS).
Registers
PILT
PIHT
Address
0x89
0x8B
Bits
7:0
7:0
Description
Proximity low threshold
Proximity high threshold
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TMD2745 −
Register Description
Interrupt Persistence Register (PERS 0x8C)
The Interrupt Persistence Register sets a value which is compared with the accumulated amount of ALS or Proximity cycles in which results were outside threshold values. Any
Proximity or ALS result that is inside threshold values resets the count. Separate counters are provided for proximity and ALS persistence detection.
Figure 32:
Interrupt Persistence Register
7 6 5
PPERS
Field
PPERS
4 3 2
APERS
1 0
Bits
7:4
Description
Proximity Interrupt Persistence.
Controls rate of proximity interrupt to the host processor.
FIELD VALUE PERSISTENCE
0000
0001
0010
….
1111
Every proximity cycle generates an interrupt
Any value outside of threshold range
2 consecutive values out of range
….
15 consecutive values out of range
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TMD2745 −
Register Description
Field
APERS
Bits
3:0
Description
ALS Interrupt Persistence.
Controls rate of Visible channel interrupt to the host processor.
FIELD VALUE
0000
PERSISTENCE
Every ALS cycle generates an interrupt
0001
0010
0011
0100
Any value outside of threshold range
2 consecutive values out of range
3 consecutive values out of range
5 consecutive values out of range
1001
1010
1011
1100
0101
0110
0111
1000
1101
1110
1111
10 consecutive values out of range
15 consecutive values out of range
20 consecutive values out of range
25 consecutive values out of range
30 consecutive values out of range
35 consecutive values out of range
40 consecutive values out of range
45 consecutive values out of range
50 consecutive values out of range
55 consecutive values out of range
60 consecutive values out of range
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TMD2745 −
Register Description
Configuration Register One (CONFIG1 0x8D)
The CONFIG1 Register sets the wait long time.
Figure 33:
Configuration Register One
7 6 5
Reserved
4 3 2 1
WLONG
0
Reserved
Field
Reserved
Reserved
Reserved
Reserved
Bits
7
6
WLONG 1
Reserved 0
5
4:2
Reserved.
Bits must be set to 0.
Reserved.
Bit must be set to 1.
Description
Reserved.
Bit must be set to 1.
Reserved.
Bits must be set to 0.
Wait Long Enable
. When asserted, the wait cycles are increased by a factor
12× from that programmed in the WTIME register.
Reserved.
Bits must be set to 0.
Note(s):
1. Bit 6 is reserved, and is automatically set to 1 at POR.
2. Bit 5 is reserved, and is automatically set to 1 at POR. If this bit is not set, power consumption will increase during wait states.
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TMD2745 −
Register Description
Proximity Pulse Count and Length Register
(PPULSE 0x8E)
The Proximity Pulse Count Register sets Pulse Width modified current during a Proximity Pulse. The proximity pulse count register bits set the number of pulses to be output on the LDR pin. The Proximity Length register bits set the amount of time the LDR pin is sinking current during a proximity pulse.
Figure 34:
Proximity Pulse Count and Length Register
7 6 5 4 3 2 1 0
PPLEN PPULSE
Field
PPLEN
PPULSE
Bits
7:6
5:0
Description
Proximity Pulse Length.
Sets the LED-ON pulse width during a Proximity
LDR Pulse.
FIELD VALUE
00
LED ON
4μs
01
10
8μs
16μs
11 32μs
Proximity Pulse Count.
Specifies the number of Proximity pulses to be generated on LDR. Number of pulses is set by PPULSE value plus 1.
Note(s):
1. The time described by PPLEN is the actual signal integration time. The LED will be activated slightly longer (typically 1.36 μs) than the integration time.
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TMD2745 −
Register Description
Control Register (CONTROL 0x8F)
Figure 35:
Control Register
7 6
LDRIVE
Field
LDRIVE
RPINS
RINTPOL
PGAIN
AGAIN
5
RPINS
4
RINTPOL
3
PGAIN
2 1
AGAIN
0
5
4
Bits
7:6
3:2
1:0
Description
LED Drive Strength
(Proximity, Pattern Burst Modes)
FIELD VALUE LED Strength
00
01
100% (100mA typical)
50%
10
11
25%
12.5%
LDR signal to INT
. Enabling this bit transfers pattern burst output from the
LDR pin to the INT pin. While set, the LDR pin is deactivated.
INT Pin Polarity.
With RPINS set, enabling this bit inverts the bit pattern output of the INT pin.
Proximity Gain Control
.
FIELD VALUE
00
01
10
11
ALS Gain Control
.
FIELD VALUE
00
01
10
11
Proximity GAIN VALUE
1x Gain
2x Gain
4x Gain
8x Gain
ALS GAIN VALUE
1x Gain
4x Gain
16x Gain
64x Gain
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TMD2745 −
Register Description
Figure 36:
Configuration Register Two
7
PSIEN
6
VPSIEN
5
LEDBOOST
4
Configuration Register Two (CONFIG2 0x90)
The Configuration Register Two independently enables or disables the saturation interrupts for Proximity and Visible channel. Saturation Interrupts are cleared by accessing the
Clear Interrupt registers at 0xE5, 0xE6 and 0xE7. The LEDBOOST bits allow the LDR pin to sink more current above the maximum setting by LDRIVE.
3
Reserved
2
Reserved
1
Reserved
0
Reserved
Field
PSIEN
VPSIEN
LEDBOOST
Reserved
Reserved
Reserved
Reserved
Bits
7
6
5:4
3
2
1
0
Description
Proximity Saturation Interrupt Enable.
0 = Proximity Saturation Interrupt disabled
1 = Proximity Saturation Interrupt enabled
Visible Photodiode Saturation Interrupt Enable.
0 = ALS Saturation Interrupt disabled
1 = ALS Saturation Interrupt enabled
LED Boost.
Provides additional LDR current during LED pulses. Current value, set by LDRIVE, is increased by the percentage of LEDBOOST.
FIELD VALUE
00
01
10
LED ON
100%
150%
200%
300% 11
Reserved.
Bit must be set to 0.
Reserved.
Bit must be set to 0.
Reserved.
Bit must be set to 0.
Reserved.
Bit must be set to 1 and is set high by default during POR.
Note(s):
1. A LEDBOOST value of 00 results in 100% of the current as set by LDRIVE (i.e. No additional current).
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TMD2745 −
Register Description
Revision ID Register (REVID 0x91)
The read-only ID Register provides the die revision level.
Figure 37:
Revision Identification Register
7 6 5
Field
RevID
4
RevID
3 2
Bits
7:0
Description
Revision Identification = 00100100
1 0
ID Register (ID 0x92)
The read-only ID Register provides the device identification.
Figure 38:
Device Identification Register
7 6 5 4 3 2
ID
Field Bits
ID 7:2
VID 1:0
Description
Device Identification = 000011
I²C Bus Voltage (V
BUS
= V
DD
: 00, V
BUS
= 1.8V : 10)
1
VID
0
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TMD2745 −
Register Description
Status Register (STATUS 0x93)
The read-only Status Register provides the status of the device.
Figure 39:
Status Register
7
VPSAT
6
PSAT
Field
VPSAT
PSAT
PINT
AINT
Reserved
PVALID
AVALID
5
PINT
4
AINT
3
Reserved
2 1
PVALID
0
AVALID
5
4
3:2
1
Bits
7
6
0
Description
Visible Photodiode Saturation.
Assertion indicates that the analog sensor signal reached the upper end of its dynamic range. The bit can be de-asserted by sending a Visible channel interrupt command (0xE6 VICLEAR) or by disabling the ADC (AEN=0). This bit triggers an interrupt if VPSIEN is set.
Proximity Saturation.
Assertion indicates that an analog saturation event occurred during a previous proximity cycle. Once set, this bit remains set until cleared by the clear proximity interrupt command (0xE5 PICLEAR) or by disabling Proximity (PEN=0). This bit triggers an interrupt if PSIEN is set.
Proximity Interrupt.
This bit triggers an interrupt if PIEN in ENABLE is set.
ALS Interrupt.
This bit triggers an interrupt if AIEN in ENABLE is set.
Reserved.
Proximity Valid.
Indicates that a proximity cycle has completed since PEN was asserted or since PDATA was last read. A read of PDATA automatically clears PVALID.
ALS Valid.
Indicates that an ALS cycle has completed since AEN was asserted or since a read from any of the ALS data registers.
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TMD2745 −
Register Description
ALS Data Registers (0x94 − 0x97)
Visible and reference data is stored as 16-bit values. The read sequence must read byte pairs (low followed by high) starting on an even address boundary (0x94 or 0x96) inside the ALS Data
Register block. When the lower byte register is read, the upper eight bits are stored into a shadow register, which is read by a subsequent read to the upper byte. The upper register will read the correct value even if additional ADC integration cycles end between the reading of the lower and upper registers.
Figure 40:
ALS Data Registers
Registers
VISDATAL
VISDATAH
REFDATAL
REFDATAH
Address
0x94
0x95
0x96
0x97
Bits
7:0
7:0
7:0
7:0
Description
Visible data low byte
Visible data high byte
Reference data low byte
Reference data high byte
Note(s):
1. When reading register contents, a read of the lower byte data automatically latches the corresponding higher byte data (16 bit latch). This feature guarantees that the high byte value has not been updated by the ADC between I²C reads. In addition, reading
VISDATAL register not only latches VISDATAH but also latches all four ALS register simultaneously (32 bit latch).
Proximity Data Registers (PDATA 0x9C)
Proximity data is stored as an 8-bit value.
Figure 41:
Proximity Data Registers
7 6 5
Registers
PDATA
Address
0x9C
4
PDATA
3
Bits
7:0
2 1
Description
Proximity data byte
0
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TMD2745 −
Register Description
Proximity North/East Offset
(POFFSET_NE 0x9D)
In Proximity mode, the North and East photodiodes are connected forming a diode pair. The POFFSET_NE is an 8-bit value used to scale an internal offset correction factor to compensate for crosstalk in the application. This value is encoded in sign/magnitude format.
Figure 42:
Proximity North/East Offset
7 6 5
Field
POFFSET_NE
Bits
7:0
4
POFFSET_NE
3 2 1
FIELD VALUE
01111111
….
00000001
00000000
10000001
10000010
….
11111111
Description
Offset Correction Factor
127
….
1
0
-1
-2
….
-127
0
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TMD2745 −
Register Description
Proximity South/West Offset
(POFFSET_SW 0x9E)
In Proximity mode, the South and West photodiodes are connected forming a diode pair. The POFFSET_SW is an 8-bit value used to scale an internal offset correction factor to compensate for crosstalk in the application. This value is encoded in sign/magnitude format.
Figure 43:
Proximity South/West Offset Register
7 6 5 4
POFFSET_SW
3 2 1 0
Field
POFFSET_SW
Bits
7:0
FIELD VALUE
01111111
….
00000001
00000000
10000001
10000010
….
11111111
Description
Offset Correction Factor
127
….
1
0
-1
-2
….
-127
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TMD2745 −
Register Description
Configuration Three Register (CONFIG3 0x9F)
The CONFIG3 register is used to select which photodiodes are used for proximity. Two photodiodes are paired to provide signal. In proximity mode, North and East photodiodes are connected forming a diode pair; similarly the South and West photodiodes form a diode pair.
Figure 44:
Configuration Three Register
7
Reserved
6 5
PCMP
Field
Reserved
PCMP
SAI
PMSK_N
PMSK_S
PMSK_W
PMSK_E
4
SAI
3
PMSK_N
2
PMSK_S
1
PMSK_W
0
PMSK_E
1
0
3
2
Bits
7:6
5
4
Description
Reserved.
Bits must be set to 0.
Proximity Gain Compensation Enable.
This bit provides gain compensation when proximity photodiode signal is reduced as a result of sensor masking. If only one diode of the diode pair is contributing, then only half of the signal is available at the ADC; this results in a maximum ADC value of 127. Enabling PCMP enables an additional gain of 2x, resulting in a maximum ADC value of 255.
PMSK_X
(N, S, E, W)
0,1,1,1
1,0,1,1
1,1,0,1
1,1,1,0
0,1,0,1
1,0,1,0
All Others
PCMP
1
1
0
1
1
1
1
Sleep After Interrupt.
When enabled, the device will automatically enter low power mode when the INT pin is asserted and the state machine has progressed to the SAI decision block (Refer to
is resumed when INT pin is cleared over I²C.
Proximity Mask North Enable.
Writing a 1 disables this photodiode.
Proximity Mask South Enable.
Writing a 1 disables this photodiode.
Proximity Mask West Enable.
Writing a 1 disables this photodiode.
Proximity Mask East Enable.
Writing a 1 disables this photodiode.
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Figure 45:
Clear Interrupt Registers
Registers
IFORCE
PICLEAR
VICLEAR
AICLEAR
Address
0xE4
0xE5
0xE6
0xE7
TMD2745 −
Register Description
Clear Interrupt Registers (0xE4 - 0xE7)
Interrupts are cleared by read or write access to the appropriate register. IFORCE is used to manually assert the INT pin.
Bits
7:0
7:0
7:0
7:0
Description
Forces an interrupt
Proximity interrupt clear
ALS interrupt clear
Clears all interrupts
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TMD2745 −
Applications Information
Applications Information
Power Supply Considerations
Systems using Proximity detection are capable of driving the integrated LED with as much as 300mA of pulsed current; however typical systems require much lower settings of 100mA or less. As a result of the rapidly switching current on LDR pin, a few design considerations must be kept in mind to get the best performance. The key goal is to reduce the power supply noise coupled back into the device during the LED pulses.
Systems where battery voltage does not exceed the maximum specified LDR pin voltage (including battery recharge conditions), the LEDA may be directly connected to the battery.
This is beneficial because noise generated by LED pulsing is not couple into the supply of the optical device. Another advantage for this configuration, depending on system design, may be a reduction or removal of additional bulk capacitance connected to LEDA.
In many systems, there is a quiet analog supply and a noisy digital supply. By connecting the quiet supply to the V
DD
pin and the noisy supply to the LED, the key goal can be meet.
Place a 1μF low-ESR decoupling capacitor as close as possible to the V
DD
pin and another at the LEDA pin, along with a bulk storage capacitor, 4.7μF or larger, (as needed) somewhere along the trace to supply surge currents when the LED is pulsed.
If operating from a single supply, use a 22 Ω resistor in series with the V
DD
supply line and a 1μF low ESR capacitor to filter any power supply noise. The previous capacitor placement recommendations apply.
Figure 46:
Typical Application Hardware Circuit for Dual Power Supplies
Voltage
Regulator
C
Voltage
Regulator
>4.7μF 1μF
1μF
V
BUS
VDD
GND
LEDA
LEDK
LDR
TMD2745
SCL
SDA
INT
R
P
R
P
R
PI
ams Datasheet
[v1-02] 2017-Nov-06
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TMD2745 −
Applications Information
Figure 47:
Typical Application Hardware Circuit for Single Power Supply
Voltage
Regulator
>4.7μF
22Ω
1μF
1μF
V
BUS
VDD
GND
LEDA
LEDK
LDR
TMD2745
SCL
SDA
INT
R
P
R
P
R
PI
Communications Considerations
VBUS in the above figures refers to the I²C bus voltage. Separate part numbers are assigned to each of the
I²C VBUS options: VBUS = V
DD
, or VBUS=1.8 V.
The I²C signals and the Interrupt are open-drain outputs and require pull−up resistors. The pull-up resistor (RP) value is a function of the I²C bus speed, the I²C bus voltage, and the capacitive load. For example,
ams
EVM hardware communicates at 400 kbps and uses 2.2 kΩ pull-up resistors.
The
ams
EVM hardware uses a 10 kΩ pull-up resistor (RPI) on interrupt pin.
LED Drive Considerations
The LEDK pin, LED cathode, is connected to the LDR pin which functions as a regulated current sink. When selecting the power supply for the LED, that is, the voltage placed on the LEDA pin, it is important to choose a supply capable of supplying a sufficient amount of current and voltage. LEDA voltage must be larger than the sum of the LED forward voltage drop and the voltage on the LDR current sink regulator.
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TMD2745 −
Package Drawings & Markings
Package Drawings & Markings
Figure 48:
Package Mechanical Drawing
&/
/('$3(5785( 5
3,1,1',&$725
&/
/('&/ 72352;&/
$
3$57&/ 72$/6&/
352;&/ 723$57&/
%
RoHS
Green
0
;
& $ %
;
0
&/
& $ %
&
;
&/
;
;
;
'(9,&(3,1287
%277209,(:
Note(s):
1. All linear dimensions are in millimeters.
2. Dimension tolerance is ± 0.05mm unless otherwise noted.
3. Contact finish is Ni/Au.
4. This package contains no lead (Pb).
5. This drawing is subject to change without notice.
ams Datasheet
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PCB Pad Layout
Figure 49:
Recommended PCB Pad Layout
TMD2745 −
PCB Pad Layout
Suggested PCB pad layout guidelines for the surface mount module are shown. Flash Gold is recommended as a surface finish for the landing pads.
;
3&%3$'/$<287
;
&/
;
;
&/
Note(s):
1. All linear dimensions are in millimeters.
2. Dimension tolerances are ±0.05mm unless otherwise noted.
3. This drawing is subject to change without notice.
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TMD2745 −
Packaging Mechanical Data
Packaging Mechanical Data
Figure 50:
Tape & Reel Mechanical Drawing
Note(s):
1. All linear dimensions are in millimeters. Dimension tolerance is ±0.10mm unless otherwise noted.
2. The dimensions on this drawing are for illustrative purposes only. Dimensions of an actual carrier may vary slightly.
3. Symbols on drawing A o
, B o
, and K o
are defined in ANSI EIA Standard 481−B 2001.
4. Each reel is 330 millimeters in diameter and contains 5000 parts.
5.
ams
packaging tape and reel conform to the requirements of EIA Standard 481−B.
6. In accordance with EIA standard, device pin 1 is located next to the sprocket holes in the tape.
7. This drawing is subject to change without notice.
ams Datasheet
[v1-02] 2017-Nov-06
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TMD2745 −
Soldering & Storage Information
Soldering & Storage
Information
Figure 51:
Soldering Profile
Parameter
Average temperature gradient in preheating
Soak time
Time above 217 ºC (T
1
)
Time above 230 ºC (T
2
)
Time above T peak
- 10 ºC (T
3
)
Peak temperature in reflow
Temperature gradient in cooling
Soldering Information
The module has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate.
The solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a PCB. Temperature is measured on top of component. The components should be limited to a maximum of three passes through this solder reflow profile.
Reference
t soak t
1 t
2 t
3
T peak
Device
2.5 ºC/s
2 to 3 minutes
Max 60 s
Max 50 s
Max 10 s
260 ºC
Max -5 ºC/s
Figure 52:
Soldering Reflow Profile Graph
Not to scale — for reference o
T peak
T
3
T
2
T
1
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Time (s) t soak t
3 t
2 t
1 ams Datasheet
[v1-02] 2017-Nov-06
TMD2745 −
Soldering & Storage Information
Storage Information
Moisture Sensitivity
Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package.
To ensure the package contains the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping. Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use.
Shelf Life
The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on the bag when stored under the following conditions:
•
Shelf Life: 12 months
•
Ambient Temperature: < 40
°
C
•
Relative Humidity: < 90%
Rebaking of the devices will be required if the devices exceed the 12 month shelf life or the Humidity Indicator Card shows that the devices were exposed to conditions beyond the allowable moisture region.
Floor Life
The module has been assigned a moisture sensitivity level of
MSL 3. As a result, the floor life of devices removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices are stored under the following conditions:
•
Floor Life: 168 hours
•
Ambient Temperature: < 30°C
•
Relative Humidity: < 60%
If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior to solder reflow or dry packing.
Rebaking Instructions
When the shelf life or floor life limits have been exceeded, rebake at 50
°
C for 12 hours.
ams Datasheet
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TMD2745 −
Ordering & Contac t Information
Ordering & Contact Information
Figure 53:
Ordering Information
Ordering Code Address
TMD27453 0x39
Interface
I²C V
BUS
= 1.8V Interface
Delivery Form Delivery Quantity
Tape & Reel 5000 pcs/reel
Buy our products or get free samples online at: www.ams.com/ICdirect
Technical Support is available at: www.ams.com/Technical-Support
Provide feedback about this document at: www.ams.com/Document-Feedback
For further information and requests, e-mail us at: [email protected]
For sales offices, distributors and representatives, please visit: www.ams.com/contact
Headquarters
ams AG
Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe
Tel: +43 (0) 3136 500 0
Website: www.ams.com
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TMD2745 −
RoHS Compliant & ams Green Statement
RoHS Compliant & ams Green
Statement
RoHS:
The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes.
ams Green (RoHS compliant and no Sb/Br):
ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants
(Br or Sb do not exceed 0.1% by weight in homogeneous material).
Important Information:
The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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Copyrights & Disclaimer
TMD2745 −
Copyrights & Disclaimer
Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,
Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of
Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed.
ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services.
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TMD2745 −
Document Status
Document Status
Document Status
Product Preview
Preliminary Datasheet
Datasheet
Datasheet (discontinued)
Product Status
Pre-Development
Pre-Production
Production
Discontinued
Definition
Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice
Information in this datasheet is based on products in the design, validation or qualification phase of development.
The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice
Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of
Trade
Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of
Trade, but these products have been superseded and should not be used for new designs
ams Datasheet
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TMD2745 −
Revision Information
Revision Information
Changes from 1-00 (2017-Jan-16) to current revision 1-02 (2017-Nov-06)
1-00 (2017-Jan-16) to 1-01 (2017-Aug-28)
Updated Figure 48 and notes under it
1-01 (2017-Aug-28) to 1-02 (2017-Nov-06)
Updated notes below Figure 48
Note(s):
1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
2. Correction of typographical errors is not explicitly mentioned.
Page
45
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TMD2745 −
Content Guide
Content Guide
ams Datasheet
[v1-02] 2017-Nov-06
1 General Description
4 Pin Assignment
5 Absolute Maximum Ratings
6 Electrical Characteristics
10 Timing Characteristics
11 Typical Operating Characteristics
14 I²C Protocol
15 Detailed Description
16 Sleep After Interrupt Operation
20 Ambient Light Sense Operation
24 Register Description
26 Enable Register (ENABLE 0x80)
27 ADC Integration Time Register (ATIME 0x81)
28 Wait Time Register (WTIME 0x83)
29 ALS Interrupt Threshold Registers (0x84 − 0x87)
29 Proximity Interrupt Threshold Registers (0x89, 0x8B)
30 Interrupt Persistence Register (PERS 0x8C)
32 Configuration Register One (CONFIG1 0x8D)
33 Proximity Pulse Count and Length Register
34 Control Register (CONTROL 0x8F)
35 Configuration Register Two (CONFIG2 0x90)
36 Revision ID Register (REVID 0x91)
37 Status Register (STATUS 0x93)
38 ALS Data Registers (0x94 − 0x97)
38 Proximity Data Registers (PDATA 0x9C)
39 Proximity North/East Offset
40 Proximity South/West Offset
41 Configuration Three Register (CONFIG3 0x9F)
42 Clear Interrupt Registers (0xE4 - 0xE7)
43 Applications Information
43 Power Supply Considerations
44 Communications Considerations
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TMD2745 −
Content Guide
45 Package Drawings & Markings
46 PCB Pad Layout
47 Packaging Mechanical Data
48 Soldering & Storage Information
49 Moisture Sensitivity
50 Ordering & Contact Information
51 RoHS Compliant & ams Green Statement
52 Copyrights & Disclaimer
53 Document Status
54 Revision Information
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