Raven 61616-660-232 Analog Orderwire Quick Reference Manual

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Raven 61616-660-232 Analog Orderwire Quick Reference Manual | Manualzz

Raven Electronics Corporation

Raven 41616-660-232

Analog Orderwire

41610-660 shown

Users Manual

© 2003 Raven Electronics Corporation. All rights reserved. Rev. 01

2.

2.1.

1.

416 SERIES ORDER WIRE REVISION A

DATE 17 NOV 05

-660/232 SYSTEM DESCRIPTION, ISSUE 01 APPROVED

REFERENCES

416 Series Order Wire Technical System Description

0416-4660/232 Wiring Diagram

DESCRIPTION

The -660 System configuration has a 41685-01 6-Way/4-Wire Bridge in the transmit and receive paths of the basic 416 Series Order Wire. This configuration provides five 4-Wire ports for "repeater" interface. The -660 System has balanced transmit and receive ports.

2.2. The 41685-01 6W/4W Active Bridge is an active conference bridge with 25 dB of through path adjustment available. Amplifiers with potentiometer level adjustment are provided on each input and output for easy level coordination between ports. Transformer coupled inputs and outputs provide DC isolation as well as excellent common-mode rejection.

2.3. The Orderwire includes a separate 42286 RS-232 conference bridge module. Since an input on any leg appears on the output of the other legs this bridge must be used where the RS-232 communications will only have one input active at any one time. The user will understand that given the nature of the RS-

232 signals there can only be one active path at any one time. This concept lends nicely to a polled signal application.

3.

3.1.

SIGNAL FLOW

The signal flow through the 41651 Transmit and 41650 Receive modules is described by the 416 Series

Order Wire Technical System Description.

3.2.1. The output of the 41651 Transmit module (XMT test jacks) is routed to the LEG 1 input of the 6W/4W

Bridge. The LEG 1 input on the Bridge is coupled through to the output of LEGs 2, 3, 4, 5 and 6. LEG

2 OUT connects to D1 and D2 on the rear panel. LEG 3 OUT connects to D3 and D4 on the rear panel.

LEG 4 OUT connects to D5 and D6 of the rear panel. LEG 5 OUT connects to D7 and D8 on the rear panel. LEG 6 OUT connects to D9 and D10 of the rear panel.

3.2.2.

3.2.3.

LEG 2 OUT includes inputs from LEG 3 IN, LEG 4 IN, LEG 5 IN and LEG 6 IN, as well as from the

41651 Transmit.

LEG 3 OUT includes inputs from LEG 2 IN, LEG 4 IN, LEG 5 IN and LEG 6 IN, as well as from the

41651 Transmit.

3.2.4. LEG 4 OUT includes inputs from LEG 2 IN, LEG 3 IN, LEG 5 IN and LEG 6 IN, as well as from the

41651 Transmit.

3.2.5. LEG 5 OUT includes inputs from LEG 2 IN, LEG 3 IN, LEG 4 IN and LEG 6 IN, as well as from the

41651 Transmit.

Page 1 of 5

416 SERIES ORDER WIRE

-660/232 SYSTEM DESCRIPTION, ISSUE 01

3.2.6. LEG 6 OUT includes inputs from LEG 2 IN, LEG 3 IN, LEG 4 IN and LEG 5 IN, as well as from the

41651 Transmit

3.3.1.

3.3.2.

Inputs on LEG 2 IN (C1 and C2), LEG 3 IN (C3 and C4), LEG 4 IN (C5 and C6), LEG 5 IN (C7 and

C8) and LEG 6 IN (C9 and C10) go to the 6W/4W Bridge. The Bridge combines these inputs into the

LEG 1 OUT. The LEG 1 OUT connects to the input of the 41650 Receive (RCV test jack).

The inputs to the 6W/4W Bridge (LEG 2 IN, LEG 3 IN, LEG 4 IN, LEG 5 IN and LEG 6 IN) are also routed to other outputs as mentioned by section 3.2.2. through 3.2.6.

3.4.1. An input on TXD1 appears on RXD2, RXD3, RXD4, RXD5 and RXD6 outputs, but not on RXD1 output. An input on DTR1 appears on DSR2, DSR3, DSR4, DSR5 and DSR6 outputs, but not on

DSR1 output. An input on RTS1 appears on CTS2, CTS3, CTS4, CTS5 and CTS6 outputs, but not on

CTS1 output.

3.4.2.

4.

4.1.

The other bridge inputs appear on all other section outputs but not its own.

INSTALLATION

NOTE:

Refer to Table B and wiring diagram 0416-4660/232 for required rear panel terminal block connections for System operation.

4.2.

5.1.

RS-232 signals are connected to the bridge through rear panel terminal strips. The recommended wire size for signals is 24 AWG.

5. ALIGNMENT

Alignment of the Order Wire has been performed at the factory. Upon installation the levels should be verified and adjusted as required. Attachment A lists all levels, impedances, etc. for the -660/232

System configuration.

Caution must be exercised during level alignment to insure that proper test levels and impedances are maintained.

A signal generator may double terminate a port causing a reduced signal level. When injecting a test tone into a port, bridge the port with an AC voltmeter and set the signal generator output according to the AC voltmeter reading.

Page 2 of 5

416 SERIES ORDER WIRE

-660/232 SYSTEM DESCRIPTION, ISSUE 01

When taking output level readings, the AC voltmeter will be either terminated or bridging. When it is unknown if an output reading should be a terminated or bridged measurement, compare the two readings. If a 3.5 dBm difference is noted, the bridged measurement is correct. If a 6 dBm difference is noted, the terminated measurement is correct.

On System configurations with unbalanced (single-ended) input and output ports, the white test point is the signal lead and the black test point is ground for ports with corresponding test jacks on the front panel.

5.2. POWER

5.2.1. Connect a DC voltmeter to the TP1 and GND test points on the 41620 Power Supply. Turn power on and read -20.0 VDC. Adjust R15 on the 41620 module, if required.

5.3.

5.3.1.

5.3.2.

VF TRANSMIT LEVEL

Insert a 1 KHz test tone from a signal generator into the TEST TONE jacks at a level of –16 dBm.

Connect an AC voltmeter (bridging) to the XMT jacks. Read the level specified by Attachment A.

Adjust R58 (coarse) or R59 (fine) on the 41651 Transmit, if required.

5.4.

5.4.1.

DATA TRANSMIT LEVEL

Insert a 1 KHz test tone from a signal generator into the EXT XMT IN jacks. Set the signal generator level as specified by Attachment A.

5.4.2. Connect an AC voltmeter (bridging) to the XMT jacks. Read the level specified by Attachment A.

Adjust R65 on the 41651 Transmit, if required.

5.5.

5.5.1.

5.5.2.

TRANSMIT SIGNALING LEVEL

Connect an AC voltmeter (bridging) to the XMT jacks.

For E & M Systems, go OFF hook and depress the CALL button. Read the level specified by

Attachment A. Adjust R35 (coarse) or R36 (fine) on the 41651 Transmit, if required.

5.5.3. For DTMF Systems, go OFF hook and select digit "1" on the keyboard. Read the level specified by

Attachment A. Adjust R8 on the 416-111 Front Motherboard, if required.

5.6.

5.6.1.

VF RECEIVE LEVEL

Insert a 1 KHz test tone from a signal generator into the RCV jacks. Set the signal generator level specified by Attachment A.

Page 3 of 5

416 SERIES ORDER WIRE

-660/232 SYSTEM DESCRIPTION, ISSUE 01

5.6.2. Connect an AC voltmeter (terminate with 600

Adjust R40 on the 41650 Receive, if required.

Ω ) to the 4W OUT jacks. Read a level of +7 dBm.

5.7.

5.7.1.

DATA RECEIVE LEVEL

Insert a 1 KHz test tone from a signal generator into the RCV jacks. Set the level as specified by

Attachment A.

5.7.2. Connect an AC voltmeter (terminate if required) to the EXT RCV OUT jacks. Read the level specified by Attachment A. Adjust R43 on the 41650 Receive, if required.

5.8.

5.8.1.

6W/4W BRIDGE LEVELS

Turn power OFF. Remove the 41685-01 6W/4W Active Bridge module and insert a 42067 Extender

Card into the module position. Insert the 41685-01 6W/4W Active Bridge into the Extender Card.

Turn power ON.

5.8.2. Connect a signal generator to the TEST TONE jacks. Set the signal generator frequency to 1KHz. Set the signal generator level to –16 dBm. Connect the AC voltmeter (terminate if required) to pins F and

H (LEG 2 OUT) of the Extender Card. Read the level specified by Attachment A. Adjust R2 on the

41685-01 Bridge, if required.

5.8.3. Connect the AC voltmeter (terminate if required) to pins K and L (LEG 3 OUT). Read the level specified by Attachment A. Adjust R3 on the 41685-01 Bridge, if required.

5.8.4. Connect the AC voltmeter (terminate if required) to pins M and N (LEG 4 OUT). Read the level specified by Attachment A. Adjust R4 on the 41685-01 Bridge, if required.

5.8.5. Connect the AC voltmeter (terminate if required) to pins R and S (LEG 5 OUT). Read the level specified by Attachment A. Adjust R5 on the 41685-01 Bridge, if required.

5.8.6. Connect the AC voltmeter (terminate if required) to pins T and U (LEG 6 OUT). Read the level specified by Attachment A. Adjust R6 on the 41685-01 Bridge, if required.

5.8.7. Connect the signal generator to pins 19 and 20 (LEG 2 IN). Set the signal generator frequency to

1KHz. Set the signal generator level as specified by Attachment A.

5.8.8. With the AC voltmeter still connected to pins T and U, read the same level as in step 5.8.6. Adjust R8 on the 41685-01 Bridge, if required.

5.8.9. Connect the AC voltmeter (bridging) to the RCV jacks. Read the level specified by Attachment A.

Adjust R1 on the 41685-01 Bridge, if required.

Page 4 of 5

416 SERIES ORDER WIRE

-660/232 SYSTEM DESCRIPTION, ISSUE 01

5.8.10. Connect the signal generator to pins 16 and 17 (LEG 3 IN). Set the signal generator level as specified by Attachment A. Read a level on the AC voltmeter as in step 5.8.9. Adjust R9 on the 41685-01

Bridge, if required.

5.8.11. Connect the signal generator to pins 14 and 15 (LEG 4 IN). Set the signal generator level as specified by Attachment A. Read a level on the AC voltmeter as in step 5.8.9. Adjust R10 on the 41685-01

Bridge, if required.

5.8.12. Connect the signal generator to pins 11 and 12 (LEG 5 IN). Set the signal generator level as specified by Attachment A. Read a level on the AC voltmeter as in step 5.8.9. Adjust R11 on the 41685-01

Bridge, if required.

5.8.13. Connect the signal generator to pins 9 and 10 (LEG 6 IN). Set the signal generator level as specified by

Attachment A. Read a level on the AC voltmeter as in step 5.8.9. Adjust R12 on the 41685-01 Bridge, if required.

5.9.1. There are no adjustments on the 42286 Bridge module for the RS-232 signals.

This concludes the alignment procedure.

Page 5 of 5

41620 REGULATED POWER SUPPLY REVISION A

DATE 4 JUN 08

UNIT DESCRIPTION, ISSUE 08 P3 APPROVED

1.

REFERENCES

1416-1202 Regulated Power Supply Schematic

4.

2.

GENERAL

The Raven 41620 Regulated Power Supply provides a regulated -20 Volt DC (@ 1.2A max.) output from an unregulated supply.

The 41620 has two input power options available. The 41620-01 regulates an input voltage ranging from -24 to –56 VDC. The 41620-02 provides a regulated output from either a 110 VAC or a 220VAC

(50/60Hz) source.

The 41620 provides foldback current limiting at an output current of approximately 1.2 amperes. The

41620 can be modified at the factory to increase the maximum output current if required. Included on the 41620 is an ON/OFF power switch and a fuse in series with the input. The output is factory set at

–20 VDC but is adjustable from –18 VDC to –24 VDC.

3.

SPECIFICATIONS

Option -01

Option -02

Output Voltage

-24 VDC TO –56 VDC

110 VAC or 220 VAC (50/60 Hz)

-20 VDC regulated

-18 VDC to –24 VDC adjustment range

Output Current 1 ampere @ -20 VDC foldback current limiting occurs @ approximately 1.2A

Output Voltage Ripple ≤ 75 mv (full load)

THEORY OF OPERATION

Power input to the 41620 is derived from either a -24 to –56 VDC source in the 41620-01 version or from a 110VAC or 220VAC 50/60Hz source in the 41620-02 version.

4.1. 41620-01 DC OPTION

The DC input voltage is applied between pins R, S, (optionally pin D or pin N) and Ground (pin B) through CR8, fuse F1, power switch S1 and the "DC" strap. The input voltage is then applied to the emitter of the series pass transistor Q1 via R9.

Page 1 of 2

41620 REGULATED POWER SUPPLY

UNIT DESCRIPTION, ISSUE 08 P3

4.2. 41620-02 AC OPTION

The AC input is applied to pins U and W with the external ground connected to pin Y or Z. The input voltage completes the circuit through "AC" strap, fuse F1 and power switch S1 to the primary of transformer T1. T1 steps down the incoming 110 VAC or 220 VAC to a nominal 32 VAC.

The 32 VAC is full wave rectified by the silicon bridge rectifier CR1. Capacitor C1 helps eliminate the ripple component on the unregulated DC. The unregulated DC is applied to the emitter of the series pass transistor Q1 via R9.

U1 is a 723 Integrated Circuit voltage regulator which provides a regulated output to the base of transistor Q2. Q2 provides the current drive to the base of the series pass transistor Q1.

Resistors R11 and R12 form a voltage divider that is referenced to the –20 V regulated output and driven by the "Voltage Reference Output" of the 723. This combination provides a voltage that is fixed in reference to the –20 V regulated output. This voltage drives the "Inverting Input" of the 723. The voltage for the "Non-inverting Input" of the 723 is determined by the setting of R15 in combination with R13 and R14. R15 is used to adjust the –20 V regulated output, which can be monitored at TP1.

Both R15 and TP1 are near the switch at the front of the board for easy access.

4.5.

R9, R1, R2, and Q4 comprise a current sensing circuit and determine when foldback occurs. R5 and

R6 provide a reference voltage to the inverting input of comparator U2.

A –16 VDC supply is derived from the input voltage via R8, CR2, and C3 to power comparator U2.

R3, R4, and CR4 provide a secondary reference voltage to the inverting input of comparator U2.

These components insure control over the foldback circuitry even when the regulated output voltage drops to 0.

When the output current exceeds 1.2A, transistor Q4 will turn on, causing the output of comparator U2 to switch. This turns transistor Q3 on which turns transistor Q2 off and limits current flow through the series pass transistor Q1. Diode CR5 protects the output of the 723 regulator when foldback occurs.

CR7 is a "Power On" LED indicator. This LED will be illuminated when the 41620 is turned ON and the regulated output voltage is present.

Page 2 of 2

41632 DTMF ADDRESS DECODER REVISION A

DATE 6 FEB 07

UNIT DESCRIPTION, ISSUE 08 P1 APPROVED

1.

REFERENCES

1416-1320 DTMF Address Decoder Schematic

2.

GENERAL

2.1. The Raven 41632 DTMF Address Decoder provides 2 of 7 or 2 of 8 DTMF tone detection for one, two, three, or four digit addressing. For call decoding, digit selection is performed by setting DIP switches

(up to four) to respond to the desired digits. A strap selectable interdigit timeout sets the allowable delay time between correct digits. To prevent loading of the receive line, the input to the 41632 module is a balanced high impedance input.

2.2. Two Correct Address outputs are provided. One Correct Address output resets after a strap selectable time period (interdigit/ring-time timeout) or an external reset (“*” or “#”). The second Correct Address output can only be reset by an external reset, or optionally, the DTMF ALL CLEAR (#).

2.3. The DTMF ALL CLEAR (#) and ALL CALL (*) tone pairs have outputs provided. The ALL CALL can be used in two ways. (1) Selecting an ALL CALL tone pair for more than one second allows the

ALL CALL output to go active for the duration of the tone. (2) Selecting an ALL CALL tone pair for less than one second allows the ALL CALL (*) tone to be a generic digit. This allows for group call capabilities (i.e. addresses 121, 122, 123, and 124 would be considered correct addresses when the

41632 module receives the tone sequence 1-2-*).

3.

SPECIFICATIONS

Power

Environmental

Operating Temperature

Storage Temperature

Relative Humidity

-20VDC @ 50mA max.

0° to 50°C

-20° to +85°C

0 to 95%, non-condensing

Impedance

DTMF Detect Level

Minimum Tone Duration

Signal-to-Noise Ratio

Reset Input

100K Ω @ 1KHz

-25dBm minimum to +6dBm maximum

40mSec.

12dB minimum

Active Ground

Detector Bandwidth

Allowable Twist

Inter-digit pause detect time

Signal Level Range

± 1.5%

± 10dB

40mSec.

-23 to +7dBm

Page 1 of 6

41632 DTMF ADDRESS DECODER

UNIT DESCRIPTION, ISSUE 08 P1

4.

Timers

Inter-Digit Timeout and Ringtime Minimum = 4.7 seconds

Timed Correct Address Delay

Maximum = 1 min. 15 sec.

Minimum = 37 mSec.

Maximum = 2.4 seconds

Wrong Digit Holdoff Minimum = .25 seconds

Maximum = 19 seconds

Outputs

ALL CALL, ALL CLEAR, Correct Open Collector, ground when active

Open Collector, -20V when active

Address 1 & 2

Wrong Digit

Ground

-5VDC

ADDRESS DIGIT PROGRAMMING

The 41632 DTMF Address Decoder detects and utilizes Dual Tone Multi-frequency (DTMF) signals to provide selective address decoding functions. DTMF signals are unique tone pairs generated by standard Touch Tone encoder arrays. Each button on a Touch Tone encoder is identified by the pair of frequencies generated when the button is pushed. Four low-group frequencies correspond to the four rows of buttons, and four high-group frequencies correspond to the four columns. The fourth column

(1633Hz) is typically used only in special control applications.

1209Hz 1336Hz 1477Hz 1633Hz

Page 2 of 6

41632 DTMF ADDRESS DECODER

UNIT DESCRIPTION, ISSUE 08 P1

To program the 41632 DTMF Address Decoder, determine the number of digits to be used (one, two, three, or four) and install the appropriate strap (CA 2) or set the switch SW5 (CA 1):

One digit Code:

Two digit Code:

Three digit Code:

Four digit Code:

Correct Address 1

SW5 switch 1

SW5 switch 2

SW5 switch 3

SW5 switch 4

Correct Address 2

CA 2 DIGIT 1

CA 2 DIGIT 2

CA 2 DIGIT 3

CA 2 DIGIT 4

Four DIP switches labeled SW1 (1st Digit), SW2 (2nd Digit), SW3 (3rd Digit) and SW4 (4th Digit) are the correct address programming switches. The 4 individual switch positions on each switch correspond to the code from the DTMF tone detector U4. Refer to the table below for digit programming information.

0 = off; 1 = on

Digit 1 2 3 4 Digit

1 1 0 0 0 9

1 2 3 4

1 0 0 1

2

3

0 1 0 0

1 1 0 0

0

*

0 1 0 1

1 1 0 1

4

5

6

0 0 1 0

1 0 1 0

0 1 1 0

#

A

B

0 0 1 1

1 0 1 1

0 1 1 1

7

8

1 1 1 0

0 0 0 1

C 1 1 1 1

D 0 0 0 0

For example, if the address code of 357 is to be detected, either SW5 switch 3 is selected and/or CA 2

DIGIT 3 is installed. Set the switches on SW1 to correspond to the DTMF digit 3 (1100). Set the switches on SW2 to the DTMF digit 5 (1010). SW3 will be set to correspond to the DTMF digit 7

(1110). SW4 can be set to anything as its setting is ignored in this example.

Page 3 of 6

41632 DTMF ADDRESS DECODER

UNIT DESCRIPTION, ISSUE 08 P1

5.

5.1.

THEORY OF OPERATION

DTMF Tone Detection

The input signal enters the 41632 module on pins D and E and is routed to the input buffer U3A-U3C.

Input buffer U3 is high impedance and converts the signal to a single ended format. The signal is then routed to the input of the DTMF detector (U4). U4 detects the DTMF tones. When a valid DTMF tone pair is detected, U4 brings its strobe (pin 15) high, and sets its data lines (Q0, Q1, Q2, and Q3) to the corresponding DTMF tone pair.

U2 is a binary ripple counter with an R-C oscillator on its input. The output of U2 (pin 1) is approximately 27Hz, and connects to another binary ripple counter (U1). U1 divides the 27Hz clock in binary steps and provides the resultant frequencies to its Q outputs. The frequencies are used to create the interdigit timeout/ring time, and the enable delay. When the 41632 is in the idle state, U1 is continuously being clocked and stepping through its Q outputs. When a correct digit is detected, U1 is reset to zero to initialize the timing sequence.

The ENABLE DELAY straps are used to enable the Correct Address 1 output (pin F). The

INTERDIGIT TIMEOUT/RINGTIME straps provide two functions. The first function is used to set the timeout between valid digits. The second function is used to set the time the Correct Address 1

(pin F) remains active. Only one strap is installed for the interdigit/ringtime. For example, if an interdigit timeout is strapped for 4.7 seconds, then the correct address 1 output (pin F) will remain active for 4.7 seconds.

DIP switches SW1, SW2, SW3 and SW4 are used to select the digits to be recognized as the correct address. SW1 selects the first digit, SW2 selects the second digit, SW3 selects the third digit, and SW4 selects the fourth digit. The four positions on the switch correspond to the DTMF code. Refer to section 4 of this description for specific information on correct address programming.

Octal counter (U12) provides a sequencing logic high (ground) on one of its eight Q outputs, five of which are used. When U12 is reset, either from an interdigit timeout, wrong digit, or an external reset

(pin R), its Q0 output (pin 2) is at logic high. Output Q0 enables U11, a four bit selector via U8A, and selects the data present on its X inputs (SW1). This data is presented at Exclusive NOR gate U9.

When a DTMF digit is detected, U4 brings its strobe active (high), enabling U18, sections A, B, C, and

D, and places the DTMF code on its data outputs. These data outputs connect to the Exclusive NOR,

U9.

If the data from U7 or U11 (SW data) and U4 (DTMF tone received data) agree, then the DTMF tone is a correct digit. All outputs of U9 are high causing the output of U13A to go high. The output of U13A

Page 4 of 6

41632 DTMF ADDRESS DECODER

UNIT DESCRIPTION, ISSUE 08 P1

5.4.

5.5. connects to AND gate U18A, through diode CR2. The output of U18A connects to the CLOCK input of U12. When the correct digit is detected, U18A output goes low. When the tone ends, U18A goes high, causing U12 to clock to Q1, and U1 to reset. If the CA 2 DIGIT 1 strap is installed, U17B is set, causing transistor Q4 to turn on (pin N, CORRECT ADDRESS LATCHED). Likewise, if the CA 1

SW5 switch 1 is ON, the data input of U17A is set high. As the output of U1 (ENABLE DELAY strap) goes high, the data is latched into U17A, causing Q1 to turn on (pin F, CORRECT ADDRESS 1). For each correct digit detected, U12 is clocked, enabling the different switches (SW5 switch 2, 3, and 4).

If the data from U7 or U11 (SW data) and U4 (DTMF tone received data) disagree, then the DTMF tone is a wrong digit. If any output of U9 is low, it will cause the output of U13A to stay low. When the wrong digit is detected, U18A output stays high. The output of U18A connects to U18B. The output of U18B goes through time delay R16 and C25, and is inverted by U14C. The output of U14C clocks a high into latch U16A. The output of this latch enables counter U6. During the strap selected wrong digit hold-off period the correct address digit counter U12 and the timed correct address latch

(U17A) are held reset. If another DTMF strobe is detected during the hold-off period, the counter will be reset and the hold-off period starts over. When the counter reaches the strap selected time period the latch U16A is reset and the correct address digit counter and the timed correct address latch are enabled.

The latch U16A can also be cleared by an "ALL CLEAR" or "RESET" condition which will reset & disable the counter U6.

The wrong digit function is disabled while Q1 is on (pin F, CORRECT ADDRESS 1) by the path through CR9 and ST6 to correct address latch (U17A) pin 1. This prevents turning off correct address if another DTMF key is pressed. To defeat this feature remove strap ST6.

The wrong digit hold-off signal is OR'd with the "RESET" signal so that U12 and U17A are also reset by a "RESET" condition.

The ALL CLEAR (#) tone pair has an open collector output. When the ALL CLEAR tone is detected,

U18D goes low, turning on transistor Q2 (pin K ALL CLEAR). U15A also resets the wrong digit holdoff timer, U6.

The ALL CALL (*) tone pair has two functions. (1) If the ALL CALL tone pair is present for less than

1 second, then the tone is considered a correct digit if the Group Call option -02 is installed. When the

ALL CALL tone is detected, U10A goes high. The output of U10A connects to U18A through diode

CR3. The procedure occurs the same as a correct digit as described above. (2) If the ALL CALL tone pair is present for more than 1 second, U19B times out enabling U20C. The output of U20C goes low, turning on transistor Q3 (pin L ALL CALL). When the ALL CALL tone goes off, U20A goes high, resetting U12 and U17B.

Page 5 of 6

41632 DTMF ADDRESS DECODER

UNIT DESCRIPTION, ISSUE 08 P1

5.6.

5.7.

ALL CLEAR RESET OPTION -01

If the ALL CLEAR reset option is installed, the 41632 will reset the interdigit timer (U12), the Correct

Address 2 output (pin N), the Correct Address 1 output (pin F), the wrong digit latch U16A, and the wrong digit hold-off timer U6 upon the receipt of the DTMF digit ALL CLEAR.

GROUP CALL OPTION -02

This allows the caller to contact more than one Order Wire at the same time by using a (*) as a "wild card". For instance, by dialing 12**, all 4 digit phone numbers with 12 as their first two digits would ring.

Page 6 of 6

41650 RECEIVE MODULE

UNIT DESCRIPTION, ISSUE 09 P2

1.

REFERENCES

REVISION A

DATE 98JAN12

APPROVED

2.1.3.

2.1.4.

2.1.5.

1416-1501 Receive Schematic

2.

GENERAL

2.1. The Raven 41650 Receive module provides wideband (data), voice and speaker outputs from a single balanced input. Amplification is provided on all ports, with a 3-stage low pass filter inserted in the voice and speaker paths. A wide range of input levels can be accepted through the use of level adjustment for all ports. An audible call alert generator is typically included, providing a call indication through the speaker output when enabled. Relay contacts (2 Form C) are available as a simultaneous call indication. The relay is enabled concurrent with audible alert and can be programmed to energize continuously or to cycle on and off with the audible alert.

2.1.1. The -01 option of the 41650 module includes a single frequency signaling detector for use in E&M signaling systems.

2.1.2. The -02 option of the 41650 module makes the output of SF detector (option -01 above) available for off-board use.

The -03 option adds a single-ended voice output.

The -04A option converts the RCV input to a single-ended 75

The -04B option converts the RCV input to a single-ended high impedance bridging port (typically

10K Ω ).

Ω port.

2.1.6. The -05 option adds capacitors to the feedback loop of both input amplifier stages for high frequency attenuation.

Page 1 of 4

41650 RECEIVE MODULE

UNIT DESCRIPTION, ISSUE 09 P2

4.

3.

SPECIFICATIONS

Power

Environmental

Operating Temperature

Relative Humidity

-20VDC @ 200mA max.

0° to 50° C

0° to 95% non-condensing

Impedance balanced, standard

Input Level (RCV)

VF Frequency Response

-46 to +7dBm @ 600 Ω

± 1dBm0 500Hz to cutoff frequency, (Ref. @ 1KHz) -3dBm0 @

300Hz, ≥ 55dB down @ ¼ octave above cutoff frequency.

Wideband Frequency ± 1dBm0 500Hz to 30KHz, -3dBm0 @ Response

(Ref. @ 1KHz) 300Hz, -4dBm0 @ 60KHz.

Signaling Frequency (SF)

Speaker Output

Receive Signaling Relay

THEORY OF OPERATION

Customer specified from 1000Hz to 3825Hz

1W max into 45 Ω

Dual Form C rated @ 1A @ 125VAC or (E-Lead) 2A @ 30VDC.

The 41650 Receive module provides two 600 Ω balanced outputs from one RCV input. One output is for VF, and one is the wideband (data) output. A VF speaker amplifier, an alert tone generator E-Lead relay contacts, and when the -01 option is installed, a signal detector are included on the module.

The 41650 Receive module has a single 600 Ω balanced input which is split into two 600 Ω balance outputs as well as a speaker amplifier output. Transformer T1 provides the balanced input as well as excellent common mode rejection and DC isolation. Input amplifier U6A provides the first stage of gain and its output level is adjusted by potentiometer R36. Amplifier U6B is the second stage of gain and its output level is always set to +6dBm nom. (optimum input level into the low pass filter) by potentiometer R40. This output drives the wideband amplifier, the VF path, and, when the -01 Option is installed, the Signaling Detector. Option -05 adds capacitors to the feedback loop of amplifiers U6A and U6B to attenuate their output at frequencies above 16KHz.

Page 2 of 4

4.3.3.

41650 RECEIVE MODULE

UNIT DESCRIPTION, ISSUE 09 P2

4.3.1.

Amplifier U7A is the wideband amplifier and its output level is adjusted by potentiometer R43. This output drives transformer T2 via impedance matching resistor R41. Transformer T2 provides a balanced output as well as DC isolation for the EXT RCV OUT port.

4.3.2.

The signal at the output of amplifier U6B is routed through the low pass filter. The low pass filter used on the 41650 Receive module is a 3 D-element active filter which provides a response of +1, -3dB over a frequency range of 300Hz to the cutoff frequency (Fc, customer specified), and attenuation of ³55dB of signals one quarter octave above Fc. The low pass filter consists of Operational Amplifiers U1, U2,

U3 and associated circuitry.

The output of the low pass filter is routed to the input of amplifier U8A. The path from the low pass filter to U8A is strappable such that with ST-9 removed and ST-E1 & ST-F1 installed, the signal can be routed through other modules via pin F, & return via pin E into U8A. U8A is a fixed gain amplifier & drives the 4W OUT via impedance matching resistor R58 & transformer T3, as well as the speaker amplifier.

Option -03 provides a single-ended input (if ST-11 is installed), or single-ended output (if ST-10 is installed) on pin K via resistors R59 and R74 from amplifier U8A. The values of R59 and R74 are factory selected according to the application.

4.5.

4.5.1.

4.5.2.

The speaker amplifier consists of U8B, Q5, Q2, Q3, Q4 and associated circuitry. Inputs from the VF path, the sidetone input (from the 41651 Transmit module), and the alert tone generator are summed into the speaker amplifier. An off-board potentiometer (typically a 1KW 1W potentiometer on the front panel of the Order Wire) connected to pins U and V acts as a shunt to provide a volume control for the

VF and sidetone signals. The volume of the alert tone is not affected by the volume control. The speaker amplifier has a maximum output of 1W into a 45 Ω speaker with <2% harmonic distortion.

ALERT TONE GENERATOR

The Alert Tone Generator is an option that is more commonly installed than not. It is deleted in cases where another source for the alert tone is more desirable.

Two alert tone frequencies are available & are selected via 3 programming jumpers. When the jumpers are in the "LO" position, the frequency is 360Hz. When the jumpers are in the "HI" position, the frequency is 1940Hz. Potentiometer R72 can be used to adjust the alert tone volume(1 watt max. to .1 watt min.).

Page 3 of 4

41650 RECEIVE MODULE

UNIT DESCRIPTION, ISSUE 09 P2

4.5.3.

4.5.4.

The Alert Tone Generator consists of U11, U9, and associated components. U11 is a free running oscillator which generates the alert tone (360Hz or 1940Hz) as well as the output to gate the tone ON and OFF at preset rates through U9. The outputs of U9 are coupled to the speaker amplifier. The

ALERT tone is activated by grounding pin R. The ALL CALL tone is activated by grounding pin S

(ST-4 installed). The ALL CALL tone is gated at approximately .5 secs. OFF and .5 secs. ON, while the ALERT tone is gated at approximately 1.5 secs. OFF and 1.5 secs. ON.

Activating either the ALERT or ALL CALL energizes relay K1. This two form C relay provides an

E-Lead indication as well as driving the ALERT indicator on the Order Wire front panel (when provided). Two modes of operation can be selected, 1) the relay is continuously energized for the duration of the alert tone (CO position of the programming jumper), or 2) the relay will cycle on and off at the same rate as the alert tone (CY position of the programming jumper).

4.7.

4.8.

4.9.

4.10.

When the -01 option is installed, a signaling detector is included as a part of the 41650 module. The signaling detector consists of a narrow band pass filter (U5A, U4A, U4B, and associated circuitry), a peak detector (D1, R29, R30, C14, C15), and a comparator (U5B). Potentiometer R25 adjusts the overall gain and potentiometer R24 adjusts the center frequency of the filter. When the voltage across

C15 exceeds the comparator reference voltage (pin 6 of U5B), the comparator output switches high activating the alert tone generator (U11,U9) and the receive relay K1 via transistor Q1.

Option -02 pins out the signal detector output (pin 7 of comparator U5B) on pin W. If strap ST-5 is installed, the output is routed directly from comparator U5B and is active high (GND). If ST-5 is deleted and transistor Q6 and its associated resistors are installed, Q6 inverts the output of U5B, making the output at pin W active low (-20VDC).

Option -03 provides a single-ended voice input or single-ended voice output when R59, R74, and C36 are installed. The value of each component is determined by the application. A typical use for the input is to sum an auxiliary tone or voice path into the speaker amp. A typical use for the output is to drive the earpiece from a remotely located headset or telephone.

Option -04 changes the configuration of the input amplifier for a single-ended 75 Ω input (terminating or bridging). Transformer T1 is deleted and a .33

µ f ceramic capacitor is installed in its place for DC isolation. Pin C of the 41650 module is the signal input, and pin D is ground. For a 75 Ω terminating input, a 75 Ω resistor is installed across pins C and D. For a high impedance bridging input, the 75 Ω resistor is deleted.

Option -06 adds capacitance to the feedback loop of both stages of the input amplifier, U6A and U6B.

The capacitance value is selected to attenuate frequencies above the spectrum utilized by the wideband

(data) port.

Page 4 of 4

41651 TRANSMIT MODULE

UNIT DESCRIPTION, ISSUE 09 P1

REVISION A

DATE 17 MAR 05

APPROVED

2.1.3.

2.1.4.

2.1.5.

1.

REFERENCES

1416-1511 Transmit Schematic

2.

GENERAL

2.1. The Raven 41651 Transmit Module provides a single balanced output from multiple VF inputs, a wideband (data) input, and a signaling oscillator. Amplification is provided on all ports, with a 3-stage low pass filter inserted in the voice path. All ports have potentiometer level adjustment and can accommodate a wide range of output levels.

2.1.1. The -01 Option of the 41651 Module includes a single frequency signaling oscillator for use in E&M signaling systems.

2.1.2. The -02 Option of the 41651 Module includes a ringback tone oscillator for call acknowledgment

(typically used only in DTMF selective signaling systems).

The -03A Option converts the XMT output to a single-ended 75 Ω port.

The -03B Option converts the XMT output to a single-ended high impedance bridging port.

The -04 Option supplies talk battery for a remote MIC at pins M and N (4-wire input).

2.1.6. The -05 Option XMT relay will prevent any transmission at pins K and L until the transmit path is enabled at pin Y (typically DTMF correct address) or at pin Z (typically off hook condition).

Page 1 of 4

41651 TRANSMIT MODULE

UNIT DESCRIPTION, ISSUE 09 P1

3.

SPECIFICATIONS

Power

Environmental

Operating Temperature

Relative Humidity

-20VDC @ 50mA max

0°C to 50°C

0% to 95% non-condensing

Output Level (XMT)

Idle Noise (XMT)

VF Frequency Response

(Ref. @ 1KHz)

+7 dBm max. -46 dBm min. @ 600 Ω

<10 dBrnC0

±1 dBm0 500 Hz to cutoff frequency

-3 dBm0 @ 300 Hz

≥ 55 dB down @ ¼ octave above cutoff frequency

4.

Wideband Frequency Response ±1 dBm0 500Hz to 30KHz

(Ref. @ 1KHz) -3dBm0 @ 300Hz, -4dBm @ 60KHz

Signaling Frequency (SF)

THEORY OF OPERATION

Customer specified from 1000 Hz to 3825 Hz

The 41651 Transmit Module has five 600 Ω balanced inputs which are summed into one output. Four of these inputs are for VF and one is the wideband (data) input. In addition, the -01 Option signaling oscillator, and the -02 Option ringback oscillator are summed into the wideband path. Output amplifier

U7B combines the VF and wideband paths and drives the output transformer T1 via impedance matching resistor R61.

4.1.1. VF signals enter the module at the DTMF input (pins W and X), the 4-wire input (pins M and N), the

TEST TONE input (pins U and V), and the MIC input (pins S and T) which also provides talk battery to the microphone. These inputs are all balanced with 600 Ω impedance. Unused inputs need no external termination.

Page 2 of 4

41651 TRANSMIT MODULE

UNIT DESCRIPTION, ISSUE 09 P1

4.1.2.

4.1.3.

All VF signals are summed at pins 2 and 6 of the differential summing amplifier, U6. The signal at the output of U6B (pin 7) is coupled to the low pass filter and also to pin P which provides local sidetone.

The path from U6B to the low pass filter is strappable such that with the strap removed, the signal can be routed through other modules via pin P, and return via pin R into the low pass filter.

The low pass filter used in the 41651 Transmit is a 3 D-element active filter which provides a response of +1, -3 dB over a frequency range of 300Hz to the cutoff frequency (Fc, customer specified), and attenuation of ≥ 55 dB of signals one quarter octave or more above Fc. The low pass filter consists of operational amplifiers U1, U2, U3 and associated circuitry. The output of the low pass filter is routed to the input of amplifier U7B via potentiometer R58.

Wideband signals enter the 41651 Transmit Module on pins F and H and are routed to transformer T2 which provides a balanced input as well as excellent common mode rejection and DC isolation. U7A is the wideband amplifier and potentiometer R65 adjusts the level of the wideband path.

Amplifier U7B is a single stage amplifier which provides a maximum output of +7dBm into a 600 Ω load at pins K and L. The gain of U7B is fixed at one of two levels, selected by a programming jumper.

The "LG" jumper (ST6) sets the gain at 0 dB and should be used when the output level of the 41651

Module is -10 dBm (@ 600 Ω ) or less. The normal gain of U7B is +15 dB which is used when the output level of the 41651 Module is greater than -10 dBm (@ 600 Ω ), or when Option -03A or Option

-03B is installed.

When the -01 Option is installed, a signaling oscillator is included as a part of the 41651 Module. The signaling oscillator consists of U4, U5 and associated circuitry. The oscillator can be enabled by applying the appropriate voltage to pin D (if ST1 is installed) or pin J. If -01A is installed, -20VDC applied to pins D or J will enable the oscillator, or if -01B is installed, ground on pins D or J will enable the oscillator. The frequency of the signal oscillator is adjusted by R24. The output of the oscillator is coupled through C15 to R35. R35 is the coarse adjustment of the level of the oscillator, and R36 is the fine level adjustment. The oscillator signal then goes to pin 6 of output amplifier U7B and is summed into the transmit output.

Page 3 of 4

41651 TRANSMIT MODULE

UNIT DESCRIPTION, ISSUE 09 P1

4.6.

The -02 Option provides ringback tones for call acknowledgment. Oscillator/counter U8 digitally generates the required frequencies when enabled by a ground at pin Y. U9 gates the frequencies to create a ringback tone. The signal then goes to U7B and thus to the transmit output.

SINGLE ENDED OUTPUT

The -03 Option converts the output amplifier for a single-ended 75 Ω output (terminating or bridging).

Transformer T1 and resistor R61 are deleted and a .33

µ f ceramic capacitor and a 3.3K

Ω resistor are installed. For Option -03A, a 75 Ω 1% resistor is included to terminate the port. For Option -03B, the

75 Ω resistor is deleted for high impedance (typically 3.3K

Ω ) bridging port.

The -04 Option provides talk battery for the use of a remote handset or headset microphone.

The -05 Option, relay K1, isolates the circuitry on the 41651 Module from the transmit port to minimize idle noise. The relay is energized and connects the transmit path when an off hook condition exists, or when ringback is being transmitted.

Page 4 of 4

41685 4-WAY or 6-WAY/4-WIRE BRIDGE REVISION A

DATE 00NOV01

UNIT DESCRIPTION, ISSUE 03 P1 APPROVED

1.

REFERENCES

1416-1850 4-Way or 6-Way/4-Wire Active Bridge Schematic

2.

GENERAL

2.1. The Raven 41685 4-Way or 6-Way/4-Wire Active Bridge provides a multipath interface between 4 ports (or 6 ports with Option -01 installed) on a 4-wire basis. An input at one of the ports is routed through to the output of all other ports, with a minimum of interchannel crosstalk. All inputs and outputs are transformer coupled and are balanced. Potentiometer adjustments on all inputs and outputs allow input level coordination and through path gain adjustments.

3.

SPECIFICATIONS

Power Input

Environmental

-20VDC @ 75mA maximum

Operating Temperature

Storage Temperature

Relative Humidity

Inputs

Input Impedance

Input Level

Outputs

0° to 50° C

-40° to +85° C

0 to 95% non-condensing

600 Ω balanced

-40 to +7dBm

Output Impedance

Output Level

600 Ω balanced

-40 to +7dBm continuously adjustable

Through Path Adjustment, Max

Interchannel Crosstalk

±25dB

<-50dB @ 1KHz and unity gain

4.

THEORY OF OPERATION

4.1.1.

4.1.2.

Each of the four inputs (six if Option -01 is installed) consists of an input transformer, impedance matching resistor, and an amplifier.

For INPUT LEG 1, R19 is used for impedance matching of the input transformer T7. The input amplifier for INPUT LEG 1 consists of U-2A, R31, R25, and potentiometer R7.

Page 1 of 3

41685 4-WAY or 6-WAY/4-WIRE BRIDGE

UNIT DESCRIPTION, ISSUE 03 P1

4.1.3. Signals present at INPUT LEG 1 (pins 21 and 22) are coupled through input transformer T7. The signal is then passed through R31, to the input of amplifier U-2A. R25 and potentiometer R7 provide a gain adjustment of -14 to +19dB for amplifier U-2A, and presents the signal at pin 1 of U-2A.

4.1.4.

4.1.5.

All other inputs have circuitry identical to INPUT LEG 1 and operate the same.

For INPUT LEG 2, R20 is used for impedance matching of the input transformer T8. The input amplifier for INPUT LEG 2 consists of U-2B, R26, R32, and potentiometer R8.

4.1.6. For INPUT LEG 3, R21 is used for impedance matching of the input transformer T9. The input amplifier for INPUT LEG 3 consists of U-4A, R33, R27, and potentiometer R9.

4.1.7. For INPUT LEG 4, R22 is used for impedance matching of the input transformer T10. The input amplifier for INPUT LEG 4 consists of U-4B, R28, R34, and potentiometer R10.

4.1.8. For INPUT LEG 5 (if Option -01 is installed), R23 is used for impedance matching of the input transformer T11. The input amplifier for INPUT LEG 5 consists of U-6A, R35, R29, and potentiometer

R11.

4.1.9. For INPUT LEG 6 (if Option -01 is installed), R24 is used for impedance matching of the input transformer T12. The input amplifier for INPUT LEG 6 consists of U-6B, R30, R36, and potentiometer

R12.

4.2.1.

4.2.2.

Each LEG output is driven by a 3-input (or 5-input if Option -01 is installed) summing amplifier. The output of the summing amplifier is transformer coupled to provide a balanced output.

The output amplifier for OUTPUT LEG 1 consists of R43, R49, potentiometer R1, U-1A, and transformer T1. R43 provides impedance matching. Resistor Network RN1 sums the inputs from LEGs

2, 3, 4, 5, and 6, (LEGs 5 and 6 are installed for Option -01 only).

4.2.3. Signals present at the summing network (RN1) of OUTPUT LEG 1 are summed and presented to the output amplifier, U-1A. Potentiometer R1 and resistor R49 provide a gain adjustment of -13 to +19dB.

The signal is presented at pin 1 of U-1A and routed to output transformer T1. The signal is coupled through to OUTPUT LEG 1 (pins D and E).

4.2.4.

4.2.5.

All other outputs have identical circuitry as OUTPUT LEG 1, and operate the same.

The output amplifier for OUTPUT LEG 2 consists of R44, R50, potentiometer R2, U-1B, and transformer T2. R44 provides impedance matching. Resistor Network RN2 sums the inputs from LEGs

1, 3, 4, 5, and 6.

Page 2 of 3

41685 4-WAY or 6-WAY/4-WIRE BRIDGE

UNIT DESCRIPTION, ISSUE 03 P1

4.2.6. The output amplifier for OUTPUT LEG 3 consists of R45, R51, potentiometer R3, U-3A, and transformer T3. R45 provides impedance matching. Resistor Network RN3 sums the inputs from LEGs

1, 2, 4, 5, and 6.

4.2.7. The output amplifier for OUTPUT LEG 4 consists of R46, R52, potentiometer R4, U-3B, and transformer T4. R46 provides impedance matching. Resistor Network RN4 sums the inputs from LEGs

1, 2, 3, 5, and 6.

4.2.8. The output amplifier for OUTPUT LEG 5 (when Option -01 is installed) consists of R47, R53, potentiometer R5, U-5A, and transformer T5. R47 provides impedance matching. Resistor Network

RN5 sums the inputs from LEGs 1, 2, 3, 4, and 6.

4.2.9. The output amplifier for OUTPUT LEG 6 (when Option -01 is installed) consists of R48, R54, potentiometer R6, U-5B, and transformer T6. R48 provides impedance matching. Resistor Network

RN6 sums the inputs from LEGs 1, 2, 3, 4, and 5.

4.3.1. U7-B provides regulation for the -10VDC bias voltage. U7-A, CR1, CR2, R57, R58, Q1, Q2, R55, and

R56 provide a -10VDC signal ground for the output transformers.

Page 3 of 3

1.

42286 4-WAY or 6-WAY RS-232 BRIDGE ____A

DATE 25

UNIT DESCRIPTION, ISSUE 01 P1 APPROVED

REFERENCES

1422-1860 RS-232 Bridge Schematic

1422-8860 RS-232 Bridge Block Diagram

2.

GENERAL

2.1.

The Raven 42286 4-Way or 6-Way RS-232 Active Bridge provides a multipath interface between 4 ports

(or 6 ports with Option –01 installed) on a three-signal basis. An input at one of the ports is routed through to the output of all other ports. All input signals and output signals conform to RS-232 specifications.

There are no adjustments required on this module. This module is designed to operate in a system where only one RS-232 circuit (or LEG) is active at any one time.

3.

SPECIFICATIONS

Power Input -18 to -75 VDC @ 200 mA max

Environmental

Temperature ° to +50 ° C

Storage Temperature -40 ° to +85 ° C

Relative Humidity 0 to 95% non-condensing

Inputs

Input Ω min

Input Level Conforms to RS-232 spec, -12V to +12V or

Logic 0

Unused low

Outputs

Impedance Ω minimum

Output Level

Logic

-9V to +9V minimum with 3K Ω load

Non-inverting

4.

THEORY OF OPERATION

4.1.

INPUT CIRCUITS

4.1.1.

Each input circuit (three inputs for each LEG) consists of an RS-232 compliant inverting input buffer and an RC filter designed to eliminate damage from ESD hits. Each LEG input consists of the signals from

TXD, DTR, and RTS.

Page 1 of 2

42286 4-WAY or 6-WAY RS-232 BRIDGE

UNIT DESCRIPTION, ISSUE 01 P1

4.1.2.

The TXD input of LEG 1 is described here. The signal present at pin 5 passes through an RC filter composed of R1 and C3. From this filter the signal is connected to the input pin of the RS-232 input buffer, U7-A.

4.1.3.

All other inputs have circuits identical to LEG 1 TXD and operate the same.

4.1.4.

Input signals on LEG 1 inputs appear on the corresponding LEGs 2-6 outputs. Each output LEG consists of the input signals from any LEG except its own.

4.2.

OUTPUT CIRCUITS

4.2.1.

Each output circuit (three outputs for each LEG) consists of an RS-232 compliant inverting output buffer and an RC filter designed to eliminate damage from ESD hits. Each LEG output consists of the signals to

RXD, DSR, and CTS.

4.2.2.

Each buffer of each LEG output is a two input AND gate. One of those inputs is connected to the output of a 4-input AND gate resulting in a 5-input AND gate.

4.2.3.

The output circuits for the LEG 1 RXD signal consists of AND gate U13-A, output buffer U1-B, and RC filter R2 and C4. The output signal appears on pin E of the edge connector.

4.2.4.

All other outputs have identical circuits as OUTPUT LEG 1 RXD, and operate the same.

4.3.

POWER SUPPLY

4.3.1.

The 42286 Module is designed to operate with DC input voltages. The input voltage is converted to

–12 VDC and +12 VDC by a switching power supply circuit, PS1.

4.3.2.

Logic circuit voltage is obtained from the +12 VDC supply using a linear 5 VDC regulator, VR1.

4.3.3. If AC Input Voltage is required an external AC to DC power supply must be used.

Page 2 of 2

400 EDISON WAY, RENO, NEVADA 89502

TELEPHONE 775-858-2400 FAX: 775-858-2410

1. CONTRACT 0

The following general

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Unless otherwise specified in conditions of sale apply to this contract and all this or other documents forming a part of this contract, purchases from Raven Electronics Corporation all shipments will be F.O.B. Raven manufacturing

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14. RETURN FOR CREDIT

0

No equipment and conditions specified herein shall be in addition to may be returned for credit until the company has obtained Raven’s written approval for return those set out in the Raven proposal. epidemics, quarantine, inability to obtain necessary labor, war, riots, strikes, differences with workmen, accidents to machinery, delays in transportation, failure of or delay in furnishing correct or complete authorization. Materials accepted for return is subject to a re-stocking charge of 15% of the current list price.

All transportation charges will be borne by the purchaser. Orders for special non-stock equipment or information by Purchaser, impossibility or impracticability of performance or any other cause or production and are not returnable for credit. causes beyond the control of Raven.

General Conditions of Sales

RAVEN ELECTRONICS CORPORATION

Raven Electronics Corporation

400 Edison Way

Reno, Nevada 89502

775.858.2400 Phone

775.858.2410 Fax

Web site: www.ravencomm.com

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