Broadcom AFBR-710SMZ_Data_Sheet Specification
Iklan
Iklan
AFBR-710SMZ
10Gb Ethernet, 850 nm, 10GBASE-SR/SW,
SFP+ Transceiver
Data Sheet
AFBR-7
1
0SMZ
Description
The Avago AFBR-710SMZ transceiver is part of a family of
SFP+ products. This transceiver utilizes Avago’s 850nm
VCSEL and PIN Detector technology to provide an IEEE
10Gb Ethernet design compliant with the 10GBASE-SR and 10GBASE-SW standards. The AFBR-710SMZ transceiver is designed to enable 10Gb Ethernet equipment designs with very high port density based on the new electrical and mechanical specification enhancements to the well known SFP specifications developed by the
SFF Committee. These specifications are referred to as
SFP+ to recognize these enhancements to previous SFP specifications used for lower speed products. Avago
Technologies is a an active participant in the SFF Committee specification development activities.
Features
• Avago 850nm VCSEL source and Transmitter Optical
Subassembly technology
• Avago PIN detector and Receiver Optical Subassembly technology
• Typical power dissipation 600mW
• Full digital diagnostic management interface
• Avago SFP+ package design enables equipment EMI performance in high port density applications with margin to Class B limits
Specifications
• Optical interface specifications per IEEE 802.3ae
10GBASE-SR and 10GBASE-SW
Related Products
• AFBR-710ASMZ is an SFP+ 10 Gigabit Ethernet
10GBASE-SR/SW transceiver with case temperature operated at 0-85 °C for use on multimode fiber cables.
It is best suited for OM3 high bandwidth MMF link applications with link lengths up to 300 meters.
• AFBR-710DMZ SFP+ 10Gb/1Gb Gigabit Ethernet
10GBASE-SR transceiver for operation in 300m reach
• Link lengths at 10.3125 GBd:
300m with 50um OM3 MM fiber
400m with 50um OM4 MM fiber
• Electrical interface specifications per SFF Committee
SFF 8431 Specifications for Enhanced 8.5 and 10
Gigabit Small Form Factor Pluggable Module “SFP+”
• Management interface specifications per SFF
Committee SFF 8431 and SFF 8472 Diagnostic
Monitoring Interface for Optical Transceivers using OM3 MMF.
• Mechanical specifications per SFF Committee SFF
8432 Improved Pluggable Formfactor “IPF”
• AFCT-739SMZ (AFCT-739ASMZ) with case temperature 0-70 (0-85) °C SFP+ 10 Gigabit Ethernet
10GBASE-LR transceiver for operation in SMF link applications to 10 km
• AFCT-5016Z SFP+ Evaluation Board The purpose of this SFP+ evaluation board is to provide the designer with a convenient means for evaluating SFP+ fiber optic transceivers.
• LC Duplex optical connector interface confirming to
ANSI TIA/EA 604-10 (FOCIS 10A)
• Compliant to Restriction on Hazardous Substances
(RoHS) per EU and China requirements
PRELIMINARY
CDRH
Description,
continued
Installation
The AFBR-710SMZ transceiver package is compliant with the SFF 8432 Improved Pluggable Formfactor housing specification for the SFP+. It can be installed in any
INF-8074 or SFF-8431/2 compliant Small Form Pluggable
(SFP) port regardless of host equipment operating status
The AFBR-710SMZ is hot-pluggable, allowing the module to be installed while the host system is operating and on-line. Upon insertion, the transceiver housing makes initial contact with the host board SFP cage, mitigating potential damage due to Electro-Static Discharge (ESD).
Digital Diagnostic Interface and Serial Identification
The two-wire interface protocol and signaling detail are based on SFF-8431. Conventional EEPROM memory, bytes 0-255 at memory address 0xA0, is organized in compliance with SFF-8431. New digital diagnostic information, bytes 0-255 at memory address 0xA2, is compliant to SFF-8472. The new diagnostic information provides the opportunity for Predictive Failure Identification, Compliance Prediction, Fault Isolation and Component Monitoring.
Predictive Failure Identification
The AFBR-710SMZ predictive failure feature allows a host to identify potential link problems before system performance is impacted. Prior identification of link problems enables a host to service an application via “fail over” to a redundant link or replace a suspect device, maintaining system uptime in the process. For applications where ultra-high system uptime is required, a digital SFP provides a means to monitor two real-time laser metrics associated with observing laser degradation and predicting failure: average laser bias current (Tx_Bias) and average laser optical power (Tx_Power).
Compliance Prediction
Compliance prediction is the ability to determine if an optical transceiver is operating within its operating and environmental requirements. AFBR-710SMZ devices provide real-time access to transceiver internal supply voltage and temperature, allowing a host to identify potential component compliance issues. Received optical power is also available to assess compliance of a cable plant and remote transmitter. When operating out of requirements, the link cannot guarantee error free transmission.
Fault Isolation
The fault isolation feature allows a host to quickly pinpoint the location of a link failure, minimizing downtime.
For optical links, the ability to identify a fault at a local device, remote device or cable plant is crucial to speeding service of an installation. AFBR-710SMZ real-time monitors of Tx_Bias, Tx_Power, Vcc, Temperature and
Rx_Power can be used to assess local transceiver current operating conditions. In addition, status flags TX_DIS-
ABLE and Rx Loss of Signal (LOS) are mirrored in memory and available via the two-wire serial interface.
Component Monitoring
Component evaluation is a more casual use of the AF-
BR-710SMZ real-time monitors of Tx_Bias, Tx_Power,
Vcc, Temperature and Rx_Power. Potential uses are as debugging aids for system installation and design, and transceiver parametric evaluation for factory or field qualification. For example, temperature per module can be observed in high density applications to facilitate thermal evaluation of blades, PCI cards and systems.
2
OPTICAL INTERFACE
LIGHT FROM FIBER
RECEIVER
PHOTO-DETECTOR
AMPLIFICATION
& QUANTIZATION
CONTROLLER & MEMORY
ELECTRICAL INTERFACE
RD+ (RECEIVE DATA)
RD– (RECEIVE DATA)
RX_LOS
RS0
RS1
SDA
SCL
MOD-ABS
LIGHT TO FIBER
TRANSMITTER
VCSEL
LASER
DRIVER &
SAFETY
CIRCUITRY
TX_DISABLE
TD+ (TRANSMIT DATA)
TD– (TRANSMIT DATA)
TX_FAULT
Figure 1. Transceiver functional diagram
Transmitter Section
The transmitter section includes the Transmitter Optical Sub-Assembly (TOSA) and laser driver circuitry. The
TOSA, containing an Avago designed and manufactured
850 nm VCSEL (Vertical Cavity Surface Emitting Laser) light source, is located at the optical interface and mates with the LC optical connector. The TOSA is driven by an
IC which uses the incoming differential high speed logic signal to modulate the laser diode driver current. This Tx laser driver circuit regulates the optical power at a constant level provided the incoming data pattern is DC balanced.
Transmit Disable (TX_DISABLE)
The AFBR-710SMZ accepts an LVTTL compatible transmit disable control signal input which shuts down the transmitter optical output. A high signal implements this function while a low signal allows normal transceiver operation. In the event of a fault (e.g. eye safety circuit activated), cycling this control signal resets the module as depicted in Figure 6. An internal pull up resistor disables the transceiver transmitter until the host pulls the input low. TX_DISABLE can also be asserted via the two-wire interface (address A2h, byte 110, bit 6) and monitored
(address A2h, byte 110, bit 7).
The contents of A2h, byte 110, bit 6 are logic OR’d with hardware TX_DISABLE (contact 3) to control transmitter operation.
Transmit Fault (TX_FAULT)
A catastrophic laser fault will activate the transmitter signal, TX_FAULT, and disable the laser. This signal is an open collector output (pull-up required on the host board). A low signal indicates normal laser operation and a high signal indicates a fault. The TX_FAULT will be latched high when a laser fault occurs and is cleared by toggling the TX_DISABLE input or power cycling the transceiver. The transmitter fault condition can also be monitored via the two-wire serial interface (address A2, byte 110, bit 2).
3
Receiver Section
The receiver section includes the Receiver Optical
SubAssembly (ROSA) and the amplification/quantization circuitry. The ROSA, containing a PIN photodiode and custom transimpedance amplifier, is located at the optical interface and mates with the LC optical connector. The ROSA output is fed to a custom IC that provides post-amplification and quantization.
Receiver Loss of Signal (Rx_LOS)
The post-amp IC also includes transition detection circuitry which monitors the AC level of incoming optical signals and provides a LVTTL/CMOS compatible status signal to the host. A high status signal indicates loss of modulated signal, indicating link failures such as broken fiber or failed transmitter. Rx_LOS can also be monitored via the two-wire serial interface(address A2h, byte 110, bit 1).
Functional Data I/O
The AFBR-710SMZ interfaces with the host circuit board through the twenty contact SFP+ electrical connector.
See Table 2 for contact descriptions. The module edge connector is shown in Figure 4. The host board layout for this interface is depicted in Figure 8.
The AFBR-710SMZ high speed transmit and receive interfaces require SFF-8431 compliant signal lines on the host board. To simplify board requirements, biasing resistors and AC coupling capacitors are incorpo rated into the SFP+ transceiver module (per SFF-8431) and hence are not required on the host board. The TX_DISABLE, TX_
FAULT and RX_LOS signals require LVTTL signals on the host board (per SFF-8431) if used. If an application does not take advantage of these functions, care must be taken to ground TX_DISABLE to enable normal operation.
Figure 2 depicts the recom mended interface circuit to link the AFBR-710SMZ to supporting physical layer ICs.
Timing for the dedicated SFP+ control signals implemented in the transceiver are listed in Figure 6.
Application Support
An Evaluation Kit and Reference Designs are available to assist in evaluation of the AFBR-710SMZ. Please contact your local Field Sales representative for availability and ordering details.
Caution
There are no user serviceable parts nor maintenance requirements for the AFBR-710SMZ. All mechanical adjustments are made at the factory prior to shipment.
Tampering with, modifying, misusing or improperly handling the AFBR-710SMZ will void the product warranty. It may also result in improper operation and possibly overstress the laser source. Performance degradation or device failure may result. Connection of the AFBR-710SMZ to a light source not compliant with IEEE Std. 802.3ae
Clause 52 and SFF-8341 specifications, operating above maximum operating conditions or in a manner inconsistent with it’s design and function may result in exposure to hazardous light radiation and may constitute an act of modifying or manufacturing a laser product. Persons performing such an act are required by law to recertify and re-identify the laser product under the provisions of
U.S. 21 CFR (Subchapter J) and TUV.
Customer Manufacturing Processes
This module is pluggable and is not designed for aqueous wash, IR reflow, or wave soldering processes.
Ordering Information
Please contact your local field sales engineer or one of
Avago Technologies franchised distributors for ordering information. For technical information, please visit Avago Technologies’ WEB page at www.avagotech.com For information related to SFF Committee documentation visit www.sffcommittee.org.
4
Regulatory Compliance
The AFBR-710SMZ complies with all applicable laws and regulations as detailed in Table 1. Certification level is dependent on the overall configuration of the host equipment. The transceiver performance is offered as a figure of merit to assist the designer.
Electrostatic Discharge (ESD)
The AFBR-710SMZ is compatible with ESD levels found in typical manufacturing and operating environments as described in Table 1. In the normal handling and operation of optical transceivers, ESD is of concern in two circumstances.
The first case is during handling of the transceiver prior to insertion into an SFP compliant cage. To protect the device, it’s important to use normal ESD handling precautions. These include use of grounded wrist straps, work-benches and floor wherever a transceiver is handled.
The second case to consider is static discharges to the exterior of the host equipment chassis after installation.
If the optical interface is exposed to the exterior of host equipment cabinet, the transceiver may be subject to system level ESD requirements.
Electromagnetic Interference (EMI)
Equipment incorporating 10 gigabit transceivers is typically subject to regulation by the FCC in the United
States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The AFBR-710SMZ enables equipment compliance to these standards detailed in Table 1. The metal housing and shielded design of the AFBR-710SMZ minimizes the EMI challenge facing the equipment designer.
For superior EMI performance it is recommended that equipment designs utilize SFP+ cages per SFF 8432.
RF Immunity (Susceptibility)
Due to its shielded design, the EMI immunity of the AF-
BR-710SMZ exceeds typical industry standards.
Eye Safety
The AFBR-710SMZ provides Class 1 (single fault tolerant) eye safety by design and has been tested for compliance with the requirements listed in Table 1. The eye safety circuit continuously monitors the optical output power level and will disable the transmitter upon detecting a condition beyond the scope of Class 1 certification Such conditions can be due to inputs from the host board
(Vcc fluctuation, unbalanced code) or a fault within the transceiver. US CDRH and EU TUV certificates are listed in table 1.
Flammability
The AFBR-710SMZ optical transceiver is made of metal and high strength, heat resistant, chemical resistant and
UL 94V-0 flame retardant plastic.
5
Table 1. Regulatory Compliance
Feature
Electrostatic Discharge (ESD) to the Electrical Pins
Electrostatic Discharge (ESD) to the Duplex LC Receptacle
Electrostatic Discharge (ESD) to the Optical Connector
Electromagnetic Interference
(EMI)
Immunity
Laser Eye Safety and
Equipment Type Testing
BAUART
GEPRUFT
¬
Rheinland
Product Safety
TYPE
APPROVED
Component Recognition
RoHS Compliance
Test Method
MIL-STD-883C
Method 3015.4
IEC 61000-4-2
Performance
Class 1 (> 2000 Volts)
IEC 61000-4-2
IEC 61000-4-2
Typically, no damage occurs with 25 kV when the duplex LC connector receptacle is contacted by a Human Body Model probe.
10 contacts of 8 kV on the electrical faceplate with device inserted into a panel.
Air discharge of 15 kV (min.) contact to connector without damage.
System margins are dependent on customer board and chassis design.
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
VCCI Class A
IEC 61000-4-3
US FDA CDRH AEL Class 1
US21 CFR, Subchapter J per
Paragraphs 1002.10
and 1002.12
(IEC) EN 60825-1: 2007
(IEC) EN 60825-2: 2004+A1
(IEC) EN 60950-1: 2006+A11
Underwriters Laboratories and Canadian
Standards Association Joint Component
Recognition for Information Technology
Equipment including Electrical Business
Equipment
RoHS Directive 2002/95/EC and it’s amendment directives 6/6
Typically shows no measurable effect from a
10 V/m field swept from 10 MHz to 1 GHz.
CDRH Certification No.: 9720151-128
TUV file: R 72121699
UL file: E173874, Vol. 1
SGS Test Report No. LPC/13392 (AD-1)/07
CTS Ref. CTS/07/3283/Avago
6
Tx_DISABLE
Tx_FAULT
GND,T
Tx DIS
Tx FAULT
VCC,T
10 k Ω
PROTOCOL IC
SERDES IC
3.3 V
100 Ω
4.7 µH
0.1 µF
4.7 µH
0.1 µF
22 µF
22 µF
4.7 k to 10 k Ω
TD+
0.1 µF
100 Ω
TD-
0.1 µF
VCC,T
LASER DRIVER
0.1 µF
0.1 µF
µF
4.7 k to
10 k Ω
VCC,R VCC,R
VCC,R
50 Ω
50 Ω
0.1 µF
RD+
RD-
Rx LOS
0.1 µF
LOSS OF SIGNAL
3.3 V
MODULE DETECT
SCL
SDA
Figure 2. Typical application configuration.
4.7 k to 10 k Ω
4.7 k to 10 k Ω
4.7 k to 10 k Ω
GND,R
MOD_DEF0
POST AMPLIFIER
MOD_DEF1 MOD_DEF2
V
CC
T
0.1 µF 22 µF
4.7 µH
0.1 µF
3.3 V
V
CC
R
0.1 µF 22 µF
4.7 µH
0.1 µF
SFP MODULE
HOST BOARD
NOTE: INDUCTORS MUST HAVE LESS THAN 1 Ω SERIES RESISTANCE TO LIMIT VOLTAGE DROP TO THE SFP MODULE.
Figure 3. Recommended power supply filter.
7
Table 2. Contact Description
Contact Symbol
1 VeeT
2 TX_FAULT
Function/Description
Transmitter Signal Ground
Transmitter Fault (LVTTL-O) – High indicates a fault condition
11
12
13
14
15
8
9
6
7
10
3
4
5
TX_DISABLE
SDA
SCL
MOD_ABS
RS0
RX_LOS
RS1
VeeR
VeeR
RD-
RD+
VeeR
VccR
Transmitter Disable (LVTTL-I) – High or open disables the transmitter
Two Wire Serial Interface Data Line (LVCMOS – I/O)
(same as MOD-DEF2 in INF-8074)
Two Wire Serial Interface Clock Line (LVCMOS – I/O)
(same as MOD-DEF1 in INF-8074)
Module Absent (Output), connected to VeeT or VeeR in the module
Rate Select 0 - Not used, Presents high input impedance.
Receiver Loss of Signal (LVTTL-O)
Rate Select 1 - Not used, Presents high input impedance.
Receiver Signal Ground
Receiver Signal Ground
Receiver Data Out Inverted (CML-O)
Receiver Data Out (CML-O)
Receiver Signal Ground
Receiver Power + 3.3 V
16
17
18
19
20
VccT
VeeT
TD+
TD-
VeeT
Transmitter Power + 3.3 V
Transmitter Signal Ground
Transmitter Data In (CML-I)
Transmitter Data In Inverted (CML-I)
Transmitter Signal Ground
Notes:
1. The module signal grounds are isolated from the module case.
2. This is an open collector/drain output that on the host board requires a 4.7 kΩ to 10 kΩ pullup resistor to VccHost. See Figure 2.
3. This input is internally biased high with a 4.7 kΩ to 10 kΩ pullup resistor to VccT.
4. Two-Wire Serial interface clock and data lines require an external pullup resistor dependent on the capacitance load.
5. This is a ground return that on the host board requires a 4.7 kΩ to 10 kΩ pullup resistor to VccHost.
Note 2
Note 1
Note 1
Note 1
Note 1
Notes
Note 1
Note 2
Note 3
Note 4
Note 4
Note 5
10
TOWARD
HOST
1
BOTTOM OF
BOARD AS
VIEWED FROM
TOP THROUGH
BOARD
Figure 4. Module edge connector contacts
11
20
TOP VIEW
OF BOARD
8
Table 3. Absolute Maximum Ratings
Stress in excess of any of the individual Absolute Maximum Ratings can cause immediate catastrophic damage to the module even if all other parameters are within Recommended Operating Conditions. It should not be assumed that limiting values of more than one parameter can be applied concurrently. Exposure to any of the Absolute Maximum Ratings for extended periods can adversely affect reliability.
Parameter
Storage Temperature
Case Operating Temperature
Relative Humidity (Non condensing)
Supply Voltage
Symbol Minimum Maximum Unit Notes
T
S
-40 85 C
T
C
-40 85 C
RH 5 95 %
VccT, VccR -0.3 3.8 V Note 1
Low Speed Input Voltage
Two-Wire Interface Input Voltage
High Speed Input Voltage, Single Ended
High Speed Input Voltage, Differential
Low Speed Output Current
-0.5
-0.5
-0.3
-20
Vcc+0.5
Vcc+0.5
Vcc+0.5
2.5
20
Optical Receiver Input Average Power 0
Note;
1. The module supply voltages, VccT and VccR must not differ by more than 0.5 V or damage to the device may occur.
V
V
V
V mA dBm
Table 4. Recommended Operating Conditions
Recommended Operating Conditions specify parameters for which the electrical and optical characteristics hold unless otherwise noted. Optical and electrical charactristics are not defined for operation outside the Recommended Operating Conditions, reliability is not implied and damage to the module may occur for such operation over an extended period of time.
Parameter
Case Operating Temperature
Module Supply Voltage
Symbol Minimum Maximum Unit Notes
T
C
VccT, VccR
0
3.135
70
3.465
°C
V
Note 1
Fig. 3
Host Supply Voltage
Signal Rate
Power Supply Noise Tolerance
VccHost 3.14
9.8
3.46
10.313
66
10Hz to 10MHz
V
GBd mVp-p Fig. 3
Tx Input Single Ended DC
Voltage Tolerance (Ref VeeT)
V -0.3 4.0 V
Rx Output Single Ended Voltage Tolerance V -0.3 4.0 V
Notes:
1. Ambient operating temperature limits are based on the Case Operating Temperature limits and are subject to the host system thermal design.
See Figure 7 for the module Tc reference point.
9
Table 5. Low Speed Signal Electrical Characteristics
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.
Parameter Symbol Minimum Typical Maximum Unit Notes
Module Supply Current
Power Dissipation
TX_FAULT, RX_LOS
TX_DISABLE V
I
I
CC
P
DISS
OH
- 50
V
IH
IL
-0.3
180 289
600 1000
+ 37.5
0.8 mA mW m A
V
Note 1
Note 2
V
OL -
2.0 VccT + 0.3 V Note 3
Notes:
1. Supply current includes both VccT and VccR connections.
2. Measured with a 4.7 k Ω load to VccHost.
3. TX_DISABLE has an internal 4.7 kΩ to 10 kΩ pull-up to VccT
Table 6. High Speed Signal Electrical Characteristics
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.
Parameter Symbol Minimum Typical Maximum Unit Notes
Tx Input Differential Voltage (TD +/-)
Tx Input AC Common Mode Voltage Tolerance
V
I
Tx Input Differential S-parameter (100 Ω Ref.)
Tx Input Differential to Common
Mode Conversion (25 Ω Ref.)
SDD11
SCD11
180
Rx Output Differential Voltage (RD +/-)
Rx Output Termination Mismatch @ 1MHz
Rx Output AC Common Mode Voltage
Rx Output Output Rise and Fall Time
(20% to 80%)
Rx Output Total Jitter
Rx Output 99% Jitter
Vo 300
D Z m tr, tf 28
TJ
J2
700
15
-10
Note 3
-10
850
5
7.5 mV mV(RMS) dB dB dB mV
%
Note 1
0.01-1.0 GHz
1.0-11.1 GHz
0.01-11.1 GHz
Note 2 mV(RMS) Note 5 ps
0.70
0.42
Ulp-p
Ulp-p
Rx Output Differential S-parameter
(100 Ω Ref.)
Rx Output Common Mode Reflection
Coefficient (25 Ω Ref.)
SDD22
SCC22
-12
Note 4
-6
-3 dB dB dB dB
0.01-1.0 GHz
1.0-11.1 GHz
0.01-2.5 GHz
2.5-11.1 GHz
Receiver Output Eye Mask
Notes:
1. Internally AC coupled and terminated (100 Ohm differential).
2. Internally AC coupled but requires an external load termination (100 Ohm differential).
3. Maximum reflection coefficient is expressed as SDD11=Max(-12+2*sqrt(f) , -6.3+13*log10(f/5.5)), for f in GHz.
4. Maximum reflection coefficient is expressed as SDD22=Max(-12+2*sqrt(f) , -6.3+13*log10(f/5.5)), for f in GHz.
5.
The RMS value is measured by calculating the standard deviation of the histogram for one UI of the common mode signal.
See Figure 5a
10
425
150
0
-150
-425
0 0.35
0.65
NORMALIZED TIME (UNIT INTERVAL)
Figure 5a. Receiver Electrical Optical Eye Mask Definition
1.0
1.40
1.0
0.75
0.73
0.5
0.28
0.25
-0.40
0
0 0.25 0.40 0.45
0.55 0.60 0.75
NORMALIZED TIME (UNIT INTERVAL)
Figure 5b. Transmitter Optical Eye Mask Definition
1
Table 7. Two-Wire Interface Electrical Characteristics
Parameter Symbol Min. Max. Unit Conditions
SCL and SDA V
OL
0.0
V
OH
VccHTWI - 0.5
0.40 V Rp [1] pulled to VccHTWI,
VccHTWI + 0.3 V measured at host side of connector
SCL and SDA V
IL
-0.3
V
IH
VccT*0.7
Input Current on the
SCL and SDA Contacts
VccT*0.3 V
VccT + 0.5 V
I l
-10 10 µA
Capacitance on SCL and SDA Contacts
C i[2]
Total bus capacitance C b[3] for SCL and for SDA
14
100
290 pF pF pF
At 400 kHz, 3.0 kΩ Rp, max
At 100 kHz, 8.0 kΩ Rp, max
At 400 kHz, 1.1 kΩRp, max
At 100 kHz, 2.75 kΩ Rp, max
Notes:
1. Rp is the pull up resistor. Active bus termination may be used by the host in place of a pullup resistor. Pull ups can be connected to various power supplies, however the host board design shall ensure that no module contact has voltage exceeding VccT or VccR by 0.5 V nor requires the module to sink more than 3.0 mA current.
2. C i
3. C b
is the capacitance looking into the module SCL and SDA contacts
is the total bus capacitance on the SCL or SDA bus.
11
Table 8. Optical Specifications
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.
Parameter
Transmitter
Minimum Typical Maximum Units Notes
Laser OMA output power
Laser mean output power
Laser off power
Extinction ratio
Transmitter and dispersion penalty (TDP)
Center Wavelength
RMS spectral width, standard deviation
RIN12OMA
Optical Return Loss Tolerance
-4.3
3.0
840
-1.0
-30
3.9
860
-128 dBm dBm dBm dB dB nm dB/Hz
12 dB
1, 2, 3, Table 9
1, 2, 4
1
1, 2
1
1,3, Table 9
1,3, Table 9
1
1
5
1, See Figure 5b Transmitter Output Eye Mask
Receiver
Stressed sensitivity (OMA)
Receive sensitivity (OMA)
Receive Power (Pave) Overload
Reflectance
Center Wavelength
RX_LOS (OMA) Off
RX_LOS (OMA) On
RX_LOS (OMA) Hysteresis
Vertical eye closure penalty
Stressed eye jitter
–
-1.0
840
-30
0.5
3.5
0.3
-7.5
-11.1
-12
860
-12 dBm dBm dBm dB nm dBm dBm dB dB
UI p-p
1
1
1
1
6
6
General Specification Considerations (Notes):
1. IEEE 802.3ae Clause 52 compliant.
2. These parameters are interrelated: see IEEE 802.3ae, Clause 52.
3. See Table 9. Trade-offs are available among spectral width, center wavelength, and minimum optical modulation amplitude.
4. The 10GBASE-SR/SW launch power shall be the lesser of the Class 1 safety limit as defined in IEEE 802.3ae 52.10.2 or the average receive power maximum defined by IEEE 802.3ae -2002 Table 52-9.
5. The transceiver’s launch condition meets the requirement of 10 Gigabit Ethernet multimode fiber as detailed in TIA 492AAAC.
6. Vertical eye closure penalty and Stressed eye jitter are test conditions for Stressed sensitivity (OMA) measurements.
12
Table 9. Minimum Optical Modulation Amplitude
Center
Wavelength
(nm)
840 to 842
842 to 844
RMS Spectral Width (nm)
Up to 0.05 to 0.1 to 0.15 to 0.2 to 0.25 to 0.3 to 0.35 to 0.4 to
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
-4.2 -4.2 -4.1 -4.1 -3.9 -3.8 -3.5 -3.2 -2.8
-4.2 -4.2 -4.2 -4.1 -3.9 -3.8 -3.6 -3.3 -2.9
844 to 846
846 to 848
848 to 850
850 to 852
852 to 854
854 to 856
856 to 858
858 to 860
-4.2
-4.3
-4.3
-4.3
-4.3
-4.3
-4.3
-4.3
-4.2
-4.2
-4.2
-4.2
-4.2
-4.3
-4.3
-4.3
-4.2
-4.2
-4.2
-4.2
-4.2
-4.2
-4.2
-4.2
-4.1
-4.1
-4.1
-4.1
-4.1
-4.1
-4.1
-4.2
-4.0
-4.0
-4.0
-4.0
-4.0
-4.0
-4.0
-4.1
-3.8
-3.8
-3.8
-3.8
-3.9
-3.9
-3.9
-3.9
-3.6
-3.6
-3.6
-3.6
-3.7
-3.7
-3.7
-3.7
-3.3
-3.3
-3.3
-3.4
-3.4
-3.4
-3.5
-3.5
-2.9
-2.9
-3.0
-3.0
-3.1
-3.1
-3.1
-3.2
13
Table 10. Control Functions: Low Speed Signals Timing Characteristics
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
Parameter
TX_DISABLE Assert Time
TX_DISABLE Negate Time
Symbol Minimum Maximum Unit Notes t_off t_on
10
2
µs ms
Note 1 , Fig. 6
Note 2 , Fig. 6
Time to initialize, including reset of TX_FAULT
TX_FAULT Assert Time
TX_DISABLE to Reset
RX_LOS Assert Time t_init t_fault t_reset t_los_on
10
300
1
100 ms ms
µs
µs
Note 3 , Fig. 6
Note 4 , Fig. 6
Note 5 , Fig. 6
Note 6 , Fig. 6
RX_LOS Deassert Time t_los_off 100 µs Note 7 , Fig. 6
Notes:
1. Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal. A 10 ms interval between assertions of TX_
DISABLE is required.
2. Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal.
3. Time from power on or falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal and the Two-Wire interface is available.
4. From power on or negation of TX_FAULT using TX_DISABLE.
5. Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.
6. Time from loss of optical signal to Rx_LOS Assertion.
7. Time from valid optical signal to Rx_LOS De-Assertion.
Table 11. Control Functions: Two-Wire Interface Timing Characteristics
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
Parameter
TX_DISABLE Assert Time
TX_DISABLE Negate Time
TX_FAULT Assert Time
Rx_LOS Assert Time
Symbol t_off_twi t_on_twi t_fault_twi t_loss_on_twi
Minimum Maximum Unit Notes
100
100
100
100 ms ms ms ms
Note 1
Note 2
Note 3
Note 4
Rx_LOS Deassert Time
Analog parameter data ready
Two-Wire Interface Ready
Write Cycle Time Parameter t_loss_off_twi t_data t_serial t_write
100
1000
300
80 ms ms ms ms
Note 5
Note 6
Note 7
Note 8
Two-Wire Interface Clock Rate f_serial_clock 400 kHz Note 9
Time bus free before new transmission can start t_BUF 20 m s Note 10
Notes:
1. Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of nominal. Measured from falling clock edge after stop bit of write transaction.
2. Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises above 90% of nominal.
3. Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.
4. Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.
5. Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.
6. From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.
7. Time from power on until module is ready for data transmission over the two-wire interface (reads or writes over A0h and A2h).
8. Time from stop bit to completion of a 1-8 byte write command. For a one to four byte write the maximum cycle time is 40ms and for a five to eight byte write the maximum cycle time is 80ms.
9. Module may clock stretch for f_serial_clock greater than 100 kHz.
10. Between STOP and START. See SFF 8431 Section 4.3
14
Table 12. Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics
The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted.
Typical values are for Tc = 40°C. VccT and VccR = 3.3 V.
Parameter
Transceiver Internal Temperature
Accuracy
Transceiver Internal Supply
Voltage Accuracy
Transmitter Laser DC Bias Current
Accuracy
Transmitted Average Optical
Output Power Accuracy
Symbol Min. Units Notes
T
V
INT
INT
±3.0 °C
±0.1 V
Temperature is measured internal to the transceiver.
Valid from = -10°C to 85°C case temperature.
Supply voltage is measured internal to the transceiver and can, with less accuracy, be correlated to voltage at the VccT contact. Valid over 3.3 V ± 10%.
I
INT
±10 % I
INT
accuracy is better than ±10% of the nominal value.
P
T
±3.0 dB Average Power coupled into 50/125 µm multi-mode fiber. Valid from100 µW to 500 µW.
Received Average Optical Input
Power Accuracy
P
R
±3.0 dB Average Power coupled from 50/125 µm multi-mode fiber. Valid from 77 µW to 500 µW.
V
CC
T, V
CC
R > 2.97 V
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL
V
CC
T, V
CC
R > 2.97 V
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL t_init t_init t-init: TX DISABLE NEGATED t-init: TX DISABLE ASSERTED
V
CC
T, V
CC
R > 2.97 V
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL t_init
INSERTION t-init: TX DISABLE NEGATED, MODULE HOT PLUGGED
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL t_off t-off & t-on: TX DISABLE ASSERTED THEN NEGATED t_on
OCCURANCE OF FAULT
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL t_fault t-fault: TX FAULT ASSERTED, TX SIGNAL NOT RECOVERED
OCCURANCE OF FAULT
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL
* SFP SHALL CLEAR TX_FAULT IN
< t_init IF THE FAILURE IS TRANSIENT t_reset t_init* t-reset: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL RECOVERED
OCCURANCE OF FAULT
TX_FAULT
TX_DISABLE
TRANSMITTED SIGNAL t_fault t_reset
* SFP SHALL CLEAR TX_FAULT IN
< t_init IF THE FAILURE IS TRANSIENT t_init* t-fault: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL NOT RECOVERED
OPTICAL SIGNAL
LOS t-los-on & t-los-off
Figure 6. Transceiver timing diagrams (module installed and power applied except where noted) t_loss_on
OCCURANCE
OF LOSS
15 t_loss_off
Table 13. EEPROM Serial ID Memory Contents – Conventional SFP Memory (Address A0h)
Byte #
Decimal
0
1
8
9
6
7
10
2
3
4
5
11
12
17
18
19
20
21
13
14
15
16
Data
Hex
03
04
00
00
00
00
00
07
10
00
00
06
67
00
00
00
08
03
00
1E
41
56
Notes
SFP physical device
SFP function defined by serial ID only
LC optical connector
10G Base-SR
64B/66B
10312.5 Mbit/sec nominal bit rate
(10.3125 Gbit/s)
Unspecified
82 m of OM2 50/125 µm fiber
33 m of OM1 62.5/125 µm fiber
300 m of OM3 50/125 µm fiber
“A” - Vendor Name ASCII character
“V” - Vendor Name ASCII character
Byte #
Decimal
37
38
43
44
45
46
47
39
40
41
42
48
49
50
51
52
53
54
55
56
57
58
Data
Hex
00
17
52
2D
37
30
39
6A
41
46
42
53
4D
20
20
20
20
20
5A
20
20
20
Notes
Hex Byte of Vendor OUI [1]
Hex Byte of Vendor OUI [1]
Hex Byte of Vendor OUI [1]
“A” - Vendor Part Number ASCII character
“F” - Vendor Part Number ASCII character
“B” - Vendor Part Number ASCII character
“R” - Vendor Part Number ASCII character
“-” - Vendor Part Number ASCII character
“7” - Vendor Part Number ASCII character
“1” - Vendor Part Number ASCII character
“0” - Vendor Part Number ASCII character
“S” - Vendor Part Number ASCII character
“M” - Vendor Part Number ASCII character
“Z” - Vendor Part Number ASCII character
“ ” - Vendor Part Number ASCII character
“ ” - Vendor Part Number ASCII character
“ ” - Vendor Part Number ASCII character
“ ” - Vendor Part Number ASCII character
“ ” - Vendor Part Number ASCII character
“ ” - Vendor Revision Number ASCII character
“ ” - Vendor Revision Number ASCII character
“ ” - Vendor Revision Number ASCII character
22
23
24
41
47
4F
“A” - Vendor Name ASCII character
“G” - Vendor Name ASCII character
“O” - Vendor Name ASCII character
59
60
61
20
03
52
00
“ ” - Vendor Revision Number ASCII character
Hex Byte of Laser Wavelength
Hex Byte of Laser Wavelength
[2]
[2]
25
26
27
28
20
20
20
20
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
62
63
64
65
00
1A
Checksum for Bytes 0-62 [3]
Receiver limiting output. 1 Watt power class.
Hardware SFP TX_DISABLE, TX_FAULT,
& RX_LOS
29
30
20
20
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
66
67
00
00
31
32
33
34
20
20
20
20
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
“ ” - Vendor Name ASCII character
68-83
84-91
92
93
68
F0
Vendor Serial Number ASCII characters [4]
Vendor Date Code ASCII characters [5]
Digital Diagnostics, Internal Cal, Rx Pwr Avg
A/W, Soft SFP TX_DISABLE, TX_FAULT,
& RX_LOS, RATE_SELECT
SFF-8472 Compliance to revision 10.0
Checksum for Bytes 64-94 [3]
35
36
20
00
“ ” - Vendor Name ASCII character 94
95
03
96 - 255 00
Notes:
1. The IEEE Organizationally Unique Identifier (OUI) assigned to Avago Technologies is 00-17-6A (3 bytes of hex).
2. Laser wavelength is represented in 16 unsigned bits. The hex representation of 850 (nm) is 0352.
3. Addresses 63 and 95 are checksums calculated (per SFF-8472) and stored prior to product shipment.
4. Addresses 68-83 specify the AFBR-710SMZ ASCII serial number and will vary on a per unit basis.
5. Addresses 84-91 specify the AFBR-710SMZ ASCII date code and will vary on a per date code basis.
16
Table 14. EEPROM Serial ID Memory Contents – Enhanced Feature Set Memory (Address A2h)
Byte #
Decimal Notes
0
1
2
Temp H Alarm MSB [1]
Temp H Alarm LSB [1]
Temp L Alarm MSB [1]
Byte #
Decimal Notes
26
27
28
Tx Pwr L Alarm MSB [4]
Tx Pwr L Alarm LSB [4]
Tx Pwr H Warning MSB [4]
Byte #
Decimal Notes
104
105
Real Time Rx Pwr MSB [5]
Real Time Rx Pwr LSB [5]
106 Reserved
13
14
15
16
17
8
9
10
11
12
3 Temp L Alarm LSB [1]
4
5
Temp H Warning MSB [1]
Temp H Warning LSB [1]
6 Temp L Warning MSB [1]
7 Temp L Warning LSB [1]
Vcc H Alarm MSB [2]
Vcc H Alarm LSB [2]
Vcc L Alarm MSB [2]
Vcc L Alarm LSB [2]
Vcc H Warning MSB [2]
29
30
31
34
35
36
37
Tx Pwr H Warning LSB [4]
Tx Pwr L Warning MSB [4]
Tx Pwr L Warning LSB [4]
32 Rx Pwr H Alarm MSB [5]
33 Rx Pwr H Alarm LSB [5]
Rx Pwr L Alarm MSB [5]
Rx Pwr L Alarm LSB [5]
Rx Pwr H Warning MSB [5]
Rx Pwr H Warning LSB [5]
107 Reserved
108 Reserved
109 Reserved
110 Status/Control
-
111 Reserved
112
113
Flag Bits - See Table 16
Flag Bits - See Table 16
114 Reserved
115 Reserved
Vcc H Warning LSB [2]
Vcc L Warning MSB [2]
Vcc L Warning LSB [2]
Tx Bias H Alarm MSB [3]
Tx Bias H Alarm LSB [3]
38
39
Rx Pwr L Warning MSB [5]
Rx Pwr L Warning LSB [5]
116
117
Flag Bits - See Table 16
Flag Bits - See Table 16
40-55 Reserved
56-94
118-127 Reserved
External Calibration Constants [6] 128-247 Customer Writeable
95 Checksum for Bytes 0-94 [7] 248-255 Vendor Specific
96 Real Time Temperature MSB [1]
18
19
20
21
Tx Bias L Alarm MSB [3]
Tx Bias L Alarm LSB [3]
Tx Bias H Warning MSB [3]
Tx Bias H Warning LSB [3]
Tx Bias L Warning MSB [3]
97
98
99
100
Real Time Temperature LSB [1]
Real Time Vcc MSB [2]
Real Time Vcc LS [2]
Real Time Tx Bias MSB [3]
Real Time Tx Bias LSB [3] 22 101
23
24
Tx Bias L Warning LSB [3]
Tx Pwr H Alarm MSB [4]
102
103
Real Time Tx Power MSB [4]
Real Time Tx Power LSB [4]
25 Tx Pwr H Alarm LSB [4]
Notes:
1. Temperature (Temp) is decoded as a 16 bit signed twos compliment integer in increments of 1/256°C.
2. Supply Voltage (Vcc) is decoded as a 16 bit unsigned integer in increments of 100 µV.
3. Laser bias current (Tx Bias) is decoded as a 16 bit unsigned integer in increments of 2 µA.
4. Transmitted average optical power (Tx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 µW.
5. Received average optical power (Rx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 µW.
6. Bytes 56-94 are not intended for use with AFBR-710SMZ, but have been set to default values per SFF-8472.
7. Byte 95 is a checksum calculated (per SFF-8472) and stored prior to product shipment.
17
Table 15. EEPROM Serial ID Memory Contents – Soft Commands (Address A2h, Byte 110)
Status/
Bit # Control Name Description
7
6
TX_ DISABLE State
Soft TX_ DISABLE
5 Reserved
4 Reserved
Digital state of SFP TX_ DISABLE Input (1 = TX_DISABLE asserted)
Read/write bit for changing digital state of TX_DISABLE function
3 Reserved
2 TX_FAULT State Digital state of the SFP TX_FAULT Output (1 = TX_FAULT asserted)
1 RX_LOS State Digital state of the SFP RX_LOS Output (1 = RX_LOS asserted)
0 Data Ready (Bar) Indicates transceiver is powered and real time sense data is ready. (0 = Ready)
Notes:
1. The response time for soft commands of the AFBR-710SMZ is 100 msec as specified by SFF-8472.
2. Bit 6 is logic OR’d with the SFP TX_DISABLE input on contact 3; either asserted will disable the SFP+ transmitter.
Notes
Note 1
Note 1, 2
Note 1
Note 1
Table 16. EEPROM Serial ID Memory Contents – Alarms and Warnings (Address A2h, Bytes 112, 113, 116, 117)
Byte Bit
112 7
6
Flag Bit Name Description
Temp High Alarm
Temp Low Alarm
Set when transceiver internal temperature exceeds high alarm threshold
Set when transceiver internal temperature exceeds low alarm threshold
3
2
5
4
1
Vcc High Alarm
Vcc Low Alarm
Tx Bias High Alarm
Tx Bias Low Alarm
Tx Power High Alarm
113
0
7
Tx Power Low Alarm
Rx Power High Alarm
6 Rx Power Low Alarm
0-5 Reserved
116 7 Temp High Warning
4
3
6
5
2
Temp Low Warning
Vcc High Warning
Vcc Low Warning
Tx Bias High Warning
Tx Bias Low Warning
117
1
0
7
6
Tx Power High Warning
Tx Power Low Warning
Rx Power High Warning
Rx Power Low Warning
0-5 Reserved
Set when transceiver internal supply voltage exceeds high alarm threshold
Set when transceiver internal supply voltage exceeds low alarm threshold
Set when transceiver laser bias current exceeds high alarm threshold
Set when transceiver laser bias current exceeds low alarm threshold
Set when transmitted average optical power exceeds high alarm threshold
Set when transmitted average optical power exceeds low alarm threshold
Set when received average optical power exceeds high alarm threshold
Set when received average optical power exceeds low alarm threshold
Set when transceiver internal temperature exceeds high warning threshold
Set when transceiver internal temperature exceeds low warning threshold
Set when transceiver internal supply voltage exceeds high warning threshold
Set when transceiver internal supply voltage exceeds low warning threshold
Set when transceiver laser bias current exceeds high warning threshold
Set when transceiver laser bias current exceeds low warning threshold
Set when transmitted average optical power exceeds high warning threshold
Set when transmitted average optical power exceeds low warning threshold
Set when received average optical power exceeds high warning threshold
Set when received average optical power exceeds low warning threshold
18
Figure 7. Module drawing
Figure 8. Module label
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-3399EN - April 1 7 , 2019
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