STMicroelectronics SPC56 B, C, D, M, P Series Microcontroller User Manual
Annonce
Annonce
UM1627
User manual
Standard Software Driver for C90LC Flash module embedded on
SPC56 M, B, C, D and P lines microcontroller
Introduction
This document is the user manual for the Standard Software Driver (SSD) for C90LC Flash module.
The SSD is a set of API’s that enables user application to operate on the Flash module embedded on a microcontroller. The C90LC SSD contains a set of functions to program/erase C90LC Flash modules.
The C90LC Standard Software Driver (SSD) provides the following API’s:
FlashInit
FlashErase
BlankCheck
FlashProgram
ProgramVerify
CheckSum
FlashSuspend
FlashResume
GetLock
SetLock
FlashArrayIntegrityCheck
FlashECCLogicCheck
FactoryMarginReadCheck
July 2020 UM1627 Rev 3 1/38 www.st.com
Contents
Contents
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Configuration parameters and macros . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
FlashArrayIntegrityCheck() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
FlashECCLogicCheck() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
FactoryMarginReadCheck() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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List of tables
List of tables
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List of tables UM1627
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1 Introduction
1.1
Introduction
Document overview
This document is the user manual for the Standard Software Driver (SSD) for C90LC Flash module. The roadmap for the document is as follows.
shows the features of the driver.
Appendix A: System requirements details the
system requirement for the driver development. Appendix B: Acronyms
Documentation references list the documents referred and terms used in making of this
document. Appendix B: Acronyms lists the acronyms used.
describes the API specifications. In this section there are many sub sections,
which describe the different aspects of the driver. Section 2.1
provides a general overview of the driver.
mentions about the type definitions used for the driver. Section 2.3
mentions the driver configuration parameters.
describe the
CallBack notifications and return codes for the driver respectively.
provides the detailed description of normal mode and special mode standard software Flash Driver APIs’ respectively.
1.2 Features
The C90LC SSD provides the following features:
Two sets of driver binaries built with Variable-Length-Encoding (VLE) instruction set.
Three sets of driver binaries built with three different toolchains.
Drivers released in binary c-array format to provide compiler-independent support for non-debug-mode embedded applications.
Drivers released in s-record format to provide compiler-independent support for debugmode/JTAG programming tools.
Each driver function is independent of each other so the end user can choose the function subset to meet their particular needs.
Support page-wise programming for fast programming.
Position-independent and ROM-able
Ready-to-use demos illustrating the usage of the driver
Concurrency support via callback
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2 API specification
2.1
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General overview
The C90LC SSD has APIs to handle the erase, program, erase verify and program verify operations on the Flash. Apart from these, it also provides the feature for locking specific blocks and calculating Check sum. This SSD also provides 3 user test APIs for checking the
Array Integrity and the ECC Logic.
2.2
Derived type
BOOL
INT8
VINT8
UINT8
VUINT8
INT16
VINT16
UINT16
VUINT16
INT32
VINT32
UINT32
VUINT32
INT64
VINT64
UINT64
VUINT64
General type definitions
16-bits
16-bits
32-bits
32-bits
32-bits
32-bits
64-bits
64-bits
64-bits
64-bits
8-bits
8-bits
8-bits
8-bits
8-bits
16-bits
16-bits
Table 1. Type definitions
Size C language type description unsigned char signed char volatile signed char unsigned char volatile unsigned char signed short volatile signed short unsigned short volatile unsigned short signed long volatile signed long unsigned long volatile unsigned long signed long long volatile signed long long unsigned long long volatile unsigned long long
2.3 Configuration parameters and macros
The configuration parameter which is used for SSD operations is explained in this section.
The configuration parameters are handled as structure. The user should correctly initialize the fields including c90flRegBase , mainArrayBase , shadowRowBase , shadowRowSize , pageSize and BDMEnable before passing the structure to SSD functions. The pointer to
CallBack has to be initialized either to a null pointer or a valid CallBack function pointer.
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Parameter name
Table 2. SSD configuration structure field definition
Type Parameter description c90flRegBase mainArrayBase mainArraySize shadowRowBase shadowRowSize lowBlockNum midBlockNum highBlockNum pageSize
BDMEnable
UINT32
UINT32
UINT32
UINT32
UINT32
UINT32
UINT32
UINT32
UINT32
UINT32
The base address of C90LC and BIU control registers.
The base address of Flash main array.
The size of Flash main array.
The base address of shadow row
The size of shadow row in byte.
Block number of the low address space.
Block number of the mid address space.
Block number of the high address space.
The page size of the C90LC Flash
Defines the state of background debug mode (enable
/disable)
The type definition for the structure is given below.
typedef struct _ssd_config
{
UINT32 c90flRegBase;
UINT32 mainArrayBase;
UINT32 mainArraySize;
UINT32 shadowRowBase;
UINT32 shadowRowSize;
UINT32 lowBlockNum;
UINT32 midBlockNum;
UINT32 highBlockNum;
UINT32 pageSize;
UINT32 BDMEnable;
} SSD_CONFIG, *PSSD_CONFIG;
2.4 Callback notification
The Standard Software Driver facilitates the user to supply a pointer to ‘ CallBack()’ function so that time-critical events can be serviced during C90LC Standard Software driver operations.
Servicing watchdog timers is one such time critical event. If it is not necessary to provide the
CallBack service, the user is able to disable it by a NULL function macro.
#define NULL_CALLBACK ((void *) 0xFFFFFFFF)
The job processing callback notifications shall have no parameters and no return value.
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2.5 Return codes
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The return code is returned to the caller function to notify the success or errors of the API execution. These are the possible values of return code:
Name
Table 3. Return codes
Value Description
C90FL_OK
C90FL_INFO_RWE
C90FL_INFO_EER
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
C90FL_ERROR_BUSY
0x00000100 Alignment error.
0x00000200 Address range error.
0x00000300
New program/erase cannot be preformed while a high voltage operation is already in progress.
0x00000400 The program operation is unsuccessful.
C90FL_ERROR_PGOOD
C90FL_ERROR_EGOOD
C90FL_ERROR_NOT_BLANK
C90FL_ERROR_VERIFY
0x00000500 The erase operation is unsuccessful.
0x00000600
There is a non-blank Flash memory location within the checked Flash memory region.
0x00000700
There is a mismatch between the source data and the content in the checked Flash memory.
C90FL_ERROR_LOCK_INDICATOR 0x00000800 Invalid block lock indicator.
C90FL_ERROR_RWE 0x00000900
Read-while-write error occurred in previous reads.
C90FL_ERROR_PASSWORD
C90FL_ERROR_AIC_MISMATCH
C90FL_ERROR_AIC_NO_BLOCK
0x00000000 The requested operation is successful.
0x00000001 RWE bit is set before Flash operations.
0x00000002 EER bit is set before Flash operations.
0x00000A00
0x00000B00
0x00000C00
The password provided cannot unlock the block lock register for register writes
In ‘ FlashArrayIntegrityCheck() ’ the MISR values generated by the hardware do not match the values passed by the user.
In ‘
FlashArrayIntegrityCheck()
’ no blocks have been enabled for Array Integrity check
C90FL_ERROR_FMR_MISMATCH
C90FL_ERROR_FMR_NO_BLOCK
C90FL_ERROR_ECC_LOGIC
C90FL_ERROR_SUSP
0x00000D00
0x00000E00
0x00000F00
0x00001000
In ‘ FactoryMarginReadCheck() ’ the MISR values generated by the hardware do not match the values passed by the user.
In ‘
FactoryMarginReadCheck()
’ no blocks have been enabled for Array Integrity check
In ‘ FlashECCLogicCheck() ’ the simulated
ECC error has not occurred.
On going high voltage operation cannot be suspended.
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2.6
2.6.1
API specification
Normal mode functions
FlashInit()
Description
This function reads the Flash configuration information from the Flash control registers and initialize parameters in SSD configuration structure. ‘ FlashIni() ’ must be called prior to any other Flash operations.
Prototype
UINT32 FlashInit (PSSD_CONFIG pSSDConfig);
Arguments
Argument pSSDConfig
Table 4. Arguments for FlashInit()
Description Range
Pointer to the SSD
Configuration Structure.
The values in this structure are chip-dependent.
Please refer to
for more details.
Return values
Type
UINT32
Table 5. Return values for FlashInit()
Description Possible values
Indicates either success or failure type. It is a bit mapped return code so that more than one condition can be returned with a single return code. Each bit in the returned value, except for C90FL_OK, indicates a kind of current status of C90LC module.
C90FL_OK
C90FL_INFO_EER
C90FL_INFO_RWE
Troubleshooting
Error codes
C90FL_INFO_EER
C90FL_INFO_RWE
Table 6. Troubleshooting for FlashInit()
Possible causes Solution
An ECC Error occurred during a previous read.
Clear FLASH_MCR-EER bit.
A Read While Write Error occurred during a previous read
Clear the FLASH_MCR-RWE bit.
Comments
‘ FlashIni() ’ checks the C90FL_MCR_RWE and C90FL_MCR_EER bit, but does not clear them when any of them is set. If RWE bit is set, Flash program/erase operations can still be performed.
Assumptions
None.
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2.6.2 FlashErase()
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Description
This function erases the enabled blocks in the main array or the shadow row. Input arguments together with relevant Flash module status are checked, and relevant error code is returned if there is any error.
Prototyp s e
UINT32 FlahErase (PSSD_CONFIG pSSDConfig,
BOOL shadowFlag,
UINT32 lowEnabledBlocks,
UINT32 midEnabledBlocks,
UINT32 highEnabledBlocks, void (*CallBack)(void));
Arguments
Argument
Table 7. Arguments for FlashErase()
Description Range pSSDConfig shadowFlag lowEnabledBlocks midEnabledBlocks highEnabledBlocks
CallBack
Pointer to the SSD
Configuration Structure.
The values in this structure are chip-dependent.
Indicate either the main array or the shadow row to be erased.
TRUE: the shadow row is erased. The lowEnabledBlocks
, midEnabledBlocks
and highEnabledBlocks
are ignored;
FALSE: the main array is erased. Which blocks are erased in low, mid and high address spaces are specified by lowEnabledBlocks
, midEnabledBlocks and highEnabledBlocks respectively.
To select the array blocks in low address space for erasing.
To select the array blocks in mid address space for erasing.
To select the array blocks in high address space for erasing.
Address of void call back function pointer.
Bit-mapped value. Select the block in the low address space to be erased by setting 1 to the appropriate bit of lowEnabledBlocks
. If there is not any block to be erased in the low address space, lowEnabledBlocks
must be set to 0.
Bit-mapped value. Select the block in the middle address space to be erased by setting 1 to the appropriate bit of midEnabledBlocks
. If there is not any block to be erased in the middle address space, midEnabledBlocks
must be set to 0.
Bit-mapped value. Select the block in the high address space to be erased by setting 1 to the appropriate bit of highEnabledBlocks . If there is not any block to be erased in the high address space, highEnabledBlocks
must be set to 0.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
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Return values
Type
UINT32
Table 8. Return values for FlashErase()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_BUSY
C90FL_ERROR_EGOOD
Troubleshooting
Error codes
Table 9. Troubleshooting for FlashErase()
Possible causes Solution
C90FL_ERROR_BUSY
C90FL_ERROR_ EGOOD
New erase operation cannot be performed because there is program/erase sequence in progress on the Flash module.
Wait until all previous program/erase operations on the Flash module finish.
Possible cases that erase cannot start are:
– erase in progress (FLASH_MCR-
ERS is high);
– program in progress (FLASH_MCR-
PGM is high);
Erase operation failed.
Check if the C90LC is available and high voltage is applied to C90LC. Then try to do the erase operation again.
Comments
When shadowFlag is set to FALSE, the ‘FlashErase()’ function erases the blocks in the main array. It is capable of erasing any combination of blocks in the low, mid and high address spaces in one operation. If shadowFlag is TRUE, this function erases the shadow row.
The inputs lowEnabledBlocks , midEnabledBlocks and highEnabledBlocks are bit-mapped arguments that are used to select the blocks to be erased in the Low/Mid/High address spaces of main array. The selection of the blocks of the main array is determined by setting/clearing the corresponding bit in lowEnabledBlocks , midEnabledBlocks or highEnabledBlocks .
The bit allocations for blocks in one address space are: bit 0 is assigned to block 0, bit 1 to block 1, etc. The following diagrams give an example of the formats of lowEnabledBlocks , midEnabledBlocks and highEnabledBlocks for the C90LC module. Refer to
for the valid bits configuration depending from the specific microcontroller Flash module sectors.
Table 10. Bit allocation for blocks in low address space
MSB bit 31 reserved
…
… bit 10 reserved bit 9 block 9 bit 8 block 8
…
… bit 1 block 1
LSB bit 0 block 0
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MSB bit 31 reserved
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Table 11. Bit allocation for blocks in middle address space
…
… bit 4 bit 3 bit 2 bit 1 reserved reserved reserved block 1
LSB bit 0 block 0
2.6.3
MSB bit 31 reserved
Table 12. Bit allocation for blocks in high address space
…
… bit 6 reserved bit 5 block 5 bit 4 block 4
…
… bit 1
Block 1
LSB bit 0
Block 0
If the selected main array blocks or the shadow row is locked for erasing, those blocks or the shadow row are not erased, but ‘ FlashErase()’ still returns C90FL_OK. User needs to check the erasing result with the ‘ BlankCheck() ’ function.
It is impossible to erase any Flash block or shadow row when a program or erase operation is already in progress on C90LC module. ‘ FlashErase()’ returns C90FL_ERROR_BUSY when trying to do so. Similarly, once an erasing operation has started on C90LC module, it is impossible to run another program or erase operation.
In addition, when ‘ FlashErase()’ is running, it is unsafe to read the data from the Flash module having one or more blocks being erased. Otherwise, it causes a Read-While-Write error.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
BlankCheck()
Description
This function checks on the specified Flash range in the main array or shadow row for blank state. If the blank checking fails, the first failing address and the failing data in Flash block are saved.
Prototype
UINT32 BlankCheck (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 * pFailAddress,
UINT64 *pFailData, void (*CallBack) (void ));
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Arguments
Argument pSSDConfig dest size pFailAddress pFailData
CallBack
Table 13. Arguments for BlankCheck()
Description Range
Pointer to the SSD
Configuration Structure.
Destination address to be checked.
Size, in bytes, of the Flash region to check.
The values in this structure are chip-dependent.
Any accessible address aligned on double word boundary in main array or shadow row
If size = 0, the return value is C90FL_OK.
It should be multiple of 8 and its combination with dest
should fall in either main array or shadow row.
Return the address of the first non-blank Flash location in the checking region
Only valid when this function returns
C90FL_ERROR_NOT_BLANK.
Return the content of the first non-blank Flash location in the checking region.
Address of void callback function
Only valid when this function returns
C90FL_ERROR_NOT_BLANK.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
Return values
Type
UINT32
Table 14. Return values for BlankCheck()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
C90FL_ERROR_NOT_BLANK
Troubleshooting
Table 15. Troubleshooting for BlankCheck()
Returned error bits Description Solution
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
C90FL_ERROR_NOT_BLANK
The dest
/ size
are not properly aligned.
There is a non-blank double word within the area to be checked.
Check if dest
and size are aligned on double word (64-bit) boundary.
The area specified by dest and size
is out of the valid
C90LC array ranges.
Check dest
and dest
+ size
. The area to be checked must be within main array space or shadow space.
Erase the relevant blocks and check again.
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2.6.4
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Comments
If the blank checking fails, the first failing address is saved to *
pFailAddress
, and the failing data in Flash is saved to *
pFailData
. The contents pointed by
pFailAddress
and
pFailData
are updated only when there is a non-blank location in the checked Flash range.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
FlashProgram()
Description
This function programs the specified Flash areas with the provided source data. Input arguments together with relevant Flash module status are checked, and relevant error code are returned if there is any error.
Prototype
UINT32 FlashProgram (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 source, void (*CallBack)(void));
Arguments
Argument pSSDConfig
Dest
Size source
CallBack
Table 16. Arguments for FlashProgram()
Description Range
Pointer to the SSD
Configuration Structure.
Destination address to be programmed in Flash memory.
The values in this structure are chip-dependent.
Please refer to
for more details.
Any accessible address aligned on double word boundary in main array or shadow row.
Size, in bytes, of the Flash region to be programmed.
If size = 0, C90FL_OK is returned.
It should be multiple of 8 and its combination with dest should fall in either main array or shadow row.
Source program buffer address.
Address of void call back function pointer.
This address must reside on word boundary.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
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Return values
Type
UINT32
Table 17. Return values for FlashProgram()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_BUSY
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
C90FL_ERROR_PGOOD
Troubleshooting
Table 18. Troubleshooting for FlashProgram()
Returned error bits Description Solution
C90FL_ERROR_BUSY
C90FL_ERROR_ALIGNMENT
New program operation cannot be performed because the
Flash module is busy with some operation and cannot meet the condition for starting a program operation.
Wait until the current operations finish.
Conditions that program cannot start are:
1. program in progress (MCR-PGM high);
2. program not in progress (MCR-PGM low), but:
– erase in progress but not suspended;
– erase on main array is suspended but program is targeted to shadow row;
– erase on shadow row is suspended.
This error indicates that dest
/ size
/ source isn’t properly aligned
Check if dest
and size
are aligned on double word (64-bit) boundary. Check if source is aligned on word boundary.
C90FL_ERROR_RANGE
C90FL_ERROR_PGOOD
The area specified by dest
and size
is out of the valid C90LC address range.
Program operation failed because this operation cannot pass
PEG check.
Check dest and dest
Repeat the program operation. Check if the
C90LC is invalid or high voltage applied to
C90LC is unsuitable.
+ size . Both should fall in the same C90LC address ranges, i.e. both in main array or both in shadow row
Comments
If the selected main array blocks or the shadow row is locked for programming, those blocks or the shadow row are not programmed, and ‘ FlashProgram() ’ still returns C90FL_OK. User needs to verify the programmed data with ‘ ProgramVerify() ’ function.
It is impossible to program any Flash block or shadow row when a program or erase operation is already in progress on C90LC module. ‘ FlashProgram() ’ returns
C90FL_ERROR_BUSY when doing so. However, user can use the ‘ FlashSuspend() ’ function to suspend an on-going erase operation on one block to perform a program operation on another block. An exception is that once the user has begun an erase operation on the shadow row, it may not be suspended to program the main array and viceversa.
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2.6.5
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It is unsafe to read the data from the Flash partitions having one or more blocks being programmed when ‘ FlashProgram() ’ is running. Otherwise, it causes a Read-While-Write error.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
ProgramVerify()
Description
This function checks if a programmed Flash range matches the corresponding source data buffer. In case of mismatch, the failed address, destination value and source value are saved and relevant error code is returned.
Prototype
UINT32 ProgramVerify (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 source,
UINT32 *pFailAddress,
UINT64 *pFailData,
UINT64 *pFailSource, void (*CallBack)(void));
Arguments
Argument pSSDConfig
Dest
Size
Source pFailAddress pFailData pFailSource
CallBack
Table 19. Arguments for ProgramVerify()
Description Range
Pointer to the SSD
Configuration Structure.
Destination address to be verified in Flash memory.
The values in this structure are chip-dependent.
Please refer to
for more details.
Any accessible address aligned on double word boundary in main array or shadow row.
Size, in byte, of the Flash region to verify.
If size = 0, C90FL_OK is returned. Its combination with dest
should fall within either main array or shadow row.
Verify source buffer address.
Return first failing address in
Flash.
Returns first mismatch data in
Flash.
This address must reside on word boundary.
Only valid when the function returns
C90FL_ERROR_VERIFY.
Only valid when this function returns
C90FL_ERROR_VERIFY.
Returns first mismatch data in buffer.
Address of void call back function pointer.
Only valid when this function returns
C90FL_ERROR_VERIFY.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
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API specification
Return values
Type
UINT32
Table 20. Return values for ProgramVerify()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
C90FL_ERROR_VERIFY
Troubleshooting
Table 21. Troubleshooting for ProgramVerify()
Returned error bits Description Solution
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
C90FL_ERROR_VERIFY
This error indicates that dest
/ size
/ source isn’t properly aligned
Check if dest and size are aligned on double word (64-bit) boundary. Check if source is aligned on word boundary
The area specified by dest
and size
is out of the valid C90LC address range.
Check dest and dest + size , both should fall in the same C90LC address ranges, i.e. both in main array or both in shadow row
The content in C90LC and source data mismatch.
Check the correct source and destination addresses, erase the block and reprogram data into Flash.
Comments
The contents pointed by pFailLoc , pFailData and pFailSource are updated only when there is a mismatch between the source and destination regions.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
CheckSum()
Description
This function performs a 32-bit sum over the specified Flash memory range without carry, which provides a rapid method for checking data integrity.
Prototype
UINT32 CheckSum (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 *pSum, void (*CallBack)(void));
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Arguments
Argument pSSDConfig
Dest
Size pSum
CallBack
Table 22. Arguments for CheckSum()
Description Range
Pointer to the SSD
Configuration Structure.
Destination address to be summed in Flash memory.
Size, in bytes, of the Flash region to check sum.
The values in this structure are chip-dependent.
Please refer to
for more details.
Any accessible address aligned on double word boundary in either main array or shadow row.
If size is 0 and the other parameters are all valid,
C90FL_OK is returned. Its combination with dest should fall within either main array or shadow row.
Returns the sum value.
Address of void call back function pointer.
0x00000000 - 0xFFFFFFFF. Note that this value is only valid when the function returns C90FL_OK.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
Return values
Type
UINT32
Table 23. Return values for CheckSum()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
Troubleshooting
Table 24. Troubleshooting for CheckSum()
Returned error bits Description Solution
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
This error indicates that dest / size isn’t properly aligned
Check if dest
and size
are aligned on double word (64-bit) boundary. Check if source
is aligned on word boundary
The area specified by dest and size is out of the valid
C90LC address range.
Check dest
and dest
+ size
, both should fall in the same C90LC address ranges, i.e. both in main array or both in shadow row
Comments
None.
Assumptions
It assumes that the Flash block is initialized using a ‘
FlashInit()
’ API .
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API specification
FlashSuspend()
Description
This function checks if there is any high voltage operation, erase or program, in progress on the C90LC module and if the operation can be suspended. This function suspends the ongoing operation if it can be suspended (for C90LC modules it applies only to erase operation).
Prototype
UINT32 FlashSuspend (PSSD_CONFIG pSSDConfig,
UINT8 *suspendState,
BOOL *suspendFlag);
Arguments
Argument pSSDConfig suspendState suspendFlag
Table 25. Arguments for FlashSuspend()
Description Range
Pointer to the SSD
Configuration Structure.
Indicate the suspend state of C90LC module after the function being called.
Return whether the suspended operation, if there is any, is suspended by this call.
The values in this structure are chip-dependent.
Please refer to
for more details.
All return values are enumerated in
.
TRUE: the operation is suspended by this call;
FALSE: either no operation to be suspended or the operation is suspended not by this call.
Return values
Type
UINT32
UINT32
Table 26. Return values for FlashSuspend()
Description Possible values
Successful completion.
Ongoing operation cannot be suspended.
C90FL_OK
C90FL_ERROR_SUSP
Troubleshooting
None.
Comments
After calling ‘ FlashSuspend() ’, if no error is returned, read is allowed on both main array space and shadow row without any Read-While-Write error. But data read from the blocks targeted for programming or erasing is indeterminate even if the operation is suspended.
This function should be used together with ‘ FlashResume() ’. The suspendFlag returned by
‘ FlashSuspend() ’ determine whether ‘ FlashResume() ’ needs to be called or not. If suspendFlag is TRUE, ‘ FlashResume() ’ must be called symmetrically to resume the suspended operation.
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Following table defines and describes various suspend states and associated suspend codes.
Argument
NO_OPERTION
PGM_WRITE
ERS_WRITE
PGM_SUS
ERS_SUS
SHADOW_ERS_SUS
ERS_SUS_PGM_SUS
NO_SUS
0
1
2
ERS_SUS_PGM_WRITE 3
4
5
6
7
8
Table 27. suspendState definitions
Code Description Valid operation after suspend
There is no program/erase operation.
Erasing operation, programming operation and read are valid on both main array space and shadow row.
There is a program sequence in interlock write stage.
There is an erase sequence in interlock write stage.
Only read is valid on both main array space and shadow row.
Only read is valid on both main array space and shadow row.
There is an erasesuspend program sequence in interlock write stage.
The program operation is in suspended state.
Only read is valid on both main array space and shadow row.
The erase operation on main array is in suspended state.
Only read is valid on both main array space and shadow row.
Programming operation is valid only on main array space. Read is valid on both main array space and shadow row.
The erase operation on shadow row is in suspended state.
The erase-suspended program operation is in suspended state.
The ongoing high voltage operation has not been suspended.
Read is valid on both main array space and shadow space.
Only read is valid on both main array space and shadow row.
No operation is valid on both main array space and shadow row.
The table below lists the Suspend Flag values returned against the Suspend State and the
Flash block status.
Table 28. Suspending state and flag vs. C90LC status suspendState EHV ERS ESUS PGM PSUS PEAS suspendFlag
NO_OPERATION
PGM_WRITE
ERS_WRITE
ESUS_PGM_WRITE
PGM_SUS
0
1
X
X
0
0
1
0
0
0
0
1
1
X
X
X
X
0
1
1
1
0
1
0
0
0
1
X
0
X
X
X
X
X
X
X
FALSE
FALSE
FALSE
FALSE
TRUE
FALSE
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UM1627
2.6.8
API specification
Table 28. Suspending state and flag vs. C90LC status (continued) suspendState EHV ERS ESUS PGM PSUS PEAS suspendFlag
ERS_SUS
SHADOW_ERS_SUS
ERS_SUS_PGM_SUS
ERS_SUS
1
X
1
1
X
1
X
1
1
0
1
1
1
1
1
1
0
0
1
0
1
1
1
1
0
0
0
0
0
1
X
X
X
X
X
X
X
X
1
1
0
0
TRUE
FALSE
TRUE
FALSE
TRUE
FALSE
FALSE
The values of EHV, ERS, ESUS, PGM, PSUS and PEAS represent the C90LC status at the entry of FlashSuspend;
0: Logic zero; 1: Logic one; X: Do-not-care .
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
FlashResume()
Description
This function checks if there is any suspended erase or program operation on the C90LC module, and resumes the suspended operation if there is any.
Prototype
UINT32 FlashResume (PSSD_CONFIG pSSDConfig,
UINT8 *resumeState);
Arguments
Argument pSSDConfig resumeState
Table 29. Arguments for FlashResume()
Description Range
Pointer to the SSD
Configuration Structure.
The values in this structure are chip-dependent.
Please refer to
Indicate the resume state of
C90LC module after the function being called.
All return values are listed in Table 31
.
Return values
Type
UINT32
Table 30. Return values for FlashResume()
Description Possible values
Successful completion.
C90FL_OK
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API specification UM1627
Troubleshooting
None.
Comments
This function resumes one operation if there is any operation is suspended. For instance, if a program operation is in suspended state, it is resumed. If an erase operation is in suspended state, it is resumed too. If an erase-suspended program operation is in suspended state, the program operation is resumed prior to resuming the erase operation. It is better to call this function based on suspendFlag returned from ‘ FlashSupend()’ .
Following table defines and describes various resume states and associated resume codes.
Code Name
RES_NOTHING
RES_PGM
RES_ERS
RES_ERS_PGM
2
3
0
1
Table 31. resumeState definitions
Value Description
No program/erase operation to be resumed
A program operation is resumed
A erase operation is resumed
A suspended erase-suspended program operation is resumed
2.6.9
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
GetLock()
Description
This function checks the block locking status of Shadow/Low/Middle/High address spaces in the C90LC module.
Prototype
UINT32 GetLock (PSSD_CONFIG pSSDConfig,
UINT8 blkLockIndicator,
BOOL *blkLockEnabled,
UINT32 *blkLockState);
Arguments
Argument pSSDConfig blkLockIndicator
Table 32. Arguments for GetLock()
Description Range
Pointer to the SSD
Configuration Structure.
The values in this structure are chip-dependent.
Please refer to
Indicating the address space and the block locking level, which determines the address space block locking register to be checked.
Refer to
for valid values for this parameter.
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Argument blkLockEnabled blkLockState
Table 32. Arguments for GetLock() (continued)
Description Range
Indicate whether the address space block locking register is enabled for register writes
TRUE – The address space block locking register is enabled for register writes.
FALSE – The address space block locking register is disabled for register writes.
Returns the blocks’ locking status of indicated locking level in the given address space
Bit mapped value indicating the locking status of the specified locking level and address space.
1: The block is locked from program/erase.
0: The block is ready for program/erase
Return values
Type
UINT32
Table 33. Return values for GetLock()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_LOCK_INDICATOR
Troubleshooting
Table 34. Troubleshooting for GetLock()
Returned error bits Possible causes
C90FL_ERROR_LOCK_INDICATOR
The input blkLockIndicator is invalid.
Solution
Set this argument to correct
.
Comments
Following table defines and describes various blkLockIndicator values.
Code Name
LOCK_SHADOW_PRIMARY
Table 35. blkLockIndicator definitions
Value Description
0
LOCK_SHADOW_SECONDARY 1
LOCK_LOW_PRIMARY
LOCK_LOW_SECONDARY
LOCK_MID_PRIMARY
LOCK_MID_SECONDARY
LOCK_HIGH
2
3
4
5
6
Primary block lock protection of shadow address space
Secondary block lock protection of shadow address space
Primary block lock protection of low address space
Secondary block lock protection of low address space
Primary block lock protection of mid address space
Secondary block lock protection of mid address space
Block lock protection of high address space
For Shadow/Low/Mid address spaces, there are two block lock levels. The secondary level of block locking provides an alternative means to protect blocks from being modified. A logical “OR” of the corresponding bits in the primary and secondary lock registers for a block
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API specification UM1627 determines the final lock status for that block. For high address space there is only one block lock level.
The output parameter blkLockState returns a bit-mapped value indicating the block lock status of the specified locking level and address space. A main array block or shadow row is locked from program/erase if its corresponding bit is set.
The indicated address space determines the valid bits of blkLockState . For either
Low/Mid/High address spaces, if blocks corresponding to valid block lock state bits are not present (due to configuration or total memory size), values for these block lock state bits are always 1 because such blocks are locked by hardware on reset. These blocks cannot be unlocked by software with ‘ SetLock() ’ function.
The following diagrams give an example of the block bitmap definitions of blkLockState for
shadow/Low/Mid/High address spaces. Refer to Appendix C: Documentation references
for the valid bits configuration depending from the specific microcontroller Flash module sectors.
Table 36. blkLockState bit allocation for shadow address space
MSB bit 31 reserved …
…
LSB bit 1 bit 0 reserved shadow row
MSB bit 31 reserved
Table 37. blkLockState bit allocation for low address space
…
… bit 10 bit 9 reserved block 9 bit 8 block 8
…
…
LSB bit 1 bit 0 block 1 block 0
MSB bit 31 reserved
Table 38. blkLockState bit allocation for mid address space
…
…
LSB bit 4 bit 3 bit 2 bit 1 bit 0 reserved reserved reserved block 1 block 0
MSB bit 31 reserved
Table 39. blkLockState bit allocation for high address space
…
… bit 6 reserved bit 5 block 5 bit 4 block 4
…
…
LSB bit 1 bit 0 block 1 block 0
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
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2.6.10 SetLock()
Description
This function sets the block lock state for Shadow/Low/Middle/High address space on the
C90LC module to protect them from program/erase. The API provides password to enable block lock register writes when needed and write the block lock value to block lock register for the requested address space.
Prototype
UINT32 SetLock (PSSD_CONFIG pSSDConfig,
UINT8 blkLockIndicator,
UINT32 blkLockState,
UINT32 password);
Arguments
Argument pSSDConfig blkLockIndicator blkLockState password
Table 40. Arguments for SetLock()
Description Range
Pointer to the SSD
Configuration Structure.
Indicating the address space and the protection level of the block lock register to be read.
The values in this structure are chip-dependent.
Please refer to
for more details.
for valid codes for this parameter.
The block locks to be set to the specified address space and protection level.
Bit mapped value indicating the lock status of the specified protection level and address space.
1: The block is locked from program/erase.
0: The block is ready for program/erase
A password is required to enable the block lock register for register write.
Correct passwords for block lock registers are
0xA1A1_1111 for Low/Mid Address Space Block
Locking Register, 0xC3C3_3333 for Secondary
Low/Mid Address Space Block Locking Register, and 0xB2B2_2222 for High Address Space Block
Select Register.
Return values
Type
UINT32
Table 41. Return values for SetLock()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_LOCK_INDICATOR
C90FL_ERROR_PASSWORD
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Troubleshooting
The troubleshooting mentioned below comprises of hardware errors due to both P Flash block erase verify and P Flash section erase verify command. Apart from these the input based error handling is also mentioned.
Table 42. Troubleshooting for SetLock()
Returned error bits
C90FL_ERROR_LOCK_INDICATOR
C90FL_ERROR_PASSWORD
Possible causes Solution
The input blkLockIndicator is invalid.
Set this argument to correct value listed in
The given password cannot enable the block lock register for register writes.
Pass in a correct password.
Comments
The bit field allocation for blkLockState is same as that in ‘ GetLock() ’ function.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
2.7
2.7.1
User test mode functions
FlashArrayIntegrityCheck()
Description
This function checks the array integrity of the Flash. The user specified address sequence is used for array integrity reads and the operation is done on the specified blocks. The MISR values calculated by the hardware is compared to the values passed by the user, if they are not the same, then an error code is returned.
Prototype
UINT32 FlashArrayIntegrityCheck (PSSD_CONFIG pSSDConfig,
UINT32 lowEnabledBlocks,
UINT32 midEnabledBlocks,
UINT32 highEnabledBlocks,
UINT8 addrSeq,
MISR misrValue, void (*CallBack)(void));
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Arguments
Argument pSSDConfig lowEnabledBlocks midEnabledBlocks highEnabledBlocks addrSeq misrValue
CallBack
Table 43. Arguments for FlashArrayIntegrityCheck()
Description Range
Pointer to the SSD
Configuration Structure.
The values in this structure are chip-dependent.
Please refer to
To select the array blocks in low address space for erasing.
Bit-mapped value. Select the block in the low address space whose array integrity is to be evaluated by setting 1 to the appropriate bit of lowEnabledBlocks
. If there is not any block to be evaluated in the low address space, lowEnabledBlocks must be set to 0.
To select the array blocks in mid address space for erasing.
Bit-mapped value. Select the block in the middle address space whose array integrity is to be evaluated by setting 1 to the appropriate bit of midEnabledBlocks
. If there is not any block to be evaluated in the middle address space, midEnabledBlocks
must be set to 0.
To select the array blocks in high address space for erasing.
Bit-mapped value. Select the block in the high address space whose array integrity is to be evaluated by setting 1 to the appropriate bit of highEnabledBlocks
. If there is not any block to be evaluated in the high address space, highEnabledBlocks
must be set to 0.
To determine the address sequence to be used during array integrity checks.
The default sequence ( addrSeq = 0) is meant to replicate sequences normal “user” code follows, and thoroughly check the read propagation paths.
This sequence is proprietary.
The alternative sequence ( addrSeq = 1) is just logically sequential.
It should be noted that the time to run a sequential sequence is significantly shorter than the time to run the proprietary sequence.
A structure variable containing the MISR values calculated by the user using the off line
MISR generation tool.
The individual MISR words can range from
0x00000000 - 0xFFFFFFFF
Address of void call back function pointer.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
Return values
Type
UINT32
Table 44. Return values for FlashArrayIntegrityCheck()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_AIC_MISMATCH
C90FL_ERROR_AIC_NO_BLOCK
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Troubleshooting
The trouble shooting given here comprises of hardware errors and input parameter error.
Table 45. Troubleshooting for FlashArrayIntegrityCheck()
Returned error bits Possible causes Solution
The MISR value calculated by the user is incorrect.
Re-calculate the MISR values using the correct Data and addrSeq.
C90FL_ERROR_AIC_MISMATCH
C90FL_ERROR_AIC_NO_BLOCK
The MISR calculated by the
Hardware is incorrect.
Hardware Error.
None of the Blocks are enabled for Array Integrity Check
Enable any of the blocks using variables lowEnabledBlocks, midEnabledBlocks and highEnabledBlock.
Comments
The inputs lowEnabledBlocks , midEnabledBlocks and highEnabledBlocks are bit-mapped arguments that are used to select the blocks to be evaluated in the Low/Mid/High address spaces of main array. The selection of the blocks of the main array is determined by setting/clearing the corresponding bit in lowEnabledBlocks , midEnabledBlocks or highEnabledBlocks .
The bit allocations for blocks in one address space are: bit 0 is assigned to block 0, bit 1 to block 1, etc. The following diagrams give an example of the formats of lowEnabledBlocks , midEnabledBlocks and highEnabledBlocks for the C90LC module.
Refer to Appendix C: Documentation references
for the valid bits configuration depending from the specific microcontroller Flash module sectors.
Table 46. Bit allocation for blocks in low address space
MSB bit 31 reserved
…
… bit 10 reserved bit 9 block 9 bit 8 block 8
…
… bit 1 block 1
LSB bit 0 block 0
MSB bit 31 reserved
Table 47. Bit allocation for blocks in middle address space
…
… bit 4 bit 3 bit 2 bit 1 reserved reserved reserved block 1
LSB bit 0 block 0
MSB bit 31 reserved
Table 48. Bit allocation for blocks in high address space
…
… bit 6 reserved bit 5 block 5 bit 4 block 4
…
… bit 1
Block 1
LSB bit 0
Block 0
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2.7.2
API specification
If no blocks are enabled the C90FL_ERROR_AIC_NO_BLOCK error code is returned.
Depending on the address sequence specified the MISR values are calculated for the enabled blocks using the corresponding sequence. If the MISR values calculated by the hardware is not the same as the values passed to this API by the user then the API returns the error code C90FL_ERROR_AIC_MISMATCH.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
FlashECCLogicCheck()
Description
This function checks the ECC logic of the Flash. The API simulates a single or double bit fault depending on the user input. If the simulated ECC error is not detected, then the error code C90FL_ERROR_ECC_LOGIC is returned.
Prototype
UINT32 FlashECCCLogicCheck (PSSD_CONFIG pSSDConfig,
UINT64 dataVal,
UINT64 errBits,
UINT32 eccValue)
Arguments
Argument pSSDConfig dataValue errBits eccValue
Table 49. Arguments for FlashECCLogicCheck()
Description Range
Pointer to the SSD
Configuration Structure.
The values in this structure are chip-dependent.
Please refer to
for more details.
The 64 bits of data for which the ECC is calculated. The bits of dataValue are flipped to generate single or double bit faults.
Any 64-bit value.
Is a 64-bit mask of the bits at which the user intends to inject error.
Any 64-bit value, except zero.
It’s a 32 bit value which has to be passed by user. This is calculated using an off line ECC Calculator.
This is a corresponding ECC value for the data value passed by the user.
Note: Same data words should be used in off line
ECC calculator and Flash ECC logic check API.
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API specification UM1627
Return values
Type
UINT32
Table 50. Return values for FlashECCLogicCheck()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_ECC_LOGIC
Troubleshooting
The trouble shooting given here comprises of hardware errors and input parameter error.
Table 51. Troubleshooting for FlashECCLogicCheck()
Returned error bits Possible causes Solution
C90FL_ERROR_ECC_LOGIC Hardware Failure.
Hardware error.
2.7.3
Comments
Depending on the errBits value, a single or double bit faults are simulated. When a Flash read is done, if the simulated error has not occurred, then the API returns the error code
C90FL_ERROR_ECC_LOGIC.
Assumptions
It assumes that the Flash block is initialized using a ‘ FlashInit() ’ API.
FactoryMarginReadCheck()
Description
This function checks the Factory Margin reads of the Flash. The user specified margin level is used for reads and the operation is done on the specified blocks. The MISR values calculated by the hardware is compared to the values passed by the user, if they are not the same, then an error code is returned.
Prototype
UINT32 FactoryMarginReadCheck (PSSD_CONFIG pSSDConfig,
UINT32 lowEnabledBlocks,
UINT32 midEnabledBlocks,
UINT32 highEnabledBlocks,
UINT8 marginLevel,
MISR misrValue, void (*CallBack)(void));
30/38 UM1627 Rev3
UM1627 API specification
Arguments
Argument pSSDConfig lowEnabledBlocks midEnabledBlocks highEnabledBlocks marginLevel misrValue
CallBack
Table 52. Arguments for FactoryMarginReadCheck()
Description Range
Pointer to the SSD
Configuration Structure.
To select the array blocks in low address space for erasing.
To select the array blocks in mid address space for erasing.
To select the array blocks in high address space for erasing.
The values in this structure are chip-dependent.
Please refer to
Bit-mapped value. Select the block in the low address space whose array integrity is to be evaluated by setting 1 to the appropriate bit of lowEnabledBlocks
. If there is not any block to be evaluated in the low address space, lowEnabledBlocks must be set to 0.
Bit-mapped value. Select the block in the middle address space whose array integrity is to be evaluated by setting 1 to the appropriate bit of midEnabledBlocks
. If there is not any block to be evaluated in the middle address space, midEnabledBlocks
must be set to 0.
Bit-mapped value. Select the block in the high address space whose array integrity is to be evaluated by setting 1 to the appropriate bit of highEnabledBlocks
. If there is not any block to be evaluated in the high address space, highEnabledBlocks
must be set to 0.
To determine the margin level to be used during factory margin read checks.
A structure variable containing the MISR values calculated by the user using the off line
MISR generation tool.
Selects the margin level that is being checked.
Margin can be checked to an erased level
(marginLevel=1) or to a programmed level
(marginLevel =0).
The individual MISR words can range from
0x00000000 - 0xFFFFFFFF
Address of void call back function pointer.
Any addressable void function address. To disable it use NULL_CALLBACK macro.
Return values
Type
UINT32
Table 53. Return values for FactoryMarginReadCheck()
Description Possible values
Successful completion or error value.
C90FL_OK
C90FL_ERROR_FMR_MISMATCH
C90FL_ERROR_FMR_NO_BLOCK
Troubleshooting
The trouble shooting given here comprises of hardware errors and input parameter error.
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API specification UM1627
Table 54. Troubleshooting for FactoryMarginReadCheck()
Returned error bits Possible causes Solution
C90FL_ERROR_FMR_
MISMATCH
The MISR value calculated by the user is incorrect.
The MISR calculated by the
Hardware is incorrect.
Re-calculate the MISR values using the correct Data and address.
Hardware Error.
C90FL_ERROR_FMR_
NO_BLOCK
None of the Blocks are enabled for
Factory Margin Read Check
Enable any of the blocks using variables lowEnabledBlocks, midEnabledBlocks and highEnabledBlock.
Comments
The inputs lowEnabledBlocks , midEnabledBlocks and highEnabledBlocks are bit-mapped arguments that are used to select the blocks to be evaluated in the Low/Mid/High address spaces of main array. The selection of the blocks of the main array is determined by setting/clearing the corresponding bit in lowEnabledBlocks , midEnabledBlocks or highEnabledBlocks .
The bit allocations for blocks in one address space are: bit 0 is assigned to block 0, bit 1 to block 1, etc. The following diagrams give an example of the formats of lowEnabledBlocks , midEnabledBlocks and highEnabledBlocks for the C90LC module.
Refer to Appendix C: Documentation references
for the valid bits configuration depending from the specific microcontroller Flash module sectors.
Table 55. Bit allocation for blocks in low address space
MSB bit 31 reserved …
… bit 10 bit 9 reserved block 9 bit 8 block 8 …
… bit 1 block 1
LSB bit 0 block 0
MSB bit 31 reserved
Table 56. Bit allocation for blocks in middle address space
…
… bit 4 bit 3 bit 2 bit 1 reserved reserved reserved block 1
LSB bit 0 block 0
MSB bit 31 reserved
Table 57. Bit allocation for blocks in high address space
…
… bit 6 reserved bit 5 block 5 bit 4 block 4
…
… bit 1
Block 1
LSB bit 0
Block 0
If no blocks are enabled the C90FL_ERROR_FMR_NO_BLOCK error code is returned.
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UM1627 API specification
The MISR values are calculated for the enabled blocks using the logical sequence. If the
MISR values calculated by the hardware is not the same as the values passed to this API by the user then the API returns the error code C90FL_ERROR_FMR_MISMATCH.
Assumptions
It assumes that the Flash block is initialized using a
‘FlashInit()’
API.
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System requirements
Appendix A System requirements
UM1627
The C90LC SSD is designed to support C90LC Flash module embedded on microcontrollers. Before using this SSD on a different derivative microcontroller, user has to provide the information specific to the derivative through a configuration structure.
Tool name
CodeWarrior IDE
Diab PowerPC compiler
Green Hills PowerPC compiler
Lauterbach ICD tool
Table 58. System requirements
Description
Development tool
Compiler
Compiler
Jtag Debugger
Version number
2.5
5.7.0.0
5.1.7
n.a
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Appendix B Acronyms
Abbreviation
API
BIU
ECC
EVB
RWW
SSD
Table 59. Acronyms
Complete name
Application Programming Interface
Bus Interface Unit
Error Correction Code
Evaluation Board
Read While Write
Standard Software Driver
Acronyms
UM1627 Rev3 35/38
Documentation references
Appendix C Documentation references
UM1627
1.
SPC560D30L1, SPC560D30L3, SPC560D40L1, SPC560D40L3 32-bit MCU family built on the embedded Power Architecture ® (RM0045, DocID16886)
2. SPC560B40x, SPC560B50x, SPC560C40x, SPC560C50x 32-bit MCU family built on the embedded Power Architecture
®
(RM0017, DocID14629)
3. Support microcontrollers SPC560B54x, SPC560B60x and SPC560B64x (RM0037,
DocID15700)
4. SPC564Bxx, SPC56ECxx 32-bit MCU family built on the embedded Power
Architecture
®
(RM0070, DocID18196)
5. SPC560P34/SPC560P40 32-bit MCU family built on the embedded Power
Architecture ® (RM0046, DocID16912)
6. 32-bit MCU family built on the Power Architecture
® embedded category for automotive chassis and safety electronics applications (RM0022, DocID14891)
7. 32-bit MCU family built on the Power Architecture ® embedded category for automotive chassis and safety electronics applications (RM0083, DocID018714)
8. SPC563Mxx - 32-bit Power Architecture
® based MCU with up to 1.5 Mbyte Flash and
111 Kbyte RAM memories (RM0015, DocID14499)
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Revision history
Date
10-Apr-2013
17-Sep-2013
13-Jul-2020
Revision
Table 60. Document revision history
Changes
1
2
3
Initial release.
Updated Disclaimer.
Updated title.
Revision history
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UM1627
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