JL MARINE SYSTEMS A7FEA041 MICROSHALLOW WATER ANCHOR User Manual
The ST A7FEA041 is a versatile and powerful development board designed for rapid prototyping and evaluation of Arm Cortex-M7 based designs. Equipped with a STM32F746NGH6 microcontroller, it offers exceptional processing capabilities and a rich set of peripherals. The board features an integrated ST-LINK/V2-1 debugger and programmer, simplifying software development and debugging. Additionally, it includes various expansion options through Arduino Uno V3 and PMOD-compatible connectors, allowing for easy integration of sensors, actuators, and other modules.
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SPBT2632C2A
Bluetooth® technology class-2 module
Datasheet
−
production data
Features
■
■
■
■
■
■
■
■
■
■
■
■
Bluetooth® radio
– Fully embedded Bluetooth® v3.0 with profiles
– Class 2 module
– Complete RF ready module
– 128-bit encryption security
– Integrated antenna
– Multipoint capability
ST micro Cortex-M3 microprocessor up to
72 MHz
Memory
– 256 kb Flash memory
– 48 kb RAM memory
Data rate
– 1.5 Mbps maximum data rate
Serial interface
– UART up to 2.0 Mbps
– SPI interface
General I/O
– 7 general purpose I/Os
– 1 LPO input
User interface
– AT2 command set (abSerial)
– Firmware upgrade over UART
FCC and Bluetooth® qualified
EPL (end product listing) fulfilled
Single voltage supply: 2.5 V typical
Micro-sized form factor: 11.6 x 13.5 x 2.9 mm
Operating temperature range: -40 °C to 85 °C.
August 2012
This is information on a product in full production.
Doc ID 022833 Rev 4 1/27 www.st.com
27
Contents
Contents
2/27
SPBT2632C2A
Upper layer stack: Amp'ed UP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
AT command set: abSerial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Bluetooth firmware implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Hardware specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
High speed CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . 11
Standard CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . . . 11
Selected RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Hardware block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Doc ID 022833 Rev 4
SPBT2632C2A Contents
Apple iOS CP reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Regulatory compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 022833 Rev 4 3/27
List of tables
List of tables
SPBT2632C2A
4/27 Doc ID 022833 Rev 4
SPBT2632C2A
List of figures
List of figures
Doc ID 022833 Rev 4 5/27
Description
1 Description
SPBT2632C2A
The SPBT2632C2A.AT2 is an easy to use Bluetooth module, compliant with Bluetooth v3.0.
The module is the smallest form factor available which provides a complete RF platform.
The SPBT2632C2A.AT2 enables electronic devices with wireless connectivity, not requiring any RF experience or expertise for integration into the final product. The
SPBT2632C2A.AT2 module, being a certified solution, optimizes the time to market of the final applications.
The module is designed for maximum performance in a minimal space including fast speed
UART and 7 general purpose I/O lines, several serial interface options, and up to 1.5 Mbps data throughput.
Optimized design allows the integration of a complete working Bluetooth modem, including antenna, in the minimum possible size; only an additional external LPO (low power oscillator) is required to enable low power mode capability.
The SPBT2632C2A.AT2 is a surface mount PCB module that provides fully embedded, ready to use Bluetooth wireless technology. The reprogrammable Flash memory contains embedded firmware for serial cable replacement using the Bluetooth SPP profile.
Embedded Bluetooth AT2 command firmware is a friendly interface, which realizes a simple control for cable replacement, enabling communication with most Bluetooth enabled devices, provided that the devices support the SPP profile. The SPBT2632C2A.AT2 , supporting iAP profile, provides communication with Android, smartphone, and Apple
®
iOS
Bluetooth enabled devices.
An Apple authentication IC is required to exchange data with an Apple device or access an
Apple device application. The AT2 FW includes the Bluetooth SPP profile capable of recognizing the Apple authentication chip.
Customers using the Apple authentication IC must register as developers to become an
Apple certified MFI member. License fees may apply, for additional information visit: http://developer.apple.com/programs/which-program/index.html.
Certified MFI developers developing electronic accessories that connect to the iPod
®
, iPhone
®
, and iPad
®
gain access to technical documentation, hardware components, technical support and certification logos.
Customized firmware for peripheral device interaction, power optimization, security, and other proprietary features may be supported and can be ordered pre-loaded and configured.
6/27 Doc ID 022833 Rev 4
SPBT2632C2A
ST modules are RoHS compliant and comply with ECOPACK
®
norms.
3 Applications
●
●
●
●
●
●
●
●
Serial cable replacement
M2M industrial control
Service diagnostic
Data acquisition equipment
Machine control
Sensor monitoring
Security system
Mobile health.
RoHS compliance
Doc ID 022833 Rev 4 7/27
Software architecture SPBT2632C2A
4.2
4.3
●
●
●
●
●
●
●
●
●
●
●
●
●
●
Bluetooth v3.0
Device power modes: active, sleep and deep sleep
Wake on Bluetooth feature optimized power consumption of host CPU
Authentication and encryption
Encryption key length from 8 bits to 128 bits
Persistent Flash memory for BD address and user parameter storage
All ACL (asynchronous connection less) packet types
Multipoint capability
Sniff mode: fully supported to maximum allowed intervals
Master slave switch supported during connection and post connection
Dedicated inquiry access code for improved inquiry scan performance
Dynamic packet selection channel quality driven data rate to optimize link performance
Dynamic power control
802.11b co-existence AFH.
Upper layer stack: Amp'ed UP
●
●
●
SPP, IAP, SDAP and GAP protocols
RFComm, SDP, and L2CAP supported
Multipoint with simultaneous slaves.
AT command set: abSerial
Please see command list reported in the SPBT2532C2.AT datasheet, Appendix D, for details.
The complete command list including the iAP commands will be reported in the user manual UM1547.
8/27 Doc ID 022833 Rev 4
SPBT2632C2A
4.4 Bluetooth firmware implementation
Figure 1.
FW architecture
Software architecture
I!0
!-V
Doc ID 022833 Rev 4 9/27
Hardware specifications SPBT2632C2A
General conditions (V
IN
= 2.5 V and 25 °C).
Table 1.
Recommended operating conditions
Rating Min.
Typical
Operating temperature range
Supply voltage V
IN
Signal pin voltage
RF frequency
-40
2.1
-
2400
-
2.5
2.1
-
Max.
85
3.6
-
2483.5
Unit
°C
V
V
MHz
Table 2.
Absolute maximum ratings
Rating Min.
Storage temperature range
Supply voltage, V
IN
I/O pin voltage, V
IO
RF input power
-55
-0.3
-0.3
-
Typical
-
-
-
-
Max.
+105
+ 5.0
+ 5.5
-5
Unit
°C
V
V dBm
10/27 Doc ID 022833 Rev 4
SPBT2632C2A
5.3
Hardware specifications
High speed CPU mode current consumption
● High speed CPU mode
– CPU 32 MHz
– UART supports up to 921 Kbps
– Data throughput up to 1.5 Mbps
– Shallow sleep enabled.
Table 3.
High speed CPU mode current consumption
Modes (typical power consumption)
ACL data 115 K baud UART at max. throughput (master)
ACL data 115 K baud UART at max. throughput (slave)
Connection, no data traffic, master
Connection, no data traffic, slave
Connection 375 ms sniff (external LPO required)
Standby, without deep sleep
Standby, with deep sleep, no external LPO
Standby, with deep sleep, with external LPO
Page/inquiry scan, with deep sleep, no external LPO
Page/inquiry scan, with deep sleep, with external LPO
Bluetooth power down / CPU standby, no external LPO
Avg.
1.7
70
2.7
520
25
23
27.5
9.1
11.2
490
8.6
Unit mA
µA mA
µA
µA mA mA mA mA
µA mA
5.4 Standard CPU mode current consumption
● Standard CPU mode
– CPU 8 MHz
– UART supports up to 115 Kbps
– Data throughput up to 200 Kbps
– Shallow sleep enabled.
Table 4.
Standard CPU mode current consumption
Modes (typical power consumption)
ACL data 115 K baud UART at max. throughput (master)
ACL data 115 K baud UART at max. throughput (slave)
Connection, no data traffic, master
Connection, no data traffic, slave
Connection 375 ms sniff (external LPO required)
Standby, without deep sleep
Standby, with deep sleep, no external LPO
Avg.
16.7
18
4.9
7.0
490
4.2
1.7
Unit mA mA mA mA
µA mA mA
Doc ID 022833 Rev 4 11/27
Hardware specifications
Table 4.
Standard CPU mode current consumption (continued)
Modes (typical power consumption) Avg.
Standby, with deep sleep, with external LPO
Page/inquiry scan, with deep sleep, no external LPO
Page/inquiry scan, with deep sleep, with external LPO
Bluetooth power-down / CPU standby, no external LPO
70
2.6
520
25
SPBT2632C2A
Unit
µA mA
µA
µA
5.6
Table 5.
Symbol
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
R
PU
R
PD
I/O operating characteristics
Parameter Min.
Low-level input voltage
High-level input voltage
Low-level output voltage
High-level output voltage
Low -level output current
High-level output current
Pull-up resistor
Pull-down resistor
-
1.4
-
1.8
-
-
80
80
Max.
0.6
-
0.4
-
4.0
4.0
120
120
Selected RF characteristics
Table 6.
Selected RF characteristics
Parameters Conditions Typical
(1)
Antenna load 50
Sensitivity level
Maximum usable level
Input VSWR
Radio receiver
BER < .001 with DH5
BER < .001 with DH1
-86
0
2.5:1
Radio transmitter
Maximum output power 50 Ω load
Initial carrier frequency tolerance
0
0
20 dB bandwidth for modulated carrier 935
1.
RF characteristics can be influenced by physical characteristics of final application.
Unit
V
V
V
V mA mA k Ω k
Ω
Conditions
V
IN
, 2.1 V
V
IN
, 2.1 V
V
IN
, 2.1 V
V
IN
, 2.1 V
V
OL
= 0.4 V
V
OH
= 1.8 V
Resistor turned on
Resistor turned on
Unit ohm dBm dBm dBm kHz kHz
12/27 Doc ID 022833 Rev 4
SPBT2632C2A Hardware specifications
Table 7.
Pin assignment
Name Type Pin# Description ALT function
(1)
5 V tolerant
RXD
TXD
RTS
CTS
I
O
O
I
13
14
12
11
UART interface
Receive data
Transmit data
Request to send (active low)
Clear to send (active low)
ADC 3
ADC 2
ADC 0 I
2
C clock/aux UART
Rx
ADC 1 I
2
C data/aux UART
Tx
Y
Y
Y
Y
Boot 0
Vin
GND
I 9
8
7
Boot loader
Boot 0
Power and ground
V in
GND
Reset
RESETN I 10 Reset input (active low for 5 ms)
2.5 V max.
LPO I 15
LPO
LPO input
GPIO - general purpose input/output
GPIO [1] I/O
GPIO [2] I/O
GPIO [3] I/O
GPIO [4] I/O
GPIO [5] I/O
3
4
5
1
2
General purpose input/output
General purpose input/output
General purpose input/output
General purpose input/output
General purpose input/output
SPI MISO
SPI MOSI/I2S_SD
SPI SCLK/I2S_CK
SPI SS/I2S_WS
GPIO [6] I/O
GPIO [7] I/O
6
16
General purpose input/output
General purpose input/output
DAC
ADC 4
Y
Y
1.
Please note that the usage of ALT function is dependant upon the firmware that is loaded into the module, and is beyond the scope of this document. The AT command interface uses the main UART by default.
Y
Y
Y
Y
Y
Doc ID 022833 Rev 4 13/27
Hardware specifications
Figure 2.
Pin placement
SPBT2632C2A
Figure 3.
Layout drawing
3IZEMMXMMXMMHEIGHTTOLERANCEMM
!-V
14/27
MILLIMETERS
Doc ID 022833 Rev 4
!-V
SPBT2632C2A
6 Hardware block diagram
Hardware block diagram
Figure 4.
SPBT2632C2A.AT2 module block diagram
%DWWHU\RU6XSSO\
$QWHQQD
%3
)LOWHU
5HJXODWRU
+RVW&RQWUROOHU
,QWHUIDFH
67/&
,6
3&0
8$57
$50&RUWH[0&8
670
.)ODVK
*3,2
.5$0
8$57
&ORFN
/32
!-V
Doc ID 022833 Rev 4 15/27
Hardware design SPBT2632C2A
The SPBT2632C2A module without AT2 command embedded FW supports UART, SPI, I
2
C and GPIO hardware interfaces. Note that the usage of these interfaces is dependent upon the firmware that is loaded into the module, and is beyond the scope of this document. The
AT2 command interface uses the main UART by default.
Note: 1 All unused pins should be left floating; do not ground.
2 All GND pins must be well grounded.
3 The area around the module should be free of any ground planes, power planes, trace routings, or metal for 6 mm from the antenna in all directions.
4 Traces should not be routed underneath the module.
7.1 Module reflow installation
The SPB2632C2A is a surface mount Bluetooth module supplied on a 16-pin, 6-layer PCB.
The final assembly recommended reflow profiles are indicated here below.
The soldering phase must be executed with care: In order to avoid undesired melting phenomenon, particular attention must be paid to the setup of the peak temperature.
The following are some suggestions for the temperature profile based on IPC/JEDEC J-
STD-020C, July 2004 recommendations.
Table 8.
Soldering
Profile feature
Average ramp-up rate (T
SMAX
to T
P
)
Preheat:
– Temperature min. (T
S
min.)
– Temperature max. (T
S
max.)
– Time (t s
min. to t s
max.)(t s
)
Time maintained above:
– Temperature T
L
– Temperature T
L
Peak temperature (T
P
)
Time within 5 °C of actual peak temperature (T
P
)
Ramp-down rate
Time from 25 °C to peak temperature
PB-free assembly
3 °C/sec max
150 °C
200 °C
60-100 sec
217 °C
60-70 sec
240 + 0 °C
10-20 sec
6 °C/sec
8 minutes max.
16/27 Doc ID 022833 Rev 4
SPBT2632C2A
Figure 5.
Soldering profile
Hardware design
!-V
All GPIOs are capable of sinking and sourcing 4 mA of I/O current. GPIO [1] to GPIO [7] are internally pulled down with 100 k Ω (nominal) resistors.
The UART is compatible with the 16550 industry standard. Four signals are provided with the UART interface. The TXD and RXD pins are used for data while the CTS and RTS pins are used for flow control.
Figure 6.
Connection to host device
(OST
"LUETOOTH
-ODULE
!-V
Doc ID 022833 Rev 4 17/27
Hardware design
Figure 7.
Typical RS232 circuit
SPBT2632C2A
!-V
18/27
Figure 8.
PCB layout guidelines
Doc ID 022833 Rev 4
SURROUNDING
!-V
SPBT2632C2A
Two types of system reset circuits are detailed below.
Figure 9.
External reset circuit
2%3%4
Hardware design
!-V
Note:
7.5.2
RPU ranges from 30 k Ω to 50 k Ω internally.
Internal reset circuit
Figure 10.
Internal reset circuit
2%3%4
!-V
Note: 1 R
PU
ranges from 30 k
Ω
to 50 k
Ω
internally.
2 R
RST
should be from 1 k Ω to 10 k Ω.
Doc ID 022833 Rev 4 19/27
Hardware design
7.6
SPBT2632C2A
External LPO input circuit
An optional low power oscillator input may be added to allow Deep sleep and Sniff modes.
● LPO parameters:
– Frequency: 32.768 kHz
– Tolerance: 150 ppm
●
– Voltage levels
– Low: 0.5 V
– High: 1.8 V
– Input capacitance: 2.5 pF maximum
Configurations:
– Use two configuration variables: UseExtLPO and AllowSniff.
Table 9.
Variable
System configuration variables
Name
Var37 UseExtLPO True
Var43 AllowSniff
Default
True
Description
True when a 32.768 kHz low power oscillator is present, and false if not present
Enables Sniff mode.
Figure 11.
External LPO circuit
' 0)/
' 0)/
' 0)/
' 0)/
' 0)/
' 0)/
' 0)/
' .$
,0/
4 8 $
2 8 $
243
# 43
2 % 3 % 4
"//4
6 ).
30"4#!!4
+(Z
OSCILLATOR
!-V
20/27 Doc ID 022833 Rev 4
SPBT2632C2A
7.7
Hardware design
Apple iOS CP reference design
The figures below give an indicative overview of what the hardware concept looks like. A specific MFI co-processor layout is available for licensed MFI developers from the MFI program.
Figure 12.
BT module
!-V
Figure 13.
Co-processor
Doc ID 022833 Rev 4
!-V
21/27
Hardware design
Figure 14.
Power switch
SPBT2632C2A
!-V
22/27 Doc ID 022833 Rev 4
SPBT2632C2A Regulatory compliance
●
●
FCC and IC
– This module has been tested and found to comply with the FCC part 15 and IC
RSS-210 rules. These limits are designed to provide reasonable protection against harmful interference in approved installations. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
However, there is no guarantee that interference may not occur in a particular installation.
This device complies with part 15 of the FCC rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and
(2) this device must accept any interference received, including interference that may cause undesired operation.
Modifications or changes to this equipment not expressly approved by the part responsible for compliance may render void the user's authority to operate this equipment.
– Modular approval, FCC and IC
FCC ID: X3ZBTMOD4
IC: 8828A-MOD4
In accordance with FCC part 15, the SPBT2632C2A.AT2 is listed above as a modular transmitter device.
– Label instructions
When integrating the SPBT2632C2A.AT2 into the final product, it must be ensured that the FCC labelling requirements, as specified below, are satisfied. Based on the Public Notice from FCC, the product into which the ST transmitter module is installed must display a label referring to the enclosed module. The label should use wording such as the following:
Contains Transmitter Module
FCC ID: X3ZBTMOD4
IC: 8828A-MOD4
Any similar wording that expresses the same meaning may be used.
BQB
– BQB qualified design, QD ID: B019224
– Product type: End Product
– TGP version: Core 3.0
– Core spec version: 3.0
– Product descriptions: Bluetooth module, spec V3.0
Doc ID 022833 Rev 4 23/27
Regulatory compliance SPBT2632C2A
● CE
– CE Expert opinion: 0448-ARAM00003
– Measurements have been performed in accordance with (report available on request):
– EN 300 328 V 1.7.1 (2006-10)
(a)
– EN 301 489-17 V 2.1.1 (2009)
(b)
– EN60950-1:2006 +A11:2009+A1:2010
(c)
CE certified:
24/27 a.
EN 300 328 V 1.7.1 (2006-10): “electromagnetic compatibility and radio spectrum Matters (ERM); Wideband transmission systems; data transmission equipment operating in the 2.4 GHZ ISM band and using wideband modulation techniques; harmonized EN covering essential requirements under article 3.2 of the R&TTE directive”.
b.
EN 301 489-17 V 2.1.1 (2009): “electromagnetic compatibility and radio spectrum Matters (ERM); electromagnetic compatibility (EMC) standard for radio equipment and services; part 17: specific condition for
2.4 GHz wideband transmission systems and 5 GHz high performance RLAN equipment”.
c.
EN60950-1:2006 +A11:2009+A1:2010: “Information technology equipment - safety”.
Doc ID 022833 Rev 4
SPBT2632C2A Ordering information
Table 10.
Ordering information
Order code
SPBT2632C2A.AT2
Description
Class 2 OEM Bluetooth antenna module
Doc ID 022833 Rev 4 25/27
Revision history SPBT2632C2A
Table 11.
Document revision history
Date
03-Apr-2012
16-Apr-2012
12-Jun-2012
07-Aug-2012
Revision
1
2
3
4
Changes
First release.
Modified:
– Document status promoted from preliminary data to production data
– Modified:
– Added: notes in
– Modified:
26/27 Doc ID 022833 Rev 4
SPBT2632C2A
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Doc ID 022833 Rev 4 27/27
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