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Product Technical Specification and Customer Design Guideline
AirPrime Q2687 Refreshed
WA_DEV_Q26RD_PTS_001
002
April 20, 2010
Product Technical Specification and
Customer Design Guideline
Important Notice
Due to the nature of wireless communications, transmission and reception of data can never be guaranteed. Data may be delayed, corrupted (i.e., have errors) or be totally lost. Although significant delays or losses of data are rare when wireless devices such as the Sierra Wireless modem are used in a normal manner with a well-constructed network, the Sierra Wireless modem should not be used in situations where failure to transmit or receive data could result in damage of any kind to the user or any other party, including but not limited to personal injury, death, or loss of property. Sierra Wireless accepts no responsibility for damages of any kind resulting from delays or errors in data transmitted or received using the Sierra Wireless modem, or for failure of the Sierra Wireless modem to transmit or receive such data.
Safety and Hazards
Do not operate the Sierra Wireless modem in areas where blasting is in progress, where explosive atmospheres may be present, near medical equipment, near life support equipment, or any equipment which may be susceptible to any form of radio interference. In such areas, the Sierra Wireless modem
MUST BE POWERED OFF . The Sierra Wireless modem can transmit signals that could interfere with this equipment. Do not operate the Sierra Wireless modem in any aircraft, whether the aircraft is on the ground or in flight. In aircraft, the Sierra Wireless modem MUST BE POWERED OFF . When operating, the Sierra Wireless modem can transmit signals that could interfere with various onboard systems.
Note: Some airlines may permit the use of cellular phones while the aircraft is on the ground and the door is open. Sierra Wireless modems may be used at this time.
The driver or operator of any vehicle should not operate the Sierra Wireless modem while in control of a vehicle. Doing so will detract from the driver or operator’s control and operation of that vehicle. In some states and provinces, operating such communications devices while in control of a vehicle is an offence.
Limitations of Liability
This manual is provided “as is”. Sierra Wireless makes no warranties of any kind, either expressed or implied, including any implied warranties of merchantability, fitness for a particular purpose, or noninfringement. The recipient of the manual shall endorse all risks arising from its use.
The information in this manual is subject to change without notice and does not represent a commitment on the part of Sierra Wireless. SIERRA WIRELESS AND ITS AFFILIATES
SPECIFICALLY DISCLAIM LIABILITY FOR ANY AND ALL DIRECT, INDIRECT, SPECIAL,
GENERAL, INCIDENTAL, CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES INCLUDING,
BUT NOT LIMITED TO, LOSS OF PROFITS OR REVENUE OR ANTICIPATED PROFITS OR
REVENUE ARISING OUT OF THE USE OR INABILITY TO USE ANY SIERRA WIRELESS
PRODUCT, EVEN IF SIERRA WIRELESS AND/OR ITS AFFILIATES HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES OR THEY ARE FORESEEABLE OR FOR CLAIMS BY ANY
THIRD PARTY.
Notwithstanding the foregoing, in no event shall Sierra Wireless and/or its affiliates aggregate liability arising under or in connection with the Sierra Wireless product, regardless of the number of events, occurrences, or claims giving rise to liability, be in excess of the price paid by the purchaser for the
Sierra Wireless product.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 2
Product Technical Specification and
Customer Design Guideline
Patents
Portions of this product may be covered by some or all of the following US patents:
5,515,013
6,191,741
6,653,979
6,968,171
7,287,162
5,629,960
6,199,168
6,697,030
6,985,757
D442,170
5,845,216
6,339,405
6,785,830
7,023,878
D459,303
5,847,553
6,359,591
6,845,249
7,053,843
D599,256
5,878,234
6,400,336
6,847,830
7,106,569
D560,911 and other patents pending.
This product includes technology licensed from QUALCOMM
®
3G
5,890,057
6,516,204
6,876,697
7,145,267
5,929,815
6,561,851
6,879,585
7,200,512
6,169,884
6,643,501
6,886,049
7,295,171
Manufactured or sold by Sierra Wireless or its licensees under one or more patents licensed from
InterDigital Group .
Copyright
© 2010 Sierra Wireless. All rights reserved.
Trademarks
AirCard
®
and Watcher
®
are registered trademarks of Sierra Wireless. Sierra Wireless ™ , AirPrime ™ ,
AirLink ™ , AirVantage ™ and the Sierra Wireless logo are trademarks of Sierra Wireless.
Wireless CPU
®
, Open AT in other countries.
®
, ,
®
, inSIM
®
, WAVECOM
®
, WISMO
®
, Wireless Microprocessor
®
,
are filed or registered trademarks of Sierra Wireless S.A. in France and/or
Windows
® and Windows Vista
® are registered trademarks of Microsoft Corporation.
Macintosh and Mac OS are registered trademarks of Apple Inc., registered in the U.S. and other countries.
QUALCOMM
® is a registered trademark of QUALCOMM Incorporated. Used under license.
Other trademarks are the property of the respective owners.
Contact Information
Sales Desk:
Phone:
Hours:
E-mail:
Post:
Sierra Wireless
13811 Wireless Way
Richmond, BC
Canada V6V 3A4
Fax: 1-604-231-1109
Web: www.sierrawireless.com
1-604-232-1488
8:00 AM to 5:00 PM Pacific Time [email protected]
Consult our website for up-to-date product descriptions, documentation, application notes, firmware upgrades, troubleshooting tips, and press releases: www.sierrawireless.com
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 3
Product Technical Specification and
Customer Design Guideline
Document History
Version Date
001 January 28, 2010
002 April 20, 2010
Updates
Creation
Reformatted in the rebranded SWI template.
In Section 3 Technical Specifications:
Moved the Power Supply Design Requirements to section 9.1
Updated section 4.7.4 5-wire Serial Interface
Updated section 4.8.1 Pin Description
Updated section 4.8.3 4-wire Serial Interface
Updated section 8.4 Reliability Prediction Model.
Updated links in section 13.1.1 Web Site Support.
Updated Intelligent Embedded Module weight to 8g.
list.
Removed references to IMP Connector throughout the document.
Updated Figure 10 Example of a 4-wire SPI Bus Application.
Updated section 4.15 Temperature Sensor Interface.
Updated Power ON information based on Tracker 01626.
Updated U1 Chip information based on CUS57225.
Updated antenna gain information.
Updated power consumption values in section 6 Power Consumption.
Updated Figure 5 Q2687 Refreshed Embedded Module Mechanical Drawing
and Figure 6 Maximum Bulk Occupied on the Host Board.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 4
Contents
FUNCTIONAL SPECIFICATIONS ...................................................................... 20
TECHNICAL SPECIFICATIONS ........................................................................ 22
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 5
Product Technical Specification and
Customer Design Guideline
Additional Information Regarding Address Size Bus ............................................. 51
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 6
Product Technical Specification and
Customer Design Guideline
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 7
Product Technical Specification and
Customer Design Guideline
Power Consumption without the Sierra Wireless Software Suite ................................ 112
Power Consumption with the Sierra Wireless Software Suite .................................... 113
CONSUMPTION MEASUREMENT PROCEDURE .......................................... 116
RELIABILITY COMPLIANCE AND RECOMMENDED STANDARDS ............. 120
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 8
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CONNECTOR AND PERIPHERAL DEVICE REFERENCES .......................... 141
CERTIFICATION COMPLIANCE AND RECOMMENDED STANDARDS ....... 144
SAFETY RECOMMENDATIONS (FOR INFORMATION ONLY) ..................... 151
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 9
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WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 10
List of Figures
Q2687 Refreshed Embedded Module Mechanical Drawing ......................................... 25
SPI Timing Diagram with LOAD Signal (Mode 0, Master, 4 wires) ............................... 41
C Bus Application ............................................................................ 44
C Bus Application ............................................................................ 44
Example of an RS-232 Level Shifter Implementation for UART1 ................................. 55
Example of V24/CMOS Serial Link Implementation for UART1.................................... 56
Example of a Full Modem V24/CMOS Serial Link Implementation for UART1 .............. 56
Example of RS-232 Level Shifter Implementation for UART2 ...................................... 59
Example of a MIC1 Differential Connection without an LC Filter .................................. 70
Example of a MIC1 Single-Ended Connection with LC Filter ........................................ 71
Example of a MIC1 Single-Ended Connection without an LC Filter .............................. 71
Example of a MIC2 Differential Connection without an LC Filter .................................. 74
Example of a MIC2 Single-Ended Connection with LC Filter ........................................ 74
Example of a MIC2 Single-Ended Connection without an LC Filter .............................. 75
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 11
Product Technical Specification and
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Example of ~Reset Pin Connection with Switch Configuration ..................................... 98
Example of ~Reset Pin Connection with Transistor Configuration ................................ 98
Antenna Connection to both RF pad and Ground pad ............................................... 136
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 12
List of Tables
Table 8: Signal Comparison between the Q Series Intelligent Embedded Modules ................... 34
Table 36: Recommended Components for a MIC1 Single-Ended Connection ............................. 72
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 13
Product Technical Specification and
Customer Design Guideline
Table 39: Recommended Components for a MIC2 Single-Ended Connection ............................. 75
Table 73: Power Consumption Without the Sierra Wireless Software Suite; Typical Values ...... 112
Table 74: Power Consumption With the Application CPU @ 26MHz, Typical Values................. 113
Table 75: Power Consumption With the Application CPU @ 104MHz, Typical Values ............... 114
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 14
Product Technical Specification and
Customer Design Guideline
Table 90: Applicable Standards and Requirements for the Q2687 Refreshed Embedded Module ...
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 15
1. Introduction
The Q2687 Refreshed Intelligent Embedded Module is a self-contained E-GSM/DCS/GSM850/PCS
GPRS/EGPRS 900/1800/850/1900 quad-band embedded module . It supports the Sierra Wireless
Software Suite, the world’s most comprehensive cellular development environment which allows embedded standard ANSI C applications to be natively executed directly on the embedded module.
For more information about Sierra Wireless Software Suite, refer to the documents listed in section
Note that this document only covers the Q2687 Refreshed Intelligent Embedded Module and does not cover the programmable capabilities available through the Sierra Wireless Software Suite.
1.1. Physical Dimensions
Length: 40 mm
Width: 32.2 mm
Thickness: 4 mm
Weight: 8g
Note: The physical dimensions mentioned above do not include the shielding pins.
1.2. General Features
The following table lists the Q2687 Refreshed embedded module features.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 16
Product Technical Specification and
Customer Design Guideline
Introduction
Table 1: Q2687 Refreshed Embedded Module Features
Feature Description
Shielding
Intelligent
Embedded Module
Control
GSM/DCS Output
Power
GPRS
EGPRS
Voice
SMS
GSM
Supplementary
Services
Data/Fax
SIM Interface
Real Time Clock
The Q2687 Refreshed embedded module has complete body shielding.
Full set of AT commands for GSM/GPRS/EGPRS including GSM 07.07 and
07.05 AT command sets
Status indication for GSM
Class 4 (2 W) for GSM 850 and E-GSM
Class 1 (1 W) for DCS and PCS
GPRS multislot class 10
Multislot class 2 supported
PBCCH support
Coding schemes: CS1 to CS4
EGPRS multislot class 10
Multislot class 2 supported
PBCCH support
Coding schemes MCS5 to MCS9
GSM Voice Features with Emergency calls 118 XXX
Full Rate (FR)/ Enhanced Full Rate (EFR) / Half Rate (HR) / Adaptive Multi
Rate (AMR)
Echo cancellation and noise reduction
Full duplex Hands free
SMS MT, MO
SMS CB
SMS storage into SIM card
Call Forwarding, Call Barring
Multiparty
Call Waiting, Call Hold
USSD
Data circuit asynchronous, transparent, and non-transparent up to 14400 bits/s
Fax Group 3 compatible
1.8V/3V SIM interface
5V SIM interfaces are available with external adaptation
SIM Tool Kit Release 99
Real Time Clock (RTC) with calendar and alarm
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 17
Product Technical Specification and
Customer Design Guideline
1.3. GSM/GPRS/EGPRS Features
2-Watt EGSM – GPRS 900/850 radio section running under 3.6 volts
1-Watt GSM-GPRS1800/1900 radio section running under 3.6 volts
0.5-Watt EGPRS 900/850 radio section running under 3.6 volts
0.4-Watt EGPRS 1800/1900 radio section running under 3.6 volts
Hardware GSM/GPRS class 10 and EGPRS class 10 capable
1.4. Interfaces
Digital section running under 2.8V and 1.8V
3V/1V8 SIM interface
Complete Interfacing:
Power supply
Serial link
Analog audio
PCM digital audio
SIM card
Keyboard
USB 2.0 slave
Serial LCD (not available with AT commands)
Parallel port for specific applications (under Open AT ® control only)
1.5. Operating System
Real Time Clock (RTC) with calendar
Battery charger
Echo cancellation + noise reduction (quadri codec)
Full GSM or GSM/GPRS/EGPRS Operating System stack
Introduction
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 18
Product Technical Specification and
Customer Design Guideline
1.6. Connection Interfaces
The Q2687 Refreshed Intelligent Embedded Module has four external connections:
Three for RF circuit:
UFL connector
Soldered connection
Precidip connection
One for baseband signals:
100-pin I/O connector (compatible with Q2686 and Q2687 embedded modules)
1.7. Environment and Mechanics
1.7.1. RoHS Directive Compliant
The Q2687 Refreshed embedded module is compliant with RoHS Directive
2002/95/EC which sets limits for the use of certain restricted hazardous substances.
This directive states that “from 1st July 2006, new electrical and electronic equipment put on the market does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBB) or polybrominated diphenyl ethers (PBDE)”.
1.7.2. Disposing of the Product
This electronic product is subject to the EU Directive 2002/96/EC for Waste Electrical and Electronic Equipment (WEEE). As such, this product must not be disposed off at a municipal waste collection point. Please refer to local regulations for directions on how to dispose of this product in an environmental friendly manner.
Introduction
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 19
2. Functional Specifications
2.1. Functional Architecture
The global architecture of the Q2687 Refreshed Embedded Module is described in the figure below.
Figure 1. Functional Architecture
2.1.1. RF Functionalities
The Radio Frequency (RF) functionalities of the Q2687 Refreshed embedded module complies with the Phase II EGSM 900/DCS 1800 and GSM 850/PCS 1900 recommendations. The frequency range for the transmit band and receive band are given in the table below.
Table 2: List of RF Frequency Ranges
RF Bandwidth
GSM 850
E-GSM 900
DCS 1800
Transmit Band (Tx)
824 to 849 MHz
880 to 915 MHz
1710 to 1785 MHz
Receive Band (Rx)
869 to 894 MHz
925 to 960 MHz
1805 to 1880 MHz
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Product Technical Specification and
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Functional Specifications
RF Bandwidth
PCS 1900
Transmit Band (Tx)
1850 to 1910 MHz
Receive Band (Rx)
1930 to 1990 MHz
The Radio Frequency (RF) component is based on a specific quad-band chip that includes the following:
Quad-band LNAs (Low Noise Amplifier)
Digital Low-IF Receiver
Offset PLL/PL (Phase Locked Loop and Polar Loop) transmitter
Frequency synthesizer
Digitally controlled crystal oscillator (DCXO)
Tx/Rx FEM (Front-End module) for quad-band GSM/GPRS/EGPRS
2.1.2. Baseband Functionalities
The digital part of the Q2687 Refreshed embedded module is composed of a PCF5213 PHILIPS chip . This chipset uses a 0.18µm mixed technology CMOS, which allows massive integration as well as low current consumption.
2.2. Operating System
The Q2687 Refreshed Embedded Module is Sierra Wireless Software Suite compliant. With the Sierra
Wireless Software Suite, customers can embed their own applications with the Q2687 Refreshed embedded module and turn the Q2687 Refreshed embedded module into a solution for their specific market need.
The operating system allows for the Q2687 Refreshed Embedded Module to be controlled by AT commands. However, some interfaces in the Q2687 Refreshed embedded module may still not be available even with AT command control as these interfaces are dependent on the peripheral devices connected to the Q2687 Refreshed embedded module.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 21
3. Technical Specifications
3.1. Power Supply
The power supply is one of the key issues in the design of a GSM terminal. Due to the burst emission in GSM/GPRS, the power supply must be able to deliver high current peaks in a short time. During these peaks, the ripple (U ripp
) on the supply voltage must not exceed a certain limit (refer to Table 3:
Listed below are the corresponding radio burst rates in connected mode:
GSM/GPRS class 2 terminals emit 577µs radio bursts every 4.615ms (see Figure 2 Power
GPRS class 10 terminals emit 1154µs radio bursts every 4.615ms
In connected mode, the RF Power Amplifier current (2.0A peak in GSM /GPRS mode) flows with a ratio of:
1/8 of the time (around 577µs every 4.615ms for GSM /GPRS cl 2 – 2RX/1TX) and
2/8 of the time (around 1154µs every 4.615ms for GSM /GPRS cl 10 – 3RX/2TX) with the rising time at around 10µs.
Figure 2. Power Supply During Burst Emission
Only VBATT (external power supply source) input is necessary to supply the Q2687 Refreshed embedded module. VBATT also provides for the following functions:
Directly supplies the RF components with 3.6V. (Note that it is essential to keep a minimum voltage ripple at this connection in order to avoid any phase error or spectrum modulation degradation. On the other hand, insufficient power supply could dramatically affect some RF performances such as TX power, modulation spectrum, EMC performance, spurious emission and frequency error.)
Internally used to provide through several regulators, the power supplies VCC_2V8 and
VCC_1V8, which are needed for the baseband signals.
The Q2687 Refreshed embedded module shielding case is the grounding. The ground must be connected on the motherboard through a complete layer on the PCB.
The following table describes the electrical characteristics of the input power supply voltage that will guarantee nominal functioning of the Q2687 Refreshed embedded module.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 22
Product Technical Specification and
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Technical Specifications
Table 3: Input Power Supply Voltage
VBATT
V
MIN
3.2V
1,2
V
NOM
3.6V
V
MAX
4.8V
Ripple Max (U ripp
)
250mVpp (freq < 10kHz)
40mVpp (10kHz < freq <
100kHz)
5mVpp (freq > 100kHz)
(TBC)
I peak
2.0A
1: This value must be guaranteed during the burst (with 2.0A Peak in GSM, GPRS or EGPRS mode)
2: Maximum operating Voltage Standing Wave Ratio (VSWR) 2:1.
Max
Figure 3. Power Supply Ripple Graph (TBC)
When the Q2687 Refreshed embedded module is supplied with a battery, the total impedance
(battery + protections + PCB) should be less than 150 m .
Caution: When the Q2687 Refreshed embedded module is in Alarm mode or Off mode, no voltage has to be applied on any pin of the 100-pin connector except on VBATT (pins 1 to 4), BAT-RTC (pin 7) for RTC operation or ON/~OFF (pin 19) to power-ON the Q2687 Refreshed embedded module.
3.1.1. Power Supply Pin-Out
Table 4: Power Supply Pin-Out
Signal
VBATT
GND
Pin Number
1, 2, 3, 4
Shielding
The grounding connection is made through the shielding; therefore the four leads must be soldered to the ground plane.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 23
Product Technical Specification and
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Technical Specifications
3.1.2. Start-Up Current
During the initial second following Power ON, a peak of current appears. This peak of current is called
“I
Startup
current” and has a duration of about 161ms (typical) (TBC).
Figure 4: Start-up Current Waveform shows the current waveform and identifies the peak considered
as the start-up current.
<TBC>
Figure 4. Start-up Current Waveform
In this condition, we can consider the following results:
Table 5: Current Start-Up (TBC)
Current Peak at
Ambient Temperature
(25°C)
VBATTmin (3.2V)
I
Startup
86 mA
VBATTtyp (3.6V)
77 mA
VBATTmax (4.8V)
64 mA
3.1.3. Decoupling of Power Supply Signals
Decoupling capacitors on VBATT lines are embedded in the Q2687 Refreshed embedded module, so it should not be necessary to add decoupling capacitors close to the embedded module.
However, in case of EMI/RFI problems, the VBATT signal may require some EMI/RFI decoupling – parallel 33pF capacitors close to the embedded module or a serial ferrite bead (or both to get better results). Low frequency decoupling capacitors (22µF to 100µF) can be used to reduce TDMA noise
(217Hz).
Caution: When ferrite beads are used, the recommendation given for the power supply connection must be carefully followed (high current capacity and low impedance).
3.2. Mechanical Specifications
The Q2687 Refreshed Embedded Module has a complete self-contained shield and the mechanical specifications are shown in the figure below, which also specifies the following:
The area needed for the Q2687 Refreshed embedded module to fit in an application
The drill template for the four pads to be soldered on the application board
The dimensions and tolerance for correctly placing the 100-pin female connector on the application board
It is strongly recommended to plan a free area (no components) around the Q2687 Refreshed embedded module in order to facilitate the removal/re-assembly of the embedded module on the application board.
Also take note that when transmitting, the Q2687 Refreshed Embedded Module produces heat (due to the internal Power Amplifier). This heat will generate a temperature increase and may warm the application board on which the Q2687 Refreshed embedded module is soldered. This is especially true for GPRS Class 10 use in low band. The Q2687 Refreshed Embedded Module’s built-in temperature sensor can be used to monitor the temperature inside the module. For more information,
refer to document [14] AirPrime Q2687 Product Technical Specification.
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Product Technical Specification and
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Technical Specifications
Figure 5. Q2687 Refreshed Embedded Module Mechanical Drawing
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 25
Product Technical Specification and
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Technical Specifications
Figure 6. Maximum Bulk Occupied on the Host Board
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Product Technical Specification and
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Technical Specifications
3.3. Firmware Upgrade
The firmware upgrade process consists of downloading GSM/GPRS/EGPRS software into the corresponding internal flash memories of the Q2687 Refreshed Intelligent Embedded Module.
Downloading is done through the GSM Main Serial link port (UART1) connected to a PC using the
XMODEM protocol.
A specific AT command, AT+WDWL , is used to start the download. For more information, refer to
document [8] Firmware 7.43 AT Commands Manual (Sierra Wireless Software Suite 2.33).
Access to the following UART1 main serial link signals are required to carry out downloading:
CT103-TXD1
CT104-RXD1
~CT106-CTS1
~CT105-RTS1
GND
Consequently, it is very important to plan and define easy access to these signals during the hardware design of the application board. For more information about these signals, refer to section
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 27
4. Interfaces
Caution: Some of the Embedded Module interface signals are multiplexed in order to limit the number of pins but this architecture includes some restrictions.
4.1. General Purpose Connector (GPC)
A 100-pin connector is provided to interface the Q2687 Refreshed Intelligent Embedded Module with a board containing either a serial or parallel LCD module; a keyboard, a SIM connector or a battery connection.
The following table lists the interfaces and signals available on the GPC and specifies whether these interfaces and signals are driven by AT Command, Open AT
®
or both.
Table 6: Available Interfaces and Signals
Name
Serial Interface
Parallel Interface
Keyboard Interface
Main Serial Link
Auxiliary Serial Link
SIM Interface
General Purpose IO
Analog to Digital Converter
Analog Audio Interface
PWM / Buzzer Output
Battery Charging Interface
External Interruption
BAT-RTC (Backup Battery)
LED0 signal
Digital Audio Interface (PCM)
USB 2.0 Interface
Driven by AT commands
Driven by Open AT ®
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Product Technical Specification and
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4.1.1. Pin Description
Refer to the following table for the pin description of the general purpose connector.
Table 7: General Purpose Connector Pin Description
Pin
#
Signal Name
Nominal
6
7
4
5
1
2
3
ADC0/VBATT
ADC0/VBATT
ADC0/VBATT
ADC0/VBATT
VCC_1V8
CHG-IN
BAT-RTC
8
9
CHG-IN
SIM-VCC
10 VCC_2V8
11 SIM-IO
12 SIMPRES
13 ~SIM-RST
14 SIM-CLK
15 BUZZER0
Mux
GPIO18
I/O
Type
Voltage I/O*
VBATT
VBATT
VBATT
I
I
I
VBATT I
VCC_1V8 O
CHG-IN
BAT-RTC
I
I/O
CHG-IN I
1V8 or 3V O
VCC_2V8 O
1V8 or 3V I/O
VCC_1V8 I
1V8 or 3V O
1V8 or 3V O
Open Drain O
Reset State
0
0
Pull-up (about
10kΩ)
Z
Z
Description
Power Supply
Power Supply
Power Supply
Power Supply
1.8V Supply Output
Charger input
RTC Battery connection
Charger input
SIM Power Supply
2.8V Supply Output
SIM Data
SIM Detection
SIM reset Output
SIM Clock
Buzzer Output
16 BOOT VCC_1V8 I Not Used
WA_DEV_Q26RD_PTS_001 Rev 002
Dealing with Unused Pins
NC
NC
NC
NC
NC
NC
NC
Add a test point / a jumper/ a switch to
VCC_1V8 (Pin 5) in case Download
Specific mode is used (See product specification for details)
April 20, 2010
Interfaces
29
Product Technical Specification and
Customer Design Guideline
Pin
#
Signal Name
Nominal
17 LED0
18 ~RESET
19 ON/~OFF
20
ADC1/BAT-
TEMP
21 ADC2
22
GPIO31/ SPI1
Load
23 SPI1-CLK
24 SPI1-I
25 SPI1-IO
26 SPI2-CLK
27 SPI2-IO
28
GPIO35/SPI2-
Load
29 SPI2-I
30 CT104-RXD2
31 CT103-TXD2
32 ~CT106-CTS2
33 ~CT105-RTS2
34 MIC2N
35 SPK1P
36 MIC2P
37 SPK1N
38 MIC1N
Mux
GPIO28
GPIO30
GPIO29
GPIO32
GPIO33
GPIO34
GPIO15
GPIO14
GPIO16
GPIO17
I/O
Type
Voltage I/O*
Open Drain O
VCC_1V8 I/O
VBATT I
Analog
Analog
I
I
VCC_2V8 I/O
VCC_2V8 O
VCC_2V8 I
VCC_2V8 I/O
VCC_2V8 O
VCC_2V8 I/O
VCC_2V8 I/0
VCC_2V8 I
VCC_1V8 O
VCC_1V8 I
VCC_1V8 O
VCC_1V8 I
Analog
Analog
Analog
Analog
Analog
I
O
I
O
I
Reset State
Z
Z
Z
Z
Z
1 and
Undefined
Z
Z
Z
Z
Z
Z
Z
Description Dealing with Unused Pins
LED0 Output
RESET Input
ON / ~OFF Control
Analog temperature
Analog to Digital Input
NC
NC or add a test point
Pull to GND
Pull to GND
SPI1 Clock
SPI1 Data Input
SPI1 Data Input / Output
SPI2 Clock
SPI2 Data Input / Output
NC
NC
NC
NC
NC
NC
NC
SPI2 Data Input
Auxiliary RS232 Receive
Auxiliary RS232 Transmit
Auxiliary RS232 Clear To Send
Auxiliary RS232 Request To Send
Micro 2 Input Negative
Speaker 1 Output Positive
Micro 2 Input Positive
Speaker 1 Output Negative
Micro 1 Input Negative
NC
NC
NC
NC
NC
NC
Add a test point for debugging
(TXD2) Pull-up to VCC_1V8 with 100kΩ and add a test point for debugging
(CTS2) Add a test point for debugging
(RTS2) Pull-up to VCC_1V8 with 100kΩ and add a test point for debugging
Interfaces
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 30
Product Technical Specification and
Customer Design Guideline
Pin
#
Signal Name
Nominal
39 SPK2P
40 MIC1P
41 SPK2N
42 A1
43 GPIO0
44 SCL1
45 GPIO19
46 SDA1
47 GPIO21
48 GPIO20
49 INT1
50 INT0
51 GPIO1
52 VPAD-USB
53 GPIO2
54 USB-DP
55 GPIO23
56 USB-DM
57 GPIO22
58 GPIO24
59 COL0
60 COL1
61 COL2
62 COL3
GPIO3
**
**
**
**
GPIO4
GPIO5
GPIO6
GPIO7
Mux
32kHz
GPIO26
GPIO27
I/O
Type
GPIO25
Voltage I/O*
Analog
Analog
O
I
Analog O
VCC_1V8 O
VCC_2V8 I/O
Open Drain O
VCC_2V8 I/O
Open Drain I/O
VCC_2V8 I/O
VCC_2V8 I/O
VCC_2V8 I
Reset State
32 kHz
Z
Z
Z
Undefined
Undefined
Z
Description
Speaker 2 Output Positive
Micro 1 Input Positive
Speaker 2 Output Negative
Address bus 1
I²C Clock
I²C Data
Interruption 1 Input
VCC_1V8 I
VCC_1V8 I/O
VPAD-USB I
VCC_1V8 I/O
VPAD-USB I/O
VCC_2V8 I/O
VPAD-USB I/O
VCC_2V8 I/O
VCC_2V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
Z
Undefined
Undefined
Z
Z
Z
Pull-up
Pull-up
Pull-up
Pull-up
Interruption 0 Input
USB Power supply input
USB Data
USB Data
Keypad column 0
Keypad column 1
Keypad column 2
Keypad column 3
WA_DEV_Q26RD_PTS_001 Rev 002
Dealing with Unused Pins
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
If INT1 is not used, it should be configured as GPIO
If INT0 is not used, it should be configured as GPIO
NC
April 20, 2010
Interfaces
31
Product Technical Specification and
Customer Design Guideline
Pin
#
72
73
74
Signal Name
Nominal
63 COL4
64 ROW4
65 ROW3
66 ROW2
67 ROW1
68 ROW0
69 ~CT125-RI
70 ~CT109-DCD1
71 CT103-TXD1
~CT105-RTS1
CT104-RXD1
~CT107-DSR1
Mux
GPIO8
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
GPIO42
GPIO43
GPIO36
I/O
Type
Voltage
GPIO38
GPIO37
GPIO40
75 ~CT106-CTS1 GPIO39
76 ~CT108-2-DTR1 GPIO41
77 PCM-SYNC
78 PCM-IN
79 PCM-CLK
80 PCM-OUT
81 /OE-R/W
82 DAC0
83 /CS3
84 /WE-E
85 D0
I/O*
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_2V8 O
VCC_2V8 O
VCC_2V8 I
VCC_2V8
VCC_2V8
VCC_2V8
VCC_2V8
I
O
O
O
VCC_2V8 I
VCC_1V8 O
VCC_1V8 I
VCC_1V8 O
VCC_1V8 O
VCC_1V8 O
Analog O
VCC_1V8 O
VCC_1V8 O
VCC_1V8 I/O
Reset State
0
0
0
Pull-up
0
0
Undefined
Undefined
Z
Z
1
Z
Z
Z
Pull-down
Pull-up
Pull-down
Pull-up
Description
Keypad column 4
Keypad Row 4
Keypad Row 3
Keypad Row 2
Keypad Row 1
PCM Frame Synchro
PCM Data Input
PCM Clock
PCM Data Output
Output Enable/ Read not write
Digital to Analog Output
Chip Select 3
Write Enable
Data for Peripheral
Dealing with Unused Pins
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Keypad Row 0
Main RS232 Ring Indicator
Main RS232 Data Carrier Detect
Main RS232 Transmit
Main RS232 Request To Send
NC
NC
NC
(TXD1) Pull-up to VCC_2V8 with 100kΩ and add a test point for firmware update
(RTS1) Pull-up to VCC_2V8 with 100kΩ and add a test point for firmware update
Main RS232 Receive
Main RS232 Data Set Ready
(RXD1) Add a test point for firmware update
NC
Main RS232 Clear To Send
(CTS1) Add a test point for firmware update
Main RS232 Data Terminal Ready (DTR1) Pull-up to VCC_2V8 with 100kΩ
Interfaces
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 32
Product Technical Specification and
Customer Design Guideline
Pin
#
Signal Name
Nominal
86 D15
87 D1
88 D14
89 D2
90 D13
91 D3
92 D12
93 D4
94 D11
95 D5
96 D10
97 D6
98 D9
99 D7
100 D8
Mux
I/O
Type
Voltage I/O* Reset State Description
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
VCC_1V8 I/O
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Data for Peripheral
Dealing with Unused Pins
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
*
**
The I/O direction information is only for the nominal signal. When the signal is configured in GPIO, it can always be an Input or an Output.
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
Interfaces
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 33
Product Technical Specification and
Customer Design Guideline
4.1.2. Pin Out Differences
Although the Q Series Embedded Modules are compatible, one must be careful with regards to their specific signal differences. The following table enumerates the pin out differences between the Q2686, Q2687 and the Q2687 Refreshed embedded modules.
Table 8: Signal Comparison between the Q Series Intelligent Embedded Modules
Q2686
Pin #
Signal
Name
42 Reserved
51
53
83
81,
84-
100
GPIO1
GPIO2
NC-5
NC
Function
Not in Use
General
Purpose IO
Value
-
1V8
General
Purpose IO
1V8
Not Connected -
Not Connected -
Q2687
Signal
Name
Function Value
A1
CS2
/A25
/GPIO1
A24 / GPIO2
/CS3
Address Bus 1V8
Chip Select,
Address bus,
General
Purpose IO
Address bus,
General
Purpose IO
1V8
1V8
Chip Select 3 1V8
Parallel
Interface
Parallel Bus
Interface
1V8
Q2687 Refreshed
Signal
Name
Function
A1
CS2
/A25
/GPIO1
A24 / GPIO2
/CS3
Parallel
Interface
Address Bus
Chip Select,
Address bus,
General
Purpose IO
Address bus,
General
Purpose IO
Chip Select 3
Parallel Bus
Interface
Value
1V8
1V8
1V8
1V8
1V8
Interfaces
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 34
Product Technical Specification and
Customer Design Guideline
Interfaces
4.2. Electrical Information for Digital I/O
There are three types of digital I/Os on the Q2687 Refreshed Embedded Module:
2.8 volt CMOS
1.8 volt CMOS
Open drain
Refer to the tables below for the electrical characteristics of these three digital I/Os.
Table 9: Electrical Characteristic of a 2.8 Volt Type (2V8) Digital I/O
Parameter I/O Type Minimum Typical Maximum Condition
Internal 2.8V power supply
Input / Output
Pin
V
IL
V
IH
V
OL
V
OH
I
OH
I
OL
VCC_2V8
CMOS
CMOS
CMOS
CMOS
2.74V
-0.5V*
1.96V
2.4V
2.8V 2.86V
0.84V
3.2V*
0.4V
4mA
- 4mA
I
OL
= - 4 mA
I
OH
= 4 mA
* Absolute maximum ratings
All 2.8V I/O pins do not accept input signal voltages above the maximum voltage specified above; except for the UART1 interface, which is 3.3V tolerant.
Table 10: Electrical Characteristic of a 1.8 Volt Type (1V8) Digital I/O
Parameter
Internal 1.8V power supply
Input / Output
Pin
V
IL
V
IH
V
OL
V
OH
I
OH
I
OL
*
I/O Type
VCC_1V8
CMOS
CMOS
CMOS
CMOS
Absolute maximum ratings
Table 11: Open Drain Output Type
Minimum
1.76V
-0.5V*
1.33V
1.4V
Typical
1.8V
Maximum
1.94V
0.54V
2.2V*
0.4V
4mA
- 4mA
Condition
I
OL
= - 4 mA
I
OH
= 4 mA
Signal Name Parameter I/O Type
LED0
BUZZER0
SDA1 / GPIO27 and
SCL1 / GPIO26
V
OL
I
OL
V
OL
I
OL
V
TOL
V
IH
V
IL
V
OL
Open Drain
Open Drain
Open Drain
Open Drain
Open Drain
Open Drain
Open Drain
Open Drain
Minimum Typical
2V
Maximum Condition
0.4V
8mA
0.4V
100mA
3.3V
0.8V
0.4V
Tolerated voltage
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 35
Product Technical Specification and
Customer Design Guideline
Interfaces
Signal Name Parameter I/O Type Minimum Typical Maximum Condition
I
OL
Open Drain 3mA
The reset states of the I/Os are given in each interface description chapter. Definitions of these states are given in the table below.
Table 12: Reset State Definition
Parameter
0
1
Pull-down
Pull-up
Z
Undefined
Definition
Set to GND
Set to supply 1V8 or 2V8 depending on I/O type
Internal pull-down with ~60kΩ resistor
Internal pull-up with ~60kΩ resistor to supply 1V8 or 2V8 depending on I/O type
High impedance
Caution: Undefined must not be used in an application if a special state is required at reset. These pins may be toggling a signal(s) during reset.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 36
Product Technical Specification and
Customer Design Guideline
Interfaces
4.3. General Purpose Input/Output
The Q2687 Refreshed Embedded Module provides up to 44 General Purpose I/O. They are used to control any external device such as a LCD or a Keyboard backlight.
4.3.1. Pin Description
Refer to the following table for the pin description of the general purpose input/output interface.
Table 13: GPIO Pin Description
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Pin
Number
47
57
55
58
49
44
46
23
25
24
22
30
32
33
12
45
48
68
67
66
65
64
31
59
60
61
62
63
43
51
53
50
Signal
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
I/O Type Reset State
1V8
1V8
1V8
1V8
1V8
1V8
2V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
Z
Z
Open drain Z
Undefined
Z
Z
Open drain Z
2V8 Z
2V8
2V8
2V8
Z
Z
Z
Z
Z
Z
Z
Z
Undefined
0
0
Z
0
0
0
Undefined
Undefined
Undefined
Z
Pull up
Pull up
Pull up
Pull up
Pull up
Multiplexed With
32kHz***
A25/~CS2*
A24*
INT0
COL0
COL1
COL2
COL3
COL4
ROW0
ROW1
ROW2
ROW3
ROW4
CT103 / TXD2
CT104 / RXD2
~CT106 / CTS2
~CT105 / RTS2
SIMPRES
Not mux
Not mux
Not mux
Not mux**
Not mux**
Not mux
INT1
SCL1
SDA1
SPI1-CLK
SPI1-IO
SPI1-I
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 37
Product Technical Specification and
Customer Design Guideline
Interfaces
Pin
Number
26
27
29
28
71
73
72
75
74
76
69
70
Signal I/O I/O Type Reset State Multiplexed With
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
Z
Z
1
Z
Z
Z
Z
Z
Z
Z
Undefined
Undefined
SPI2-CLK
SPI2-IO
SPI2-I
CT103 / TXD1
CT104 / RXD1
~CT105 / RTS1
~CT106 / CTS1
~CT107 / DSR1
~CT108-2 / DTR1
~CT125 / RI1
~CT109 / DCD1
*
** If a Bluetooth module is used with the Q2687 Refreshed Embedded Module, this GPIO must be reserved.
***
With the Sierra Wireless Software Suite 2. For more details, refer to document [8] Firmware 7.43 AT
Commands Manual (Sierra Wireless Software Suite 2.33).
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 38
Product Technical Specification and
Customer Design Guideline
Interfaces
4.4. Serial Interface
The Q2687 Refreshed Embedded Module may be connected to an LCD module driver through either the two SPI buses (3 or 4-wire interface) or through the I 2 C bus (2-wire interface).
4.4.1. SPI Bus
Both SPI bus interfaces include:
A CLK signal (SPIx-CLK)
An I/O signal (SPIx-IO)
An I signal (SPIx-I)
A CS (Chip Select) signal complying with the standard SPI bus (any GPIO) (~SPIx-CS)
An optional Load signal (only the SPIx-LOAD signal)
4.4.1.1. Characteristics
The following lists the features available on the SPI bus.
Master mode operation
The CS signal must be any GPIO
The LOAD signal (optional) is used for word handling mode (only the SPIx-LOAD signal)
SPI speed is from 102Kbit/s to 13Mbit/s in master mode operation
3 or 4-wire interface (5-wire interface is possible with the optional SPIx-LOAD signal)
SPI-mode configuration: 0 to 3 (for more details, refer to document [8] Firmware 7.43 AT
Commands Manual (Sierra Wireless Software Suite 2.33))
1 to 16 bits data length
4.4.1.2. SPI Configuration
Table 14: SPI Bus Configuration
Operation Maximum
Speed
SPI-
Mode
Duplex 3-wire Type 4-wire Type 5-wire Type
Master 13 Mb/s 0,1,2,3 Half
SPIx-CLK;
SPIx-IO;
GPIOx as CS
SPIx-CLK;
SPIx-IO;
SPIx-I;
GPIOx as CS
SPIx-CLK;
SPIx-IO;
SPIx-I;
GPIOx as CS;
SPIx-LOAD (not muxed in GPIO)
for more information on the signals used and their corresponding configurations.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 39
Product Technical Specification and
Customer Design Guideline
Interfaces
4.4.1.3. SPI Waveforms
The figure below shows the waveforms for SPI transfers with a 4-wire configuration in master mode 0.
Figure 7. SPI Timing Diagram (Mode 0, Master, 4 wires)
Table 15: SPI Bus AC Characteristics
Signal Description
CLK-cycle SPI clock frequency
Data-OUT delay Data out ready delay time
Data-IN-setup Data in setup time
Data-OUT-hold Data out hold time
Minimum
0.102
2
2
Typical Maximum
13
10
Unit
MHz ns ns ns
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 40
Product Technical Specification and
Customer Design Guideline
Interfaces
The following figure shows the waveform for SPI transfer with the LOAD signal configuration in master mode 0 (chip select is not represented).
Figure 8. SPI Timing Diagram with LOAD Signal (Mode 0, Master, 4 wires)
4.4.1.4. SPI1 Pin Description
Refer to the following table for the SPI1 pin description.
Table 16: SPI1 Pin Description
Pin
Number
22
23
24
25
Signal
SPI1-LOAD
SPI1-CLK
SPI1-I
SPI1-IO
I/O
O
O
I
I/O
I/O Type
2V8
2V8
2V8
2V8
Reset
State
Z
Z
Z
Z
Description Multiplexed With
SPI load
SPI Serial Clock
GPIO31
GPIO28
SPI Serial input GPIO30
SPI Serial input/output GPIO29
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
4.4.1.5. SPI2 Pin Description
Refer to the following table for the SPI2 pin description.
Table 17: SPI2 Pin Description
Pin
Number
26
27
28
29
Signal
SPI2-CLK
SPI2-IO
SPI2-LOAD
SPI2-I
I/O
O
I/O
O
I
I/O Type
2V8
2V8
2V8
2V8
Reset
State
Z
Z
Z
Z
Description Multiplexed With
SPI Serial Clock GPIO32
SPI Serial input/output GPIO33
SPI load
SPI Serial input
GPIO35
GPIO34
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 41
Product Technical Specification and
Customer Design Guideline
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
Interfaces
4.4.1.6. Application
4.4.1.6.1. 3-wire Application
For the 3-wire configuration, only the SPIx-I/O is used as both input and output.
Figure 9. Example of a 3-wire SPI Bus Application
The SPIx-I line is not used in a 3-wire configuration. Instead, this can be left open or used as a GPIO for other application functionality.
One pull-up resistor, R1, is needed to set the SPIx-CS level during the reset state. Except for R1, no other external component is needed is the electrical specifications of the customer application comply with the Q2687 Refreshed embedded module interface electrical specifications.
Note that the value of R1 depends on the peripheral plugged to the SPIx interface.
4.4.1.6.2. 4-wire Application
For the 4-wire configuration, the input and output data lines are dissociated. SPIx-I/O is used as output only and SPIx-I is used as input only.
Figure 10. Example of a 4-wire SPI Bus Application
One pull-up resistor, R1, is needed to set the SPIx-CS level during the reset state. Except for R1, no other external component is needed if the electrical specifications of the customer application comply with the Q2687 Refreshed embedded module SPIx interface electrical specifications.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 42
Product Technical Specification and
Customer Design Guideline
Interfaces
4.4.1.6.3. 5-wire Application
For the 5-wire configuration, SPIx-I/O is used as output only and SPIx-I is used as input only. The dedicated SPIx-LOAD signal is also used. This is an additional signal in more than a Chip Select (any other GPIOx).
4.4.2. I 2 C Bus
The I
2
C Bus interface includes a CLK signal (SCL1) and a data signal (SDA1) complying with a
100kbit/s-standard interface (standard mode: s-mode).
The I
2
C bus is always in master mode operation.
The maximum speed transfer is 400Kbit/s (fast mode: f-mode).
For more information on the I 2
C bus, see document [21] “I 2C Bus Specification ”, Version 2.0, Philips
4.4.2.1. I 2 C Waveforms
The figure below shows the I 2 C bus waveform in master mode configuration.
Figure 11. I 2 C Timing Diagram (master)
Table 18: I 2 C AC Characteristics
Signal
SCL1-freq
T-start
T-stop
T-free
T-high
T-data-hold
T-data-setup
Description Minimum
I²C clock frequency 100
Hold time START condition 0.6
Setup time STOP condition 0.6
Bus free time, STOP to
START
1.3
High period for clock
Data hold time
Data setup time
0.6
0
100
WA_DEV_Q26RD_PTS_001 Rev 002
Typical Maximum
400
0.9
µs
µs ns
Unit kHz
µs
µs
µs
April 20, 2010 43
Product Technical Specification and
Customer Design Guideline
4.4.2.2. I 2 C Pin Description
Refer to the following table for the I
2
C pin description.
Table 19: I 2 C Pin Description
Interfaces
Pin
Number
44
46
Signal
SCL1
SDA1
I/O
O
I/O
I/O Type Reset
State
Open drain Z
Open drain Z
Description
Serial Clock
Serial Data
Multiplexed With
GPIO26
GPIO27
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
4.4.2.3. Application
Figure 12. Example1 of an I 2 C Bus Application
The two lines, SCL1 and SDA1, both need to be pulled-up to the V I 2 C voltage. Although the V I 2 C voltage is dependent on the customer application component connected to the I
2
C bus, it must comply with the Q2687 Refreshed embedded module electrical specifications.
The VCC_2V8 (pin 10) of the Q2687 Refreshed embedded module can be used to connect the pullup resistors if the I
2
C bus voltage is 2.8V.
Figure 13. Example2 of an I 2 C Bus Application
The I
2
C bus complies with both the standard mode (baud rate = 100Kbit/s) and the fast mode (baud rate = 400Kbit/s). The value of the pull up resistors varies depending on the mode used. When using
Fast mode, it is recommended to use 1KΩ resistors to ensure compliance with the I
2
C specifications.
When using Standard mode, a higher resistance value can be used to save power consumption.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 44
Product Technical Specification and
Customer Design Guideline
Interfaces
4.5. Parallel Interface
The Q2687 Refreshed Intelligent Embedded Module may be connected to a NAND memory through the 16-bit 1.8V parallel bus interface. The VCC_1V8 (pin 5) of the Q2687 Refreshed embedded module can be used to supply the power to this interface.
The following lists the features available on the parallel interface.
Up to 128MB address range per chip select ( CS and CS 3 )
Support for 8, 16, and 32 bit (multiplexed synchronous mode) devices
Byte enabled signals for 16 bit and 32 bit operations
Fully programmable timings based on AHB (a division of the ARM clock at 26 MHz ) cycles
(except for synchronous mode which is based on CLKBURST cycles at 26 MHz only):
individually selectable timings for read and write
0 to 7 clock cycles for setup
1 to 32 clock cycles for access cycle
1 to 8 clock cycles for page access cycle
0 to 7 clock cycles for hold
1 to 15 clock cycles for turnaround
Page mode Flash memory support
page size of 4, 8, 16 or 32
Burst mode Flash memory support up to AHB (26 MHz) clock frequency (for devices sensitive to rising edge of the clock only)
AHB, AHB/2, AHB/4 or AHB/8 burst clock output
burst size of 4, 8, 16, 32
automatic CLKBURST power-down between accesses
Intel mode ( WE and OE ) and Motorola mode (E and R W ) control signals
Synchronous write mode
Synchronous multiplexed data/address mode (x32 mode)
Adaptation to word, half word, and byte accesses to the external devices
4.5.1. Pin Description
Refer to the following table for the pin description of the Parallel Interface.
Table 20: Parallel Interface Pin Description
Pin
Number
Signal
42
51
53
81
A1
/CS2
A24
O 1V8
I/O 1V8
I/O 1V8
/OE-R/W O 1V8
Reset
State
Description
1
1
This signal has 2 functions: external
Address or byte enable 2 for 16 or 32 bits devices.
Another name is used: A1_BE2
Undefined User Chip Select 2
Undefined
Address line for external device/Command selection
Output enable signal (Intel mode); read not write signal (Motorola mode)
Multiplexed
With
Not mux
A25/GPIO1
GPIO2
Not mux
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Interfaces
Pin
Number
Signal
83
84
90
91
92
93
94
95
85
86
87
88
89
96
97
98
99
100
/CS3
/WE-E
D13
D3
D12
D4
D11
D5
D0
D15
D1
D14
D2
D10
D6
D9
D7
D8
I/O
I/O
Type
O 1V8
O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
I/O 1V8
Reset
State
Description
1
1
User Chip select 3
Write enable Signal (Intel mode) enable signal (Motorola mode)
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Pull down Bidirectional data and address line
Multiplexed
With
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Not mux
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
4.5.2. Electrical Characteristics
4.5.3. Asynchronous Access
For all timing diagrams in the following section, the notations hereafter are used:
ADR is used for address bus A24, A1 or D[15:0] when used as address lines
DATA is used for D[15:0] when used as DATA lines
CS is used for CS 2 or CS 3
BE is used for A1_ BE 2 (Double function on A1 pin)
OE and R/ W are used for OE _ /
WE and E are used for WE _E
ADV signal (not available on 100-pin connector) is the address valid signal
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Interfaces
Figure 14. Asynchronous Access
The ADV signal is mentioned here because synchronous mode devices may require the signal to be asserted when an asynchronous access is performed.
Refer to the table below for the AC characteristics of asynchronous accesses.
Table 21: AC Characteristics of Asynchronous Accesses
Signal
T
ADR_DELAY
T
DATA_SETUP
T
DATA_HOLD
T
DATA_DELAY
T
DATA_SECURE
T
ADV_DELAY
T
WE_DELAY
Description Minimum
ADR delay time from
CS active
DATA to
OE
setup time
DATA hold time after inactive
OE
DATA delay time from active
CS
DATA hold time after
WE inactive or
CS
inactive
ADV delay time from
CS active and inactive
WE
delay time from active
CS
18
3
-5
[1]
Typical
4
Maximum
3
5
3
3
[2]
Unit ns ns ns ns ns ns ns
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Signal
T
OE_DELAY
T
BE_DELAY
[1]
[2]
Description Minimum Typical
OE delay time from active
CS
BE
delay time from
CS active
This timing forces to program at least one cycle for asynchronous
These maximum delays also depends on the setting of registers
Interfaces
Maximum
3
[2]
Unit ns
3 ns
4.5.4. Synchronous Access
For all timing diagrams in the following section, the notations hereafter are used:
ADR is used for address bus as A24, A1 or D[15:0] when used as address lines
DATA is used for D[15:0] when used as data lines
CS is used for CS 2 or CS 3
BE is used for A1_ BE 2 (Double function on A1 pin)
OE and R/ W are used for OE _ /
WE and E are used for WE _E
CLKBURST is the internal clock at 26MHz (not available on connector pin-out)
ADV signal (not available on 100-pin connector) is the address valid signal
BAA signal (not available on 100-pin connector) is the burst address advance for synchronous operations
WAIT signal (not available on 100-pin connector) is the wait signal for synchronous operation
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Interfaces
Figure 15. Synchronous Access
Figure 16. Read Synchronous Timing
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Interfaces
Figure 17. Write Synchronous Timing
Refer to the table below for the AC characteristics of the synchronous accesses.
Table 22: AC Characteristics of Synchronous Accesses
Signal Typical Maximum
T
DATA_DELAY
T
WE_SETUP
T
BE_DELAY
T
CLKBURST
T
ADR_SETUP
T
ADR_HOLD
T
ADR_TRISTATE
T
DATA_SETUP
T
DATA_HOLD
T
CS_SETUP
T
ADV_SETUP
T
ADV_HOLD
T
OE_DELAY
T
BAA_DELAY
T
WAIT_SETUP
Description
CLKBURTS falling edge to
DATA valid delay
WE
to CLKBURST setup time
CLKBURST falling edge to
BE
delay
CLKBURST clock : period time
Address bus setup time
Address bus hold time
Address bus tristate time
Data bus setup time
Data bus hold time
Chip select setup time
ADV
setup time
ADV
hold time
Output Enable delay time
BAA
delay time
Wait setup time
Minimum
7
3
7
7
19
5
7
7
5
38.4
4
4
10
13
13 ns ns ns ns ns ns ns ns ns ns ns ns
Unit ns ns
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Signal
T
WAIT_HOLD
Description
Wait hold time
Minimum
5
Typical
Interfaces
Maximum Unit ns
4.5.5. Additional Information Regarding Address Size
Bus
The following table establishes the possible configurations depending on address bus size requested on parallel interface.
Table 23: Address Bus Size Details
Address Bus Size Address Lines
1
2
3
A1
A1, A24
A1, A24, A25
Chip Select Available Notes
/CS2, /CS3
/CS2, /CS3
/CS3 A25 is multiplexed with /CS2
Note that some signals are multiplexed. It is thus possible to have the following configurations:
CS3*, A1, GPIO1, GPIO2
CS3*, A1, A24, GPIO1
CS3*, A1, A24, A25;
CS3*, CS2*, A1, GPIO2
CS3*, CS2*, A1, A24
4.5.6. Application
Figure 18. Example of a Parallel Bus Application (NAND Memory)
When interfaced with a NAND memory, VCC_1V8 (pin 5) can be used to supply the power to the
NAND.
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4.6. Keyboard Interface
This interface provides 10 connections:
5 rows (ROW0 to ROW4) and
5 columns (COL0 to COL4)
Scanning is digital and debouncing is performed in the Q2687 Refreshed Embedded Module. No discreet components like resistors or capacitors are needed when using this interface.
The keyboard scanner is equipped with the following:
Internal pull-down resistors for the rows
Pull-up resistors for the columns
Note that current only flows from the column pins to the row pins. This allows transistors to be used in place of the switch for power-on functions.
4.6.1. Pin Description
Refer to the following table for the pin description of the keyboard interface.
Table 24: Keyboard Interface Pin Description
Pin
Number
64
65
66
67
68
59
60
61
62
63
Signal
COL0
COL1
COL2
COL3
COL4
ROW4
ROW3
ROW2
ROW1
ROW0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O Type
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V8
Reset
State
0
0
0
0
0
Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
Description
Column scan
Column scan
Column scan
Column scan
Column scan
Row scan
Row scan
Row scan
Row scan
Row scan
Multiplexed With
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
With the Sierra Wireless Software Suite 2, when the keyboard service is used, the set of multiplexed signals becomes unavailable for any other purpose. In the same way, if one or more GPIOs (from the table above) are allocated elsewhere, the keyboard service becomes unavailable.
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4.6.2. Application
Interfaces
Figure 19. Example of a Keyboard Implementation
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Interfaces
4.7. Main Serial Link (UART1)
The main serial link (UART1) is used for communication between the Q2687 Refreshed embedded module and a PC or host processor. It consists of a flexible 8-wire serial interface that complies with
V24 protocol signalling, but not with the V28 (electrical interface) due to its 2.8V interface.
To get a V24/V28 (i.e. RS-232) interface, an RS-232 level shifter device is required as described in
section 4.7.2 Level Shifter Implementation.
The signals used by UART1 are as follows:
TX data (CT103/TXD1)
RX data (CT104/RXD1)
Request To Send (~CT105/RTS1)
Clear To Send (~CT106/CTS1)
Data Terminal Ready (~CT108-2/DTR1)
Data Set Ready (~CT107/DSR1)
Data Carrier Detect (~CT109/DCD1)
Ring Indicator (CT125/RI1)
4.7.1. Pin Description
Refer to the following table for the pin description of the UART1 interface.
Table 25: UART1 Pin Description
Pin
Number
69
70
71
72
73
74
75
76
Shielding leads
Signal*
~CT125/RI1
~CT109/DCD1
CT103/TXD1
~CT105/RTS1
CT104/RXD1
~CT107/DSR1
~CT106/CTS1
~CT108-2/DTR1
CT102/GND
I/O
O
O
O
I
O
O
I
I
2V8
2V8
2V8
2V8
2V8
2V8
2V8
2V8
GND
Description
1
Z
Z
Z
Undefined Ring Indicator
Undefined Data Carrier Detect
Z Transmit serial data
Z Request To Send
Receive serial data
Data Set Ready
Clear To Send
Data Terminal Ready
Ground
Multiplexed
With
GPIO42
GPIO43
GPIO36
GPIO38
GPIO37
GPIO40
GPIO39
GPIO41
* According to PC view
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
With the Sierra Wireless Software Suite 2, when the UART1 service is used, the set of multiplexed signals becomes unavailable for any other purpose. In the same way, if one or more GPIOs (from the table above) are allocated elsewhere, the UART1 service becomes unavailable.
The maximum baud rate of UART1 is 921 kbit/s with the Sierra Wireless Software Suite 2.33.
The rise and fall times of the reception signals (mainly CT103/TXD1) must be less than 300ns.
The UART1 interface is 2.8V type, but it is 3V tolerant.
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Tip:
Interfaces
The Q2687 Refreshed embedded module is designed to operate using all the serial interface signals and it is recommended to use ~CT105/RTS1 and ~CT106/CTS1 for hardware flow control in order to avoid data corruption or loss during transmissions.
4.7.2. Level Shifter Implementation
The level shifter must be a 2.8V with V28 electrical signal compliance.
Figure 20.
Note:
Example of an RS-232 Level Shifter Implementation for UART1
The U1 chip also protects the Q2687 Refreshed embedded module against ESD at 15KV (air discharge).
4.7.2.1. Recommended Components
R1, R2 :15KΩ
C1, C2, C3, C4, C5 :1uF
C6
C7
U1
J1
:100nF
:6.8uF TANTAL 10V CP32136 AVX
:ADM3307EACP ANALOG DEVICES
:SUB-D9 female
R1 and R2 are only necessary during the Reset state to force the ~CT1125-RI1 and ~CT109-DCD1 signals to HIGH level.
The ADM3307EACP chip is able to speed up to 921Kb/s. If others level shifters are used , ensure that their speeds are compliant with the UART1 speed.
The ADM3307EACP can be powered by the VCC_2V8 (pin 10) of the Q2687 Refreshed embedded module or by an external regulator at 2.8 V.
If the UART1 interface is connected directly to a host processor, it is not necessary to use level shifters. The interface can be connected as defined in the following sub-section.
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4.7.3. V24/CMOS Possible Designs
Interfaces
Figure 21. Example of V24/CMOS Serial Link Implementation for UART1
Note that the design presented above is a basic one and that a more flexible design to access the serial link with all modem signals is presented below.
Figure 22. Example of a Full Modem V24/CMOS Serial Link Implementation for UART1
It is recommended to add a 15kΩ pull-up resistor on the ~CT125-RI1 and ~CT109-DCD1 signals to set them to HIGH level during the reset state.
Caution: In case the Power Down mode (Wavecom 32K mode) is to be activated using the Sierra Wireless
Software Suite, the DTR pin must be wired to a GPIO. Refer to document [8] Firmware 7.43 AT
Commands Manual (Sierra Wireless Software Suite 2.33) for more information regarding using the
Sierra Wireless Software Suite to activate Wavecom 32K mode.
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Interfaces
4.7.4. 5-wire Serial Interface
The signals used in this interface are as follows:
CT103/TXD1
CT104/RXD1
~CT105/RTS1
~CT106/CTS1
~CT108-2/DTR1
The signal ~CT108-2/DTR1* must be managed following the V24 protocol signaling if slow (or fast) idle mode is to be used.
The other signals and their multiplexed GPIOs are not available.
Refer to the technical appendixes of document [8] Firmware 7.43 AT Commands Manual (Sierra
Wireless Software Suite 2.33) for more information.
4.7.5. 4-wire Serial Interface
The signals used in this interface are as follows:
CT103/TXD1
CT104/RXD1
~CT105/RTS1
~CT106/CTS1
The signal ~CT108-2/DTR1* must be configured from low level.
The other signals and their multiplexed GPIOs are not available.
Refer to the technical appendixes of document [8] Firmware 7.43 AT Commands Manual (Sierra
Wireless Software Suite 2.33) for more information.
4.7.6. 2-wire Serial Interface
Caution: Although this case is possible for a connected external chip, it is not recommended (and forbidden for
AT command or modem use).
The flow control mechanism has to be managed from the customer side. The signals used in this interface are as follows:
CT103/TXD1
CT104/RXD1
Signals ~CT108-2/DTR1 and ~CT105/RTS1 must be configured from low level.
Signals ~CT105/RTS1 and ~CT106/CTS1 are not used; default hardware flow control on UART1 should be de-activated using AT command AT+IFC=0,0
. Refer to document [8] Firmware 7.43 AT
Commands Manual (Sierra Wireless Software Suite 2.33).
The other signals and their multiplexed GPIOs are not available.
Refer to the technical appendixes of document [8] Firmware 7.43 AT Commands Manual (Sierra
Wireless Software Suite 2.33) for more information.
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4.8. Auxiliary Serial Link (UART2)
The auxiliary serial link (UART2) is used for communications between the Q2687 Refreshed embedded module and external devices. It consists of a flexible 4-wire serial interface that complies with V24 protocol signaling, but not with the V28 (electrical interface) due to its 1.8V interface.
To get a V24/V28 (i.e. RS-232) interface, an RS-232 level shifter device is required as described in
section 4.8.2 Level Shifter Implementation.
Refer to documents [20] Bluetooth Interface Application Note and [8] Firmware 7.43 AT Commands
Manual (Sierra Wireless Software Suite 2.33) for more information about the Bluetooth application on
the auxiliary serial interface (UART2).
The signals used by UART1 are as follows:
TX data (CT103/TXD2)
RX data (CT104/RXD2)
Request To Send (~CT105/RTS2)
Clear To Send (~CT106/CTS2)
4.8.1. Pin Description
Refer to the following table for the pin description of the UART2 interface.
Table 26: UART2 Pin Description
Pin
Number
30
31
32
33
Signal* I/O
CT104/RXD2 O
CT103/TXD2 I
~CT106/CTS2 O
~CT105/RTS2 I
I/O Type
1V8
1V8
1V8
1V8
Reset
State
Z
Z
Z
Z
Description
Receive serial data
Transmit serial data
Clear To Send
Request To Send
Multiplexed With
GPIO15
GPIO14
GPIO16
GPIO17
* According to PC view
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
The maximum baud rate of UART2 is 921 kbit/s with the Sierra Wireless Software Suite 2.33.
Tip: The Q2687 Refreshed embedded module is designed to operate using all the serial interface signals and it is recommended to use ~CT105/RTS2 and ~CT106/CTS2 for hardware flow control in order to avoid data corruption during transmissions.
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4.8.2. Level Shifter Implementation
The voltage level shifter must be a 1.8V with V28 electrical signal compliance.
Interfaces
Figure 23. Example of RS-232 Level Shifter Implementation for UART2
4.8.2.1. Recommended Components
Capacitors
C1 :220nF
C2, C3, C4 :1 µ F
Inductor
L1 :10 µ H
RS-232 Transceiver
U1 :LINEAR TECHNOLOGY LTC ® 2804IGN
J1 :SUB-D9 female
The LTC2804 can be powered by the VCC_1V8 (pin 5) of the Q2687 Refreshed embedded module or by an external regulator at 1.8 V.
The UART2 interface can be connected directly to others components if the voltage interface is 1.8V.
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Interfaces
4.8.3. 4-wire Serial Interface
The signals used in this interface are as follows:
CT103/TXD2
CT104/RXD2
~CT105/RTS2
~CT106/CTS2
The other signals and their multiplexed GPIOs are not available.
Refer to the technical appendixes of document [8] Firmware 7.43 AT Commands Manual (Sierra
Wireless Software Suite 2.33) for more information.
4.8.4. 2-wire Serial Interface
Caution: Although this case is possible for a connected external chip, it is not recommended (and forbidden for
AT command or modem use).
The flow control mechanism has to be managed from the customer side. The signals used in this interface are as follows:
CT103/TXD2
CT104/RXD2
Signals ~CT105/RTS2 and ~CT106/CTS2 are not used; default hardware flow control on UART2 should be de-activated using AT command AT+IFC=0,0
. Refer to document [8] Firmware 7.43 AT
Commands Manual (Sierra Wireless Software Suite 2.33).
The signal ~CT105/RTS2* must be configured from low level.
The other signals and their multiplexed GPIOs are not available.
Refer to the technical appendixes of document [8] Firmware 7.43 AT Commands Manual (Sierra
Wireless Software Suite 2.33) for more information.
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Interfaces
4.9. SIM Interface
The Subscriber Identification Module (SIM) may be directly connected to the Q2687 Refreshed embedded module via this dedicated interface. This interface controls either a 3V or a 1V8 SIM and it is fully compliant with GSM 11.11 recommendations concerning SIM functions.
The five signals used by this interface are as follows:
SIM-VCC: SIM power supply
~SIM-RST: reset
SIM-CLK: clock
SIM-IO: I/O port
SIMPRES: SIM card detect
4.9.1. Pin Description
Refer to the following table for the pin description of the SIM interface.
Table 27: SIM Pin Description
Pin
Number
9
11
12
13
14
Signal
SIM-VCC
SIM-IO
SIMPRES
~SIM-RST
SIM-CLK
I/O
O
I/O
I
O
O
I/O Type
2V9 / 1V8
2V9 / 1V8
1V8
2V9 / 1V8
2V9 / 1V8
Reset
State
Description
0
0
SIM Power Supply
*Pull-up SIM Data
Z SIM Card Detect
SIM Reset
SIM Clock
Multiplexed With
Not mux
Not mux
GPIO18
Not mux
Not mux
* SIM-IO pull-up is about 10kΩ.
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
4.9.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the SIM interface.
Table 28: Electrical Characteristics of the SIM Interface
Parameter Conditions
SIM-IO V
IH
SIM-IO V
IL
~SIM-RST, SIM-CLK
V
OH
SIM-IO V
OH
~SIM-RST, SIM-IO,
SIM-CLK V
OL
SIM-VCC Output
Voltage
I
IH
= ± 20µA
I
IL
= 1mA
Source current = 20µA
Source current = 20µA
Sink current = -200µA
SIMVCC = 2.9V
IVCC= 1mA
Minimum
0.7xSIMVCC
0.9xSIMVCC
Typical
0.8xSIMVCC
2.84 2.9
Maximum Unit
0.4
V
V
V
0.4
2.96
V
V
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Interfaces
Parameter Conditions
SIM-VCC current
SIMVCC = 1.8V
IVCC= 1mA
VBATT = 3.6V
SIM-CLK Rise/Fall
Time
~SIM-RST, Rise/Fall
Time
Loaded with 30pF
Loaded with 30pF
SIM-IO Rise/Fall
Time
Loaded with 30pF
SIM-CLK Frequency Loaded with 30pF
Note:
Minimum
1.74
Typical
1.8
20
20
0.7
Maximum
1.86
10
1
Unit
V mA ns ns
µs
3.25 MHz
When SIMPRES is used, a low to high transition means that a SIM card is inserted and a high to low transition means that the SIM card is removed.
4.9.3. Application
Figure 24. Example of a Typical SIM Socket Implementation
It is recommended to add Transient Voltage Suppressor diodes (TVS) on the signal(s) connected to the SIM socket in order to prevent any ElectroStatic Discharge.
TVS diodes with low capacitance (less than 10pF) have to be connected on SIM-CLK and SIM-IO signals to avoid any disturbance of the rising and falling edge. These types of diodes are mandatory for the Full Type Approval and should be placed as close to the SIM socket as possible.
4.9.3.1. SIM Socket Pin Description
The following table lists the SIM socket pin description.
Table 29: SIM Socket Pin Description
Pin Number
1
Signal
VCC
Description
SIM-VCC
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Pin Number
4
5
6
7
2
3
8
Signal
RST
CLK
CC4
GND
VPP
I/O
CC8
Description
~SIM-RST
SIM-CLK
SIMPRES with 100 k pull down resistor
GROUND
Not connected
SIM-IO
VCC_1V8 of the Q2687 Refreshed embedded module
(pin 5)
4.9.3.2. Recommended Components
R1
C1
C2
:100KΩ
:470pF
:100nF
Note: Note that this capacitor, C2, on the SIM-VCC line must not exceed 330nF.
D1
D2
J1
:ESDA6V1SC6 from ST
:DALC208SC6 from SGS-THOMSON/ST Microelectronics
:ITT CANNON CCM03 series (Refer to section 11.2 SIM Card Reader.)
Interfaces
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4.10. USB 2.0 Interface
A 4-wire USB slave interface is available on the Q2687 Refreshed embedded module that complies with USB 2.0 protocol signaling, but not with the electrical interface due to the 5V interface of VPAD-
USB.
The signals used by the USB interface are as follows:
VPAD-USB
USB-DP
USB-DM
GND
The USB 2.0 interface also features the following:
12Mbit/s full-speed transfer rate
3.3V type compatible
USB Soft connect feature
Download feature is not supported by USB
CDC 1.1 – ACM compliant
Note: A 5V to 3.3V typical voltage regulator is needed between the external interface power in line (+5V) and the Q2687 Refreshed embedded module line (VPAD-USB).
4.10.1. Pin Description
Refer to the following table for the pin description of the USB interface.
Table 30: USB Pin Description
Pin
Number
52
54
56
Signal
VPAD-USB
USB-DP
USB-DM
I/O
I
I/O
I/O
I/O Type
VPAD_USB
VPAD_USB
VPAD_USB
Description
USB Power Supply
Differential data interface positive
Differential data interface negative
4.10.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the USB interface.
Table 31: Electrical Characteristics of the USB Interface
Parameter
VPAD-USB, USB-DP, USB-DM
VPAD_USB Input current consumption
Minimum
3
Typical
3.3
8
Maximum
3.6
Unit
V mA
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4.10.3. Application
Interfaces
Figure 25. Example of a USB Implementation
The regulator used is a 3.3V regulator and it is supplied through J1 when the USB wire is plugged.
D1 is an EMI/RFI filter with ESD protection. The internal pull-up resistor of D1 which is used to detect the interface’s full speed is not connected because it is embedded into the embedded module.
Note that both R1 and C1 have to be close to J1.
4.10.3.1. Recommended Components
R1
C1, C3
C2, C4
D1
U1
:1MΩ
:100nF
:2.2µF
:STF2002-22 from SEMTECH
:LP2985AIM 3.3V from NATIONAL SEMICONDUCTOR
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4.11. RF Interface
The RF (radio frequency) interface of the Q2687 Refreshed Embedded Module allows the transmission of RF signals. This interface has a 50Ω nominal impedance and a 0Ω DC impedance.
4.11.1. RF Connections
The antenna cable and connector should be selected in order to minimize loss in the frequency bands used for GSM 850/900MHz and 1800/1900MHz. The maximum value of loss considered between the
Q2687 Refreshed embedded module and an external connector is 0.5dB.
The Q2687 Refreshed embedded module does not support an antenna switch for a car kit, but this function can be implemented externally and can be driven using a GPIO.
4.11.1.1. UFL Connector
A wide variety of cables fitted with UFL connectors from different suppliers may be used. For more
information, refer to section 9.2.5.1 UFL/SMA Connector.
4.11.1.2. Soldered Solution
The soldered solution will preferably be based on an RG178 coaxial cable. For more information, refer
to section 9.2.5.2 Coaxial Cable.
4.11.1.3. Precidip Connector
This connector is compatible with Precidip and is dedicated for board-to-board applications and must be soldered on the customer board. The recommended supplier is as follows:
Preci-dip SA for the Precidip connector (reference: 9PM-SS-0003-02-248//R1)
For more information, refer to section 9.2.5.3 Precidip Connector.
4.11.2. RF Performance
The RF performance is compliant with ETSI GSM 05.05 recommendations.
The main receiver parameters are:
GSM850 Reference Sensitivity = -109 dBm typical (Static & TUHigh)
E-GSM900 Reference Sensitivity = -109 dBm typical (Static & TUHigh)
DCS1800 Reference Sensitivity = -108 dBm typical (Static & TUHigh)
PCS1900 Reference Sensitivity = -108 dBm typical (Static & TUHigh)
Selectivity @ 200 kHz: > +9 dBc
Selectivity @ 400 kHz: > +41 dBc
Linear dynamic range: 63 dB
Co-channel rejection: >= 9 dBc
The main transmitter parameters are:
Maximum output power (EGSM & GSM850): 33 dBm +/- 2 dB at ambient temperature
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Maximum output power (GSM1800 & PCS1900): 30 dBm +/- 2 dB at ambient temperature
Minimum output power (EGSM & GSM850): 5 dBm +/- 5 dB at ambient temperature
Minimum output power (GSM1800 & PCS1900): 0 dBm +/- 5 dB at ambient temperature
4.11.3. Antenna Specifications
The antenna must meet the requirements specified in the table below.
The optimum operating frequency depends on the application. A dual-band, tri-band or quad-band antenna should operate in these frequency bands and have the following characteristics.
Table 32: Antenna Specifications
Characteristic
TX Frequency
RX Frequency
Impedance
VSWR RX max
TX max
Typical Radiated Gain
E-GSM 900
880 to
915 MHz
925 to
960 MHz
50Ω
1.5:1
1.5:1
DCS 1800
1710 to 1785
MHz
1805 to 1880 MHz
0dBi in one direction at least
GSM 850
824 to
849 MHz
869 to
894 MHz
PCS 1900
1850 to
1910 MHz
1930 to
1990 MHz
Note: Sierra Wireless recommends a maximum VSWR of 1.5:1 for both TX and RX bands. Even so, all aspects of this specification will be fulfilled even with a maximum VSWR of 2:1.
For the list of antenna recommendations, refer to section 11.5 Antenna Cable.
4.11.3.1. Application
The antenna should be isolated as much as possible from analog and digital circuitry (including interface signals).
On applications with an embedded antenna, poor shielding could dramatically affect the receiving sensitivity. Moreover, the power radiated by the antenna could affect the application (TDMA noise, for instance).
As a general recommendation, all components or chips operated at high frequencies
(microprocessors, memories, DC/DC converter) or other active RF parts should not be placed too close to the Q2687 Refreshed embedded module. In the event that this happens, the correct power supply layout and shielding should be designed and validated.
Components near RF connections or unshielded feed lines must be prohibited.
RF lines must be kept as short as possible to minimize loss.
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4.12. Analog Audio Interface
The Q2687 Refreshed Embedded Module supports two microphone inputs and two speaker outputs.
It also includes an echo cancellation and a noise reduction feature which allows for an improved quality of hands-free functionality.
In some cases, ESD protection must be added on the audio interface lines.
4.12.1. Pin Description
The following table lists the pin description of the analog audio interface.
Table 33: Analog Audio Pin Description
Pin
Number
40
38
36
34
35
37
39
41
Signal
MIC1P
MIC1N
MIC2P
MIC2N
SPK1P
SPK1N
SPK2P
SPK2N
I/O
I
I
I
I
O
O
O
O
I/O Type
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Description
Microphone 1 positive input
Microphone 1 negative input
Microphone 2 positive input
Microphone 2 negative input
Speaker 1 positive output
Speaker 1 negative output
Speaker 2 positive output
Speaker 2 negative output
4.12.2. Microphone Features
The microphone can be connected in either differential or single-ended mode. However, it is strongly recommended to use a differential connection in order to reject common mode noise and TDMA noise. When using a single-ended connection, be sure to have a very good ground plane, very good filtering, as well as shielding in order to avoid any disturbance on the audio path. Also note that using a single-ended connection decreases the audio input signal by 6dB as compared to using a differential connection.
The gain of both MIC inputs are internally adjusted and can be tuned using AT commands. For more
information on AT commands, refer to document [8] Firmware 7.43 AT Commands Manual (Sierra
Wireless Software Suite 2.33).
4.12.2.1. MIC1 Microphone Input
By default, MIC1 input is single-ended, but can be configured in differential mode.
The MIC1 input does not include an internal bias making it the standard input for an external headset or a hands-free kit. If an electret microphone is used, there must be external biasing that corresponds with the characteristics of the electret microphone used.
AC coupling is already embedded in the Q2687 Refreshed embedded module.
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Figure 26. MIC1 Equivalent Circuits
Refer to the following table for the electrical characteristics of MIC1.
Table 34: Electrical Characteristics of MIC1
Parameter
DC Characteristics
AC Characteristics
200 Hz<F<4 kHz
Working voltage
( MIC1P-MIC1N)
Maximum rating voltage
(MIC1P or MIC1N)
Minimum
Z1 70
AT+VGT*=3500
(1)
AT+VGT*=2000
(1)
AT+VGT*=700 (1)
Positive
Negative -0.9
Typical
N/A
120
13.8
77.5
346
Maximum
160
18.6**
104**
465**
+7.35
Unit
V k mVrms mVrms mVrms
V
*
AT Commands Manual (Sierra Wireless Software Suite 2.33).
** This value is obtained with digital gain = 0, for frequency = 1 kHz
(1)
Commands Manual (Sierra Wireless Software Suite 2.33) for more information.
Caution: The voltage input value for MIC1 cannot exceed the maximum working voltage; otherwise, clipping will appear.
4.12.2.1.1. MIC1 Differential Connection Example
Figure 27. Example of a MIC1 Differential Connection with LC Filter
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Audio quality can be very good without a filter (L1, L2, C2, C3 and C4), depending on the design. But if there is EMI perturbation, this filter can reduce TDMA noise. Note though that this filter is not mandatory. If the filter is not to be used, the capacitors must be removed and the coil replaced by 0Ω resistors as shown in the following diagram.
Figure 28. Example of a MIC1 Differential Connection without an LC Filter
Capacitor C1 is highly recommended to eliminate TDMA noise and it must be connected close to the microphone.
Although Vbias can be VCC_2V8 (pin 10) of the Q2687 Refreshed embedded module, it is recommended to use another 2V to 3V power supply voltage instead. This is because Vbias must be kept as “clean” as possible to avoid bad performance when a single-ended connection is used.
Caution: TDMA noise may degrade quality when VCC_2V8 is used.
The following table lists the recommended components to use in creating the LC filter.
Table 35: Recommended Components for a MIC1 Differential Connection
Component
R1
R2, R3
R4
C1
C2, C3, C4
C5
L1, L2
Value
4.7kΩ
820Ω
1kΩ
12pF to 33pF
47pF
2.2uF +/- 10%
100nH
Notes
For Vbias equal to 2.8V.
Must be tuned depending on the design.
Must be tuned depending on the design.
Must be tuned depending on the design.
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4.12.2.1.2. MIC1 Single-Ended Connection Example
Interfaces
Figure 29. Example of a MIC1 Single-Ended Connection with LC Filter
The single-ended design is not recommended for improving TDMA noise rejection as it is usually difficult to eliminate TDMA noise from a single-ended design.
It is recommended to use an LC filter (L1 and C2) to eliminate TDMA noise. Note though that this filter is not mandatory. If the filter is not to be used, the capacitor C2 must be removed and the coil replaced by 0Ω resistors as shown in the following diagram.
Figure 30. Example of a MIC1 Single-Ended Connection without an LC Filter
The capacitor, C1, is highly recommended to eliminate TDMA noise and it must be connected close to the microphone.
Although Vbias can be VCC_2V8 (pin 10) of the Q2687 Refreshed embedded module, it is recommended to use another 2V to 3V power supply voltage instead. This is because Vbias must be kept as “clean” as possible to avoid bad performance when a single-ended connection is used.
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Caution: TDMA noise may degrade quality when VCC_2V8 is used.
The following table lists the recommended components to use in creating the LC filter.
Table 36: Recommended Components for a MIC1 Single-Ended Connection
Component
R1
R2
C1
C2
L1
Value
4.7kΩ
820Ω
12pF to 33pF
47pF
100nH
Notes
For Vbias equal to 2.8V.
Must be tuned depending on the design.
Must be tuned depending on the design.
Must be tuned depending on the design.
Interfaces
4.12.2.2. MIC2 Microphone Input
By default, MIC2 input is differential, but can be configured in single-ended mode.
The MIC2 input already includes biasing for an electret microphone and the electret microphone may be directly connected to this input.
AC coupling is already embedded in the Q2687 Refreshed embedded module.
Figure 31. MIC2 Equivalent Circuits
Refer to the following table for the electrical characteristics of MIC2.
Table 37: Electrical Characteristics of MIC2
Parameter
Parameters
Internal biasing
DC Characteristics
AC Characteristics
200 Hz<F<4 kHz
Working voltage
Minimum
MIC2+
Output current
R2
Z2 MIC2P
(MIC2N=Open)
Z2 MIC2N
(MIC2P=Open)
2
1650
1.1
Z2 MIC2P
(MIC2N=GND)
Z2 MIC2N
(MIC2P=GND)
0.9
Impedance between MIC2P and MIC2N
AT+VGT*=3500
(1)
AT+VGT*=2000
(1)
1.3
Typical
2.1
0.5
1900
1.3
1.1
1.6
13.8
77.5
WA_DEV_Q26RD_PTS_001 Rev 002
Maximum
2.2
1.5
2150
Unit
V mA
1.6
1.4
2
18.6***
104***
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Parameter
( MIC2P-MIC2N)
Maximum rating voltage
(MIC2P or MIC2N)
AT+VGT*=700
(1)
Positive
Negative
Minimum
-0.9
Typical
346
Maximum
466***
+7.35**
Unit
V
*
AT Commands Manual (Sierra Wireless Software Suite 2.33).
** Because MIC2P is internally biased, it is necessary to use a coupling capacitor to connect an audio signal provided by an active generator. Only a passive microphone can be directly connected to the MIC2P and MIC2N inputs.
*** This value is obtained with digital gain = 0, for frequency = 1 kHz
(1)
Commands Manual (Sierra Wireless Software Suite 2.33).
Caution: The voltage input value for MIC2 cannot exceed the maximum working voltage; otherwise, clipping will appear.
4.12.2.2.1. MIC2 Differential Connection Example
Figure 32. Example of a MIC2 Differential Connection with LC Filter
Audio quality can be very good without a filter (L1, L2, C2, C3 and C4), depending on the design. But if there is EMI perturbation, this filter can reduce TDMA noise. Note though that this filter is not mandatory. If the filter is not to be used, the capacitors must be removed and the coil replaced by 0Ω resistors as shown in the following diagram.
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Figure 33. Example of a MIC2 Differential Connection without an LC Filter
Capacitor C1 is highly recommended to eliminate TDMA noise and it must be connected close to the microphone.
The following table lists the recommended components to use in creating the LC filter.
Table 38: Recommended Components for a MIC2 Differential Connection
Component
C1
C2, C3, C4
L1, L2
Value
12pF to 33pF
47pF
100nH
Notes
Must be tuned depending on the design.
Must be tuned depending on the design.
Must be tuned depending on the design.
4.12.2.2.2. MIC2 Single-Ended Connection Example
Figure 34. Example of a MIC2 Single-Ended Connection with LC Filter
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The single-ended design is not recommended for improving TDMA noise rejection as it is usually difficult to eliminate TDMA noise from a single-ended design.
The internal input resistor value becomes 1150Ω due to the connection of MIC2N to the ground.
It is recommended to use an LC filter (L1 and C2) to eliminate TDMA noise. Note though that this filter is not mandatory. If the filter is not to be used, the capacitor C2 must be removed and the coil replaced by 0Ω resistors as shown in the following diagram.
Figure 35. Example of a MIC2 Single-Ended Connection without an LC Filter
The capacitor, C1, is highly recommended to eliminate TDMA noise and it must be connected close to the microphone.
The following table lists the recommended components to use in creating the LC filter.
Table 39: Recommended Components for a MIC2 Single-Ended Connection
Component
C1
C2
L1
Value
12pF to 33pF
Notes
Must be tuned depending on the design.
Must be tuned depending on the design.
Must be tuned depending on the design.
4.12.3. Speaker Features
There are two different speaker channels, SPK1 and SPK2, available on the Q2687 Refreshed embedded module. The connection on SPK1 is fixed as single-ended, but SPK2 may be configured in either differential or single-ended mode.
However, as with the microphone connection, it is strongly recommended to use a differential connection in order to reject common mode noise and TDMA noise. Furthermore, using a singleended connection entails losing power (the power is divided by 4 in a single-ended connection) as compared to using a differential connection.
Note that when using a single-ended connection, a very good ground plane, very good filtering, as well as shielding is needed in order to avoid any disturbance on the audio path.
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The gain of each speaker output channel is internally adjusted and can be tuned using AT commands.
For more information on AT commands, refer to document [8] Firmware 7.43 AT Commands Manual
(Sierra Wireless Software Suite 2.33).
No discreet components like resistors or capacitors are needed when using this interface.
The following table lists the typical values of both speaker outputs.
Table 40: Speaker Information
Parameter
Z (SPK1P, SPK1N)
Z (SPK2P, SPK2N)
Z (SPK2P, SPK2N)
Typical
16 or 32
4
8
Unit
Connection
Single-ended mode
Single-ended mode
Differential mode
4.12.3.1. Speakers Output Power
The maximum power output of SPK1 and SPK2 are not similar because of the difference in their configuration. Because SPK2 can be connected in differential mode, it can provide more power compared to SPK1 which only allows single-ended connections. The maximal specifications given below are available with the maximum power output configuration values set by AT command, and the typical values are recommended.
Caution: It is mandatory not to exceed the maximal speaker output power and the speaker load must be in accordance with the gain selection (gain is controlled by AT command). Exceeding beyond the specified maximal output power may damage the Q2687 Refreshed embedded module.
4.12.3.2. SPK1 Speaker Output
SPK1 only allows for a single-ended connection.
Figure 36. SPK1 Equivalent Circuits
Refer to the following table for the electrical characteristics of SPK1.
Table 41: Electrical Characteristics of SPK1
Parameter
Biasing voltage
Output swing voltage
-
RL=16 : AT+VGR=-
1600**; single-ended
Minimum
-
Typical
1.30
1.7
Maximum
-
Unit
V
Vpp
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Interfaces
Parameter
RL
IOUT
POUT
RPD
Minimum
RL=32 ; AT+VGR=-
1600**; single-ended
Load resistance
-
14.5
Output current; single-ended; peak value
RL=16 -
RL=16
1600**
RL=32 -
; AT+VGR*=-
RL=32 ; AT+VGR*=-
1600**
-
Output pull-down resistance at power-down
28
Typical
1.9
32
40
22
25
16
40
Maximum
2.75
-
85
-
27
52
Unit
Vpp
mA mA mW mW k
*
7.43 AT Commands Manual (Sierra Wireless Software Suite 2.33).
**
Commands Manual (Sierra Wireless Software Suite 2.33).
4.12.3.3. SPK2 Speaker Output
SPK2 can have either a single-ended or a differential connection.
Figure 37. SPK2 Equivalent Circuits
Refer to the following table for the electrical characteristics of SPK2.
Table 42: Electrical Characteristics of SPK2
Parameter
Biasing voltage SPK2P and SPK2N
Output swing voltage
RL=8 : AT+VGR=-1000*; single ended
RL=8 : AT+VGR=-1000*; differential
RL=32 : AT+VGR=-1000*; single ended
RL=32 : AT+VGR=-1000*; differential
Minimum
-
-
-
-
Typical
1.30
-
-
-
-
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Maximum
2
4
2.5
5
Unit
V
Vpp
Vpp
Vpp
Vpp
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Interfaces
Parameter
RL
IOUT
POUT
RPD
VPD
Load resistance
Output current; peak value;
RL=8
RL=8 ; AT+VGR=-1000*;
Output pull-down resistance at power-down
Output DC voltage at powerdown
Minimum
6
-
-
28
-
Typical
8
-
-
40
-
Maximum
-
180
250
52
100
Unit
mA mW k mV
* The output voltage depends of the output speaker gain set by AT command. This value is given in dB, but it’s
If a singled-ended connection is used with SPK2, only one of either SPK2 has to be chosen. The result is a maximal output power divided by 4.
4.12.3.4. Differential Connection Example
Figure 38. Example of an SPK Differential Connection
The impedance of the speaker amplifier output in differential mode is R 1 +/-10% .
Note that the connection between the speaker and the Q2687 Refreshed embedded module pins must be designed to keep the serial impedance lower than 3Ω when it is connected in differential mode.
4.12.3.5. Single-Ended Connection Example
Figure 39. Example of an SPK Single-Ended Connection
Take note of the following when connecting the speaker in single-ended mode:
6.8µF < C1 < 47µF (depending on the characteristics of the speaker and the output power)
C1 = C2
R1 = Zhp
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Again, note that using a single-ended connection includes losing power (-6dB) as compared to a differential connection.
In the case of a 32Ω speaker, a cheaper and smaller solution can be implemented where R1 = 82Ω and C2 = 6.8µF (ceramic).
Note that the connection between the speaker and the Q2687 Refreshed embedded module pins must be designed to keep the serial impedance lower than 1.5Ω when it is connected in single-ended mode.
Lastly, when the SPK1 channel is used, only SPK1P is useful in a single-ended connection and
SPK1N can be left open.
4.12.3.6. Recommended Characteristics
Type
Impedance
:10mW, electro-magnetic
Z = 8Ω for hands-free (SPK2)
Z = 32Ω for headset kit (SPK1)
Sensitivity :110dB SPL minimum (0dB = 20µPa)
Frequency response must be compatible with GSM specifications
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Interfaces
4.13. Digital Audio Interface (PCM)
The Digital Audio Interface (PCM) interface allows connectivity with standard audio peripherals. It can be used, for example, to connect an external audio codec.
The programmability of this interface allows addressing a large range of audio peripherals.
The signals used by the Digital Audio Interface are as follows:
PCM-SYNC (output) : The frame synchronization signal delivers an 8kHz frequency pulse that synchronizes the frame data in and the frame data out.
PCM-CLK (output) : The frame bit clock signal controls data transfer with the audio peripheral.
PCM-OUT (output) : The frame “data out” relies on the selected configuration mode.
PCM-IN (input) : The frame “data in” relies on the selected configuration mode.
The Digital Audio Interface also features the following:
IOM-2 compatible device on physical level
Master mode only with 6 slots by frame, user only on slot 0
Bit rate single clock mode at 768kHz only
16 bits data word MSB first only
Linear Law only (no compression law)
Long Frame Synchronization only
Push-pull configuration on PCM-OUT and PCM-IN
Note that the digital audio interface configuration cannot differ from those specified above.
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4.13.1. PCM Waveforms
The following figures describe the PCM Frame and Sampling waveforms.
Interfaces
Figure 40. PCM Frame Waveform
Figure 41. PCM Sampling Waveform
Refer to the following table for the AC characteristics of the digital audio interface.
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Table 43: AC Characteristics of the Digital Audio Interface
Signal
Tsync_low +
Tsync_high
Tsync_low
Tsync_high
TSYNC-CLK
TCLK-cycle
TIN-setup
TIN-hold
TOUT-delay
Description
PCM-SYNC period
PCM-SYNC low time
PCM-SYNC high time
PCM-SYNC to PCM-CLK time
PCM-CLK period
PCM-IN setup time
PCM-IN hold time
PCM-OUT delay time
Minimum
50
50
Typical
125
93
32
-154
1302
Interfaces
Maximum
20
Unit
µs ns ns ns ns
µs
µs ns
4.13.2. Pin Description
Refer to the following table for the pin description of the digital audio (PCM) interface.
Table 44: PCM Interface Pin Description
Pin
Number
77
78
79
80
Signal
PCM-SYNC
PCM-IN*
PCM-CLK
PCM-OUT
I/O
O
I
O
O
I/O Type* Reset State
1V8
1V8
1V8
1V8
Pull-down
Pull-up
Pull-down
Pull-up
Description
Frame synchronization 8kHz
Data input
Data clock
Data output
* When using analog audio interface, the PCM_In signal should be in HZ.
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
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4.14. Battery Charging Interface
The Q2687 Refreshed embedded module supports one battery charging circuit, two algorithms and one hardware charging mode (pre-charging) for the following battery types:
Ni-Cd (Nickel-Cadmium)
Ni-Mh (Nickel-Metal Hydride)
Li-Ion (Lithium-Ion) with the embedded PCM (Protection Circuit Module) algorithm 1
Note: Li-Ion batteries must be used with embedded PCM (protection circuit module).
The Q2687 Refreshed embedded module charging circuit is composed of a transistor switch which connects the CHG-IN signal (pins 6 and 8) to the VBATT signal (pins 1, 2, 3 and 4). This switch is then controlled by the two charging algorithms – algorithm 0 and algorithm 1.
Caution: Voltage is forbidden on the CHG-IN signal if no battery is connected to the VBATT signal.
The charger DC power supply must have an output current limited to 800mA and that the maximum charger output current provided to the battery must also correspond to the battery’s electrical characteristics.
The algorithms control the frequency and the connected time of the switching. During the charging procedure, the battery charging level is monitored and when the Li-Ion algorithm is used, the battery temperature is also monitored via the ADC1/BAT-TEMP input.
Figure 42. Battery Charging Diagram
One more charging procedure provided by the Q2687 Refreshed embedded module is the hardware charging mode which is also called “pre-charging”. This is a special charging mode as it is only activated when the Q2687 Refreshed embedded module is OFF. The goal of this charging mode is to avoid battery damage by preventing the battery from being discharged to a level that is lower than the specified minimum battery level. Control of this mode is managed by hardware.
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To use the battery charging functionality of the Q2687 Refreshed embedded module, 3 hardware parts are needed:
Charger Power Supply – this provides a DC current power supply limited to 800mA, with a voltage range that corresponds to the battery and the Q2687 Refreshed embedded module specifications.
Battery – the battery charging functionality must only be used with a rechargeable battery.
The three supported battery types are: Ni-Cd, Ni-Mh and Li-Ion.
Analog Temperature Sensor – this is only used for Li-Ion batteries to monitor their temperatures. This sensor is composed of an NTC sensor and several resistors.
4.14.1. Charging Algorithms
OASiS provides the charging algorithms for Li-ion, Ni-Mh and Ni-Cd type batteries.
Algorithm 0 is used for Ni-Mh and Ni-Cd type batteries, while algorithm 1 is used for Li-Ion type batteries. Temperature monitoring is only performed when using algorithm 1.
Both charging algorithms are controlled by two AT commands:
AT+WBCI
AT+WBCM
These two AT commands are used to set the charging battery parameters, select the type of battery
and starts/stops the battery charging. Refer to document [8] Firmware 7.43
(Sierra Wireless Software Suite 2.33) for more information about these AT commands.
Note: In the following sub-sections, the parameters in bold and italic type can be modified with the
AT+WBCM command.
4.14.1.1. Ni-Cd/Ni-Mh Charging Algorithm
This algorithm measures the battery voltage when the DC switch is open (T2). If the voltage is below
BattLevelMax , the switch is closed (T1) to charge the battery. The switch is then re-opened for a time specified by TPulseInCharge (typically 100ms) and then the switch is closed again.
When the battery voltage has reached BattLevelMax , the software monitors the battery voltage
(typically every 5seconds; defined by TPulseOutCharge ) and the switch state is left open for time T3.
Figure 43. Ni-Cd/Ni-Mh Charging Waveform
Refer to the following table for the electrical characteristics of the Ni-Cd and Ni-Mh battery timing charge.
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Table 45: Electrical Characteristics of Ni-Cd/Ni-Mh Battery Timing Charge
Parameter
T1
T2
T3
Minimum Typical
1
0.1
5
Maximum Unit s s s
T1, T2, T3 and BattLevelMax may be configured using AT commands. For more information, refer to
AT Commands Manual (Sierra Wireless Software Suite 2.33).
Note: Only the battery level, and not the temperature, is monitored by the software.
4.14.1.2. Li-Ion Charging Algorithm
The Li-Ion algorithm provides battery temperature monitoring, which is highly recommended to prevent battery damage during the charging phase.
The Li-Ion charger algorithm can be broken down into three phases:
1. Beginning of pulse charge – this is the beginning of the alternating pulse charge (1second) and rest (100ms).
2. Constant current charge – this is when the battery voltage reaches DedicatedVoltStart (4.1V on the graph below, but specified as 4.0V as default value).
3. End of pulse charge – this is when the rest period lasts longer because the voltage has exceeded BattLevelMax (4.3V by default) during the rest period.
The three phases can be seen on the following waveform for full charging:
Figure 44. Li-Ion Full Charging Waveform
In the diagram above, the charge was done with an empty battery in order to know the maximum duration of a full charge ; and in this specific example , complete charging took more than an hour.
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The charging stops when the battery voltage has exceeded 4.3V (by default) and when the rest time
between pulses has reached 10seconds. For more information, refer to section 4.14.1.2.2
Caution: If the Li-Ion battery is locked by its PCM when it is plugged for the first time, charging will not take place. The Q2687 Refreshed embedded module cannot release the PCM protection inside the Lithium battery pack.
The following table lists the electrical characteristics of the Li-Ion battery timing charge.
Table 46: Electrical Characteristics of Li-Ion Battery Timing Charge
Parameter
Phase 1 switching
Phase 2 switching
Phase 3 switching
Closed
Open
Closed
Open
Closed
Minimum
0.1
Typical
1
1
Always
0.1
Maximum
10
Unit s s s s s
4.14.1.2.1. Pulse Appearance in Phase 2
The pulse is always 1second long and does not depend on the battery voltage. The pulse charge starts when while charging, the battery voltage reaches DedicatedVoltStart . At the beginning of the pulse charge, the battery voltage looks like a square signal with a 91% duty cycle.
Figure 45. Phase 2 Pulse
This lasts for as long as the voltage has not exceeded BattLevelMax while resting.
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Figure 46. Phase 2 Rest
4.14.1.2.2. Rest in Between Pulses in Phase 3
At the end of the charge when the battery is almost full, the rest period between the two pulses lasts as long as the voltage stays beyond 4.2V.
When this happens, the pulse length remains the same but the rest time between the two pulses increases regularly until it reaches 10 seconds. (The minimum rest time is 100ms.)
If this period lasts more than 10 seconds, then the charge stops (as the battery is then fully charged).
Figure 47. Phase 3 Switch
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4.14.2. Pre-Charging
When a DC power supply is connected to the CHG-IN input and if the battery voltage is between
2.8V* and 3.2V, a constant current of 50mA is provided to the battery to prevent it from being discharged below the specified minimum battery level.
When the battery is able to supply the Q2687 Refreshed embedded module, it is automatically powered on and the software algorithm is activated to finish the charge.
When pre-charging is launched, LED0 blinks automatically.
Note: * For the Lithium-ion battery, the minimum voltage must be higher than the PCM lock level. Take note that if the voltage goes below the PCM lock level (in this case, 2.8V), charging is not guaranteed.
4.14.3. Temperature Monitoring
Temperature monitoring is only available for the Li-Ion battery with algorithm 1. ADC1/BAT-TEMP (pin
20) input must be used to sample the analog temperature signal provided by an NTC temperature sensor. The minimum and maximum temperature range may be set by AT command.
Refer to the following table for the pin description of the battery charging interface.
Table 47: Battery Charging Interface Pin Description
Pin
Number
6, 8
20
Signal
CHG-IN
ADC1/BAT-TEMP
I/O
I
I
I/O Type
Analog
Analog
Description
Current source input
A/D converter
Refer to the following table for the electrical characteristics of the battery charging interface.
Table 48: Electrical Characteristics of the Temperature Monitoring Feature
Parameter
Charging operating temperature
ADC1/BAT-TEMP
(pin 20 )
Maximum output code
Sampling rate
Input Impedance (R)
Input signal range
CHG-IN (pin 6, 8 ) Voltage (for I=Imax)
Voltage (for I=0)
Current Imax
Minimum
0
0
4.6*
400**
Typical
1635
216
1M
Maximum
50
2
6*
800
Unit
°C
LSB
S/s
V
V
V mA
* To be configured as specified by the battery manufacturer.
** Be careful as this value has to be selected in function of the power consumption mode used. Refer to the power
consumption tables in section 6 Power Consumption for more information.
4.14.4. Recharging
When battery charging has stopped because the maximum battery level has been reached and the charger has been left plugged in, the charging algorithm will not authorize a new charge to start until 5 minutes after the voltage difference has reached 103mV.
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4.14.5. Application
The VCC_2V8 voltage provided by the Q2687 Refreshed embedded module can be used to polarize the NTC sensor. However, additional resistors (R1 and R2) must be used to adjust the maximum voltage from the ADC input to 2V.
If another polarized voltage is used, the resistors must be adjusted accordingly.
Note that it is not recommended to use the VCC_1V8 voltage.
Figure 48. Example of an ADC Application
The R(t) resistor is the NTC and should be placed close to the battery. Usually, it is integrated into the battery.
4.14.5.1. Temperature Computation Method
The following computations and values represent the ambient temperature in °C.
The resistor value depends on the temperature:
t o
represents the ambient temperature (+25°C) associated to R(t resistor o
) which is the nominal
B is the thermal sensibility (4250K)
t represents the temperature in °C
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For more information about NTC equations, refer to your NTC provider specifications.
4.14.6. Charger Recommendations
The following table specifies the charger recommendations.
Table 49: Charger Recommendations
Parameter Minimum
Input voltage 90
Input frequency 45
Output voltage limit
Output voltage limit
Output current
4.6
(1)
Output Voltage
Ripple
Typical
1C (2) (3)
150
Maximum
265
65
6
Unit
Vrms
Hz
V
V mA mVpp
Remarks
No load
Io max
Io max
Vout=5.3V
(1)
(2)
See the cell battery specifications for current charging conditions.
1C = Nominal capacity (of the battery cell).
(3) See the cell battery specifications for current charging conditions. T1 and D1 must be chosen according to the nominal capacity battery cell.
It is recommended to let the output voltage (Vo) drop to less than 1.18V in less than 1second when the AC/DC adapter is unplugged.
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4.15. Temperature Sensor Interface
A temperature sensor is implanted in the Q2687 Refreshed embedded module which is used to detect the temperature in the embedded module.
The software can be used to report the temperature via
ADC4 .
For more details about ADC4
, refer to document [8] Firmware 7.43 AT Commands Manual
(Sierra Wireless Software Suite 2.33).
The following waveform describes the characteristic of this function.
The average step of the Q2687 Refreshed is 13mV/°C and the formula for computing the temperature sensor output is as follows:
VTemp (V) = -0.013 x Temperature ( ° C) + 1.182
Figure 49. Temperature Sensor Characteristics
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5. Signals and Indicators
5.1. ON/~OFF Signal
This input is used to switch the Q2687 Refreshed embedded module ON or OFF.
A HIGH level signal must be provided on the ON/~OFF pin to switch the Q2687 Refreshed embedded module ON. The voltage of this signal has to be maintained higher than 0.8 x VBATT for a minimum of 1500ms. This signal can be left at HIGH level until switched off.
To switch the Q2687 Refreshed embedded module OFF, the ON/~OFF signal must be reset and an
AT+CPOF command must be sent to the embedded module.
5.1.1. Pin Description
Refer to the following table for the pin description of the ON/~OFF signal.
Table 50: ON/~OFF Signal Pin Description
Pin
Number
19
Signal I/O I/O Type Description
ON/ OFF I CMOS Embedded Module Power-ON
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
5.1.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the ON/~OFF signal.
Table 51: Electrical Characteristics of the ON/~OFF Signal
Parameter
V
IL
V
IH
I/O Type
CMOS
CMOS
Minimum
VBATT x 0.8
Maximum
VBATT x 0.2
VBATT
Unit
V
V
Caution: All external signals must be inactive when the embedded module is OFF to avoid any damage when starting and to allow the embedded module to start and stop correctly.
5.1.3. Power-ON
Once the embedded module is supplied through VBATT, the application must set the ON/OFF signal to high to start the embedded module power-ON sequence. The ON/OFF signal must be held high during a minimum delay of T on/off-hold
(minimum hold delay on the ON/~OFF signal) to power-ON. After this delay, an internal mechanism maintains the embedded module in power-ON condition.
During the power-ON sequence, an internal reset is automatically performed by the embedded module for 40ms (typical). During this phase, any external reset should be avoided.
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Once initialization is completed (timing is SIM and network dependent), the AT interface answers the
application with "OK". For further details, refer to document [8] Firmware 7.43 AT Commands Manual
(Sierra Wireless Software Suite 2.33).
Figure 50. Power-ON Sequence (no PIN code activated)
The duration of the firmware power-ON sequence depends on the need to perform a recovery sequence if power has been lost during a flash memory modification.
Listed below are the other factors that have a minor influence on the power-ON sequence:
The number of parameters stored in EEPROM by the AT commands received so far
The ageing of the hardware components, especially the flash memory
The temperature conditions
The recommended way to release the ON/~OFF signal is to use either an AT command or WIND indicators: the application has to detect the end of the power-up initialization and release the
ON/~OFF signal afterwards.
To release the ON/~OFF signal, either of the following methods may be used:
Using AT Command
An AT command is sent to the application. Once the initialization is complete, the AT interface will answer with «OK».
Note: If the application manages hardware flow control, the AT command can be sent during the initialization phase.
Using WIND Indicators
If configured to do so, an unsolicited “+WIND: 3” message is returned after initialization.
Note that the generation of this message is either enabled or disabled using AT command.
For more information on these commands, refer to document [8] Firmware 7.43 AT Commands
Manual (Sierra Wireless Software Suite 2.33).
Proceeding thus, by software detection, will always prevent the application from releasing the
ON/~OFF signal too early.
If WIND indicators are disabled or AT commands are unavailable or not used, it is still possible to release the ON/~OFF signal after a delay that is long enough ( T on/off-hold
) to ensure that the firmware has already completed its power-up initialization.
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The table below gives the minimum values of T on/off-hold
:
Table 52: T on/off-hold
Minimum Values
Signals and Indicators
Firmware T on/off-hold
Firmware 7.43 (Sierra Wireless Software
Suite 2.33)
Safe Evaluations of the Firmware Power-Up Time
8s
The value in the table above take the worst cases into account: power-loss recovery operations, slow flash memory operations in high temperature conditions, and so on. But they are safe because they are large enough to ensure that ON/~OFF is not released too early.
The typical power-up initialization time figures for best case conditions (no power-loss recovery, fast and new flash memory, etc.) is approximately 3.5 seconds in every firmware version. Note that releasing the ON/~OFF signal after this delay does not guarantee that the application will actually start-up (for example, the power plug has been pulled off during a flash memory operation, like a phone book entry update or an AT&W command).
The ON/~OFF signal can be left at a HIGH level until switched OFF. But this is not recommended as it will prevent the AT+CPOF command from performing a clean power-OFF.
When using a battery as power source, it is not recommended to let the ON/OFF signal high.
If the battery voltage is too low and the ON/~OFF signal is at LOW level, an internal mechanism switches the embedded module OFF. This automatic process prevents the battery from being over discharged and optimizes its life span.
During the power-ON sequence, an internal reset is automatically performed by the embedded module for 40 ms (typical). Any external reset should be avoided during this phase.
5.1.4. Power-OFF
Caution: All external signals must be inactive when the embedded module is OFF to avoid any damage when starting.
To properly power-OFF the embedded module, the application must reset the ON/OFF signal and then send the AT+CPOF command to unregister the module from the network and switch the embedded module OFF.
Once the response "OK" is returned by the embedded module, the external power supply can be switched OFF.
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Figure 51. Power-OFF Sequence
If the ON/~OFF pin is maintained at ON (High Level), then the embedded module cannot be switched
OFF.
Connecting a charger on the embedded module has exactly the same effect as connecting the
ON/~OFF signal. Specifically, the embedded module will not power-OFF after the AT+CPOF command, unless the charger is disconnected.
5.1.5. Application
The ON/~OFF input (pin 19) is used to switch ON (ON/~OFF=1) or OFF (ON/~OFF=0) the Q2687
Refreshed embedded module.
A high level signal has to be provided on the ON/~OFF pin to switch the embedded module ON.
The level of the voltage of this signal has to be maintained at 0.8 x VBATT for a minimum of 2000ms.
This signal can be left at HIGH level until switched OFF.
Figure 52. Example of ON/~OFF Pin Connection
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5.2. Reset Signal (~RESET)
This signal is used to force a reset procedure by providing the embedded module with a LOW level for at least 200µs. This signal must be considered as an emergency reset only. A reset procedure is already driven by the internal hardware during the power-up sequence.
This signal may also be used to provide a reset to an external device (at power-ON only). If no external reset is necessary, this input may be left open. If used (emergency reset), it must be driven either by an open collector or an open drain.
The embedded module remains in reset mode as long as the ~RESET signal is held LOW.
Note that an operating system reset is preferred to a hardware reset.
Caution: This signal should only be used for EMERGENCY resets.
5.2.1. Reset Sequence
To activate the "emergency" reset sequence, the ~RESET signal must be set to LOW for a minimum of 200 µ s. As soon as the reset is completed, the AT interface returns "OK" to the application.
Figure 53. Reset Sequence Waveform
At power-up, the ~RESET time (Rt) is carried out after switching the embedded module ON. It is generated by the internal voltage supervisor.
The ~RESET time is provided by the internal RC component. To keep the same time, it is not recommended to connect another R or C component <resistor or capacitor> on the ~RESET signal.
Only a switch or an open drain gate is recommended.
Ct is the cancellation time required for the embedded module initialization. Ct is automatically carried out after hardware reset.
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5.2.2. Pin Description
Refer to the following table for the pin description of the reset signal.
Table 53: Reset Signal Pin Description
Pin
Number
18
Signal I/O I/O Type Description
~RESET I/O
Open
Drain
1V8 Embedded Module Reset
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
5.2.3. Electrical Characteristics
Refer to the following table for the electrical characteristics of the reset signal.
Table 54: Electrical Characteristics of the Reset Signal
Parameter
Input Impedance (R)*
Input Impedance (C)
~RESET time (Rt) 1
~RESET time (Rt) 2 at power up only
Cancellation time (Ct)
V
H
**
V
IL
V
IH
Minimum
200
20
0.57
0
1.33
Typical
100
10n
40
34
Maximum
100
0.57
*
**
Internal pull-up
VH: Hysterisis Voltage
1 stabilized.
This reset time is the minimum to be carried out on the ~RESET signal when the power supply is already
2 This reset time is internally carried out by the embedded module power supply supervisor only when the embedded module power supplies are powered ON.
Unit
V
V
V k
F
µs ms ms
5.2.4. Application
The ~RESET input (pin 18) is used to force a reset procedure by providing a LOW level for at least
200µs.
This signal has to be considered as an emergency reset only: a reset procedure is automatically driven by an internal hardware during the power-ON sequence.
This signal can also be used to provide a reset to an external device (it then behaves as an output).
If no external reset is necessary this input can be left open.
If used (emergency reset), it has to be driven by an open collector or an open drain output (due to the internal pull-up resistor embedded into the embedded module) as shown in the diagram below.
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Figure 54. Example of ~Reset Pin Connection with Switch Configuration
Signals and Indicators
Figure 55. Example of ~Reset Pin Connection with Transistor Configuration
An open collector or open drain transistor can be used. If an open collector is chosen, T1 can be a
ROHM DTC144EE.
Table 55: Reset Settings
Reset Command
1
0
~Reset (Pin 18)
0
1
Operating Mode
Reset activated
Reset inactive
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5.3. BOOT Signal
A specific BOOT control pin is available to download to the Q2687 Refreshed embedded module (only if the standard XMODEM download, controlled with AT command, is not possible).
A specific PC software program, provided by Sierra Wireless, is needed to perform this specific download.
The BOOT pin must be connected to VCC_1V8 for this specific download.
Table 56: BOOT Settings
BOOT Operating Mode Comment
Leave open
Leave open
1
Normal use
Download XMODEM
Download specific
No download
AT command for Download AT+WDWL
Need Sierra Wireless PC software
*
Refer to document [8] Firmware 7.43
information about this AT command.
AT Commands Manual (Sierra Wireless Software Suite 2.33) for more
*
5.3.1. Pin Description
Refer to the following table for the pin description of the Boot signal.
Table 57: Boot Signal Pin Description
Pin
Number
16
Signal I/O I/O Type Description
BOOT I 1V8 Download mode selection
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
For more information about using AT commands to manipulate this signal, refer to document [8]
Firmware 7.43 AT Commands Manual (Sierra Wireless Software Suite 2.33).
Note that this BOOT pin must be left open for normal use or XMODEM download.
However, in order to render the development and maintenance phases easier, it is highly recommended to set a test point, either a jumper or a switch on the VCC_1V8 (pin 5) power supply.
Figure 56. Example of BOOT Pin Implementation
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5.4. BAT-RTC (Backup Battery)
The Q2687 Refreshed embedded module provides an input/output to connect a Real Time Clock power supply.
This pin is used as a back-up power supply for the internal Real Time Clock. The RTC is supported by the Q2687 Refreshed embedded module when VBATT is available, but a backup power supply is needed to save date and time when VBATT is switched off (VBATT = 0V).
Figure 57. Real Time Clock Power Supply
If RTC is not used, this pin can be left open. If VBATT is available, the back-up battery can be charged by the internal 2.5V power supply regulator.
The back-up power supply can be provided by any of the following:
A super capacitor
A non-rechargeable battery
A rechargeable battery
5.4.1. Pin Description
Refer to the following table for the pin description of the BAT-RTC interface.
Table 58: BAT-RTC Pin Description
Pin
Number
7
Signal
BAT-RTC
I/O
I/O
I/O Type
Supply
Description
RTC Back-up supply
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5.4.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the BAT-RTC interface.
Table 59: Electrical Characteristics of the BAT-RTC Interface
Parameter
Input voltage
Input current consumption*
Output voltage
Output current
Minimum
1.85
3.0
2.40
Typical
3.3
2.45
Maximum
3.0
3.6
2.50
2
Unit
V
µA
V mA
* Provided by an RTC back-up battery when the Q2687 Refreshed embedded module power supply is off
(VBATT = 0V).
5.4.3. Application
5.4.3.1. Super Capacitor
Figure 58. RTC Supplied by a Gold Capacitor
The estimated range with a 0.47Farad gold capacitor is 25 minutes (minimum).
Note: The gold capacitor maximum voltage is 2.5V.
5.4.3.2. Non-Rechargeable Battery
Figure 59. RTC Supplied by a Non-Rechargeable Battery
Diode D1 is mandatory to prevent the non-rechargeable battery from becoming damaged.
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The estimated range with an 85mAh battery is 800H (minimum).
5.4.3.3. Rechargeable Battery
Signals and Indicators
Figure 60. RTC Supplied by a Rechargeable Battery
The estimated range with a 2mAh rechargeable battery is approximately 15H.
Caution: Ensure that the cell voltage is lower than 2.75V before battery cell assembly to avoid damaging the
Q2687 Refreshed embedded module.
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5.5. Buzzer Output
This digital output is controlled by a pulse-width modulation controller and is an open drain output.
This signal may only be used in the implementation of a buzzer. The buzzer can be directly connected to this output signal and VBATT. The maximum current is 100mA (PEAK).
5.5.1. Pin Description
Refer to the following table for the pin description of the buzzer output.
Table 60: PWM/Buzzer Output Pin Description
Pin
Number
15
Signal I/O I/O Type Reset State Multiplexed With
BUZZER0 O Open drain Z Buzzer output
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
5.5.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the buzzer output.
Table 61: Electrical Characteristics of the Buzzer Output
Parameter
V
OL on
I
PEAK
Frequency
Condition
Iol = 100mA
VBATT = VBATTmax
Minimum
1
Maximum
0.4
100
50000
Unit
V mA
Hz
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5.5.3. Application
The maximum peak current for this interface is 100mA and the maximum average current is 40mA. A transient voltage suppressor (TVS) diode, D1, must be added to the circuit as shown in the figure below.
Figure 61. Example of a Buzzer Implementation
Take note of the following when implementing a buzzer:
R1 must be chosen in order to limit the current at I
PEAK
max
C1 = 0 to 100nF (depending on the buzzer type)
D1 = BAS16 (example)
The BUZZ-OUT output can also be used to drive an LED as shown in the following figure:
Figure 62. Example of an LED Driven by the Buzzer Output
The value of R1 should correspond with the characteristics of the LED (D1).
5.5.4. Recommended Characteristics
Type
Impedance
Sensitivity
Current
:electro-magnetic
:7Ω to 30Ω
:90dB SPL minimum @ 10cm
:60mA to 90mA
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Signals and Indicators
5.6. External Interrupt
The Q2687 Refreshed embedded module provides two external interrupt inputs with different voltages. These interrupt inputs can be activated on the:
High to low level transition
Low to high level transition
Low to high and high to low level transitions
When used, the interrupt inputs must not be left open; and when they are not used, they must be configured as GPIOs.
5.6.1. Pin Description
Refer to the following table for the pin description of the external input/interrupt.
Table 62: External Interrupt Pin Description
Pin
Number
49
50
Signal
INT1
INT0
I/O
I
I
I/O Type
2V8
1V8
Reset
State
Z
Z
Description
External Interrupt
External Interrupt
Multiplexed With
GPIO25
GPIO3
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
5.6.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the external input/interrupt.
Table 63: Electrical Characteristics of the External Input/Interrupt
Parameter
INT1
INT0
V
IL
V
IH
V
IL
V
IH
Minimum
1.96
1.33
Maximum
0.84
0.54
Unit
V
V
V
V
5.6.3. Application
INT0 and INT1 are high impedance input types so it is important to set the interrupt input signals with pull-up or pull-down resistors if they are driven by an open drain, an open collector or by a switch. If the interrupt signals are driven by a push-pull transistor, then no pull-up or pull-down resistors are necessary.
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Figure 63. Example of INT0 Driven by an Open Collector
Figure 64. Example of INT1 Driven by an Open Collector where:
The value of R1 can be 47kΩ
T1 can be a ROHM DTC144EE open collector transistor
Signals and Indicators
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Signals and Indicators
5.7. VCC_2V8 and VCC_1V8 Output
These digital power supply outputs are mainly used to:
Pull-up signals such as I/Os
Supply the digital transistors driving LEDs
Supply the SIMPRES signal
Act as a voltage reference for the ADC interface AUX-ADC (VCC_2V8 only)
Each digital output has a maximum current of 15mA.
Both VCC_2V8 and VCC_1V8 are only available when the embedded module is ON.
5.7.1. Pin Description
Refer to the following table for the pin description of the VCC_2V8 and VCC_1V8 output.
Table 64: VCC_2V8 and VCC_1V8 Pin Description
Pin
Number
5
10
Signal
VCC_1V8
VCC_2V8
I/O
O
O
I/O Type
Supply
Supply
Description
1.8V digital supply
2.8V digital supply
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
5.7.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the VCC_2V8 and VCC_1V8 output signals.
Table 65: Electrical Characteristics of the VCC_2V8 and VCC_1V8 Signals
Parameter
VCC_2V8
VCC_1V8
Output voltage
Output Current
Output voltage
Output Current
Minimum
2.74
1.76
Typical
2.8
1.8
Maximum
2.86
15
1.94
15
Unit
V mA
V mA
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Signals and Indicators
5.8. FLASH-LED (LED0)
The FLASH-LED is the GSM activity status indicator signal of the Q2687 Refreshed embedded module and it can be used to drive an LED. This signal is an open drain output. An LED and a resistor can be directly connected between this output and VBATT.
When the Q2687 Refreshed embedded module is OFF, if 2.8V < VBATT < 3.2V and a charger is connected on the CHG-IN inputs, this output flashes (100 ms = ON; 900ms = OFF) to indicate the pre-charging phase of the battery.
When the Q2687 Refreshed embedded module is ON, this output is used to indicate the network status.
Table 66: FLASH-LED Status
Q2687 State
OFF
ON
VBATT Status FLASH-LED Status Q2687 Refreshed Embedded
Module Status
VBATT< 2.8V or
VBATT > 3.2V
OFF
2.8V < VBATT < 3.2V Pre-charge flash
LED ON for 100 ms, OFF for 900 ms
VBATT > 3.2V Permanent
Slow flash
LED ON for 200 ms, OFF for 2 s
Quick flash
LED ON for 200 ms, OFF for 600 ms
Very quick flash
LED ON for 100ms, OFF for 200ms
OFF
OFF; Pre-charging mode
(charger must be connected on
CHG-IN to activate this mode)
ON; not registered on the network
ON; registered on the network
ON; registered on the network, communication in progress
ON; software downloaded is either corrupted or non-compatible ("BAD
SOFTWARE")
5.8.1. Pin Description
Refer to the following table for the pin description of the FLASH-LED.
Table 67: FLASH-LED Pin Description
Pin
Number
17
Signal
LED0
I/O I/O Type* Reset State Description
O Open Drain
Output
1 and Undefined LED driving
Electrical Information for Digital I/O
for open drain, 2V8 and 1V8 voltage characteristics and reset state definitions.
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Signals and Indicators
Figure 65. LED0 State During RESET and Initialization Time
LED0 state is HIGH during the RESET time and undefined during the software initialization time.
During software initialization time, for a maximum of 2 seconds after RESET cancellation, the LED0 signal is toggling and does not provide the embedded module status. After the 2s period, the LED0 provides the true status of the embedded module.
5.8.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the FLASH-LED signal.
Table 68: Electrical Characteristics of the FLASH-LED Signal
Parameter
V
OL
I
OUT
Condition Minimum Typical Maximum
0.4
8
Unit
V mA
5.8.3. Application
Figure 66. Example of FLASH-LED Implementation
R1 can be harmonized depending on the characteristics of the LED (D1).
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Signals and Indicators
5.9. Analog to Digital Converter
Two Analog to Digital Converter inputs, BAT-TEMP/ADC1 and AUX-ADC/ADC2, are provided by the
Q2687 Refreshed embedded module. These converters are 10-bit resolution ADCs ranging from 0V to 2V.
Typically, the BAT-TEMP/ADC1 input is used to monitor external temperature. This is very useful for monitoring the application temperature and can be used as an indicator to safely power OFF the application in case of overheating (for Li-Ion batteries). For more information on battery charging, refer
to section 4.14 Battery Charging Interface.
The AUX-ADC/ADC2 input can be used for customer specific applications.
5.9.1. Pin Description
Refer to the following table for the pin description of the ADC.
Table 69: ADC Pin Description
Pin
Number
20
21
Signal I/O I/O Type Description
ADC1/BAT-TEMP*
ADC2
I
I
Analog
Analog
A/D converter
A/D converter
*
5.9.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the ADC.
Table 70: Electrical Characteristics of the ADC
Parameter
Maximum output code
Sampling rate
Input signal range
INL (Integral non linearity)
DNL (Differential non linearity)
Input impedance ADC1/BAT-TEMP
ADC2
*
1
Minimum
0
Typical
1635
15
2.5
1M*
1M
Internal pull-up to 2.8V
Sampling rate only for ADC2 and the Sierra Wireless Software Suite application
Maximum
2
138¹
Unit
LSBs sps
V mV mV
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Signals and Indicators
5.10. Digital to Analog Converter
One Digital to Analog Converter output is provided by the Q2687 Refreshed embedded module. The converter is an 8-bit resolution DAC, ranging from 0V to 2.3V.
5.10.1. Pin Description
Refer to the following table for the pin description of the DAC.
Table 71: DAC Pin Description
Pin
Number
82
Note:
Signal I/O I/O Type Description
DAC0 O Analog D/A converter
This output assumes a typical external load of 2k and 50pF in parallel to GND.
5.10.2. Electrical Characteristics
Refer to the following table for the electrical characteristics of the DAC.
Table 72: Electrical Characteristics of the DAC
Parameter
Resolution
Output signal range
Output voltage after reset
INL (Integral non linearity)
DNL (Differential non linearity)
Minimum
0
-5
-1
Typical
8
1.147
Maximum
2.3
+5
+1
Unit bits
V
V
LSB
LSB
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6. Power Consumption
The power consumption values of the Q2687 Refreshed embedded module vary depending on the operating mode, RF band and software used (with or without the Sierra Wireless Software Suite). The following power consumption values were obtained by performing measurements on Q2687
Refreshed embedded module samples at a temperature of 25°C with the assumption of a 50 RF output.
Three VBATT values were used to measure the power consumption of the Q2687 Refreshed
Embedded Module:
VBATT = 3.2V
VBATT = 3.6V
VBATT = 4.8V
The average current and the maximum current peaks were also measured for all three VBATT values.
For a more detailed description of the operating modes, refer to the appendix of document [8]
AT Commands Manual (Sierra Wireless Software Suite 2.33).
For more information on the consumption measurement procedure, refer to section 7 Consumption
6.1. Power Consumption without the Sierra
Wireless Software Suite
The following measurement results are relevant when:
there is no Sierra Wireless Software Suite application
the Sierra Wireless Software Suite application is disabled
no processing is required by a Sierra Wireless Software Suite application
Note: Power consumption performance is software related. The values listed below were based on
Firmware 7.43.
TX means that the current peak is the RF transmission burst (Tx burst)
.
RX means that the current peak is the RF reception burst (Rx burst).
Table 73: Power Consumption Without the Sierra Wireless Software Suite; Typical Values
Operating
Mode
ALARM Mode
SLEEP Mode
ACTIVE Mode
SLEEP mode with telecom stack in Idle
Mode *
ACTIVE mode with telecom stack in Idle
Mode
Parameter
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
I
Av erage
I
Peak
Unit
VBATT=3.2V VBATT=3.6V VBATT=4.8V
10.6
0.38
48.3
1.94
11.1
0.39
44.0
1.85
12.8
0.40
35.8
1.65
N/A µA
59.6 mA
66.4 mA
208 mA
5.81
23.5
24.5
5.43
21.9
23.4
4.74
19.0
20.1
218
147
149 mA mA mA
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Power Consumption
Operating
Mode
Peak current in
GSM/GPRS
Mode
GSM Connected
Mode (Voice)
GPRS Transfer
Mode class 10
(3Rx/2Tx)
EGPRS Transfer
Mode class 10
(3Rx/2Tx)
Parameter
850/900 MHz -
PCL5/gam.3 (TX power 33dBm)
1800/1900 MHz -
PCL0/gam.3 (TX power 30dBm)
850/900 MHz -
PCL5 (TX power
33dBm)
850/900 MHz -
PCL19 (TX power
5dBm)
1800/1900 MHz -
PCL0 (TX power
30dBm)
1800/1900 MHz -
PCL15 (TX power
0dBm)
850/900 MHz - gam.3 (TX power
30dBm)
850/900 MHz - gam.6 (TX power
24dBm)
1800/1900 MHz - gam.5 (TX power
23dBm)
I
Av erage
1704
1130
263
102
198
98
453
367
312
1591
1101
246
97
191
94
423
363
307
1548
1085
233
89
181
85
406
359
299
I
Peak
1704
1130
1681
307
1120
271
1704
1420
1091
Unit mA mA mA mA mA mA mA mA mA
* Sleep Idle Mode consumption is dependent on the SIM card used. Some SIM cards respond faster than others; the longer the response time, the higher the consumption.
6.2. Power Consumption with the Sierra Wireless
Software Suite
The following consumption results were measured during the Dhrystone application run.
Note: Power consumption performance is software related. The values listed in the tables below were based on Firmware 7.43.
TX means that the current peak is the RF transmission burst (Tx burst)
.
RX means that the current peak is the RF reception burst (Rx burst).
Table 74: Power Consumption With the Application CPU @ 26MHz, Typical Values
Operating
Mode
ALARM Mode
SLEEP Mode
ACTIVE Mode
SLEEP mode with telecom
Parameter
Paging 9/Rx burst occurrence ~2s
I
Av erage
I
Peak
Unit
VBATT=3.2V VBATT=3.6V VBATT=4.8V
N/A
N/A
45.4
N/A
41.5 33.9
N/A µA
N/A mA
89.7 mA
N/A mA
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Operating
Mode stack in Idle
Mode *
ACTIVE mode with telecom stack in Idle
Mode
Peak current in
GSM/GPRS
Mode
GSM Connected
Mode (Voice)
GPRS Transfer
Mode class 10
(3Rx/2Tx)
EGPRS Transfer
Mode class 10
(3Rx/2Tx)
Parameter
Paging 2/Rx burst occurrence ~0,5s
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
850/900 MHz -
PCL5/gam.3 (TX power 33dBm)
1800/1900 MHz -
PCL0/gam.3 (TX power 30dBm)
850/900 MHz -
PCL5 (TX power
33dBm)
850/900 MHz -
PCL19 (TX power
5dBm)
1800/1900 MHz -
PCL0 (TX power
30dBm)
1800/1900 MHz -
PCL15 (TX power
0dBm)
850/900 MHz - gam.3 (TX power
30dBm)
850/900 MHz - gam.6 (TX power
24dBm)
1800/1900 MHz - gam.5 (TX power
23dBm)
I
Av erage
N/A
44.3
45.1
1727
1138
266
100
196
96
457
321
270
40.5
41.3
1608
1108
246
95
189
91
426
320
269
33.1
33.9
1559
1095
232
87
180
83
408
328
270
Power Consumption
I
Peak
Unit
N/A mA
144
146 mA mA
1727 mA
1138 mA
1719 mA
301
1128 mA
273 mA mA
1727 mA
1398 mA
1081 mA
Table 75: Power Consumption With the Application CPU @ 104MHz, Typical Values
Operating
Mode
ALARM Mode
SLEEP Mode
ACTIVE Mode
SLEEP mode with telecom stack in Idle
Mode *
ACTIVE mode with telecom stack in Idle
Mode
Parameter
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
I
Av erage
I
Peak
Unit
VBATT=3.2V VBATT=3.6V VBATT=4.8V
N/A
N/A
82.6
N/A
74.5 58.8
N/A µA
N/A mA
101.8 mA
N/A mA
N/A
81.4
82.1
73.4
74.1
57.7
58.5
N/A
176
176 mA mA mA
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Operating
Mode
Peak current in
GSM/GPRS
Mode
GSM Connected
Mode (Voice)
GPRS Transfer
Mode class 10
(3Rx/2Tx)
EGPRS Transfer
Mode class 10
(3Rx/2Tx)
Parameter
850/900 MHz -
PCL5/gam.3 (TX power 33dBm)
1800/1900 MHz -
PCL0/gam.3 (TX power 30dBm)
850/900 MHz -
PCL5 (TX power
33dBm)
850/900 MHz -
PCL19 (TX power
5dBm)
1800/1900 MHz -
PCL0 (TX power
30dBm)
1800/1900 MHz -
PCL15 (TX power
0dBm)
850/900 MHz - gam.3 (TX power
30dBm)
850/900 MHz - gam.6 (TX power
24dBm)
1800/1900 MHz - gam.5 (TX power
23dBm)
I
Av erage
1764
1178
301
135
232
131
491
352
303
459
351
298
127
221
122
1650
1141
279
432
354
293
111
204
107
1590
1121
257
Power Consumption
I
Peak
Unit
1764 mA
1178 mA
1763 mA
344 mA
1178 mA
310 mA
1764 mA
1423 mA
1109 mA
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7. Consumption Measurement
Procedure
This chapter describes the consumption measurement procedure used to obtain the Q2687
Refreshed Embedded Module consumption specification.
7.1. Hardware Configuration
Consumption results are highly dependent on the hardware configuration used during measurement and this section describes the hardware configuration settings that must be used to obtain optimum consumption measurements.
The following hardware configuration includes both the measurement equipment used and the Q2687
Refreshed embedded module on the Q Series Development Kit board v3.
7.1.1. Equipments Used
Four devices were used to perform consumption measurement:
Network Analyzer
Current Measuring Power Supply
Standalone Power Supply
Computer, to control the embedded module and to save measurement data
Figure 67. Typical Hardware Configuration
The network analyzer is a CMU 200 from Rhode & Schwartz . This analyzer offers all
GSM/GPRS/EGPRS network configurations required and allows a wide range of network configurations to be set.
The AX502 standalone power supply is used to supply all development kit board components except the embedded module. The goal is to separate the development kit board consumption from the
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Consumption Measurement Procedure embedded module consumption which is measured by the other power supply, the 66321B “current measuring power supply”.
The “current measuring power supply” is also connected and controlled by the computer (GPIB control not shown in the previous figure).
A SIM must be inserted in the Q Series Development Kit during all consumption measurements.
The following table lists the recommended equipments to use for the consumption measurement.
Table 76: Recommended Equipments
Device Manufacturer
Network analyzer Rhode & Schwartz
Current measuring power supply
Agilent
Standalone power supply Metrix
Reference
CMU 200
66321B
AX502
Notes
Quad Band
GSM/DCS/GPRS/EGPRS
Used for VBATT
Used for VBAT
7.1.2. Q Series Development Kit Board v3
The Q Series Development Kit Board v3 is used as a basis for the Q2687 Refreshed embedded module measurements using several settings. For more information about these settings, refer to
document [15] AirPrime Q Series Development Kit User Guide.
The Q Series Development Kit board is powered by the standalone power supply VBAT; while the
Q2687 Refreshed embedded module is powered by the current measuring power supply, VBATT.
Because of this, the link between VBATT and VBAT (J103) must be opened (by removing the solder at the top of the board in the SUPPLY area).
VBATT is powered by the current measuring power supply 66321B
VBAT is powered by the standalone power supply AX502
Also take note of the following additional configuration/settings:
The R100 resistor (around the BAT-TEMP connector) must be removed.
The UART2 link is not used; therefore, J501, J502, J503 and J504 must be opened (by removing the solder).
UART2 R502 must be removed; R507 must be soldered with a 0Ω resistor.
The USB link is not used; therefore, J801, J802 and J803 must be opened (by removing the solder).
UART1 R408 must be removed; R406 must be soldered with a 0Ω resistor.
The standalone power supply, VBAT, may be set to 4V.
The goal of the settings listed above is to eliminate all bias current from VBATT and to supply the entire board (except the embedded module) using only VBAT.
Note: When measuring the current consumption in alarm mode, it is necessary to remove D100, D103 and
R103 from the Q Series Development Kit in order to have accurate results.
7.1.3. SIM Cards
Consumption measurement may be performed with either 3-Volt or 1.8-Volt SIM cards. However, all specified consumption values are for a 3-Volt SIM card.
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Note:
Consumption Measurement Procedure
The SIM card’s voltage is supplied by the embedded module ’s power supply. Consumption measurement results may vary depending on the SIM card used.
7.2. Software Configuration
The software configuration for the equipment(s) used and the Q2687 Refreshed embedded module settings are presented in the following sub-sections.
7.2.1. Embedded Module Configuration
The software configuration for the embedded module is done by selecting the operating mode to use in performing the measurement.
A description of the operating modes and the procedures used to change the operating mode are
given in the appendix of document [8] Firmware 7.43 AT Commands Manual (Sierra Wireless
The available operating modes in the Q2687 Refreshed embedded module are as follows:
Alarm Mode
Active Idle Mode
Sleep Idle Mode
Active Mode
Sleep Mode
Connected Mode
Transfer Mode class 8 (4Rx/1Tx)
Transfer Mode class 10 (3Rx/2Tx)
7.2.2. Equipment Configuration
The network analyzer is set according to the embedded module’s operating mode.
Paging during Idle modes, TX burst power, RF band and GSM/DCS/GPRS/EGPRS may be selected on the network analyzer.
Refer to the following table for the network analyzer configuration according to operating mode.
Table 77: Operating Mode Configuration
Operating Mode
ALARM Mode
SLEEP Mode
ACTIVE Mode
SLEEP mode with telecom stack in Idle Mode
ACTIVE mode with telecom stack in Idle Mode
Peak current in GSM/GPRS Mode
GSM Connected Mode (Voice)
Network Analyzer Configuration
N/A
N/A
N/A
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
Paging 9/Rx burst occurrence ~2s
Paging 2/Rx burst occurrence ~0,5s
850/900 MHz - PCL5/gam.3 (TX power 33dBm)
1800/1900 MHz - PCL0/gam.3 (TX power 30dBm)
850/900 MHz - PCL5 (TX power 33dBm)
850/900 MHz - PCL19 (TX power 5dBm)
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Consumption Measurement Procedure
Operating Mode
GPRS Transfer Mode class 10 (3Rx/2Tx)
EGPRS Transfer Mode class 10 (3Rx/2Tx)
Network Analyzer Configuration
1800/1900 MHz - PCL0 (TX power 30dBm)
1800/1900 MHz - PCL15 (TX power 0dBm)
850/900 MHz - gam.3 (TX power 30dBm)
850/900 MHz - gam.6 (TX power 24dBm)
1800/1900 MHz - gam.5 (TX power 23dBm)
The standalone power supply, VBAT, may be set from 3.2V to 4.8V.
The current measuring power supply, VBATT, may be set from 3.2V to 4.8V according to the Q2687
Refreshed embedded module VBATT specifications.
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8. Reliability Compliance and
Recommended Standards
8.1. Reliability Compliance
The Q2687 Refreshed embedded module connected on a development kit board application is compliant with the following requirements.
Table 78: Standards Conformity for the Q2687 Refreshed Embedded Module
Abbreviation
IEC
ISO
Definition
International Electro technical Commission
International Organization for Standardization
8.2. Applicable Standards Listing
The table hereafter gives the basic list of standards applicable to the Q2687 Refreshed Embedded
Module.
Note: References to any features can be found from these standards.
Table 79: Applicable Standards and Requirements
Document
IEC6006826
Current
Version
7.0
Title
IEC60068234 73
IEC60068264 2.0
IEC60068232 2.0
IEC60068231 2.0
IEC60068229 2.0
IEC60068227 4.0
IEC60068214 6.0
IEC6006822
IEC6006821
5.0
6.0
IEC60068230 3.0
IEC6006823 69 w/A1
Environmental testing - Part 2.6: Test FC: Sinusoidal Vibration.
Basic environmental testing procedures part 2: Test FD: random vibration wide band - general requirements
Cancelled and replaced by IEC60068-2-64 . For reference only.
Environmental testing - part 2-64: Test FH: vibration, broadband random and guidance.
Basic environmental testing procedures - part 2: Test ED: (procedure 1)
(withdrawn & replaced by IEC60068-2-31).
Environmental testing part 2-31: Test EC: rough handling shocks, primarily for equipment-type specimens.
Basic environmental testing procedures - part 2: Test EB and guidance: bump
Withdrawn and replaced by IEC60068-2-27 . For reference only.
Environmental testing - part 2-27: Test EA and guidance: shock.
Environmental testing - part 2-14: Test N: change of temperature.
Environmental testing - part 2-2: Test B: dry heat.
Environmental testing - part 2-1: Test A: cold.
Environmental testing - part 2-30: Test DB: damp heat, cyclic (12 h + 12 h cycle).
Basic environmental testing procedures part 2: Test CA: damp heat, steady
State
Withdrawn and replaced by IEC60068-2-78 . For reference only.
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Document
Current
Version
IEC60068278 1.0
IEC60068238 2.0
Title
IEC60068240 1.0 w/A1
ISO167501
ISO167502
ISO167503
2ND
2ND
2ND
ISO167504 2ND
IEC60529 2.1 w/COR2
IEC60068217 4.0
IEC60068218 2.0
IEC60068270 1.0
IEC60068268 1.0
IEC60068211 3.0
IEC60068260 2.0
IEC60068252 2.0 w/COR
Reliability Compliance and
Recommended Standards
Environmental testing part 2-78: Test CAB: damp heat, steady state.
Environmental testing - part 2-38: Test Z/AD: composite temperature/humidity cyclic test.
Basic environmental testing procedures - part 2: Test Z/AM combined cold/low air pressure tests.
Road vehicles - environmental conditions and testing for electrical and electronic equipment - part 1: general.
Road vehicles - environmental conditions and testing for electrical and electronic equipment - part 2: electrical loads.
Road vehicles - environmental conditions and testing for electrical and electronic equipment - part 3: mechanical loads.
Road vehicles - environmental conditions and testing for electrical and electronic equipment - part 4: climatic loads.
Degrees of protection provided by enclosures (IP code).
Basic environmental testing procedures - part 2: Test Q: sealing.
Environmental testing - part 2-18: Tests - R and guidance: water.
Environmental testing - part 2: tests - test XB: abrasion of markings and letterings caused by rubbing of fingers and hands.
Environmental testing - part 2: tests - test l: dust and sand.
Basic environmental testing procedures, part 2: test KA: salt mist.
Environmental testing - part 2: Test KE: flowing mixed gas corrosion test.
Environmental testing - part 2: Test KB: salt mist, cyclic (sodium chloride solution).
8.3. Environmental Specifications
The Q2687 Refreshed embedded module is compliant with the operating classes listed in the table below. The ideal temperature range of the environment for each operating class is also specified.
Table 80: Operating Class Temperature Range
Conditions
Operating / Class A
Operating / Class B
Storage
Temperature Range
-30 °C to +70°C
-40 °C to +85°C
-40 °C to +80°C
8.3.1. Function Status Classification
The classes reported below comply with the Annex “ISO Failure Mode Severity Classification”, ISO
Standard 7637, and Section 1.
Note: The word “function” as used here concerns only the function performed by the Q2687 Refreshed embedded module.
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Table 81: ISO Failure Mode Severity Classification
Class
CLASS A
CLASS B
Reliability Compliance and
Recommended Standards
Definition
The Q2687 Refreshed Embedded Module remains fully functional during and after environmental exposure; and shall meet the minimum requirements of 3GPP or appropriate wireless standards.
The Q2687 Refreshed Embedded Module remains fully functional during and after environmental exposure; and shall exhibit the ability to establish a voice, SMS or DATA call at all times even when one or more environmental constraint exceeds the specified tolerance. Unless otherwise stated, full performance should return to normal after the excessive constraint(s) have been removed.
8.4. Reliability Prediction Model
8.4.1. Life Stress Tests
The following tests the Q2687 Refreshed embedded module’s product performance.
Table 82: Life Stress Tests
Designation
Performance Test
PT3T° & PT
Durability Test
DT
Condition
Standard: N/A
Special conditions:
Temperature:
Class A: -30°C to +70°C
Class B: -40°C to +85°C
Rate of temperature change: ± 3°C/min
Recovery time: 3 hours
Operating conditions: Powered
Duration: 14 days
Standard: IEC 60068-2-2, Test Bb
Special conditions:
Temperature: +80°C
Rate of temperature change: ± 3°C/min
Recovery time: 3 hours
Operating conditions: Powered and Un-powered
Duration: 156 days
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8.4.2. Environmental Resistance Stress Tests
The following tests the Q2687 Refreshed embedded module’s resistance to extreme temperature.
Table 83: Environmental Resistance Stress Tests
Designation
Cold Test
COT
Resistance to Heat Test
RH
Dry Heat Test
DHT
Condition
Standard: IEC 680068-2-1, Test Ab
Special conditions:
Temperature: -40°C
Rate of temperature change: dT/dt >= ± 3°C/min
Recovery time: 3 hours
Operating conditions: Un-powered
Duration: 72 hours
Standard: IEC 680068-2-2, Test Bb
Special conditions:
Temperature: +80°C
Rate of temperature change: dT/dt >= ± 3°C/min
Recovery time: 3 hours
Operating conditions: The DUT is switched ON for 1 minute and then OFF for
1 minute
Duration: 60 days
Standard: IEC 680068-2-2, Test Bb
Special conditions:
Temperature: +80°C
Rate of temperature change: dT/dt >= ± 3°C/min
Recovery time: 3 hours
Operating conditions: Un-powered
Duration: 60 days
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8.4.3. Corrosive Resistance Stress Tests
The following tests the Q2687 Refreshed embedded module’s resistance to corrosive atmosphere.
Table 84: Corrosive Resistance Stress Tests
Designation
Humidity Test
HT
Condition
Standard: IEC 60068-2-3
Special conditions:
Temperature: +65°C
RH: 95%
Rate of temperature change: dT/dt >= ± 3°C/min
Recovery time: 3 hours
Operating conditions: The DUT is switched ON for 5 minutes and then OFF for
15 minutes
Moist Heat Cyclic Test
MHCT
Duration: 10 days
Standard: IEC 60068-2-30, Test Db
Special conditions:
Upper temperature: +55 ± 2°C
Lower temperature: +25°C ± 2°C
RH:
Upper temperature: 93%
Lower temperature: 95%
Number of cycles: 21 (1 cycle/24 hours)
Rate of temperature change: dT/dt >= ± 3°C/min
Recovery time: 3 hours
Operating conditions: Un-powered
Duration: 21 days
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8.4.4. Thermal Resistance Cycle Stress Tests
The following tests the Q2687 Refreshed embedded module’s resistance to extreme temperature cycling.
Table 85: Thermal Resistance Cycle Stress Tests
Designation
Thermal Shock Test
TSKT
Temperature Change
TCH
Condition
Standard: IEC 60068-2-14
Special conditions:
Upper temperature: +85°C
Lower temperature: -40°C
Rate of temperature change: 30s
Number of cycles: 200
Duration of exposure: 30 minutes
Recovery time: 3 hours
Operating conditions: Un-powered
Duration: 72 hours
Standard: IEC 60068-2-14, Test Nb
Special conditions:
Upper temperature: +85°C
Lower temperature: -40°C
Rate of temperature change: dT/dt >= ± 3°C/min
Number of cycles: 400
Duration of exposure: 30 minutes
Recovery time: 3 hours
Operating conditions: Un-powered
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8.4.5. Mechanical Resistance Stress Tests
The following tests the Q2687 Refreshed embedded module’s resistance to vibrations and mechanical shocks.
Table 86: Mechanical Resistance Stress Tests
Designation
Sinusoidal Vibration Test
SVT1
Random Vibration Test
RVT
Mechanical Shock Test
Condition
Standard: IEC 60068-2-6, Test Fc
Special conditions:
Frequency range: 10Hz to 1000Hz
Displacement: ±5 mm (peak)
Frequency range: 16Hz to 62Hz
Acceleration: 5G
Frequency range: 62Hz to 200Hz
Acceleration: 3G
Frequency range: 200Hz to 1000Hz
Acceleration: 1G
Sweep rate: 1 oct/min.
Test duration: 20 cycles
Sweep directions: X, Y and Z
Operating conditions: Un-powered
Duration: 72 hours
Standard: IEC 60068-2-64
Special conditions:
Density spectrum: 0.96m
2 /s3
Frequency range:
0.1 g2/Hz at 10Hz
0.01 g2/Hz at 250Hz
0.0005 g2/Hz at 1000Hz
0.0005 g2/Hz at 2000Hz
Slope: -3dB/octave
Acceleration: 0.9gRMS
Number of axis: 3
Operating conditions: Un-powered
Duration: 16 hours
Standard: IEC 60068-2-27, Test Ea
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Designation
MST
Reliability Compliance and
Recommended Standards
Condition
Special conditions:
Shock Test 1:
Wave form: Half sine
Peak acceleration: 30G
Duration: 11ms
Number of shocks: 8 per direction
Number of directions: 6 (±X, ±Y, ±Z)
Shock Test 2:
Wave form: Half sine
Peak acceleration: 200G
Duration: 3ms
Number of shocks: 3 per direction
Number of directions: 6 (±X, ±Y, ±Z)
Shock Test 3:
Wave form: Half sine
Peak acceleration: 100G
Duration: 6ms
Number of shocks: 3 per direction
Number of directions: 6 (±X, ±Y, ±Z)
Operating conditions: Un-powered
Duration: 72 hours
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8.4.6. Handling Resistance Stress Tests
The following tests the Q2687 Refreshed embedded module’s resistance to handling malfunctions and damage.
Table 87: Handling Resistance Stress Tests
Designation
ESD Test
Free Fall Test
FFT
Condition
Standard: IEC 1000-4-2
Special conditions:
Contact discharges: 10 positive and 10 negative applied
Voltage: ±2kV, ±4kV, ±6kV
Operating conditions: Powered
Duration: 24 hours
Standard : IEC 60068-2-32, Test Ed
Special conditions:
Drop: 2 samples for each direction
Equivalent drop height: 1m
Number of directions: 6 (±X, ±Y, ±Z)
Number of drops/face: 2
Operating conditions: Un-powered
Duration: 24 hours
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9. Design Guidelines
This section provides general design guidelines for the Q2687 Refreshed embedded module.
General Rules and Constraints
Clock and other high frequency digital signals (e.g. serial buses) should be routed as far as possible from the Q2687 Refreshed embedded module analog signals.
If the application design makes it possible, all analog signals should be separated from digital signals by a ground line on the PCB.
Tip: It is recommended to avoid routing any signals under the embedded module on the application board.
9.1. Power Supply
The power supply is one of the key issues in the design of a GSM terminal.
A weak power supply design could, in particular, affect:
EMC performance
The emission spectrum
The phase error and frequency error
When designing the power supply, careful attention should be paid to the following:
The quality of the power supply – low ripple, PFM or PSM systems should be avoided; linear regulation or PWM converters are preferred for low noise.
The capacity to deliver high current peaks in a short time (pulsed radio emission).
The VBATT line must support peak currents with an acceptable voltage drop which guarantees a minimal VBATT value of 3.2V (lower limit of VBATT).
For PCB design constraints related to power supply tracks, ground planes and shielding, refer to
section 9.2 Routing Constraints.
9.2. Antenna
Another key issue in the design of a GSM terminal is the mechanical and electrical antenna adaptation. Sierra Wireless strongly recommends working with an antenna manufacturer either to develop an antenna adapted to the application or to adapt an existing solution to the application.
For more information on routing constraints for the RF circuit, refer to section 9.2.5 RF Circuit.
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9.1. Layout/Pads Design
Design Guidelines
Figure 68. Layout Requirement
It is strongly recommended to use through-hole pads for the 4 legs of the Q2687 Refreshed embedded module. If the holes are connected internally to the ground plane, use thermal brakes.
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Design Guidelines
Figure 69. Precidip Connector Pad Design (Sierra Wireless Side)
9.2. Routing Constraints
9.2.1. System Connector
Refer to section 11.1 General Purpose Connector for references to the 100-pin GPC. More
information is also available at http://www.naisweb.com/e/connecte/con_eng/ .
9.2.2. Power Supply
Since the maximum peak current can reach 2A, Sierra Wireless strongly recommends having a large width for the layout of the power supply signal (to avoid voltage loss between the external power supply and the Q2687 Refreshed embedded module supply).
Pins 1, 2, 3 and 4 of the embedded module should be gathered in the same piece of copper, as shown in the figure below.
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Design Guidelines
Figure 70. Power Supply Routing Example
Filtering capacitors near the Q2687 Refreshed embedded module power supply are also recommended (22µF to 100µF).
Attention should be paid to the ground track or the ground plane on the application board for the power supply which supplies the embedded module. The ground track or the ground plane on the application board must support current peaks as well as with the VBATT track.
If the ground track between the embedded module and the power supply is a ground plane, it must not be parceled out.
The routing must be done in such a way that the total line impedance could be 10m @ 217Hz.
This impedance must include the bias impedances.
The same care should be taken when routing the ground supply.
If these design rules are not followed, phase error (peak) and power loss could occur.
In order to test the supply tracks, a burst simulation circuit is given below. This circuit simulates burst emissions, equivalent to bursts generated when transmitting at full power.
Figure 71. Burst Simulation Circuit
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9.2.2.1. Ground Plane and Shielding Connection
Design Guidelines
The Q2687 Refreshed embedded module shielding case is linked to the ground. The ground has to be connected to the Q Series Development Kit board through a complete layer on the PCB.
A ground plane must be available on the application board to provide efficient connection to the
Q2687 Refreshed embedded module shielding. The bottom side shielding of the Q2687 Refreshed embedded module is achieved through the top folded tin cover connected to the internal ground plane of the Q2687 Refreshed embedded module. This is connected through the shielding to the application ground plane.
The best shielding performance is achieved when the application ground plane is a complete layer of the application PCB. To ensure good shielding of the Q2687 Refreshed embedded module, a complete ground plane layer on the application board must be available, with no trade-offs.
Connections between other ground planes should be done with bias.
Without this ground plane, external spurious TX or RX blockings could appear.
9.2.3. SIM Interface
The length of the tracks between the Q2687 Refreshed embedded module and the SIM socket should be as short as possible. Maximum recommended length is 10cm.
ESD protection is mandatory on the SIM lines if access from outside of the SIM socket is possible.
The capacitor on SIM_VCC signal (100nF) must be placed as close as possible to the DALC208SC6
component on the PCB (refer to section 4.9 SIM Interface).
9.2.4. Audio Circuit
To get better acoustic performances, the basic recommendations are as follows:
The speaker lines (SPKxx) must be routed in parallel without any wires in between
The microphone lines (MICxx) must be routed in parallel without any wires in between
All the filtering components (RLC) must be placed as close as possible to the associated MICxx and
SPKxx pins.
9.2.5. RF Circuit
If RF signals need to be routed on the application board, the RF signals must be routed using tracks with a 50 characteristic impedance.
Basically, the characteristic impedance depends on the dielectric, the track width and the ground plane spacing.
In order to respect this constraint, Sierra Wireless recommends using MicroStrip or StripLine structure and computing the Tracks width with a simulation tool (like AppCad shown in the Figure below and that is available free of charge at http://www.agilent.com
).
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Design Guidelines
Figure 72. AppCad Screenshot for MicroStrip Design
If a multi-layered PCB is used, the RF path on the board must not cross any signal (digital, analog or supply).
If necessary, use StripLine structure and route the digital line(s) “outside” the RF structure as shown in the figure below.
Figure 73. Routing Examples
Stripline and Coplanar design requires having a correct ground plane at both sides. Consequently, it is necessary to add some bias along the RF path.
It is recommended to use Stripline design if the RF path is fairly long (more than 3cm), since
MicroStrip design is not shielded. Consequently, the RF signal (when transmitting) may interfere with neighboring electronics (AF amplifier, etc.). In the same way, the neighboring electronics (microcontrollers, etc.) may degrade the reception performances.
The GSM/GPRS connector is intended to be directly connected to a 50Ω antenna and no matching is needed.
If the GSM/GPRS/EGPRS RF connections need to be implemented on the application board (for mechanical purposes, for instance), there are four main possible connections:
via UFL/SMA connector
via Coaxial cable
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via Precidip connector
Design Guidelines
9.2.5.1. UFL/SMA Connector
The antenna can be connected to the Q2687 Refreshed embedded module through the UFL connector present on the embedded module by inserting the plug in the receptacle. This step is done prior to the Q2687 Refreshed embedded module mounting.
Figure 74. UFL/SMA Connector
9.2.5.2. Coaxial Cable
The antenna can also be connected to the Q2687 Refreshed embedded module through a coaxial cable. The coaxial cable is connected to both the “RF pad” (Round pad) and the “Ground pad”. It is recommended to use an RG178 coaxial cable with the following characteristics:
Static curvature radius :10mm
Dynamic curvature radius :20mm
The cable must be soldered as follows:
The shielding of the antenna cable must be soldered on the “Ground pad”.
The antenna cable core must be soldered only once positioned in line with the “RF pad” and
“Ground pad”.
Tip: It is highly recommended to use a template to adjust the antenna cable to the “RF pad” and “Ground pad” before soldering.
When soldering the antenna cable, the temperature of the iron must not exceed 350°C for 3 seconds.
Note: The coaxial cable can be soldered in any direction. It can also be soldered on the “opposite direction”.
In this case, it is necessary to solder it in a curve.
This step is done after the Q2687 Refreshed embedded module mounting.
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Figure 75. Antenna Connection to both RF pad and Ground pad
9.2.5.3. Precidip Connector
Lastly, the Q2687 Refreshed embedded module can also be connected through the Precidip connecter. For more information on the contact pad available on the Q2687 Refreshed embedded
module, refer to section 9.1 Layout/Pads Design.
For more information on the mounting, assembling and handling of this component, contact your
Precidip supplier directly (Preci-dip SA at http://www.precidip.com
). Sierra Wireless cannot support customers regarding the use of this connector.
Figure 76. Precidip Connector
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9.3. EMC and ESD Recommendations
EMC tests have to be performed on the application as soon as possible to detect any potential problems.
When designing, special attention should be paid to:
Possible spurious emissions radiated by the application to the RF receiver in the receiver band
ESD protection is mandatory on all signals which are externally accessible
Typically, ESD protection is mandatory for the: o SIM (if accessible from outside) o Serial link
Length of the SIM interface lines (preferably <10cm)
EMC protection on audio input/output (filters against 900MHz emissions)
Biasing of the microphone inputs
Ground plane: Sierra Wireless recommends a common ground plane for analog/digital/RF grounds
A metallic case or plastic casing with conductive paint are recommended, except area around the antenna
Note: The Q2687 Refreshed embedded module does not include any protection against over voltage.
9.4. Mechanical Integration
Attention should be paid to:
Antenna cable integration (bending, length, position, etc)
Leads of the Embedded Module to be soldered to the Ground plane
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Design Guidelines
9.5. Operating System Upgrade
The Q2687 Refreshed Embedded Module Operating System is stored in flash memory and can be easily upgraded.
Important: In order to follow regular changes in the GPRS standard and to offer a state-of-the-art operating system, Sierra Wireless recommends that the application designed around an Embedded Module
(or Embedded Module – based product) should allow easy operating system upgrades on the
Embedded Module via the standard XMODEM protocol. Therefore, the application shall either allow a direct access to the Embedded Module serial link through an external connector or implement any mechanism allowing the Embedded Module operating system to be downloaded via XMODEM.
The operating system file can be downloaded to the embedded module using the XMODEM protocol.
The AT+WDWL command allows the downloading process to be launched. For more details, refer to
document [8] Firmware 7.43 AT Commands Manual (Sierra Wireless Software Suite 2.33).
The serial signals required to proceed with XMODEM downloading are:
RXD
TXD
RTS
CTS
GND
The Operating System file can also be downloaded to the embedded module using the DOTA
(download over the air) feature. This feature is available with the Sierra Wireless Software Suite
interface. For more details, refer to the list of documents in section 13.2 Reference Documents.
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10. Embedded Testability
10.1. Serial Link Access
Direct access to UART1 serial link is very useful for:
Testability operations
Firmware download (for more information on firmware upgrade, refer to section 3.3 Firmware
To allow that access, the following serial link access design is recommended:
Figure 77. Main Serial Link (UART1) Debug Access
When it is necessary to download firmware into the Q2687 Refreshed embedded module without going through the RS232 interface, access to the embedded module is forced via the debug connector. In such cases, input signals coming from this connector masks the input signals coming from the ADM3307 device.
VCC_2V8 and GND are available on the debug connector to allow the powering of an external RS232 transceiver in order to communicate with a PC via a COM (COM1 or COM2) port, for example.
It is also possible to trace the signals on the serial link through the debug connector.
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Embedded Testability
Note: R4 is used to have the possibility to disable the R1OUT, R2OUT and R3OUT of the ADM3307 by the enable signal (~EN) when the debug connector is used. For debug connector use, TP6 must be connected to VCC_2V8. For normal use, TP6 must be left open.
An economical solution consists of making the debug connection using 7 test points (TP) and placing these points on the edge of the application board.
Caution: If communications on UART1 above the baud rate of 720kbps is needed, an external power supply source (3.0V typical) should be used.
10.2. RF Output Accessibility
During the integration phase of the Q2687 Refreshed embedded module, it can be helpful to connect the Q2687 Refreshed embedded module to a GSM/GPRS simulator in order to check critical RF TX parameters and power behaviour.
Although the Q2687 Refreshed embedded module has been certified, some parameters may have degraded due to some basic precautions not having been followed (poor power supply, for example).
This will not affect the functionality of the product, but the product will not comply with GSM specifications.
The following TX parameters can be checked using a GSM/GSM simulator:
Phase & Frequency Error
Output Power and GSM Burst Time
Output Spectrum (Modulation and Switching)
Listed below are available typical GSM/GPRS simulators:
CMU200 from Rhode & Schwarz
8960 from Agilent
Because of the high prices associated with GSM/GPRS simulators and the necessary GSM knowhow to perform simulations, customers can check their applications in the Sierra Wireless laboratories. Contact the Sierra Wireless support team for more information.
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11. Connector and Peripheral Device
References
This section contains a list of recommended manufacturers or suppliers for the peripheral devices to be used with the Q2687 Refreshed embedded module.
11.1. General Purpose Connector
The GPC is a 100-pin connector with 0.5mm pitch from the from PANASONIC Group's P5K series, with the following reference:
AXK600347BN1
The mating connector has the following reference:
AXK500147BN1J
The stacking height is 3.0 mm.
Sierra Wireless recommends that the AXK500147BN1J connector is used for applications to benefit from Sierra Wireless prices. For more information, contact Sierra Wireless and specify the Sierra
Wireless connector reference: WM18868 .
For further details see the GPC data sheets in the appendix. More information is also available from http://www.panasonic.com/host/industrl.html
.
11.2. SIM Card Reader
ITT CANNON CCM03 series (see http://www.ittcannon.com
)
AMPHENOL C707 series (see http://www.amphenol.com
)
JAE (see http://www.jae.com
)
Drawer type:
MOLEX (see http://www.molex.com
)
Connector: MOLEX 99228-0002
Holder: MOLEX 91236-0002
11.3. Microphone
The microphone selected must comply with GSM recommendations in terms of frequency response.
Possible suppliers:
HOSIDEN (see http://www.hosiden.co.jp/ )
PANASONIC (see http://www.panasonic/com/industrial/components/ )
PEIKER
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References
11.4. Speaker
The speaker selected must comply with GSM recommendations in terms of frequency response.
Possible suppliers:
SANYO (see http://www.sanyo.com/industrial/components/ )
HOSIDEN (see http://www.hosiden.co.jp/ )
PRIMO (see http://www.primo.com.sg/ )
PHILIPS (see http://www.semiconductors.philips.com/ )
11.5. Antenna Cable
A wide variety of cables fitted with UFL connectors is offered by HIROSE (refer to the UFL datasheet
in document [14] AirPrime Q2687 Product Technical Specification for more information):
UFL pigtails, Ex: Ref = U.FL-2LP(V)-04-A-(100)
UFL Ref = U.FL-R-SMT
UFL cable assemblies,
Between series cable assemblies.
More information is also available from http://www.hirose-connectors.com/ .
A coaxial cable can also be soldered on the RF pad. The following references have been certified for mounting on the Q2687 Refreshed embedded module:
RG178
RG316
11.6. RF board-to-board connector
The supplier for the Precidip connector is Preci-dip SA (see http://www.precidip.com
), with the following reference:
9PM-SS-0003-02-248//R1
11.7. GSM antenna
GSM antennas and support for antenna adaptation can be obtained from manufacturers such as:
ALLGON (see http://www.allgon.com
)
IRSCHMANN (see http://www.hirschmann.com/ )
MOTECO (see http://www.moteco.com
)
GALTRONICS (see http://www.galtronics.com
)
The following table lists the contact details for other GSM antenna providers.
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Table 88: Contact Information of GSM Antenna Providers
Provider
Mat Equipment
ProComm
Reference Address
MA112VX00
MU 901/1801/UMTS-MMS
+
2M FME
Z.I. La Boitardière
Chemin du Roy
37400 Amboise
FRANCE
Europarc
121, Chemin des Bassins
F-94035 CRETEIL CEDEX
Connector and Peripheral Device
References
Contact
Laurent.LeClainche@mat equipement.com
Tel: +33 2 47 30 69 70
Fax: +33 2 47 57 35 06
Tel: +33 1 49 80 32 00
Fax: +33 1 49 80 12 54 [email protected]
11.8. Buzzer
One possible Buzzer supplier is:
SAMBU (see http://www.sambuco.co.kr
)
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12. Certification Compliance and
Recommended Standards
12.1. Certification Compliance
The Q2687 Refreshed Embedded Module connected on a development kit board application is compliant with the following requirements.
Table 89: Standards Conformity for the Q2687 Refreshed Embedded Module
Domain
Safety standard
Health standard (EMF Exposure Evaluation)
Efficient use of the radio frequency spectrum
EMC
FCC
IC
Applicable Standard
EN 60950-1 (ed.2006)
EN 62311 (ed. 2008)
EN 301 511 (V 9.0.2)
EN 301 489-1 (v1.8.1)
EN 301 489-7 (v1.3.1)
FCC Part 15
FCC Part 22, 24
RSS-132 Issue 2
RSS-133 Issue 5
12.2. Applicable Standards Listing
The table hereafter gives the basic list of standards applicable for the Q2687 Refreshed Embedded
Module (2G (R99/Rel. 4)).
Note: References to any features can be found from these standards.
Table 90: Applicable Standards and Requirements for the Q2687 Refreshed Embedded Module
Document
GCF
NAPRD.03
TS 51.010-1
TS 51.010-2
TS 51.010-4
EN 301 511
Current
Version
3.37.0
5.2
9.0.1
9.0.1
4.14.1
9.0.2
Title
GSM Certification Forum - Certification Criteria
Overview of PCS Type certification review board (PTCRB) Mobile Equipment
Type Certification and IMEI control
3rd Generation Partnership Project; Technical Specification Group GSM/EDGE
Radio Access Network; Digital cellular telecommunications system (Phase 2+);
Mobile Station (MS) conformance specification; Part 1: Conformance specification
3rd Generation Partnership Project; Technical Specification Group GSM/EDGE
Radio Access Network; Mobile Station (MS) conformance specification; Part 2:
Protocol Implementation Conformance Statement (PICS) proforma specification
3rd Generation Partnership Project; Technical Specification Group GSM/EDGE
Radio Access Network; Digital cellular telecommunications system (Phase 2+);
Mobile Station (MS) conformance specification; Part 4: SIM Application Toolkit
Conformance specification
Global System for Mobile Communications (GSM); Harmonised standard for mobile stations in the GSM 900 and DCS 1800 bands covering essential requirements under article 3.2 of the R&TTE directive (1999/5/EC)
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 144
Product Technical Specification and
Customer Design Guideline
Certification Compliance and
Recommended Standards
Document
ETSI 102.230
Current
Version
Title
3.9.0
3.2.1
Smart cards; UICC-Terminal interface; Physical, electrical and logical test specification(Release 99)
Global System for Mobile Communications (GSM); Harmonised standard for mobile stations in the GSM 900 and DCS 1800 bands covering essential requirements under article 3.2 of the R&TTE directive (1999/5/EC) EN 301 908-2
Federal Communications Commission (FCC) rules and Regulations: Power listed on the Grant is conducted for Part 22 and conducted for Part 24.
This device is to be used only for mobile and fixed applications. The antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter.
Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance.
Antennas used for this OEM module must not exceed a gain of 8.4dBi (850 MHz) and 3.5dBi (1900
MHz) for mobile and fixed operating configurations. This device is approved as a module to be installed in other devices.
Installed in other portable devices, the exposure condition requires a separate equipment authorization.
The licensed module has an FCC ID label on the module itself. The FCC ID label must be visible through a window or it must be visible when an access panel, door or cover is easily removed.
If not, a second label must be placed on the outside of the device that contains the following text:
Contains FCC ID: N7NQ2687
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
1. this device may not cause harmful interference,
2. this device must accept any interference received, including interference that may cause undesired operation.
IMPORTANT:
Manufacturers of mobile or fixed devices incorporating the Q2687 Refreshed Embedded Module are advised to:
clarify any regulatory questions,
have their completed product tested,
have product approved for FCC compliance, and
include instructions according to the above mentioned RF exposure statements in the end product user manual.
Please note that changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 145
13. References
13.1.1. Web Site Support
Check the Sierra Wireless website at http://sierrawireless.com
for the latest documentation available.
Content Web Site
General information about the Q Series
Intelligent Embedded Module
Specific support about the Q2687 Refreshed
Embedded Module http://www.sierrawireless.com/productsandservices/AirPri me/Embedded_Modules/Q_Series.aspx http://www.sierrawireless.com/productsandservices/AirPri me/Embedded_Modules/Q_Series/Q2687.aspx
Carrier/Operator approvals
Sierra Wireless Software Suite Introduction http://www.sierrawireless.com/Support/Downloads/AirPri me/Q_Series/AirPrime_Q2687.aspx http://www.sierrawireless.com/en/productsandservices/Air
Prime/Sierra_Wireless_Software_Suite.aspx
Developer support for software and hardware http://forum.sierrawireless.com/
13.2. Reference Documents
For more details, several reference documents can be consulted. The Sierra Wireless documents referenced herein are provided in the Sierra Wireless documentation package; however, the general reference documents which are not Sierra Wireless owned are not provided in the documentation package.
13.2.1. Sierra Wireless Software Documentation
[1] Getting started with SDK 2.33
Reference: WM_DEV_OAT_UGD_048
[2] Tutorial for IDE 1.08
(if using IDE; obsolete if using Developer Studio)
Reference: WM_DEV_OAT_UGD_044
[3] Tools Manual for IDE (if using IDE; obsolete if using Developer Studio)
Reference: WM_DEV_OAT_UGD_045
[4] Basic Development Guide for SDK 2.33 (if using IDE; obsolete if using Developer Studio)
Reference: WM_DEV_OAT_UGD_050
[5] ADL User Guide for SDK 2.33 (if using IDE; obsolete if using Developer Studio)
Reference: WM_DEV_OAT_UGD_051
[6] SDK 2.33
Official Release Note
Reference: WM_DEV_OAT_DVD_338
[7] Getting Started with the Sierra Wireless Software Suite 2.32
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 146
Product Technical Specification and
Customer Design Guideline
WM_DEV_OAT_UGD_078
13.2.2. Firmware Documentation
[8] Firmware 7.43 AT Commands Manual (Sierra Wireless Software Suite 2.33)
Reference: WM_DEV_OAT_UGD_079 (Version 14)
[9] AT Commands Interface Guide (Bluetooth)
Reference: WM_ASW_BLU_UGD_001
[10] Firmware 7.43 Customer Release Note
Reference: TBC
13.2.3. Hardware Documentation
[11] AirPrime Q2687 Classic Product Technical Specification
Reference: WM_DEV_Q2687_PTS_001
[12] AirPrime Q26xx Process Customer Guidelines
Reference: WM_PRJ_Q2686_PTS_004
[13] AirPrime Q2687 Customer Design Guidelines
Reference: WA_DEV_Q2687_PTS_007
[14] AirPrime Q2687 Product Technical Specification
Reference: WA_ENG_Q2687_PTS_001
[15] AirPrime Q Series Development Kit User Guide
Reference: WM_BBD_Q26_UGD_001
[16] AirPrime Q2687 Refreshed Migration Guide
Reference: WA_DEV_Q26RD_UGD_001
[17] AirPrime Q2686 Product Technical Specification
Reference: WM_PRJ_Q2686_PTS_001
[18] AirPrime Q2686 Customer Design Guideline
WM_PRJ_Q2686_PTS_003
13.2.4. Other Sierra Wireless Documentation
[19] Automotive Environmental Control Plan for AirPrime Q2687 Refreshed Intelligent
Embedded Module
Reference: WM_QUA_Q2687_DCP_001
[20] Bluetooth Interface Application Note
Reference: WM_ASW_OAT_APN_016
References
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 147
Product Technical Specification and
Customer Design Guideline
13.2.5. Other Related Documentation
[21] “I 2 C Bus Specification”, Version 2.0, Philips Semiconductor 1998
[22] ISO 7816-3 Standard
References
13.2.6. Application Notes
For other application notes, the following reference designs are available upon request to Sierra
Wireless support.
Title Description
Power Supply with automotive constraints
CAN Interface (high speed)
CAN Interface (low speed)
Bluetooth Connection
DC-DC converter based on
STMicroElectronics L5973AD
VIN = 5.5...32V
VOUT = 3.8V
Especially designed to meet Sierra Wireless Intelligent Embedded Module requirements.
CAN Interface over SPI based on:
- MicroChip MCP2515 CAN Controller,
- Philips PCA82C250T CAN Transceiver.
CAN Interface (over SPI) based on:
- MicroChip MCP2515 CAN Controller,
- Philips TJA1054A CAN Transceiver.
Provides BlueTooth Connectivity (over UART2) based on:
Murata LBMA29BAE2 HCI BlueTooth module.
Dual USB Interface
Power Supply on USB
Provides 2 separate serial ports on a USB interface, based on:
FTDI FTDI2232C Dual USB UART with FIFO
VIN = 5.0V (from USB supply)
VOUT = 3.8V
Especially designed to meet Sierra Wireless Intelligent Embedded Module and power supply requirements.
Full GSM-GPRS modem on USB Based on the two previous designs
13.3. List of Abbreviations
Abbreviation
AC
ADC
A/D
AF
AT
AUX
CAN
CB
CEP
CLK
Definition
Alternative Current
Analog to Digital Converter
Analog to Digital conversion
Audio-Frequency
ATtention (prefix for modem commands)
AUXiliary
Controller Area Network
Cell Broadcast
Circular Error Probable
CLocK
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Product Technical Specification and
Customer Design Guideline
Abbreviation
EN
ESD
FIFO
FR
FTA
GND
GPI
GPC
GPIO
GPO
GPRS
GPS
GSM
HR
I/O
LED
LNA
MAX
MIC
MIN
MMS
MO
MT na
CMOS
CS
CTS
DAC dB
DC
DCD
DCE
DCS
DR
DSR
DTE
DTR
EDGE
EFR
E-GSM
EGPRS
EMC
EMI
EMS
Definition
Complementary Metal Oxide Semiconductor
Coding Scheme
Clear To Send
Digital to Analogue Converter
Decibel
Direct Current
Data Carrier Detect
Data Communication Equipment
Digital Cellular System
Dynamic Range
Data Set Ready
Data Terminal Equipment
Data Terminal Ready
Enhance Data rates for GSM Evolution
Enhanced Full Rate
Extended GSM
Enhance GPRS
ElectroMagnetic Compatibility
ElectroMagnetic Interference
Enhanced Message Service
ENable
ElectroStatic Discharges
First In First Out
Full Rate
Full Type Approval
GrouND
General Purpose Input
General Purpose Connector
General Purpose Input Output
General Purpose Output
General Packet Radio Service
Global Positioning System
Global System for Mobile communications
Half Rate
Input / Output
Light Emitting Diode
Low Noise Amplifier
MAXimum
MICrophone
MINimum
Multimedia Message Service
Mobile Originated
Mobile Terminated
Not Applicable
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010
References
149
Product Technical Specification and
Customer Design Guideline
Abbreviation
RTCM
RTS
RX
SCL
SDA
SIM
SMS
SPI
SPL
SPK
SRAM
TBC
TDMA
TP
TVS
TX
TYP
UART
USB
USSD
VSWR
NF
NMEA
NOM
NTC
PA
Pa
PBCCH
PC
PCB
PDA
PFM
PSM
PWM
RAM
RF
RFI
RHCP
RI
RST
RTC
Definition
Noise Factor
National Marine Electronics Association
NOMinal
Negative Temperature Coefficient
Power Amplifier
Pascal (for speaker sound pressure measurements)
Packet Broadcast Control CHannel
Personal Computer
Printed Circuit Board
Personal Digital Assistant
Power Frequency Modulation
Phase Shift Modulation
Pulse Width Modulation
Random Access Memory
Radio Frequency
Radio Frequency Interference
Right Hand Circular Polarization
Ring Indicator
ReSeT
Real Time Clock
Radio Technical Commission for Maritime services
Request To Send
Receive
Serial CLock
Serial DAta
Subscriber Identification Module
Short Message Service
Serial Peripheral Interface
Sound Pressure Level
SPeaKer
Static RAM
To Be Confirmed
Time Division Multiple Access
Test Point
Transient Voltage Suppressor
Transmit
TYPical
Universal Asynchronous Receiver-Transmitter
Universal Serial Bus
Unstructured Supplementary Services Data
Voltage Standing Wave Ratio
WA_DEV_Q26RD_PTS_001 Rev 002
References
April 20, 2010 150
14. Safety Recommendations (For
Information Only)
For the efficient and safe operation of your GSM application based on the Q2687 Refreshed
Embedded Module, please read this information carefully.
14.1. RF Safety
14.1.1. General
Your GSM terminal is based on the GSM standard for cellular technology. The GSM standard is spread all over the world. It covers Europe, Asia and some parts of America and Africa. This is the most used telecommunication standard.
Your GSM terminal is actually a low power radio transmitter and receiver. It sends out as well as receives radio frequency energy. When you use your GSM application, the cellular system which handles your calls controls both the radio frequency and the power level of your cellular modem.
14.1.2. Exposure to RF Energy
There has been some public concern about possible health effects of using GSM terminals. Although research on health effects from RF energy has focused on the current RF technology for many years, scientists have begun research regarding newer radio technologies, such as GSM. After existing research had been reviewed, and after compliance to all applicable safety standards had been tested, it has been concluded that the product was fitted for use.
If you are concerned about exposure to RF energy, there are things you can do to minimize exposure.
Obviously, limiting the duration of your calls will reduce your exposure to RF energy. In addition, you can reduce RF exposure by operating your cellular terminal efficiently by following the guidelines below.
14.1.3. Efficient Terminal Operation
For your GSM terminal to operate at the lowest power level, consistent with satisfactory call quality:
If your terminal has an extendable antenna, extend it fully. Some models allow you to place a call with the antenna retracted. However your GSM terminal operates more efficiently with the antenna when it is fully extended.
Do not hold the antenna when the terminal is "IN USE". Holding the antenna affects call quality and may cause the modem to operate at a higher power level than needed.
14.1.4. Antenna Care and Replacement
Do not use the GSM terminal with a damaged antenna. If a damaged antenna comes into contact with the skin, a minor burn may result. Replace a damaged antenna immediately. You may repair antenna to yourself by following the instructions provided to you. If so, use only a manufacturer-approved antenna. Otherwise, have your antenna repaired by a qualified technician.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 151
Product Technical Specification and
Customer Design Guideline
Safety Recommendations (For
Information Only)
Buy or replace the antenna only from the approved suppliers list. Using unauthorized antennas, modifications or attachments could damage the terminal and may contravene local RF emission regulations or invalidate type approval.
14.2. General Safety
14.2.1. Driving
Check the laws and the regulations regarding the use of cellular devices in the area where you have to drive as you always have to comply with them. When using your GSM terminal while driving, please:
give full attention to driving,
pull off the road and park before making or answering a call if driving conditions so require.
14.2.2. Electronic Devices
Most electronic equipment, for example in hospitals and motor vehicles is shielded from RF energy.
However, RF energy may affect some improperly shielded electronic equipment.
14.2.3. Vehicle Electronic Equipment
Check with your vehicle manufacturer representative to determine if any on-board electronic equipment is adequately shielded from RF energy.
14.2.4. Medical Electronic Equipment
Consult the manufacturer of any personal medical devices (such as pacemakers, hearing aids, etc...) to determine if they are adequately shielded from external RF energy.
Turn your terminal OFF in health care facilities when any regulations posted in the area instruct you to do so. Hospitals or health care facilities may be using RF monitoring equipment.
14.2.5. Aircraft
Turn your terminal OFF before boarding any aircraft.
Use it on the ground only with crew permission.
Do not use it in the air.
To prevent possible interference with aircraft systems, Federal Aviation Administration (FAA) regulations require you should have prior permission from a crew member to use your terminal while the aircraft is on the ground. To prevent interference with cellular systems, local RF regulations prohibit using your modem while airborne.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 152
Product Technical Specification and
Customer Design Guideline
14.2.6. Children
Safety Recommendations (For
Information Only)
Do not allow children to play with your GSM terminal. It is not a toy. Children could hurt themselves or others (by poking themselves or others in the eye with the antenna, for example). Children could damage the modem, or make calls that increase your modem bills.
14.2.7. Blasting Areas
To avoid interfering with blasting operations, turn your unit OFF when you are in a "blasting area" or in areas posted: "turn off two-way radio". Construction crew often uses remote control RF devices to set off explosives.
14.2.8. Potentially Explosive Atmospheres
Turn your terminal OFF when in any area with a potentially explosive atmosphere. Though it is rare, but your modem or its accessories could generate sparks. Sparks in such areas could cause an explosion or fire resulting in bodily injuries or even death.
Areas with a potentially explosive atmosphere are often, but not always, clearly marked. They include fuelling areas such as petrol stations; below decks on boats; fuel or chemical transfer or storage facilities; and areas where the air contains chemicals or particles, such as grain, dust, or metal powders.
Do not transport or store flammable gas, liquid, or explosives, in the compartment of your vehicle which contains your terminal or accessories.
Before using your terminal in a vehicle powered by liquefied petroleum gas (such as propane or butane) ensure that the vehicle complies with the relevant fire and safety regulations of the country in which the vehicle is used.
WA_DEV_Q26RD_PTS_001 Rev 002 April 20, 2010 153
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