NXP UCODE 8/8m Data Sheet
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SL3S1205_15
UCODE 8/8m
Rev. 3.6 — 2 December 2021 Product data sheet
COMPANY PUBLIC
1 General description
The UCODE 8 and UCODE 8m ICs are the latest NXP products of the UCODE family.
UCODE 8/8m offers high performance and features for use in the most demanding RFID tagging applications.
Particularly well suited for inventory management applications, like e.g Retail and
Fashion, with its great RF performance for any given form factor, UCODE 8/8m enables long read distance and fast inventory of dense RFID tag population. With its broadband design, it offers the possibility to manufacture true global RFID label with great performance over worldwide regulations.
The device also provides a Self Adjust Feature, a Product Status Flag for Electronic
Article Surveillance (EAS) application, pre-serialized 96-bit EPC, Brand Identifier and the
EPC Gen2v2 compliant Untraceable command.
NXP Semiconductors SL3S1205_15
UCODE 8/8m
2 Features and benefits
2.1 Key features
• Read sensitivity -23 dBm
• Write sensitivity -18 dBm
• Innovative functionality
– Self Adjust
– Memory Safeguard
– Brand Identifier
– Untraceable
– Pre-serialization for 96-bit EPC
– Integrated Product Status Flag (PSF)
• Compatible with single-slit antenna
• Up to 128-bit EPC
• 96-bit Unique Tag Identifier (TID) factory locked, including 48-bit unique serial number
• EPC Gen2v2
2.1.1 Memory
• 128-bit/96-bit (UCODE 8/UCODE 8m) of EPC memory
• Supports pre-serialization for 96-bit EPC
• 96-bit Tag IDentifier (TID) factory locked
• 48-bit unique serial number factory-encoded into TID
• 0-bit/32-bit (UCODE 8/UCODE 8m) User Memory
• 32-bit kill password to permanently disable the tag
• 32-bit access password
• Wide operating temperature range: -40 °C up to +85 °C
• Minimum 100k write cycle endurance
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UCODE 8/8m
2.2 Supported features
• All mandatory commands of EPC global specification V.2.0.1 are implemented including:
– Lock or permalock
– Kill Command
• The following optional commands are implemented in conformance with the EPC specification:
– Access
– BlockWrite (2 words, 32-bit)
– Untraceable
• Product Status Flag bit: enables the UHF RFID tag to be used as EAS (Electronic
Article Surveillance) tag without the need for a back-end database.
• Self Adjust for automated tag performance optimization
• Memory Safeguard: enables countermeasures, like parity and margin checks as well as automated error correction, to ensure integrity of customer data.
• Brand Identifier: enables product authentication verification
All supported features of UCODE 8/8m can be activated using standard EPCglobal
READ / WRITE / ACCESS / SELECT commands. No custom commands are needed to take advantage of all the features.
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UCODE 8/8m
3 Applications
3.1 Target market
• Retail
– Brick and mortar
– e-commerce
– omnichannel
• Supply chain management
• Shipping services
• Airline luggage tracking
• Laundry services
3.2 Applications
• High accurate and fast inventory management, enabling omnichannel retail processes
• Tracking along the supply chain from source to store
• High-speed store checkout process, bringing convenience to the customer
• Loss prevention
• Brand Protection
• After sales operations: Return and Warranty management
Outside the applications mentioned above, please contact NXP Semiconductors for support.
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UCODE 8/8m
4 Ordering information
Table 1. Ordering information
Type number Package
SL3S1205FUD/HA
Name
Wafer
SL3S1215FUD/HA
SL3S1205FUD2/HA
SL3S1215FUD2/HA
Wafer
Wafer
Wafer
SL3S1205FUD2/HAP Wafer
SL3S1215FUD2/HAP Wafer
IC type
UCODE 8
Description
Die on sawn 8" 120 μm wafer 10 μm Polyimide spacer with Large Pads, Stealth Dicing
UCODE 8m Die on sawn 8" 120 μm wafer 10 μm Polyimide spacer with Large Pads, Stealth Dicing
UCODE 8 Die on sawn 12" 120 μm wafer 10 μm Polyimide spacer with Large Pads, Conventional Dicing
UCODE 8m Die on sawn 12" 120 μm wafer 10 μm Polyimide spacer with Large Pads, Conventional Dicing
UCODE 8 Die on sawn 12" 120 μm wafer 10 μm Polyimide spacer with Large Pads, Plasma Dicing
UCODE 8m Die on sawn 12" 120 μm wafer 10 μm Polyimide spacer with Large Pads, Plasma Dicing
Version not applicable not applicable not applicable not applicable not applicable not applicable
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UCODE 8/8m
5 Block diagram
The UCODE 8/8m IC consists of three major blocks:
• Analog Interface
• Digital Control
• EEPROM
The analog part provides stable supply voltage and demodulates data received from the reader which is then processed by the digital part. Further, the modulation transistor of the analog part transmits data back to the reader.
The digital section includes the state machines, processes the protocol and handles communication with the EEPROM, which contains the EPC and the user data.
antenna
ANALOG
RF INTERFACE
VREG
RF1
DEMOD
RECT
RF2
MOD
DIGITAL CONTROL
VDD data in
ANTICOLLISION
READWRITE
CONTROL
ACCESS CONTROL data out
EEPROM INTERFACE
CONTROL
Memory Safeguard
CONTROL
R/W
EEPROM
MEMORY
Adjust
RF INTERFACE
CONTROL
SEQUENCER
CHARGE PUMP aaa-027138
Figure 1. Block diagram of UCODE 8/8m IC
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6 Pinning information
RF2
SL312x5 trademark
RF1
SL3S1205_15
UCODE 8/8m
TP1
Figure 2. Pinning bare die, Large Pads
6.1 Pin description
Table 2. Pin description bare die
Symbol Description
TP1 test pad 1
RF1 antenna connector 1
TP2
RF2 test pad 2 antenna connector 2
TP2 aaa-027143
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7 Wafer layout
SL3S1205_15
UCODE 8/8m
(12)
(1)
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Product data sheet
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RF2 RF1
(5)
(9)
(8)
(7)
(3)
TP1 TP2
(2)
(6)
Y
(11) (10)
X
(13)
(4) not to scale!
aaa-027144
1. Die to Die distance (metal sealring - metal sealring) 19 μm, (X-scribe line width: 15 μm)
2. Die to Die distance (metal sealring - metal sealring) 19 μm, (Y-scribe line width: 15 μm)
3. Chip step, Y-length: 490 μm
4. Chip step, X-length: 480 μm
5. Bump to bump distance X (RF1 - RF2): 115 μm
6. Distance bump to metal sealring Y: 21.5 μm
7. Bump size (TP1, TP2) Y: 100 μm
8. Bump to bump distance Y (RF1 - TP2, RF2 - TP1): 50 μm
9. Bump size (RF1, RF2) Y: 278 μm
10. Distance bump to metal sealring X: 21.5 μm
11. Bump size (TP1, TP2) X: 134.2 μm
12. Bump size (RF1, RF2) X: 151.5 μm
13. Distance bump to metal sealring X: 441.5 μm
Remark: TP1 and TP2 are electrically disconnected after dicing
Figure 3. UCODE 8/8m, 8" wafer layout, Large Pads, stealth dicing
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UCODE 8/8m
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(12)
(1)
RF2 RF1
(5)
(9)
(8)
(7)
(3)
TP1 TP2
(2)
(6)
Y
(11) (10)
X
(13)
(4) not to scale!
aaa-027144
1. Die to Die distance (metal sealring - metal sealring) 39 μm, (X-scribe line width: 35 μm)
2. Die to Die distance (metal sealring - metal sealring) 39 μm, (Y-scribe line width: 35 μm)
3. Chip step, Y-length: 510 μm
4. Chip step, X-length: 500 μm
5. Bump to bump distance X (RF1 - RF2): 115 μm
6. Distance bump to metal sealring Y: 21.5 μm
7. Bump size (TP1, TP2) Y: 100 μm
8. Bump to bump distance Y (RF1 - TP2, RF2 - TP1): 50 μm
9. Bump size (RF1, RF2) Y: 278 μm
10. Distance bump to metal sealring X: 21.5 μm
11. Bump size (TP1, TP2) X: 134.2 μm
12. Bump size (RF1, RF2) X: 151.5 μm
13. Distance bump to metal sealring X: 441.5 μm
Remark: TP1 and TP2 are electrically disconnected after dicing
Figure 4. UCODE 8/8m, 12" wafer layout, Large Pads, conventional dicing
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UCODE 8/8m
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(12)
(1)
RF2 RF1
(5)
(9)
(8)
(7)
(3)
TP1 TP2
(2)
(6)
Y
(11) (10)
X
(13)
(4) not to scale!
1. X-scribe line width not expanded: 6.6 μm (Expanded, typically 15 μm)
2. Y-scribe line width not expanded: 6.6 μm (Expanded, typically 15 μm)
3. Chip step, Y-length: 477.6 μm
4. Chip step, X-length: 467.6 μm
5. Bump to bump distance X (RF1 - RF2): 115 μm
6. Distance bump to metal sealring Y: 17.5 μm
7. Bump size (TP1, TP2) Y: 100 μm
8. Bump to bump distance Y (RF1 - TP2, RF2 - TP1): 50 μm
9. Bump size (RF1, RF2) Y: 278 μm
10. Distance bump to metal sealring X: 17.5 μm
11. Bump size (TP1, TP2) X: 134.2 μm
12. Bump size (RF1, RF2) X: 151.5 μm
13. Distance bump to metal sealring X: 435.5 μm
Remark: TP1 and TP2 are electrically disconnected after dicing
Figure 5. UCODE 8/8m, 12" wafer layout, Large Pads, plasma dicing aaa-027144
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UCODE 8/8m
8 Mechanical specification
The UCODE 8 wafers are available in 120 μm thickness. For Large Gold Pads the 120
μm thick wafer is enhanced with 10 μm Polyimide spacer resulting in less coupling between the antenna and the active circuit, leaving a larger process window for assembly.
8.1 Wafer specification
8.1.1 8 inch Wafer with Large Pads, stealth dicing
See
Table 3. 8 inch specification with Large Pads, stealth dicing
Wafer
Designation each wafer is scribed with batch number and wafer number
Diameter 200 mm (8") unsawn- 205 mm typical sawn on foil
Thickness
Number of pads
Pad location
Process
Batch size
Net printed dies per wafer
Wafer backside
Material
Treatment
Roughness
120 μm ± 15 μm
4 non-diagonal / placed in chip corners
CMOS 0.14 μm
25 wafers
120794
Si ground and stress release
R a
max. 0.5 μm, R t
max. 5 μm
Chip dimensions
Die size excluding scribe
Scribe line width:
0.465 mm × 0.475 mm = 0.22 mm x-dimension = 15 μm y-dimension = 15 μm
2
Passivation on front
Type
Material
Thickness
Polyimide spacer
Au pads
Pad material
Pad hardness
Sandwich structure
PE-Nitride (on top)
1.75 μm total thickness of passivation
10 μm ± 2 μm
> 99.9 % pure Au
35 – 80 HV 0.005
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UCODE 8/8m
Table 3. 8 inch specification with Large Pads, stealth dicing
...continued
Pad shear strength > 70 MPa
Pad height
Pad height uniformity
3 μm
– within a die
– within a wafer max. 2 μm max. 4 μm
Pad flatness
Pad size
– RF1, RF2 (max. details see wafer layout)
– TP1, TP2 (max. details see wafer layout)
Pad size variation max. 3 μm
151.5 μm × 278 μm
134.2 μm × 100 μm
± 5 μm
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8.1.2 12 inch Wafer with Large Pads
See
Table 4. 12 inch specification with Large Pads, conventional dicing
Wafer
Designation each wafer is scribed with batch number and wafer number
Diameter
Thickness
300 mm (12") unsawn
120 μm ± 15 μm
Number of pads
Pad location
Process
Batch size
Net printed dies per wafer
Wafer backside
Material
Treatment
Roughness
Chip dimensions
Die size excluding scribe
Scribe line width:
4 non-diagonal / placed in chip corners
CMOS 0.14 μm
25 wafers
258934
Si ground and stress release
R a
max. 0.5 μm, R t
max. 5 μm
0.465 mm × 0.475 mm = 0.22 mm x-dimension = 35 μm y-dimension = 35 μm
2
Passivation on front
Type
Material
Thickness
Polyimide spacer
Sandwich structure
PE-Nitride (on top)
1.75 μm total thickness of passivation
10 μm ± 2 μm
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UCODE 8/8m
Table 4. 12 inch specification with Large Pads, conventional dicing
...continued
Au pads
Pad material
Pad hardness
> 99.9 % pure Au
35 – 80 HV 0.005
Pad shear strength
Pad height
> 70 MPa
3 μm
Pad height uniformity
– within a die
– within a wafer
Pad flatness
Pad size
– RF1, RF2 (max. details see wafer layout)
– TP1, TP2 (max. details see wafer layout)
Pad size variation max. 2 μm max. 4 μm max. 3 μm
151.5 μm × 278 μm
134.2 μm × 100 μm
± 5 μm
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Table 5. 12 inch specification with Large Pads, plasma dicing
Wafer
Designation
Diameter each wafer is scribed with batch number and wafer number
300 mm (12") unsawn typ. 310 mm at delivery
Thickness
Number of pads
Pad location
120 μm ± 15 μm
4 non-diagonal / placed in chip corners
CMOS 0.14 μm
25 wafers
296307
Process
Batch size
Net printed dies per wafer
Wafer backside
Material
Treatment
Roughness
Chip dimensions
Die size excluding scribe
Scribe line width:
Si ground and stress release
R a
max. 0.5 μm, R t
max. 5 μm
0.461 mm × 0.471 mm = 0.22 mm x-dimension = 6.6 μm y-dimension = 6.6 μm
2
Passivation on front
Type
Material
Sandwich structure
PE-Oxide (on top)
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UCODE 8/8m
Table 5. 12 inch specification with Large Pads, plasma dicing
...continued
Thickness 2.25 μm total thickness of passivation
Polyimide spacer
Au pads
10 μm ± 2 μm
Pad material
Pad hardness
> 99.9 % pure Au
35 – 80 HV 0.005
> 70 MPa
3 μm
Pad shear strength
Pad height
Pad height uniformity
– within a die
– within a wafer
Pad flatness
Pad size
– RF1, RF2 (max. details see wafer layout)
– TP1, TP2 (max. details see wafer layout)
Pad size variation max. 2 μm max. 4 μm max. 3 μm
151.5 μm × 278 μm
134.2 μm × 100 μm
± 5 μm
8.1.3 Fail die identification
No ink dots are applied to the wafer.
Electronic wafer mapping (SECS II format) covers the electrical test results and additionally the results of mechanical/visual inspection.
See
See
8.1.4 Map file distribution
See
See
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UCODE 8/8m
9 Functional description
9.1 Air interface standards
The UCODE 8/8m fully supports all parts of the "EPC
TM
Radio-Frequency Identity
Protocols Generation-2 UHF RFID, Specification for RFID Air Interface, Protocol for
Communications at 860 MHz to 960 MHz, Version 2.0.1".
9.2 Power transfer
The interrogator provides an RF field that powers the tag, equipped with a UCODE 8/8m.
The antenna transforms the impedance of free space to the chip input impedance in order to get the maximum power for the UCODE 8/8m on the tag.
The RF field, which is oscillating on the operating frequency provided by the interrogator, is rectified to provide a smoothed DC voltage to the analog and digital modules of the IC.
The antenna that is attached to the chip may use a DC connection between the two antenna pads. Therefore the UCODE 8/8m also enables loop antenna design.
9.3 Data transfer
9.3.1 Interrogator to tag Link
An interrogator transmits information to the UCODE 8/8m by modulating an UHF RF signal. The UCODE 8/8m receives both information and operating energy from this RF signal. Tags are passive, meaning that they receive all of their operating energy from the interrogator's RF waveform.
An interrogator is using a fixed modulation and data rate for the duration of at least one inventory round. It communicates to the UCODE 8/8m by modulating an RF carrier.
For further details, refer to "Interrogator-to-tag (R=>T) communications"
9.3.2 Tag to interrogator Link
Upon transmitting a valid command, an interrogator receives information from a UCODE
8/8m tag by transmitting an unmodulated RF carrier and listening for a backscattered reply. The UCODE 8/8m backscatters by switching the reflection coefficient of its antenna between two states in accordance with the data being sent. For further details, refer to
"Tag-to-Interrogator (T=>R) communications"
The UCODE 8/8m communicates information by backscatter-modulating the amplitude and/or phase of the RF carrier. Interrogators shall be capable of demodulating either demodulation type.
The encoding format, selected in response to interrogator commands, is either FM0 baseband or Miller-modulated subcarrier.
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UCODE 8/8m
9.4 Supported commands
The UCODE 8/8m supports all mandatory EPCglobal V2.0.1 commands including
• KILL command
• PERMALOCK or LOCK command
In addition the UCODE8/8m supports the following optional commands:
• ACCESS
• Block Write (32 bit) on even addresses
• Untraceable
9.5 UCODE 8/8m memory
The UCODE 8/8m memory is implemented according to EPCglobal V2.0.1:
Table 6. UCODE 8 memory sections
Name
Reserved memory (32-bit Access and 32 bit Kill password)
EPC (excluding 16 bit CRC-16 and 16-bit PC)
UCODE 8 Configuration Word
TID (including permalocked unique 48-bit serial number)
Size
64 bit
128 bit
16 bit
96 bit
Bank
00b
01b
01b
10b
Table 7. UCODE 8m memory sections
Name
Reserved memory (32-bit Access and 32 bit Kill password)
EPC (excluding 16 bit CRC-16 and 16-bit PC)
UCODE 8 Configuration Word
TID (including permalocked unique 48-bit serial number)
User Memory
Size
64 bit
96 bit
16 bit
96 bit
32 bit
Bank
00b
01b
01b
10b
11b
The logical address of all memory banks begins at zero (00h).
In addition to the four memory banks, one configuration word to handle the UCODE 8/8m specific features is available at EPC bank 01 address bit-200h. The configuration word is described in detail in
The TID complies to the GS1 EPC Tag Data Standard. See "EPC Tag Data Standard,
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UCODE 8/8m
9.5.1 UCODE 8/8m overall memory map
Table 8. UCODE 8 overall memory map
Bank Address Type
Bank 00 00h to 1Fh
20h to 3Fh reserved reserved
Bank 01
EPC
00h to 0Fh EPC
10h to 14h
15h
16h
EPC
EPC
EPC
Bank 01
Config Word
203h
204h
205h
206h
207h
17h to 1Fh
20h to 9Fh
200h
201h
202h
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
Bank 10
TID
208h
209h
20Ah
20Bh
20Ch
20Dh
20Eh
20Fh
00h to 07h
08h to 13h
14h
15h to 1Fh
20h to 2Fh
30h to 5Fh
TID
TID
TID
TID
EPC
EPC
EPC
TID
TID
EPC
EPC
EPC
EPC
EPC
Content
Kill password
Access password
EPC+TID
Brand Identifier
Self Adjust Cap 1
Self Adjust Cap 0
Self Adjust disable
RFU max. backscatter strength
RFU
RFU
RFU
Initial all 00h all 00h
EPC length
UMI
XPC indicator
00110b
0b
0b numbering system indicator 00h
EPC
EPC check
EPC correction
EPC NOK
0b
0b
0b
0b
0b
0b
0b
0b
0b
1b
0b
0b
0b
Remark unlocked memory unlocked memory memory mapped calculated CRC unlocked memory hardwired to 0 hardwired to 0
RFU
RFU
PSF flag allocation class identifier
0b
0b
0b
1110 0010b locked memory locked memory permanent bit
locked memory tag mask designer identifier 1000 0000 0110b locked memory config word indicator tag model number
1b
TMNR
locked memory locked memory
XTID header serial number
2000h
SNR locked memory locked memory unlocked memory unlocked memory indicator bit indicator bit indicator bit action bit
action bit
indicator bit indicator bit
locked memory permanent bit
locked memory locked memory locked memory
[1] HEX E280 6894 0000 nnnn nnnn nnnn 0000 0000 where n are the nibbles of the SNR from the TID
[2]
[3] Permanent bit: permanently stored bits in the memory; Read/Writeable according to EPC bank lock status, see
[4] Indicates the existence of a Configuration Word at the end of the EPC number
[5] See
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UCODE 8/8m
Table 9. UCODE 8m overall memory map
Bank Address Type Content
Bank 00 00h to 1Fh
20h to 3Fh reserved reserved
Kill password
Access password
Bank 01
EPC
00h to 0Fh EPC
10h to 14h
15h
EPC
EPC
EPC length
UMI
Bank 01
Config Word
Bank 10
TID
202h
203h
204h
205h
206h
16h
17h to 1Fh
20h to 7Fh
200h
201h
207h
208h
209h
20Ah
20Bh
20Ch
20Dh
20Eh
20Fh
00h to 07h
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
TID
00110b
1b
XPC indicator 0b numbering system indicator 00h
EPC
EPC check
EPC correction
0b
0b
EPC NOK
EPC+TID
Brand Identifier
Self Adjust Cap 1
Self Adjust Cap 0
Self Adjust disable
RFU max. backscatter strength
RFU
RFU
Initial all 00h all 00h
0b
0b
1b
0b
0b
0b
0b
0b
0b
0b
Bank 11
User Memory
08h to 13h
14h
15h to 1Fh
20h to 2Fh
30h to 5Fh
00h to 1Fh
TID
TID
TID
TID
TID
UM
Remark unlocked memory unlocked memory memory mapped calculated CRC unlocked memory hardwired to 1 hardwired to 0 unlocked memory unlocked memory indicator bit indicator bit indicator bit action bit action bit
indicator bit indicator bit
locked memory permanent bit
locked memory locked memory
User Memory check
User Memory correction
User Memory NOK
PSF flag allocation class identifier
0b
0b
0b
0b
1110 0010b indicator bit indicator bit indicator bit permanent bit
locked memory tag mask designer identifier 1000 0000 0110b locked memory config word indicator 1b
locked memory tag model number TMNR
locked memory
XTID header serial number
2000h
SNR locked memory locked memory
User Memory all 00h unlocked memory
[1] HEX E280 6994 0000 nnnn nnnn nnnn where n are the nibbles of the SNR from the TID
[2]
[3] Permanent bit: permanently stored bits in the memory; Read/Writeable according to EPC bank lock status, see
[4] Indicates the existence of a Configuration Word at the end of the EPC number
[5] See
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9.5.2 UCODE 8/8m TID memory details
First 48 bit of TID memory
Class ID
Mask
Designer
ID
UCODE 8 E28068942000
UCODE 8m E28069942000
E2h
E2h
806h
806h
Config
Word
Indicator
Model Number
Sub
Version Nr.
Version
(Silicon) Nr.
1b 0001b 0010100b
1b 0011b 0010100b
XTID
Header
2000h
2000h
Addresses 00h 5Fh
TID
MS Byte
MSBit LSBit
Bit
Address
00h
Bits
07h 08h 13h 14h 1Fh 20h
7
Class Identifier
0
E2h
(EAN.UCC)
Mask-Designer Identifier
11
806h
(NXP; with XTID)
Address
Bits
14h
C.
W.
I.
0
1b
1b
0 11
Model Number
894h
(UCODE 8)
994h
(UCODE 8m)
18h 19h
0 15
3
Sub Version Number
0001b
0011b
0 6
0010100b
(UCODE 8)
0010100b
(UCODE 8m)
Model Number
XTID
2000h
(indication of 48bit unique SNR)
1Fh
0
Figure 6. UCODE 8/8m TID memory structure
2Fh 30h
0 47
Serial Number
000000000000h to FFFFFFFFFFFFh
SL3S1205_15
LS Byte
MSBit LSBit
5Fh
0 aaa-027137
UCODE 8/8m
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UCODE 8/8m
9.6 Supported features
The UCODE 8/8m is equipped with a number of additional features. They are implemented in such a way that standard EPCglobal READ / WRITE / ACCESS /
SELECT commands can be used to operate these features.
The Configuration Word, as mentioned in the memory map, describes the additional features at address 200h of the EPC memory.
Bit 14h of the TID indicates the existence of a Configuration Word. This flag enables the selection of configuration word enhanced transponders in mixed tag populations.
9.6.1 UCODE 8/8m features control mechanism
The different features of the UCODE 8/8m can be activated / de-activated by addressing or changing the content of the corresponding bit in the configuration word at address
200h in the EPC memory bank (see
). The de-activation of the action bit features will only happen after chip reset.
Table 10. Configuration word UCODE 8/8m
Indicator bit Action bit
EPC
Check
0
EPC
Corr
1
EPC
NOK
2
EPC+TID
3
Brand
Identifier
4
Indicator bit
Self Adjust
Cap 1
5
Self Adjust
Cap 0
6
Permanent bit
Self Adjust disable
7
Table 11. Configuration word UCODE 8/8m ... continued
Locked memory
Permanent bit
Locked memory Indicator bit
RFU
8 max.backsca
tter strength
9
RFU
10
RFU
11
User Memory
Check
12
User Memory
Corr
13
User Memory
NOK
14
Permanent bit
PSF bit
15
The configuration word contains 3 different type of bits:
• Action bits : meant to trigger a feature upon a SELECT command on the related bit:
EPC+TID
Brand Identifier
• Permanent bits : permanently stored bits in the memory
Self Adjust disable
Max. Backscatter Strength
PSF Alarm bit
• Indicator bits : cannot be changed by command
EPC Check/Corr/NOK
User Memory Check/Corr/NOK
Self Adjust Cap0/Cap1
The activation or the de-activation of the feature behind the permanent bits happens only when attempting to write a "1" value to the related bit (value toggling) - writing "0" value has no effect. If the feature is activated, the related bit will be read with a "1" value and, if
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UCODE 8/8m de-activated, with a "0" value. The permanent bits can only be toggled by using standard
EPC WRITE (not a BlockWrite) if the EPC bank is unlocked or within the SECURED state if the EPC is locked. If the EPC is permalocked, they cannot be changed.
Action bits will trigger a certain action only if the pointer of the SELECT command exactly matches the action-bit address (i.e. 203h or 204h), if the length=1 and if mask=1b (no multiple triggers of actions possible within one single SELECT command).
If the truncate bit in the SELECT command is set to "1", the SELECT will be ignored. A
SELECT on action bits will not change the digital state of the chip.
The action bits can be triggered regardless if the EPC memory is unlocked, locked or permalocked.
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UCODE 8/8m
9.6.2 Memory Safeguard
9.6.2.1 Description
The Memory Safeguard of UCODE 8/8m consist of three different countermeasures which ensure integrity of the stored data:
ECC (Error correction code):
The implemented ECC is applied on the EPC- and User-Memory. With this feature, a single bit failure in the memory is detected and corrected automatically. In case of 2 bit fail, an indication is given.
EPC Memory:
The config word bit 200h (EPC check) indicates, if the EPC check is active ("1"). In case a single bit was corrected this will be indicated by the bit 201h (EPC Corr). Should a 2-bit failure occur bit 202h (EPC NOK) will be activated ("1"). In this case, no error correction will be applied and the EPC memory content readout will provide the actual content.
User Memory:
The config word bit 20Ch (User Memory check) indicates if the User Memory check is active ("1"). In case a single bit was corrected this will be indicated by the bit 20Dh
(User Memory Corr). Should a 2-bit failure occur, bit 20Eh (User Memory NOK) will be activated ("1"). In this case, no error correction will be applied and the User Memory content readout will provide the actual content.
This feature will be activated in case a Lock operation is applied on the according memory bank. If there is a password lock and a change of the memory content in the secured state, the ECC will be not re-calculated and the feature is disabled. To re-enable the ECC functionality also in this condition, an unlock and re-lock is required.
Parity check:
A parity check on the TID is implemented to offer the possibility to identify a change in the TID. The parity bit (Even parity) will be calculated and locked in the manufacturing process. For a check, the TID content needs to be read out and parity checked.
Margin Check
The implemented margin check is acting on the EPC-, Reserved- and User-Memory.
During performing a Lock operation on the targeted memory bank the IC checks for sufficient programming margin of the memory cell and only responds after a successful check. In case of insufficient margin an error code will be responded and the Lock not completed. A re-check on already locked memory banks requires an unlock and re-lock command.
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UCODE 8/8m
9.6.3 Self Adjust
9.6.3.1 Description
The UCODE 8/8m has an automatic mechanism implemented which adjusts the chip sensitivity to a maximum in the operated environment. This adjustment will be performed at startup and selects between three different input capacitance values. The feature is enabled by default, but can also be deactivated by the config word bit 207h (Self Adjust disable). In case of deactivation, the center capacitance is used.
The indicator bits 205h (Self Adjust Cap 1) and 206h (Self Adjust Cap 0) give information which capacitor is active ("1"). The startup is performed with the lowest value which is center capacitance minus Cap 0 (60 fF) and is then adjusted up to center capacitance plus Cap 1 (100 fF).
9.6.4 Brand Identifier
9.6.4.1 Description
This new feature allows brand owners to implement a product originality check option for their products. The customer dedicated unique 16-bit brand identifier is programmed during manufacturing process by NXP and therefore unalterable stored in the memory.
A SELECT command on bit 204h (Brand identifier) in the configuration word triggers the
UCODE8/8m to respond in the inventory round with PC + EPC + Brand Identifier + CRC.
In order to prevent manipulation, the Brand Identifier is scrambled with the RN16 and not sent in plain. The implemented scrambling is performed by bitwise XOR operation of the 16-bit Brand Identifier and the RN16. At the reader, the Brand identifier can be descrambled and the originality check completed.
The PC value is adjusted accordingly for UCODE 8/8m. A SELECT on the Brand
Identifier bit always gives a Tag matching.
The usage of this feature requires an update on the reader firmware with the Brand
Identifier check routine.
Default value of the UCODE 8/8m Brand Identifier is "AAAAh". Customer-specific Brand
Identifiers can be requested by a dedicated product ordering code. For details, contact your NXP sales representative.
The Brand Identifier feature cannot be used in combination with the EPC+TID feature.
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UCODE 8/8m
9.6.5 EPC+TID
9.6.5.1 Description
This feature enables the read out the EPC+TID memory content in a faster way compared to a standard readout sequence.
A SELECT on the config word bit 203h (EPC+TID) will trigger the UCODE 8/8m to reply with the EPC+TID after receiving the ACK command during the inventory round.
In case only the TID should be replied by this feature, the EPC length in the PC needs to be set to "0".
9.6.6 Product Status Flag (PSF)
9.6.6.1 Description
The PSF bit can be used for easy EAS (Electronic Article Surveillance) implementations or as general-purpose check flag.
In order to detect tags with activated PSF, a SELECT command on bit 20Fh (PSF Bit) in the configuration word is required. In the following inventory round, only PSF enabled chips reply their EPC number.
9.6.7 Backscatter strength reduction
The UCODE 8/8m features two levels of backscatter strengths. Per default, maximum backscatter is enabled in order to enable maximum read rates. A deactivation of this feature can be done by clearing bit 209h (max. backscatter strength) in the configuration word, which reduces the backscatter strength if needed.
9.6.8 Pre-serialization of the 96-bit EPC
9.6.8.1 Description
UCODE 8/8m are delivered with a pre-serialized content of the 96-bit EPC, which is the initial EPC length settings of UCODE 8/8m.
The EPC content is identical to the TID content except of the 16-bit XTID content which is set to 16-bit 0's.
TID
Bits 7
Class Identifier Mask-Designer Identifier
0 11 0 11
Model Number
0 15
XTID
0 47
Serial Number
0 serialized EPC
Bits 7
Class Identifier Mask-Designer Identifier
0 11 0 11
Model Number
0 15
0000 0000 0000 0000
0 47
Figure 7. Pre-serialization of 96-bit EPC
Serial Number
0 aaa-027142
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UCODE 8/8m
9.6.9 Single-slit antenna solution
9.6.9.1 Description
In UCODE 8/8m, the test pads TP1 and TP2 are electrically disconnected and therefore can be safely short-circuited to the RF pads (RF1, RF2) (see figure below).
Single-slit antenna enables easier assembly and antenna design. In addition to the standard antenna assembly, the related increased input capacitance (see
) can be used for optimization for different antenna design.
standard assembly
RF2 RF1
TP1 TP2 supporting pads aaa-027139
Figure 8. Standard antenna design versus single-slit antenna single-slit assembly
RF2 RF1
TP1 TP2 aaa-027351
Figure 9. Single-slit assembly
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UCODE 8/8m
9.6.10 Large Pads
9.6.10.1 Description
The large gold pads introduced in UCODE 8/8m enable more robust and reliable assembly. The new pad design allows not only more freedom in the placement accuracy
).
RF1
RF2 RF1
RF2
RF1
RF2
TP1 TP2
TP1
TP1
Figure 10. Rotation tolerant pad design
RF2
TP2
RF1
TP2 aaa-027141
Figure 11. Dual axis glue spacer
TP1 TP2 aaa-027140
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UCODE 8/8m
9.6.11 Custom commands
The Untraceable function allows the UCODE 8/8m to hide the complete or parts of the EPC, TID and/or user memory. In addition, the read range can be completely or temporarily reduced. This command can only be executed from the secured state.
Memory parts which are set untraceable are acting as non-existing in the Open state.
EPC-field: Specifies the number of words of the EPC memory which the UCODE 8/8m back scatters. A change of this field therefore also changes the L bit in the Protocol
Control (PC) word.
TID-field: Hide some ("01") hides the TID memory from address 20h (included) onwards.
Range-field: In case of activated range toggling, the read range reduction toggles from the actual value to the second (e.g. when actual state is normal it toggles to reduced). In case of power loss the chip reverts to its prior state.
UCODE 8/8m does not support the U bit and therefore ignores this value.
Table 12. Untraceable command
Command RFU U
No. of bits 16 2 1
Description 1110 0010
0000 0000
00 do not care
EPC
6
MSB:"0": show memory above
EPC
"1": hide memory above
EPC
5 LSBs: new EPC length
TID
2
"00": hide none
"01": hide some
"10": hide all
"11": RFU
User
1
"0": view
"1": hide
Range
2
"00": normal
"01": toggle
"10": reduced
"11": RFU
RN
16
CRC
16 handle CRC-16
Table 13. Untraceable command-response table
Starting State Condition Response ready arbitrate, reply, acknowledged all all
-
open secured all executable
Next State ready arbitrate
open backscatter header when done secured killed all killed
In case of access to the memory that is set to untraceable, the error condition "memory overrun" is returned.
For further details, refer to "EPC Global Gen2v2"
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UCODE 8/8m
10 Limiting values
Table 14. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
RFN.
Symbol Parameter Conditions Min Max Unit
Bare die limitations
T stg
T amb
V
ESD storage temperature ambient temperature electrostatic discharge voltage
Pad limitations
Human body model
-
-55
-40
+125
+85
± 2
°C
°C kV
P i input power maximum power dissipation, RF1/RF2 pad
100 mW
[1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the
Operating Conditions and Electrical Characteristics section of this specification is not implied.
[2] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
[3] For ESD measurement, the die chip has been mounted into a CDIP20 package.
[4] HBM: ANSI/ESDA/JEDEC JS-001
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5,
JESD625-A or equivalent standards.
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UCODE 8/8m
11 Characteristics
11.1 UCODE 8/8m bare die characteristics
Table 15. UCODE 8/8m RF interface characteristics (RF1, RF2)
Symbol Parameter Conditions f i
P i(min) input frequency minimum input power
P i(min) t 16bit minimum input power encoding speed
READ sensitivity reduced operating range
WRITE sensitivity
16-bit
32-bit (block write)
C i
Z chip input capacitance, Large Pads parallel chip impedance, Large Pads 866 MHz
915 MHz
Z
953 MHz
915 MHz
Z typical assembled impedance,
Large Pads (see
) typical assembled impedance in case of single-slit antenna assembly, Large Pads (see
)
915 MHz
-
-
Min
840
-
-
-
-
-
-
-
-
[1] Power to process a QUERY command
[2] Measured with a 50 Ω source impedance directly on the chip
[3] Results in approximately -23 dBm tag sensitivity with a 2.15 dBi gain antenna
[4] Tag sensitivity on a 2.15 dBi gain antenna
[5] When the memory content is "0000...".
[6] At minimum operating power
[7] at center capacitor of Self Adjust
[8] The antenna shall be matched to this impedance
[9] Assuming 50ff additional assembly capacitance
[10] Assuming 220ff additional assembly+test pad capacitance
Table 16. UCODE 8/8m memory characteristics
Symbol Parameter Conditions
EEPROM characteristics t ret
N endu(W) retention time write endurance
T amb
≤ 55 °C
-
Typ
- 22.9
+ 1
-17.8
0.7
1.2
0.69
15-j265 -
-
14-j252 -
-
-
13-j242 -
19-j234
-
13-j191 -
Min Typ
20
100k -
-
-
-
Max
960
-
-
Unit
MHz dBm dBm
Ω
Max Unit year cycle dBm
Ω
Ω ms ms pF
Ω
Ω
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UCODE 8/8m
12 Packing information
12.1 Wafer
See
"Data sheet - Delivery type description – General specification for 8" wafer on
UVtape with electronic fail die marking, BU-S&C document number: 1093**"
See
"Data sheet - Delivery type description – General specification for 12" wafer on
UVtape with electronic fail die marking, BU-S&C document number: 1862**"
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UCODE 8/8m
13 Abbreviations
FM0
G2
IC
PIE
PSF
RF
UHF
SECS
TID
Table 17. Abbreviations
Acronym Description
CRC
CW
Cyclic Redundancy Check
Continuous Wave
DSB-ASK
DC
Double Side Band-Amplitude Shift Keying
Direct Current
EAS
EEPROM
EPC
Electronic Article Surveillance
Electrically Erasable Programmable Read Only Memory
Electronic Product Code (containing Header, Domain Manager, Object Class and Serial Number)
Bi phase space modulation
Generation 2
Integrated Circuit
Pulse Interval Encoding
Product Status Flag
Radio Frequency
Ultra High Frequency
Semi Equipment Communication Standard
Tag IDentifier
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UCODE 8/8m
14 References
1. EPCglobal: EPC Radio-Frequency Identity Protocols Class-1 Generation-2 UHF
RFID Protocol for Communications at 860 MHz – 960 MHz, Version 2.0.1 (April 2015)
2. EPCglobal: EPC Tag Data Standard, Release 1.10 (March 2017)
3. Data sheet - Delivery type description – General specification for 8" wafer on UV-tape with electronic fail die marking, BU-S&C document number: 1093**
4. Data sheet - Delivery type description – General specification for 12" wafer on UVtape with electronic fail die marking, BU-S&C document number: 1862**
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UCODE 8/8m
15 Revision history
Table 18. Revision history
Document ID
SL3S1205_15 v. 3.6
Modifications:
SL3S1205_15 v. 3.5
Release date
20211202
Data sheet status
Product data sheet -
Change notice Supersedes
SL3S1205_15 v. 3.5
•
Table 5 "12 inch specification with Large Pads, plasma dicing "
: update typical wafer diameter at delivery
20210401 Product data sheet SL3S1205_15 v. 3.4
Modifications:
SL3S1205_15 v. 3.4
Modifications:
SL3S1205_15 v. 3.3
Modifications:
SL3S1205_15 v. 3.2
Modifications:
SL3S1205_15 v. 3.1
Modifications:
SL3S1205_15 v. 3.0
•
Table 1 "Ordering information" : Ordering information with UCODE 8, 12 inch plasma dicing
updated
•
Section 7 "Wafer layout" : Titles in wafer layout with stealth dicing and conventional dicing
updated
•
Figure 5 " UCODE 8/8m, 12" wafer layout, Large Pads, plasma dicing"
: inserted
•
Table 5 "12 inch specification with Large Pads, plasma dicing "
: inserted
• Delivery form of UCODE 8/8m, 12 inch FC Bumps (SL3S1205FUD2/KP and
SL3S1215FUD2/KP) discontinued
• Related information removed
20200131 Product data sheet SL3S1205_15 v. 3.3
• Introduction of 12 inch FC Bumps
20191028 Product data sheet SL3S1205_15 v. 3.2
•
Section 8.1.2 "12 inch Wafer with Large Pads"
: number of PGDW changed into 258934
20181119 Product data sheet
• Introduction of 12 inch wafer delivery
•
Figure 3 "UCODE 8/8m, 8" wafer layout, Large Pads, stealth dicing"
updated
•
Editorial changes in Table 8 "UCODE 8 overall memory map"
•
Editorial changes in Table 9 "UCODE 8m overall memory map"
•
Section 9.6.4 "Brand Identifier"
updated
20170630 Product data sheet SL3S1205_15 v. 3.0
• Wording: "Auto Adjust" replaced with "Self Adjust"
20170703 Product data sheet -
SL3S1205_15 v. 3.1
398420
398420
398410
20170531
20160919
Preliminary data sheet -
Objective data sheet -
398410
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16 Legal information
16.1 Data sheet status
Document status
Objective [short] data sheet
Preliminary [short] data sheet
Product [short] data sheet
Product status
Development
Qualification
Production
Definition
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
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Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
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UCODE 8/8m
Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
Suitability for use in non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and
(b) whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately.
Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP.
NXP has a Product Security Incident Response Team (PSIRT) (reachable at [email protected]
) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.
16.4 Trademarks
Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners.
NXP — wordmark and logo are trademarks of NXP B.V.
UCODE — is a trademark of NXP B.V.
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Tables
Ordering information ..........................................5
Pin description bare die .................................... 7
UCODE 8 memory sections ............................16
UCODE 8m memory sections ......................... 16
UCODE 8 overall memory map .......................17
UCODE 8m overall memory map ....................18
Tab. 10. Configuration word UCODE 8/8m ................... 20
Tab. 11. Configuration word UCODE 8/8m ...
continued .........................................................20
Tab. 12. Untraceable command .................................... 27
Tab. 13. Untraceable command-response table ............27
Tab. 14. Limiting values ................................................ 28
Tab. 15. UCODE 8/8m RF interface characteristics
(RF1, RF2) ...................................................... 29
Tab. 16. UCODE 8/8m memory characteristics .............29
Tab. 17. Abbreviations ...................................................31
Tab. 18. Revision history ...............................................33
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UCODE 8/8m
Figures
Block diagram of UCODE 8/8m IC ....................6
Pinning bare die, Large Pads ............................7
UCODE 8/8m, 12" wafer layout, Large
Pads, conventional dicing ................................. 9
UCODE 8/8m, 12" wafer layout, Large
Pads, plasma dicing ........................................10
UCODE 8/8m TID memory structure ...............19
Pre-serialization of 96-bit EPC ........................ 24
Single-slit assembly .........................................25
Rotation tolerant pad design ........................... 26
Dual axis glue spacer ..................................... 26
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UCODE 8/8m
Contents
General description ............................................ 1
Features and benefits .........................................2
Key features ...................................................... 2
Memory ..............................................................2
Supported features ............................................ 3
Applications .........................................................4
Target market .....................................................4
Applications ........................................................4
Ordering information .......................................... 5
Block diagram ..................................................... 6
Pinning information ............................................ 7
Pin description ................................................... 7
Wafer layout .........................................................8
Mechanical specification ..................................11
Wafer specification .......................................... 11
8 inch Wafer with Large Pads, stealth dicing ... 11
12 inch Wafer with Large Pads ........................12
Fail die identification ........................................14
Map file distribution ......................................... 14
Functional description ......................................15
Air interface standards .....................................15
Power transfer ................................................. 15
Data transfer ....................................................15
Interrogator to tag Link .................................... 15
Tag to interrogator Link ....................................15
Supported commands ......................................16
UCODE 8/8m memory .....................................16
UCODE 8/8m overall memory map ................. 17
UCODE 8/8m TID memory details ...................19
Supported features .......................................... 20
UCODE 8/8m features control mechanism ......20
Memory Safeguard .......................................... 22
Description .......................................................22
Self Adjust ....................................................... 23
Description .......................................................23
Brand Identifier ................................................ 23
Description .......................................................23
EPC+TID ..........................................................24
Description .......................................................24
Product Status Flag (PSF) ...............................24
Description .......................................................24
Backscatter strength reduction ........................ 24
Pre-serialization of the 96-bit EPC ...................24
Description .......................................................24
Single-slit antenna solution ..............................25
Description .......................................................25
Large Pads ...................................................... 26
9.6.10.1 Description .......................................................26
Custom commands ..........................................27
Limiting values ..................................................28
Characteristics .................................................. 29
UCODE 8/8m bare die characteristics .............29
Packing information ..........................................30
Wafer ............................................................... 30
Abbreviations .................................................... 31
References .........................................................32
Revision history ................................................ 33
Legal information ..............................................34
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'.
© NXP B.V. 2021.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 2 December 2021
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