STMicroelectronics STM32L152D-EVAL User Manual

UM1521

User manual

STM32L152D-EVAL

evaluation board

Introduction

The STM32L152D-EVAL evaluation board is a complete demonstration and development platform for STMicroelectronic's ARM cortex-M3 core-based STM32L152ZDT6 microcontroller featuring two I2C, three SPI, five USART, 12-bit ADC, 12-bit DAC, LCD driver, internal 48 KB SRAM and 384 KB Flash, touch sensing, USB FS, LCD controller,

FSMC and JTAG debugging support.

This board can be used as reference design for user application development but it is not considered as final application. The full range of hardware features on the board helps you evaluate all peripherals (USB FS, USART, audio DAC, microphone ADC, dot-matrix LCD,

LCD glass, IrDA, LDR, SRAM, NOR Flash, MicroSD Card, temperature sensor and so on) and develop your own applications. Extension headers make it possible to easily connect a daughterboard or wrapping board for your specific application.

An ST-LINK/V2 is integrated on the board as embedded in-circuit debugger and programmer for the STM32 MCU.

Figure 1.

STM32L152D-EVAL evaluation board

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UM1521 Contents

Contents

1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2

Demonstration software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.3

Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.4

Delivery recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Hardware layout and configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1

Development and debug support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2

Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.3

Clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.4

Reset source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.5

Boot option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.6

LCD glass module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.7

Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.8

USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.9

RS-232 and IrDA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.10

Touch sensing slider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.11

MicroSD Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.12

Serial EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.13

RF EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.14

SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.15

NOR Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.16

Analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.17

Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.18

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.19

Display and input devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

2.20

I

DD

measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2.20.1

Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2.20.2

Low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2.20.3

Ibias current measurement procedure . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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UM1521 Contents

3.1

RS-232 connector CN1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.2

Power connector CN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.3

TFT LCD connector CN4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4

Daughterboard extension connector CN5 and CN10 . . . . . . . . . . . . . . . . 27

3.5

LCD glass daughterboard connectors CN6 and CN7 . . . . . . . . . . . . . . . 30

3.6

ST-LINK/V2 programming connector CN9 . . . . . . . . . . . . . . . . . . . . . . . . 31

3.7

ST-LINK/V2 USB type B connector CN14 . . . . . . . . . . . . . . . . . . . . . . . . 31

3.8

JTAG connector CN16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.9

Trace debugging connector CN11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.10

Audio jack CN13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.11

MicroSD connector CN3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

3.12

Analog input-output 2-pin connector CN8 . . . . . . . . . . . . . . . . . . . . . . . . 33

3.13

User USB type B connector CN15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

3.14

RF EEPROM daughterboard connector CN12 . . . . . . . . . . . . . . . . . . . . . 34

4 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Appendix A STM32L152D-EVAL I/O assignment . . . . . . . . . . . . . . . . . . . . . . . . . 49

Appendix B Mechanical dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

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Overview

1 Overview

UM1521

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1.1 Features

● Four 5 V power supply options: Power jack, ST-LINK/V2 USB connector, user USB connector or daughterboard

Audio jack connected to I2S DAC, or STM32L152ZDT6 internal DAC

Microphone connected to ADC using integrated op amp as amplifier

2 GByte (or more) MicroSD Card on SDIO interface

Temperature sensor and RF EEPROM on I2C compatible serial interface

RS-232 interface configurable for communication or Flashloader

IrDA transceiver

JTAG and trace debug support, embedded ST-LINK/V2

4 Kbit serial Flash, 512K x16-bit SRAM and 128 Mbit NOR Flash

240x320 TFT color LCD connected to FSMC interface of STM32L152ZDT6

Joystick with 4-direction control and selector

Reset and Tamper or key button

4 color user LEDs and 3 LEDs as MCU power range indicator

MCU consumption measurement circuit

LCD glass 40 x 8 segments connected to LCD driver of STM32L152ZDT6

Extension connector for daughterboard or wrapping board

MCU voltage choice of 3.3 V or adjustable from 1.65 V to 3.6 V

USB FS connector

Touch slider

Light dependent resistor (LDR)

One MCU integrated op amp configured as Sallen-Key 2nd order low pass filter

One MCU integrated op amp configured as amplifier with adjustable gain

One ADC / DAC input signal connector

Potentiometer

Demonstration software is preloaded in the board's Flash memory for easy demonstration of the device peripherals in stand-alone mode. For more information and to download the latest version available, please refer to the STM32L152D-EVAL demonstration software available on www.st.com.

To order the STM32L152ZDT6 evaluation board, use the order code STM32L152D-EVAL.

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UM1521 Overview

Some verifications are needed before using the board for the first time to make sure that nothing was damaged during shipment and that no components are unplugged or lost.

When the board is extracted from its plastic bag, please check that no component remains in the bag.

The main components to verify are:

1.

The 8 MHz crystal (X1) which may have been removed by a shock from its socket.

2. The MicroSD Card which may have been ejected from the connector CN3 (left side of the board).

3. The dual-interface EEPROM board (ANT7-M24LR-A) which may have been unplugged from the connector CN12 (top right corner of the board).

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Hardware layout and configuration

2 Hardware layout and configuration

UM1521

The STM32L152D-EVAL evaluation board is designed around the STM32L152ZDT6 (144pin TQFP package). The hardware block diagram

Figure 2 illustrates the connection

between STM32L152D-EVAL and peripherals (LCD glass, Color LCD, Touch slider, USB FS connector, Temperature Sensor, USART, IrDA, Audio, SRAM, Nor Flash, EEPROM,RF

EEPROM, MicroSD Card and embedded ST-LINK) and

Figure 3

will help you locate these features on the actual evaluation board.

Figure 2.

Hardware block diagram

*OYSTICK

,%$S

7AKEUP

BUTTON

,$2

4OUCH

SLIDER

PIN

CONNECTOR

53"

CONNECTOR

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-ICRO3$

#ARD

0OTENTIOMETER

'0)/

53!24

#OMPARATOR

43

CONTROLLER

$!#

!$#

34-,:$4

&3-#

*4!'

53"&3

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30)

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3%'

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/P!MP

/P!MP

6OLTAGE

TRANSLATOR

23

TRANSCEIVER

)R$!

TRANSCEIVER

$OT-ATRIX

,#$

53!24

CONNECTOR

32!-./2&LASH

%MBEDDED

34 ,).+6

53"4YPE"

CONNECTOR

*4!'4RACE

CONNECTOR

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CONNECTOR

4EMPERATURE

SENSOR

!UDIO

AMPLIFIER

-ICROPHONE

6TO6

ADJUSTABLE

REGULATOR

6

REGULATOR

-#5

CONSUMPTION

MEASUREMENT

%XTENSION

CONNECTORFOR

'0)/S

,#$GLASS

= I/O shared with LCD glass -36

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UM1521

Figure 3.

Hardware block diagram

#.#.

%XTENSION

CONNECTION

HEADER

5

34-,:$4

#.

53!24

5

)R$!

#.

-ICRO3$#ARD

#.

#OLOR,#$

Hardware layout and configuration

5-ICROPHONE

3

4OUCHSLIDER

#.

2&%%02/-

DAUGHTERBOARD

CONNECTOR

#.#.

,#$GLASS

DAUGHTERBOARD

CONNECTOR

#.

53"&3

2

,$2

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TRACE

#.

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,$

34,).+6

#/-,%$

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34,).+6

53"

#.

!UDIOJACK

#.

0OWERJACK

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BUTTON

26

6$$ADJUSTMENT

26POTENTIOMETER

6$$RANGE

,%$S

COLOR,%$S

"2ESET+EY

5*OYSTICK

-36

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Hardware layout and configuration

2.1

Note:

UM1521

Development and debug support

Version 2 of the ST-LINK called ST-LINK/V2 is embedded on the board. This tool allows program loading and debugging on the STM32L using a JTAG or SWD interface. Third-party debug tools are also supported by JTAG connector CN16 and Trace connector CN11.

A specific driver must be installed on your PC for communication with embedded ST-

LINK/V2. To download and install this driver, use the install shield called ST-

LINK_V2_USBdriver.exe available on the Software and development tools page for ultra low power STM32L family available on www.st.com.

Third-party toolchains support ST-LINK/V2 according to Table 1

.

Table 1.

Third party support of ST-LINK/V2

Third party Toolchain

Atollic

IAR

Keil

Tasking VX-Toolset

TrueSTUDIO

EWARM

MDK-ARM

ARM Cortex-M

2.1

6.20.4

4.20

4.0.1

Version

●

●

●

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●

●

●

The embedded ST-LINK/V2 is connected to the PC via a standard USB cable connected to connector CN14. The bicolor LED LD5 (COM) advises on the communication status as follows:

Slow blinking Red LED/Off : At power on before USB initialization.

Fast blinking Red LED/Off : After the first correct communication between PC and ST-

LINK/V2 (enumeration).

Red LED On: When initialisation between PC and ST-LINK/V2 is successfully finished.

Green LED On: After successful target communication initialization.

Blinking Red/Green LED: During communication with target.

Red LED On: Communication finished and OK.

Orange LED On: Communication failure.

It is possible to power the board via CN14 (embedded ST/LINK/V2 USB connector) even if an external tool is connected to CN11 (Trace connector) or CN16 (external JTAG & SWD connector).

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UM1521 Hardware layout and configuration

The STM32L152D-EVAL evaluation board is designed to be powered by a 5 V DC power supply and to be protected by PolyZen from a wrong power plug-in event.

It is possible to configure the evaluation board to use any of following four sources for the power supply.

● 5 V DC power adapter connected to CN2, the power jack on the board (power supply unit (PSU) on silk screen). The external power supply is not provided with the board.

●

●

5 V DC power with 500mA limitation from CN14, the USB type B connector of ST-

LINK/V2 (USB 5 V power source on silkscreen (ST-LINK/V2)).

5 V DC power with 500mA limitation from CN15, the USB type B connector (USB 5V power source on silkscreen (USB)).

● 5 V DC power from CN10, the extension connector for daughterboard (daughterboard power source on silkscreen (D5V)).

●

●

●

The LEDs indicate the following:

● LED LD9 is lit when the STM32L152D-EVAL board is powered by 5 V correctly.

Red LED LD8 is lit when the MCU is powered by low voltage (VDD < 1.8 V).

Yellow LED LD7 is lit when the MCU is powered by voltage (1.8 V < VDD < 2.2 V).

Green LED LD6 is lit when the MCU is powered by voltage (2.2 V < VDD).

The power supply is configured by setting the related jumpers JP1, JP5 and JP10 as

described in Table 2 .

Table 2.

Jumper

Power supply jumper settings

Description

JP1 selects one of the four possible power supply sources.

Setting

– For power supply jack(CN2) to the STM32L152D-EVAL only, JP1 is set as shown to the right:

JP1

– For power supply from the daughterboard connectors (CN10) to

STM32L152D-EVAL only, JP1 is set as shown to the right:

– For power supply from USB (CN15) to STM32L152D-EVAL only, JP1 is set as shown to the right:

– For power supply from USB connector of ST-LINK/V2 (CN14) to

STM32L152D-EVAL only, JP1 is set as shown to the right:

( Default setting )

For power supply from power supply jack (CN2) to both STM32L152D-

EVAL and daughterboard connected on CN5 and CN10, JP1 is set as shown to the right (daughterboard must not have its own power supply connected)

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Hardware layout and configuration UM1521

Table 2.

Jumper

Power supply jumper settings (continued)

Description

VDD is connected to fixed +3.3 V DC power when JP5 is set as shown to the right: ( Default setting )

JP5

JP10

VDD is connected to adjustable DC power from 1.65 V to 3.6 V when

JP5 is set as shown to the right:

VDD power is directly connected to MCU VDD when JP10 is set as shown to the right ( Default setting ):

Note: For manual I

DD

measurement the jumper on JP10 must be removed and replaced by an ampermeter connected between pin 1 and

2 of JP10.

Connect VDD power to MCU with current-sampling resister, 1 Ohm or

1 KOhm, in series for I

DD

current measurement when JP10 is set as shown to the right:

Setting

Note:

Note:

Due to some peripheral component specifications, the low voltage limitations (component will not work correctly when power level is under low voltage limitation) related to the

operating voltage of the peripherals are shown in Table 3

.

Table 3.

Low voltage limitation

Peripheral Component

USB

MicroSD Card

SRAM

EEPROM

RF EEPROM

CN15

CN3

U5

U25

CN12

I/O name

USB

SDIO

FSMC

SPI

I2C

Low voltage limitation

3 V

2.7 V

2.4 V

1.8 V

1.8 V

The recommended AC220 V to DC5 V power adapter is the PSU-5V2A. It is not included with the board but can be ordered from ST as a separate item. You can also use another equivalent 5 V power adapter (polarity compatible with CN2) to power the STM32L152D-

EVAL board via the CN2 power jack on the board.

To order the recommended power supply, use the order code PSU-5V2A.

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UM1521 Hardware layout and configuration

Two clock sources are available on the STM32L152D-EVAL evaluation board for the

STM32L152ZDT6 and RTC embedded.

● X1, 8 MHz crystal with socket for the STM32L152ZDT6 microcontroller, it can be removed from socket when internal RC clock is used.

● X3, 32 KHz crystal for embedded RTC

Table 4.

8 MHz crystal X1 related solder bridges

Solder bridge Description

SB1

SB2

PH1 is connected to 8 MHz crystal when SB1 is open. ( Default setting )

PH1 is connected to extension connector CN10 when SB1 is closed. In such case

R51 must be removed to avoid disturbance due to the 8Mhz quartz

PH0 is connected to 8 MHz crystal when SB2 is open. ( Default setting )

PH0 is connected to extension connector CN10 when SB2 is closed. In such case

C53 and X1 must be removed.

Table 5.

32 KHz crystal X3 related solder bridges

Solder bridge Description

SB8

SB7

PC14 is connected to 32 KHz crystal when SB8 is open. ( Default setting )

PC14 is connected to extension connector CN5 when SB8 is closed. In such case

R85 must be removed to avoid disturbance due to the 32Khz quartz

PC15 is connected to 32 KHz crystal when SB7 is open. ( Default setting )

PC15 is connected to extension connector CN5 when SB7 is closed. In such case

R84 must be removed to avoid disturbance due to the 32 KHz quartz

●

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The reset signal of the STM32L152D-EVAL evaluation board is low active and the reset sources include:

Reset button B1

Debug tools from JTAG connector CN16 and trace connector CN11

Daughterboard from CN10

Embedded ST-LINK/V2

RS-232 connector CN1 for ISP

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Hardware layout and configuration UM1521

●

●

The STM32L152D-EVAL evaluation board is able to boot from:

● Embedded user Flash

System memory with boot loader for ISP

Embedded SRAM for debugging

The boot option is configured by setting switch SW1 (BOOT0) and SW2 (BOOT1). The

BOOT0 can be configured also via the RS-232 connector CN1.

Table 6.

Switch

SW1 and

SW2

Boot related switch

Boot from

Switch configuration

STM32L152D-EVAL boots from user Flash when SW1 is set as shown to the right. SW2 is don't care in this configuration.

( Default setting )

0 <----> 1

STM32L152D-EVAL boots from embedded SRAM when SW1 and

SW2 are set as shown to the right.

0 <----> 1

0 <----> 1

STM32L152D-EVAL boots from system memory when SW1 and

SW2 are set as shown to the right.

Table 7.

Jumper

JP11

Boot0 related jumpers

Description

The Bootloader_BOOT0 is managed by pin 6 of connector CN1 (RS-232 DSR signal) when JP11 is closed. This configuration is used for boot loader application only.

Default setting : Not fitted

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UM1521 Hardware layout and configuration

An LCD glass module daughterboard (MB979) is mounted on the STM32L152D-EVAL evaluation board. It can be connected to the LCD driver of the STM32L152ZDT6 or work as a set of jumpers by mounting it on two possible positions; position "IO" or position "LCD":

●

When the LCD glass module is mounted on position IO (see Figure 4

), all peripherals

(memories, USART, audio, EEPROM, potentiometer, MicroSD Card, microphone, etc) shared with the LCD glass are connected to the STM32L152ZDT6, and the LCD glass is disconnected (default setting).

●

When the LCD glass module is mounted on position LCD (see Figure 5 ), the LCD glass

is connected to the LCD driver of the STM32L152ZDT6 and all peripherals shared with

LCD glass are disconnected.

Figure 4.

Position IO

Figure 5.

Position LCD

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Hardware layout and configuration UM1521

Table 8.

Jumper

LCD glass related jumpers

Description

PA1 is connected to microphone ( MIC_INP signal) when JP8 is set as shown to the right: ( Default setting )

JP8

Setting

PA1 is connected to LCD glass as SEG0 when JP8 is set as shown to the right:

JP6

PA2 is connected to microphone (MIC_INN signal)when JP6 is set as shown to the right: ( Default setting )

PA2 is connected to LCD glass as SEG1 when JP6 is set as shown to the right:

The custom LCD glass on MB979 is model XHO5002B. The signal mapping is shown in

Table 9 , Table 10

,

Table 11 and Table 12

and segment names are given in

Figure 6 .

Table 9.

Pin 1

LCD glass segments mapping table pins 1-12

2 3 4 5 6 7 8

COM1 COM1 1g

COM2 COM2 1h

COM3 COM3 1i

COM4 COM4 1j

COM5 1d

COM6 1c

COM7 1e

COM8 1f

2j

2d

2c

2e

2f

2g

2h

2i

3j

3d

3c

3e

3f

3g

3h

3i

4j

4d

4c

4e

4f

4g

4h

4i

5j

5d

5c

5e

5f

5g

5h

5i

9 10

6j

6d

6c

6e

6f

6g

6h

6i

7j

7d

7c

7e

7f

7g

7h

7i

11

8j

8d

8c

8e

8f

8g

8h

8i

12

Table 10.

LCD glass segments mapping table pins 13-24

Pin 13 14 15 16 17 18 19 20

COM1 9g 10g

COM2 9h 10h

COM3 9i 10i

COM4 9j 10j

COM5 9d 10d

COM6 9c 10c

COM7 9e 10e

COM8 9f 10f

11g

11h

11i

11j

11d

11c

11e

11f

12g

12h

12i

12j

12d

12c

12e

12f

13g

13h

13i

13j

13d

13c

13e

13f

14g 15g

14h 15h

14i 15i

14j 15j

14d 15d

14c 15c

14e 15e

14f 15f

16g

16h

16i

16j

16d

16c

16e

16f

21

17g

17h

17i

17j

17d

17c

17e

17f

22

18g

18h

18i

18j

18d

18c

18e

18f

23 24

19g 5J

19h 5C

19i 5B

19j 5I

19d 13a

19c 13b

19e O1

19f O2

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UM1521 Hardware layout and configuration

Table 11.

LCD glass segments mapping table pins 25-36

Pin 25 26 27 28 29 30 31 32

COM1 7J

COM2 7C

COM3 7B

COM4 7I

COM5 19a

COM6 19b

COM7 S

COM8 nA

7N

7M

7H

7A

18a

18b

7D

7K

7E

P6

7F

7G

17a

17b

Q6

7L

6J

6C

6B

6I

16a

16b

O4

O3

6N

6M

6H

6A

15a

15b

6D

6K

6E

P5

6F

6G

14a

14b

Q5

6L

5N

5M

5H

5A

12a

12b

5D

5K

5E

P4

5F

5G

11a

11b

Q4

5L

33

4J

4C

4B

4I

10a

10b

µA mA

34 35 36

9b

4D

4K

4N 4E 3J

4M P3 3C

4H

4A

9a

4F

4G

8a

3B

3I

7a

8b 7b

Q3 C4

4L C3

Table 12.

LCD glass segments mapping table pins 37-48

Pin 37 38 39 40 41 42 43 44 45

COM1 3N

COM2 3M

COM3 3H

COM4 3A

COM5 6a

COM6 6b

COM7 3D

COM8 3K

3E

P2

3F

3G

5a

5b

Q2

3L

2J

2C

2B

2I

4a

4b

C1

C2

2N

2M

2H

2A

3a

3b

2D

2K

2E

P1

2F

2G

2a

2b

Q1

2L

1J

1C

1B

1I

1a

1b

S5

S6

1N

1M

1H

1A

S3

S4

1D

1K

1E

+

1F

1G

-

S1

S2

1L

46 47 48

COM5

COM6

COM7

COM8

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Hardware layout and configuration

Figure 6.

LCD segment names

UM1521

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UM1521 Hardware layout and configuration

2.7 Audio

●

●

The STM32L152D-EVAL evaluation board supports stereo audio play by using an audio

DAC CS43L22 connected to both I2S2 port and one channel of DAC in the microcontroller

STM32L152ZDT6.

● OpAmp3 of the STM32L152ZDT6 acts as a low pass filter of audio output for this DAC.

A headphone jack is connected to the output of CS43L22.

A microphone is connected to ADC through OpAmp1 of STM32L152ZDT6.

Table 13.

Audio related jumpers

Jumper Description Setting

PA4 is connected to analog input signal for ADC or output signal from DAC on

CN8 when JP7 is set as shown to the right:

JP7

JP8

JP6

PA4 output signal to OpAmp3 as low pass filter when JP7 is set as shown to the right: ( Default setting )

Description of JP8 is in

Section 2.6: LCD glass module

Description of JP6 is in

Section 2.6: LCD glass module

The I2C address of CS43L22 is 0b1001010.

The LCD glass module has to be mounted on "IO" position for Audio I2C usage. Refer to

Section 2.6: LCD glass module for detail.

2.8 USB

The STM32L152D-EVAL evaluation board supports USB2.0 compliant full speed communication via a USB type B connector (CN15). The evaluation board can be powered by this USB connection at 5 V DC with a 500 mA current limitation.

USB disconnection simulation can be implemented by controlling the internal 1.5 K pull-up resistor on USB+ line and detection of 5 V power on USB connector CN15 by using a resistor bridge connected to PE6.

USB will work properly when VDD > 3 V.

2.9 RS-232 IrDA

RS-232 and IrDA communication is supported by D-type 9-pin RS-232 connector CN1, and

IrDA transceiver U2 which is connected to USART1 of the STM32L152ZDT6 on the

STM32L152D-EVAL evaluation board.

The signals Bootloader_RESET and Bootloader_BOOT0 can be added on RS-232 connector CN1 for ISP support. If Bootloader_RESET signal is used, mount R39 (Default:

Unmounted) with a 0 Ohm resistor as Figure 7

shows.

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Hardware layout and configuration

Figure 7.

R39 resistor placement

UM1521

Note: If Bootloader_RESET signal is not used, remove R39 to avoid disturbance due to CTS signal from pin8 of CN1, which could cause MCU reset with some software.

Table 14.

RS-232 & IrDA related jumpers

Jumper Description Setting

USART1_RX is connected to RS-232 transceiver and RS-232 communication is enabled when JP4 is set as shown to the right( Default setting ):

JP4

USART1_RX is connected to IrDA transceiver and IrDA communication is enabled when JP4 is set as shown to the right:

The LCD glass module has to be mounted on IO position for USART1 usage. Refer to

Section 2.6: LCD glass module for detail.

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UM1521 Hardware layout and configuration

2.10 Touch sensing slider

The STM32L152D-EVAL evaluation board supports a touch sensing slider based on either

RC charging or charge transfer technology. The charge transfer technology is enabled by default assembly.

PB6 and PB7 manage an active shield reducing sensitivity to other signals. The active shield is placed on an internal layer immediately under the slider (layer 2) to cover components related to the slider and the slider itself.

Table 15.

Touch sensing slider related solder bridges

Solder bridge Description

SB3

SB4

SB5

SB6

SB10

SB11

PF9 is connected to sampling capacitor when SB3 is open. ( Default setting )

PF9 is connected to extension connector CN10 when SB3 is closed. In this case

C54 must be removed to avoid disturbance due to the capacitor

PF8 is connected to touch slider when SB4 is open. ( Default setting )

PF8 is connected to extension connector CN10 when SB4 is closed. In this case

R69 must be removed to avoid disturbance due to the touch slider

PF7 is connected to touch slider when SB5 is open. ( Default setting )

PF7 is connected to extension connector CN10 when SB5 is closed. In this case

R73 must be removed to avoid disturbance due to the touch slider

PF6 is connected to touch slider when SB6 is open. ( Default setting )

PF6 is connected to extension connector CN10 when SB6 is closed. In this case

R77 must be removed to avoid disturbance due to the touch slider

PB6 is connected to touch slider when SB10 is open. ( Default setting )

PB6 is connected to extension connector CN10 when SB10 is closed. In this case

R92 must be removed to avoid disturbance due to the shield

PB7 is connected to touch slider when SB11 is open. ( Default setting )

PB7 is connected to extension connector CN10 when SB11 is closed. In this case

R101 must be removed to avoid disturbance due to the capacitor

Note: The slider is optimized when the board is powered at 3.3 V. It may be necessary to adjust the capacitor value of C54 (47nF COG) and the firmware to adapt them to a low voltage.

The 2 GB (or more) MicroSD Card connected to the SDIO port of the STM32L152ZDT6 is available on the board. MicroSD Card detection is managed by standard I/O port PC7.

The MicroSD Card will work properly when VDD > 2.7 V.

The LCD glass module has to be mounted on IO position for MicroSD Card usage. Refer to

Section 2.6: LCD glass module for detail.

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Hardware layout and configuration UM1521

A 4 Kbit (M95040-R) serial EEPROM is connected to SPI1 of the STM32L152ZDT6.

Serial Flash chip select is managed by I/O pin PB0.

The EEPROM will work properly when VDD > 1.8 V.

The LCD glass module has to be mounted on IO position for SPI EEPROM usage. Refer to

Section 2.6: LCD glass module for detail.

The RF EEPROM daughterboard (MB1020) implemented on the module is the M24LR64-R.

This EEPROM can be accessed by the MCU via the I2C bus or by RF using a 13.56 MHz reader (for instance CR95HF).

The daughterboard can be connected to the STM32L152ZDT6 via the I2C bus on CN2.

The I2C address of RF EEPROM is 0b1010E2E1E0. E0-E2 values are determined by the

RF EEPROM daughterboard.

The RF EEPROM will work properly when VDD > 1.8 V.

The LCD glass module has to be mounted on IO position for RF EEPROM usage. Refer to

Section 2.6: LCD glass module for detail.

2.14 SRAM

512Kx16-bit SRAM is connected to bank2 of the FSMC interface and both 8-bit and 16-bit accesses are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM respectively.

The SRAM will work properly when VDD > 2.4 V.

The LCD glass module has to be mounted on IO position for SRAM usage. Refer to

Section 2.6: LCD glass module for detail.

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128 Mbit NOR Flash is connected to bank1 of the FSMC interface. The 16-bit operation mode is selected by pull-up resister connected to BYTE pin of NOR Flash. Write protection is enabled or disabled by jumper JP9.

Table 16.

NOR Flash related jumpers

Jumper

JP9

Description

Write protection is enabled when JP9 is fitted while write protection is disabled when JP9 is not fitted.

Default setting : Not fitted

The LCD glass module has to be mounted on IO position for NOR Flash usage. Refer to

Section 2.6: LCD glass module for detail.

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UM1521 Hardware layout and configuration

A 2-pin connector, CN8, is connected to PA4 of the STM32L152ZDT6 as an external analog input or DAC output. A low pass filter can be implemented for a 2-pin connector by replacing

R43 and C35 with ADC input or replacing R36 and C35 with DAC output, with correct values of resistor and capacitor as requested by end user's application.

There are also three analog signals available on the board:

1.

10 KOhm potentiometer RV3 connected to PF10.

2. 10 KOhm potentiometer RV3 connected to OpAmp2 PA6.

3. I

DD

measurement output signal connected to PF11 for MCU power consumption test.

Table 17.

Analog input related jumpers

Jumper Description

JP12

JP7

10 KOhm potentiometer RV3 connected to OpAmp2 PA6 when JP12 is closed.

Default setting : Closed

Description of JP7 is in

Section 2.7: Audio

2.17 Comparator

Three I/Os implement a comparator feature as shown in

Figure 8 :

●

●

Comparator non-inverting input PB4; connected to LDR (R157).

Comparator inverting input PB3; connected to potentiometer (RV3) used as variable threshold input for comparison to luminosity measured on LDR.

● Comparator non-inverting input PB5; connected to potentiometer (RV3) used as analog voltage input for comparison with internal voltage reference (for instance Band gap) in order to test analog Wakeup feature of the MCU.

Figure 8.

STM32L152D-EVAL comparator features

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Hardware layout and configuration

Table 18.

Comparator, LDR and potentiometer related jumpers

Jumper Description

PB4 is connected to LDR_OUT when JP2 is set as shown to the right:

JP2

PB4 is connected to TRST when JP2 is set as shown to the right:

( Default setting ).

Potentiometer RV3 is connected to ADC input PF10 used as ADC input when JP13 is set as shown to the right: ( Default setting ).

UM1521

Setting

JP13

Potentiometer RV3 used as LDR variable threshold input is connected to comparator inverting input GPCOMP_IN- (PB3) when JP13 is set as shown to the right:

JP14

Potentiometer RV3 is connected to non inverting input

GPCOMP_IN+(PB5). The comparator inverting input can be connected to

¼ band gap, ½ band gap, band gap or DAC internally in order to test the possibility to wakeup the MCU when an external voltage reaches a programmable threshold when JP13 is set as shown to the right:

PB5 is connected to I2C_SMB, the interrupt output of temperature sensor

U24 when JP14 is closed ( Default setting ).

PB5 is disconnected from I2C_SMB but remains connected to COM_IN+ when JP14 is open for comparator application.

The LCD glass module has to be mounted in IO position for comparator usage. Refer to

Section 2.6: LCD glass module for detail.

Temperature sensor STLM75M2E is connected to the I2C bus of the STM32L152ZDT6 through two transistors to support a wide voltage range from 1.65 V to 3.6 V on the I2C bus.

I2C address of temperature sensor is 0b100100(A0), A0 can be 0 or 1 according to SB9.

Table 19.

Temperature sensor related solder bridge

Solder bridge Description

SB9

I2C address A0 is 0 when SB3 is open. ( Default setting )

I2C address A0 is 1 when SB3 is closed.

The LCD glass module has to be mounted on IO position for temperature sensor usage.

Refer to

Section 2.6: LCD glass module for detail.

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UM1521 Hardware layout and configuration

2.19 Display and input devices

The display devices are 4 general purpose color LED's (LD 1,2,3,4) and a 240x320 TFT color LCD connected to bank3 of the STM32L152ZDT6 FSMC interface port. The LCD glass module must be mounted on IO position for color LCD usage. Refer to

Section 2.6:

LCD glass module

for detail.

Input devices are the 4-direction joystick (U23) with selection key and wakeup button (B2).

Table 20.

LCD modules

Pin Description

18

19

20

21

22

14

15

16

17

27

28

29

30

23

24

25

26

10

11

12

13

6

7

8

9

3

4

5

1

2

PD10

PD11

PD12

PD13

PD14

PD15

PD16

PD17

BL_GND

BL_control

VDD

VCI

GND

GND

BL_VDD

SDO

SDI

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

CS

RS

WR/SCL

RD

RESET

5V

3.3V

3.3V

GND

GND

5V

-

GND

FSMC_D8

FSMC_D9

FSMC_D10

FSMC_D11

FSMC_D12

FSMC_D13

FSMC_D14

FSMC_D15

GND

CS of Bank3 of FSMC

FSMC_A0

FSMC_NWE

FSMC_NOE

RESET#

FSMC_D0

FSMC_D1

FSMC_D2

FSMC_D3

FSMC_D4

FSMC_D5

FSMC_D6

FSMC_D7

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Hardware layout and configuration UM1521

2.20 I

DD

measurement

The built-in I

DD

measurement circuit implemented allows the consumption measurement of the STM32L152ZDT6 while the MCU is in Run or Low power saving modes.

For I

DD

measurement the circuit below is implemented on the STM32L152D-EVAL.

Figure 9.

STM32L152D-EVAL I

DD

measurement circuit

In Run mode, I

DD

current is measured using operational amplifier MAX9938FEUK+ (U19) connected to the 1 Ohm shunt resistor (R62). In this case IDD_CNT_EN remains high during measurement, so R81 remains in short-circuit during measurement because of transistor T1 which remains ON permanently. JP10 must be connected between pins 2 & 3.

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In Low power modes (Stop or Standby), the operational amplifier MAX9938FEUK+ (U19) is connected to the 1 KOhm shunt resistor (R81), controlled by the analog switch T1. In this case the counter 74HC4060 (U15) enabled by IDD_CNT_EN manages the measurement timing according to

Figure 10

.

The principle used to measure a current when the STM32L is in Low power mode is:

1.

Configure ADC to measure voltage on the IDD_Measurement pin (PF11).

2. Configure PA0 to serve as wakeup pin.

3. Enter Low power mode after setting IDD_CNT_EN (PC13) signal low.

4. IDD_WAKEUP rising edge wakes up the MCU after around 300 ms.

5. Start ADC conversion as soon as possible after wakeup in order to measure the voltage corresponding to Low power mode on capacitor C82.

6. Reset the counter by programming IDD_CNT_EN high (in less than 70 ms after the wakeup) to avoid the R81 (1 KOhm) resistor being connected later in Run mode.

In Low power modes, the 1 K resistor is connected when T1 goes off after entering Low power mode. Q12 output of the counter allows connection of the 1 K resistor when the current I

DD

becomes very low.

Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521 Hardware layout and configuration

Figure 10.

STM32L152D-EVAL I

DD

Low power modes measurement timing diagram

Wake-up period

I

DD measurement

MCU mode Run Low power

Wake-up event

Clear CNT event

5

IDD_CNT_EN (PC13)

Q12 = LOW_POWER_EN

(T1 pin 3)

Q13 = IDD_WAKEUP (PA0)

Q13n = disconnect filter

(U18 pin 4)

3

0 ms

4

6

150 ms 300 ms

Figure 10

shows how the counter and T1 ensure that, 150 ms after IDD_CNT_EN falling edge, the shunt resistor R81 is connected between VDD_MCU and the power supply in order to reduce the measurement range to 30 uA full scale when VDD = 1.8 V.

Then after another 150 ms for current stabilization, R81 is shorted, the I

DD

measurement is stored in C82, and the MCU is woken up. After wakeup the MCU can measure the I

DD current corresponding to the Low power mode stored in C82.

In Low power mode the bias current of operational amplifier input (U19 pin 4) is not negligible compared to I

DD

current (typical Ibias is ~240 nA). To obtain a reliable MCU I

DD measurement it is possible to subtract the bias current from the I

DD

low power measurement since this current is not sinked by the MCU. The procedure for accurate I

DD

measurement is:

1.

Set jumper JP10 on pin 1 and pin 2.

2. Follow the Low power mode procedure to measure I1 = I bias.

3. Remove jumper JP10 from pins 1 and 2 and place it on pins 2 and 3.

4. Follow the Low power mode procedure to measure I2 = I

DD

+ I bias.

5. Calculate actual I

DD

: I

DD

= I2 - I1.

If JP10 jumper is in pins 2-3: STM32L is powered through I

DD

measurement circuit (default).

If JP10 jumper is in pins1-2: STM32L is powered directly by +3V3, I

DD is bypassed. Refer to

Section 2.2: Power supply

for detail.

measurement circuit

Note: 1 When jumper JP10 is removed the current consumption of the STM32L can be measured by connecting an ammeter between jumper JP10, pins 1 and 2.

2 RDS(on) typical value of analog switch T1= 50 MOhm, so to improve measurement accuracy it is recommended to take into account the RDS in series with R62 (1 Ohm) in the

I

DD

Run mode current calculation.

3 To avoid current injection from MCU to components on the board during I

DD

measurement it is strongly recommended to keep VDD_MCU

≤

3.3 V. Some components on the board are powered by 3.3 V (for instance the ST-LINK) so if VDD_MCU is higher than 3.3 V a current can be in injected on signals like T_NRST (PB0 of U21) which disturbs the measurement in low power mode.

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Connectors

3 Connectors

3.1 RS-232 connector CN1

Figure 11.

RS-232 connector (viewed from front)

UM1521

3.2

Table 21.

RS-232 connector CN1 with HW flow control and ISP support

Pin Description Pin Description

3

4

1

2

5

NC

RS-232_RX (PB11)

RS-232_TX (PB10)

NC

GND

8

9

6

7

Bootloader_BOOT0

NC

Bootloader_RESET

NC

Power connector CN2

The STM32L152D-EVAL evaluation board can be powered from a DC 5 V power supply via

the external power supply jack (CN2) shown in Figure 12

. The central pin of CN2 must be positive.

Figure 12.

Power supply connector CN2 (viewed from front)

3.3 TFT LCD connector CN4

A TFT color LCD board (MB895) is mounted on CN4.

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UM1521

3.4

Connectors

Daughterboard extension connector CN5 and CN10

Two 42-pin male headers CN5 and CN10 can connect the daughterboard (or standard wrapping board) to the STM32L152D-EVAL evaluation board. All GPIOs are available on them and the LCD glass connectors (CN6, CN7).

The space between these two connectors and positions of POWER, GND and RESET pins are defined as a standard which allows common daughterboards to be developed for several evaluation boards. The standard width between CN5 pin1 and CN10 pin1 is

2700 mils (68.58 mm). This standard has been implemented on the majority of evaluation boards.

Each pin on CN5 and CN10 can be used by a daughterboard after disconnecting it from the corresponding function block on the STM32L152D-EVAL evaluation board. Refer to

Table 22

and Table 23 for detail.

Table 22.

Daughterboard extension connector CN5

Pin Description

How to disconnect with function block on

STM32L152D-EVAL board

1

3

GND

PF5

5

7

PF3

PF1

9 PE6

11 PC14

13 PE5

15 PC15

17 PA4

19 GND

21 PB2

23 PF12

25 PF14

27 PG0

29 PE7

31 VLCD

33 PE9

35 PE11

37 PE13

39 GND

41 PG2

2 -

-

FSMC_A5

FSMC_A3

FSMC_A1

Tamper / Key / U5V_DET

32K OSC

FSMC_A21

/ TRACED2

32K OSC

CON_ADC4 -DAC1 /

Audio_DAC_OUT

-

BOOT1

FSMC_A6

FSMC_A8

FSMC_A10

-

FSMC_D4

FSMC_D6

FSMC_D8

-

FSMC_D10

-

FSMC_A12

-

-

-

-

-

Remove R150

Remove R85 and close SB8

Remove R84 and close SB7

JP7 open

-

-

-

-

-

-

-

-

-

-

-

-

Remove R89

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Connectors UM1521

18 PA5

20 -

22 PF11

24 PF13

26 PF15

28 PG1

30 GND

32 PE8

34 PE10

36 PE12

38 PE14

40 PE15

42 +3.3

Table 22.

Daughterboard extension connector CN5 (continued)

Pin Description

How to disconnect with function block on

STM32L152D-EVAL board

4

6

8

PF4

PF2

PF0

10 GND

12 PE4

14 PF10

16 PA0

FSMC_A4

FSMC_A2

FSMC_A0

-

FSMC_A20 / TRACED1

POTENTIOMETER

IDD_WAKEUP /

KEY_TAMPER2 /WKUP1

-

E2P_SCK

-

-

-

-

-

-

Remove R147

JP13 pin5,6 open

Remove R118

-

FSMC_A7

FSMC_A9

FSMC_A11

FSMC_D5

FSMC_D7

FSMC_D9

-

FSMC_D11 / E2P_ MISO

FSMC_D12 / E2P_ MOSI

-

-

-

-

-

-

-

Remove R90

Remove R120

If use 3.3 V power, keep R24 mounting

Table 23.

Daughterboard extension connector CN10

Pin Description

How to disconnect with function block on

STM32L152D-EVAL board

1

3

5

7

GND

PB7

PG15

PG13

9 PC13

11 RESET#

13 PG10

15 PD7

17 PD5

19 D5V

-

C_Shield_CT_6_4

LED4

JOYSTICK_SELECT

IDD_CNT_EN

-

CS_RAM_EBAR2

-

FSMC_WEN

-

-

-

Remove R101 and close SB11

Remove R60

Remove R105

-

-

Remove R40

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UM1521 Connectors

Table 23.

Daughterboard extension connector CN10 (continued)

Pin Description

How to disconnect with function block on

STM32L152D-EVAL board

FSMC_D3

OSC_IN

JTCK/SWCLK

FSMC_A22

USB_DP

USB_DM

JOYSTICK_RIGHT

SLIDER_CT_11_1

SLIDER_CT_11_3

-

-

FSMC_A14

Shield_CT_6_3

LED3

LCD_EBAR3

-

JOYSTICK_UP

CS_NOR_EBAR1

FSMC_WAITN

FSMC_OEN

LED1

-

FSMC_D2

OSC_OUT

-

JTMS/SWDAT

JOYSTICK_DOWN

JOYSTICK_LEFT

SLIDER_CT_11_2

SLIDER_CT_11_4

FSMC_A15

FSMC_A13

21 PD1

23 PH0

25 PA14

27 PH2

29 PA12

31 PA11

33 PG7

35 PF6

37 PF8

4

6

8

39 GND

41 PG4

2 -

PB6

PG14

PG12

10 GND

12 PG11

14 PG9

16 PD6

18 PD4

20 PD3

22 PD0

24 VDD

26 PH1

28 PA13

30 GND

32 PG8

34 PG6

36 PF7

38 PF9

40 PG5

42 PG3

-

-

Remove X1 from socket and close SB2

-

Remove R136

Remove R149

Remove R117

Remove R77 and close SB6

Remove R69 and close SB4

-

-

-

-

Remove R92 and close SB10

Remove R67

-

Remove R119

Remove R31

-

-

Remove R74

-

-

Remove X1 from socket & close SB1

-

-

Remove R110

-

-

Remove R104

Remove R73 and close SB5

Remove C54 and close SB3

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Connectors

3.5

Note:

UM1521

LCD glass daughterboard connectors CN6 and CN7

Two 48-pin male headers CN6 and CN7 connect the LCD glass daughterboard (MB979).

GPIOs which act as LCD glass signals and are not on CN5 and CN10 are available on these two connectors. The space between these two connectors and the position of every LCD glass signal is defined as a standard which allows development of common daughterboards for several evaluation boards. The standard width between the CN7 pin1 and CN6 pin1 is

700 mils (17.78 mm).

GPIO signals on these two connectors can be tested on odd pins when the LCD glass board is absent. Signal assignments are detailed in

Table 24 .

If CN6 and CN7 are used as GPIO extension connector on a common daughterboard, do not connect odd pins and even pins directly onto the daughterboard, and leave Trace connector (CN11), JTAG connector (CN16) and JP2 open.

Table 24.

LCD glass daughterboard connectors CN6 and CN7

CN7 CN6

Odd pin

35

37

39

41

27

29

31

33

43

45

47

19

21

23

25

11

13

15

17

5

7

9

1

3

GPIO signal

PC2

PC1

PC0

PA3

PA2

PB0

PA7

PA6

PB4

PB3

PB1

PB10

PB5

PB14

PB13

PB12

PA15

PB8

PB15

PA9

PA8

PA10

PB9

PB11

Odd pin

35

37

39

41

27

29

31

33

43

45

47

19

21

23

25

11

13

15

17

5

7

9

1

3

GPIO signal

PD10

PD11

PD12

PD13

PD14

PD15

PE0

PE1

PE2

PE3

PA1

PC4

PC5

PC6

PC7

PC8

PC9

PD8

PD9

PD2

PC12

PC11

PC10

PC3

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UM1521

3.6

Connectors

ST-LINK/V2 programming connector CN9

Connector CN9 is used only for embedded ST-LINK/V2 programming during board manufacture. It is not populated by default and is not for end-user use.

3.7 ST-LINK/V2 USB type B connector CN14

The USB connector CN14 is used to connect the embedded ST-LINK/V2 to a PC for debugging the board.

Figure 13.

USB type B connector CN14 (viewed from front)

3.8

Table 25.

USB type B connector CN14

Pin Description

1

2

3

VBUS (power)

DM

DP

Pin

4

5,6

GND

Shield

Description

JTAG connector CN16

Figure 14.

JTAG debugging connector CN16 (viewed from above PCB)

Table 26.

JTAG debugging connector CN16

Pin Description Pin

9

11

5

7

1

3

VDD power

PB4

PA15

PA13

PA14

RTCK

10

12

6

8

2

4

Description

VDD power

GND

GND

GND

GND

GND

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Connectors

Table 26.

JTAG debugging connector CN16 (continued)

Pin Description Pin

13

15

17

19

PB3

RESET#

DBGRQ

DBGACK

14

16

18

20

GND

GND

GND

GND

Description

UM1521

3.9 Trace debugging connector CN11

Figure 15.

Trace debugging connector CN11 (viewed from above PCB)

Table 27.

Trace debugging connector CN11

Pin Description Pin

9

11

13

15

17

19

5

7

1

3

VDD power

GND

GND

KEY

GND

GND

GND

GND

GND

GND

10

12

14

16

18

20

6

8

2

4

Description

TMS/PA13

TCK/PA14

TDO/PB3

TDI/PA15

RESET#

TraceCLK/PE2

TraceD0/PE3 or SWO/PB3

TraceD1/PE4 or nTRST/PB4

TraceD2/PE5

TraceD3/PE6

3.10 Audio jack CN13

A 3.5 mm stereo audio jack CN13 connected to audio DAC is available on the

STM32L152D-EVAL board.

32/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

3.11 MicroSD connector CN3

Figure 16.

MicroSD connector CN3 (viewed from above PCB)

Connectors

Table 28.

MicroSD connector CN3

Pin Description

3

4

1

2

5

SDIO_D2(PC10)

SDIO_D3(PC11)

SDIO_CMD(PD2)

VDD

SDIO_CLK(PC12)

Pin

8

9

6

7

10

Description

Vss/GND

SDIO_D0(PC8)

SDIO_D1(PC9)

GND

MicroSDcard_detect (PC7)

3.12 Analog input-output 2-pin connector CN8

Figure 17.

Analog input-output connector CN8 (viewed from top)

1 2

Table 29.

Analog input-output connector CN8

Pin Description Pin

1 GND 2

Description

Analog input-output PA4

Doc ID 022868 Rev 1 www.BDTIC.com/ST

33/56

Connectors

3.13 User USB type B connector CN15

Figure 18.

USB type B connector CN15 (viewed from front)

UM1521

Table 30.

USB type B connector CN15

Pin Description

1

2

3

VBUS (power)

DM

DP

Pin

4

5,6

GND

Shield

Description

3.14 RF EEPROM daughterboard connector CN12

Figure 19.

RF EEPROM daughterboard connector CN12 (viewed from front)

Table 31.

USB type B connector CN15

Pin Description

1

2

SDA(PB9)

SCL(PB8)

Pin

3

4

VDD

GND

Description

34/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

4 Schematics

Figure 20.

STM32L152D-EVAL

Schematics

Doc ID 022868 Rev 1 www.BDTIC.com/ST

35/56

Schematics

Figure 21.

Audio

UM1521

36/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

1 3

UM1521

Figure 22.

Extension connector

Schematics

Doc ID 022868 Rev 1 www.BDTIC.com/ST

37/56

Schematics

Figure 23.

I

DD

measurement

S D

G

2

3

1

1 2

4 2

1

5

2

6

4

3

38/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

UM1521

Figure 24.

JTAG and Trace

Schematics

Doc ID 022868 Rev 1 www.BDTIC.com/ST

39/56

Schematics

Figure 25.

RS-232 and LCD

UM1521

40/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

Figure 26.

MCU

2

Schematics

2

1

3

2

1

3

4

Doc ID 022868 Rev 1 www.BDTIC.com/ST

41/56

Schematics

Figure 27.

MicroSD Card

6

5

7

8

3

2

4

1

SW1

SW2

10

9

UM1521

42/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

Figure 28.

Peripherals

1 2 1 2 1 2

8 4

10K

R10

R10

10K

R96

10K

R10

10K

10K

R11

3

9

6

8

100nF

100nF

100nF

100nF

100nF

C91

C96

C84

C95

C99

Schematics

4

1 2

3

1 3

Doc ID 022868 Rev 1 www.BDTIC.com/ST

43/56

Schematics

Figure 29.

Power

1

GND

1

GND

GND

EXP

2

1 3

1

UM1521

2

44/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

Figure 30.

SRAM Flash

Schematics

Doc ID 022868 Rev 1 www.BDTIC.com/ST

45/56

Schematics

Figure 31.

ST_LINK

3

2

4

1

LK WC CK_S JT M_ ST

_3

I

K

O

ST

PB5

PB6

PB7

JTD

JTC

JTD

JNR

BOOT0

PB8

PB9

VSS

VDD_3

45

44

46

48

47

42

41

43

40

39

38

37

OOT1

SI

O

CK

RX

_1

2/B PB

PB1

PB0

PB10

PB11

VSS

S1_MO

S1_MIS

VDD_1

S1_CK

U2_

U2_

22

21

24

23

19

18

20

16

15

17

14

13

T_JT

T_JT

T_JT

T_NR

T_JR ST

ST

DI

DO

CK

3 1

46/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

UM1521

Figure 32.

EEPROM and temperature sensor

Schematics

2

2 3

2

1

4

3

2

1

4

Doc ID 022868 Rev 1 www.BDTIC.com/ST

47/56

Schematics

Figure 33.

Touch slider

UM1521

SLD_

SLD_

SLD_

2

1

3 3

2

1

3

2

1

48/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521 STM32L152D-EVAL I/O assignment

Appendix A STM32L152D-EVAL I/O assignment

Table 32.

STM32L152D-EVAL I/O assignment

Pin No.

Pin name STM32L152D-EVAL I/O assignment

PC0

PC1

PC2

PC3

VSSA

VREF-

VREF+

PE2

PE3

PE4

PE5

PE6

VLCD

PC13ANTI_TAMP

PC14OSC32_IN

PC15OSC32_OUT

PF0

PF1

PF2

PF3

PF4

PF5

VSS_5

VDD_5

PF6

PF7

PF8

PF9

PF10

PH0OSC_IN

PH1OSC_OUT

NRST

20

21

22

23

24

25

14

15

16

11

12

13

17

18

19

29

30

31

32

26

27

28

4

5

6

1

2

3

7

8

9

10

SEG 38 / A23 / TRACECK

SEG 39 / A19 / TRACED0

A20 / TRACED1

A21 / TRACED2

TAMPER3/TRACED3 / WKUP3/U5V_DET

V_LCD

IDD_CNT_EN

OSC32_IN

OSC32_OUT

A0

A1

A2

A3

A4

A5

GND

VDD

SLIDER_CT_11_1

SLIDER_CT_11_2

SLIDER_CT_11_3

SLIDER_CT_11_4

POTENTIOMETER_ADC31

OSC_IN

OSC_OUT

NRST

SEG18

SEG19 / LPF_OA3_INP

SEG20

SEG21 / LPF_OA3_OUT

GND

GND

VDDA

49/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

STM32L152D-EVAL I/O assignment

Table 32.

STM32L152D-EVAL I/O assignment (continued)

Pin No.

Pin name STM32L152D-EVAL I/O assignment

PA7

PC4

PC5

PB0

PB1

PB2

PF11

PF12

VSS_6

VDD_6

PF13

PF14

PF15

PG0

PG1

VDDA

PA0WKUP

PA1

PA2

PA3

VSS_4

VDD_4

PA4

PA5

PA6

PE7

PE8

PE9

VSS_7

VDD_7

PE10

PE11

PE12

PE13

PE14

52

53

54

55

56

57

46

47

48

43

44

45

49

50

51

36

37

38

33

34

35

39

40

41

42

58

59

60

61

62

63

64

65

66

67

VDDA

IDD_WAKEUP / KEY_TAMPER2/WKUP1

SEG0 / Micro_OA1_INP

SEG1 / Micro_OA1_INN

SEG2 / Micro_OA1_OUT

GND

VDD

CON_ADC4 -DAC1 / Audio_DAC_OUT

E2P_SCK

SEG3 / ADJ_G_OA2_INP

VDD

A7

A8

A9

A10

A11

SEG4 / ADJ_G_OA2_INN

SEG22

SEG23 / E2P_CS

SEG5 / ADJ_G_OA2_OUT

SEG6 / Audio_DAC_RST

BOOT1

IDD_ADC_IN1b

A6

GND

D4

D5

D6

GND

VDD

D7

D8

D9

D10

D11 / E2P_ MISO

UM1521

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UM1521 STM32L152D-EVAL I/O assignment

Table 32.

STM32L152D-EVAL I/O assignment (continued)

Pin No.

Pin name STM32L152D-EVAL I/O assignment

PG2

PG3

PG4

PG5

PG6

PG7

PD9

PD10

PD11

PD12

PD13

VSS_8

VDD_8

PD14

PD15

PE15

PB10

PB11

VSS_1

VDD_1

PB12

PB13

PB14

PB15

PD8

PG8

VSS_9

VDD_9

PC6

PC7

PC8

PC9

PA8

PA9

PA10

87

88

89

90

91

92

81

82

83

78

79

80

84

85

86

71

72

73

68

69

70

74

75

76

77

93

94

95

96

97

98

99

100

101

102

D12 / E2P_ MOSI

SEG10

SEG11

GND

VDD

SEG12 / I2S2_WS

SEG13 / I2S2_CK

SEG14

SEG15 / I2S2_SD

SEG28 / D13

SEG29 / D14

SEG30 / D15

SEG31 / A16

SEG32 / A17

SEG33 / A18

GND

VDD

SEG34 / D0

SEG35 / D1

A12

A13

A14

A15

JOYSTICK_LEFT

JOYSTICK_RIGHT

JOYSTICK_DOWN

GND

VDD

SEG24 / I2S2_MCK

SEG25 /uSD_DET

SEG26 / uSD_D0

SEG27 / uSD_D1

COM0

COM1 / USART1_TX

COM2 / USART1_RX

51/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

STM32L152D-EVAL I/O assignment

Table 32.

STM32L152D-EVAL I/O assignment (continued)

Pin No.

Pin name STM32L152D-EVAL I/O assignment

PD6

PD7

PG9

PG10

PG11

PG12

PC12

PD0

PD1

PD2

PD3

PD4

PD5

VSS_10

VDD_10

PA11

PA12

PA13

PH2

VSS_2

VDD_2

PA14

PA15

PC10

PC11

PB4

PB5

PB6

PB7

PG13

PG14

VSS_11

VDD_11

PG15

PB3

122

123

124

125

126

127

113

114

115

116

117

118

119

120

121

103

104

105

106

107

108

109

110

111

112

128

129

130

131

132

133

134

135

136

137

USB_DM

USB_DP

JTMSSWDAT

A22

GND

VDD

JTCKSWCLK

SEG17 / JTDI

COM4 / SEG28/ SEG40 / uSD_D2

COM5 / SEG29 /SEG41 / uSD_D3

COM6 / SEG30 / SEG42 / uSD_CK

D2

D3

COM7 / SEG31 / SEG43 / uSD_CMD

LED1

OEN

WEN

GND

VDD

WAITN

LED2

CS_NOR_EBAR1

CS_RAM_EBAR2

JOYSTICK_UP

LCD_EBAR3

JOYSTICK_SELECT

LED3

GND

VDD

LED4

SEG7 / POT_COMP_INN / JTDO/SWO

SEG8 / LDR_COMP_INP / JTRST

SEG9 / POT_COMP_INP / Temp_SMBAl

Shield_CT_6_3

C_Shield_CT_6_4

UM1521

52/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521 STM32L152D-EVAL I/O assignment

Table 32.

STM32L152D-EVAL I/O assignment (continued)

Pin No.

Pin name STM32L152D-EVAL I/O assignment

138

139

140

141

142

143

144

BOOT0

PB8

PB9

PE0

PE1

VSS_3

VDD_3

BOOT0

SEG16 / AUDIO_RF_Temp_SCL

COM3 / AUDIO_RF_Temp_SDA

SEG36 / BLN0

SEG37 / BLN1

GND

VDD

Doc ID 022868 Rev 1 www.BDTIC.com/ST

53/56

Mechanical dimensions

Appendix B Mechanical dimensions

Figure 34.

Mechanical dimension

UM1521

Yϭ

Ă ϭ

Wϭ

Ś ,

WϮ

Ă

Ϯ

YϮ

Ě Ă ϯ

Wϯ z

Ddž

Yϯ

>LJ

>dž

DLJ Ğ y

-36

Table 33.

Mechanical dimensions

Symbol Size (mm) Symbol

C

D a3

B d

A a1 a2

68.58

2.54

2.54

2.54

17.78

36

3.5

3.2

Lx

Ly

Mx

My

P1 e

H h

Size (mm)

72.363

11

12

5.715

5.715

17.145

20.32

18.415

X

Y

Q2

Q3

P2

P3

Q1

Symbol Size (mm)

84.455

115.247

24.13

26.67

24.792

114.3

172.72

54/56 Doc ID 022868 Rev 1 www.BDTIC.com/ST

UM1521

Revision history

Table 34.

Document revision history

Date Revision

30-Mar-2012 1 Initial release.

Changes

Revision history

Doc ID 022868 Rev 1 www.BDTIC.com/ST

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UM1521

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