STMicroelectronics STR485 Datasheet
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DFN10 3 x 3
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STR485
STR485
Datasheet
3.3 V RS485 compatible with 1.8 V I/Os and selectable speed
20 Mbps or 250 kbps
Features
• Half-duplex RS485 transceiver
• 1.65 V to 3.6 V supply for data and enable signals
• 3 V to 3.6 V supply for bus supply
• High speed: up to 20 Mbps data rate
• Low speed selected by SLR pin : 250 kbps
• Up to 256 transceivers on the bus
• Fail safe receiver (bus open, idle and shorted)
• Thermal shutdown protection
• Low quiescent current in shutdown mode
• Extended temperature range : -40 °C to +105 °C
• Available in industry standard DFN10
• Bus-pin protection more than:
– ±4 kV HBM protection
– ±8 kV IEC61000-4-2 contact discharge
– ±16 kV IEC61000-4-2 air discharge
– Compliant IEC61000-4-4 fast transient burst Class B
Description
The STR485 is a low power differential line transceiver for data transmission standard RS485 applications in half-duplex mode. Data and enable signals are compatible with 1.8 V or 3.3 V supplies.
Two speeds are selectable through SLR pin: fast data rate up to 20 Mbps or slow data rate for extended cable running to 250 kbps.
Excessive power dissipation caused by bus contention or faults is prevented by thermal shutdown circuit that forces the driver outputs into a high impedance state.
The receiver has a fail-safe feature, which guarantees a high output state when the inputs are left open, shorted or idle.
DS12713 - Rev 5 - July 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STR485
Pin connections
Pin connections
Figure 1. Pin connections
VL
R
DE
RE
D
VCC
B
A
SLR
GND
Name
VL
R
DE nRE
D
GND
SLR
A
B
VCC
7
8
9
10
4
5
6
Pin
1
2
3
I/O
Logic supply
Digital output
Digital input
Table 1. Pin description
Description
1.65 V to 3.6 V supply for logic I/O signals
Receiver data output
Driver enable input: serial resistors of 150 ohms followed by 2.5 Mohms/GND
Receiver enable input: serial resistors of 150 ohms followed by 2.5 Mohms/VCC
Transmission data input
Digital input
Digital input
Ground
Digital input
Bus I/O
Bus I/O
Bus supply
Slew rate select: low = 20 Mbps, high = 250 kbps.
Default to 20 Mbps if SLR is left floating
Digital bus I/O, A
Digital bus I/O, B
3 V to 3.6 V supply for A and B bus lines
DS12713 - Rev 5 page 2/26
DS12713 - Rev 5
STR485
Pin connections
D
DE
R
RE
1.8 V
VL SLR
3.3 V
VCC
A
B
R
T
120 Ω
GND
Figure 2. Typical application schematic
R
T
120 Ω
3.3 V
VCC
A
B
GND
1.8 V
SLR VL
D
DE
R
RE
Figure 3. Example of implementation in a PCB
Adding an ESDA14V2BP6 or ETP01-2821 STMicroelectronics protection device can help the product to sustain an EFT perturbation level up to 4 kV.
page 3/26
2
STR485
Truth tables
Truth tables
The STR485 is a half-duplex differential driver/receiver compliant to the RS485 communication standard (ISO-IEC
8482). This product is perfectly adapted for low voltage application running with a low power supplies VL, generally set to 1.8 V and VCC set to 3.3 V.
These voltages confer a low power consumption to the product.
SLR is the data rate selection, this pin could be let floating but it is not recommended; in that case the high speed rate is automatically selected.
The SLR pin must be connected to the ground to provide a high speed communication up to 20 Mbps.
When this pin is connected to VL power supply, the data rate is limited to 250 kbps more adapted for very long distance data transmission.
Figure 4. Block diagram
The product is perfectly adapted to run with 256 devices on the same bus thanks to the internal output resistance that is over 96 kΩ up to 105 °C; this resistance follows the RS485 condition that requests a minimum of 12 kΩ for
32 unit loads (UL).
The STR485 has internal protection against ESD that protect each device driver output and receiver input. The limits have been tested up ±4 kV electrostatic discharge (HBM) and ± 8 kV contact discharge and ± 16 kV air discharge shocks without latch-up.
Another external protections can be used to increase the communication robustness against different perturbation that can be seen on the application.
The power supplies must be well-decoupled by a minimal capacitor of 0.1 µF as closed as possible to the device power supply input. Moreover, the capacitor should be higher on the application with a minimum of 1 µF around the device.
The device operating range is set from VL = 1.65 V to 3.6 V and for Vcc = 3.0 V to 3.6 V. In any case VCC must be higher or equal than VL.
The applications should respect this voltage constraints to let the application communication device run to the best conditions.
DS12713 - Rev 5 page 4/26
DS12713 - Rev 5
STR485
Truth tables
Figure 5. Example of typical application
VCC VL SLR
A
D
DE
R
RE
GND
B
R
T
120Ω
SLR
VL
VCC
B A
SLR
D DE R RE
VL
GND VCC
B A
D DE R RE
R
T
120Ω
GND
A
B
SLR VL VCC
D
DE
R
RE
GND
INPUT D
X
X
H
L
Open
ENABLE DE
H
H
L
Open
H
Table 2. Driver truth table
OUTPUT A
Z
Z
H
L
H
OUTPUT B
Z
Z
L
H
L
Function
Actively drive bus high
Actively drive bus low
Driver disabled
Driver disabled by default
Actively drive bus high by default
Differential input V
ID
= V
A
-V
B
V
ID
> V
IT+
V
IT-
< V
ID
< V
IT+
V
ID
< V
IT-
X
X
Open-circuit bus
Short-circuit bus
Idle (terminated) bus
Table 3. Receiver truth table
ENABLE RE
L
L
L
H
OPEN
L
L
L
OUTPUT R
H
?
L
H
H
H
Z
Z
Function
Receive valid bus high
Indeterminate bus state
Receive valid bus low
Receiver disabled
Receiver disabled by default
Fail safe high output
Fail safe high output
Fail safe high output
SLR
VL
GND or OPEN
Table 4. Speed selection, SLR pin configuration
Data rate
250 kbps
20 Mbps
Typical t r
/ t f
200 ns
7 ns page 5/26
STR485
Absolute maximum ratings and operating conditions
3
Note:
Absolute maximum ratings and operating conditions
Table 5. Absolute maximum ratings
Symbol
V
L
V
CC
Control supply voltage
Bus supply voltage
Voltage range at A or B inputs
Input voltage range at any logic pin
T
J
T stg
Receiver output current
Junction temperature
ESD
Parameter
Storage temperature
IEC 61000-4-2 ESD (air-gap discharge), bus terminals and GND
IEC 61000-4-2 ESD (contact discharge), bus terminals and GN
IEC 61000-4-4 EFT (fast transient or burst) bus terminals and GND
JEDEC standard 22, test method A114, HBM, all terminals
JEDEC standard 22, test method C101, (charged device model), all pins
Min.
-0.5
Max.
4
-0.5
4.8
-13 13
-0.3
V
L
+0.3
-12 12
170
-65 150
± 16
± 8
± 2
± 4
± 1.5
Unit
V
V
V
V mA
°C
°C kV kV kV kV kV
All voltage values, except the differential voltage, are with respect to network ground terminal.
Table 6. Operating conditions
Symbol
V
L
V
CC
V
I
Control supply voltage
Bus supply voltage
Parameter
Input level at any bus terminal (separately or common mode)
V
V
V
IH
IL
ID
High level input voltage (driver, driver enabled, receiver enable inputs, and slew rate select)
Low level input voltage (driver, driver enable, receiver enable inputs, and slew rate select)
Differential input voltage
IO
Output current / driver
Output current / receiver
R
L
C
L
Differential load resistance
Differential load capacitance
D
R
Signaling rate / SLR = ‘0’
Signaling rate / SLR = ‘1’
T
A
Operating free-air temperature
Min.
Typ.
Max.
Unit
1.65
3.6
3
-7
3.3
3.6
12
0.7×V
L
V
L
V
0
-12
-80
- 2
54
-40
60
50
0.3×V
L
12
80
2 mA
Ω pF
20 Mbps
250 kbps
105 °C
Operation is specified for internal (junction temperature) up to 150 °C. Self-heating due to internal power dissipation should be considered for each application. Maximum junction temperature is internally limited by the thermal shut-down circuit which disables the driver outputs when the junction temperature reaches 165 °C.
DS12713 - Rev 5 page 6/26
STR485
Absolute maximum ratings and operating conditions
Symbol
R th-ja
R th-jc
Table 7. Thermal information
Parameter
Thermal resistance, junction-to-ambient
Thermal resistance, junction-to-case
Min.
Typ.
40
5.2
Max.
Unit
°C/W
DS12713 - Rev 5 page 7/26
4
STR485
Electrical characteristics
Electrical characteristics
Table 8. Receiver: over recommended operating conditions (unless otherwise specified. Please, see
"Operating conditions" table)
Typ.
Max.
Unit t t t
PLZ
Symbol
I
R
PHL t
V
V
V
V
V
C t r
IT+
IT-
HYS
OH
OL
OD
OZ
I
I in
, t
, t f
PLH
SK(P)
PLZ
, t
, t
PZH t
PHZ
PZH
, t
PZL
,
Parameter
Receiver output rise/fall time
Receiver propagation delay time
Receiver pulse skew, | t
PHL
– t
PLH
|
Receiver disable time
C
L
=15 pF
Test conditions
Receiver/DC
Min.
Positive-going receiver differential input voltage threshold
Negative-going receiver differential input voltage threshold
Receiver differential input voltage threshold hysteresis (V
IT+
- V
IT-
)
-200
40
Receiver high-level output voltage
Receiver low-level output voltage
V
L
= 1.65 V, I
OH
= - 2 mA
V
L
= 3 V, I
OH
= - 2 mA
V
L
= 1.65 V, I
OL
= 2 mA
V
L
= 3 V, I
OL
= 2 mA
1.25
2.75
Differential output capacitance
Receiver output highimpedance current
V
O
= 0 V or V
L
, nRE at V
L
-1
Receiver input impedance
-7 V ≤ V incm
≤ +12 V
-40 °C ≤ Temp ≤ 105 °C
1V65 < V
L
< 3.3 V, V
CC
= 3.3 V
Receiver input current
(disabled driver)
V
I
= 12 V, -40 °C ≤ Temp ≤ 105 °
V
I
= -7 V, -40 °C ≤ Temp ≤ 105 ° -100
Receiver / switching characteristics, SLR = ‘X’
15
Receiver enable time
Driver enabled C
L
=15 pF with 1 kΩ
Driver disabled C
L
=15 pF with
1 kΩ
1. Under any specific conditions, V
IT+
, is specified to be at least V
HYS
higher than V
IT-
2. Guaranteed by design simulation in temperature.
-60
-130
70
1.45
2.9
0.2
0.1
15
85
5
25
12
15
2
-20
0.45
0.25
1
15
60
15
20
80
8 mV
V pF
µA kΩ
µA ns
µs
DS12713 - Rev 5 page 8/26
DS12713 - Rev 5
STR485
Electrical characteristics
Table 9. Driver: over recommended operating conditions (unless otherwise specified. Please, see
"Operating conditions" table)
Symbol Max.
Unit
I
I
|V
OD
|
Δ|V
OD
|
V
°C(SS)
ΔV
°C
V
°C(PP) t r
, t f t
PHL
, t
PLH t
SK(P) t
PLZ
, t
PHZ t
PLZ
, t
PZH t r
, t f t
PHL
, t
PLH t
SK(P) t
PLZ
, t
PHZ t
PZL
, t
PZH
Parameter Test conditions
DC driver/ DC
Min.
Typ.
Driver input, driver enable, and receiver enable input current
-2
Driver differential output voltage magnitude
R
L
= 60 Ω, 375 Ω on each output to –7 V to
12
RL = 54 Ω (RS-485)
RL = 100 Ω (RS-422)
T
J
≥ 0 °C, V
CC
≥ 3.2
1.5
1.5
2
2
2
Change in magnitude of driver differential output voltage
Steady-state commonmode output voltage
R
L
=54 Ω, C
L
=50 pF
V
0
CC
/2
Change in differential driver output commonmode voltage
Peak-to-peak driver common-mode output voltage
Center of two 27-Ω load resistors
-50 0
500
Driver/switching characteristics, SLR='1', 250 kbps, bit time ≥ 4 µs
Driver differential output rise/fall time
0.05
0.2
Driver propagation delay time t
Driver pulse skew, |t
PHL
PLH
|
–
Driver disable time
RL = 54 Ω, CL = 50 pF -50
1
0.4
1
0.017
Driver enable time
Receiver enabled
C
L
=50 pF with 110 kΩ
Receiver disabled
C
L
=50 pF with 110 kΩ
0.7
1.64
Driver/switching characteristics, SLR= '0', 20 Mbps, bit time ≥ 50 ns
Driver differential output rise/fall time
4 7
R
L
=54 Ω, C
L
=50 pF 6 12 Driver propagation delay
Driver pulse skew, |t
PHL
– t
PLH
|
Driver disable time
Driver enable time
Receiver enabled
Receiver disabled
17
9
1
2
50
3
50
1
1.5
0.3
0.035
1.2
2.4
15
25
4
40
18
2.4
µA
V mV
V mV
µs
µs ns
µs page 9/26
DS12713 - Rev 5
STR485
Electrical characteristics
Table 10. Supply current and protections: over recommended operating conditions (unless otherwise specified. Please, see "Operating conditions" table)
Typ.
Max.
Unit Symbol
I
CC
Parameter
Supply current
(quiescent)
Test conditions Min.
Supply current
Driver and receiver enabled
DE = V
L
, RE = GND, no load,
T amb
Driver and receiver enabled
DE = V
L
, RE = GND, no load,
T<105 °C
Driver enabled, receiver disabled
DE = VCC, =VL, No load,
T amb
Driver enabled, receiver disabled
DE = VCC, =VL, No load, T <
105 °C
Driver disabled, receiver enabled
DE = GND, =GND, No Load
Driver and receiver disabled
DE = GND, =VL, no load
[-40 °C, 105 °C]
T
T
TSD_HYS
I
TSD
OS
Thermal shutdown threshold
Thermal shutdown hysteresis
Driver shortcircuit output current
1. Guaranteed by simulation.
-7 V < V
SHORT
< + 12 V -250
625
315
515
0.5
165
15
700
3
250
µA
°C mA page 10/26
5
STR485
Test circuits and typical characteristics
Test circuits and typical characteristics
In the schematics below, C
L
includes fixture and instrumentation capacitance.
Figure 6. Driver differential output voltage with common-mode load
375 Ω ±1%
V
L
D
A
V
OD
B
+
-
-7 V < V
CM
< 12 V
375 Ω ± 1%
Input generator rate is 100 kbps, 50% duty cycle, rise and fall times less than 6 ns.
Figure 7. Driver differential and common-mode output with RS-485 load
D
V
L
R
L
/ 2
A
V
OD
B R
L
/ 2
A
B
C
L V
OC
ΔV
OC(SS)
V
OC(PP)
DS12713 - Rev 5 page 11/26
DS12713 - Rev 5
STR485
Test circuits and typical characteristics
Figure 8. Driver differential output rise and fall times and propagation delays
V
L
V
L
D
A
V
OD
B
V
I
50% t
PLH
0 V
V
OD
10%
90% t r t
PHL t f
≈ 2 V
≈ -2 V
V
I
Figure 9. Driver enable and disable times with active high output and pull-down load
V
L
A
B
V
O
DE
50 Ω
V
I
50%
V
O t
PZH
50% t
PHZ
V
L
50%
0V
0V5
90%
≈ 0V
V
OH
V
I
Figure 10. Driver enable and disable times with active low output and pull-up load
V
L V
L
RL = 110 Ω ± 1%
A
V
O
B V
I
50%
50%
≈ V
L
DE
50 Ω
CL = 50 pF ± 20%
V
O t
PZL
50% t
PLZ
10%
V
OL
0 V
≈ 3 V page 12/26
DS12713 - Rev 5
STR485
Test circuits and typical characteristics
V
I
Figure 11. Receiver output rise and fall times and propagation delay
V
L
A
V
I 50%
50%
V
L
V
O
1V5
B
0V
RE
V
O t
PLH
10%
90% t
PHL
90%
V
OH
10%
0 V
V
OL t r t f
Figure 12. Receiver enable/disable times with driver enabled
VL
1 k Ω ±1%
CL=15 pF ±20%
V
I
50 Ω
V
I 50%
V
O t
PZH(1)
50%
V
O t
PZL(1)
50%
V
L
50%
90% t
PLZ
0V t
PHZ
V
OH
≈ 0V
V
L
10%
V OL
D at V L
S1 to GND
D at OV
S1 to VL page 13/26
DS12713 - Rev 5
STR485
Test circuits and typical characteristics
Figure 13. Receiver enable/disable times with driver disabled
V L
0V or 1V5
A
B
1kΩ ± 1%
CL=15pF ± 20%
S1
1V5 or 0V
V
I 50Ω
V
I 50%
V
O t
PZH(2)
50%
V
O t
PZL(2)
50%
V
L
0V
V
OH
A at 1.5V
B at 0V
S1 to GND
≈ 0V
V
OL
V
L
A at 0 V
B at 1.5 V
S1 to VL
Figure 14. Short-circuit output current measurement
I SHORT v SHORT
A
B
I
SHORT v SHORT
When one of the driver output is shorted to a voltage source (named VSHORT) between -7 V to +12 V stabilized, the current does not exceed 250 mA and the driver is protected.
page 14/26
6
STR485
Typical characteristics
Typical characteristics
Figure 15. Driver I
CC
vs V
CC
supply driver I
CC versus temperature 60 Ω load
Figure 16. Driver I
CC
vs temperature 60 Ω load
Figure 17. Driver output on 60 Ω load, clock @10
MHz 3V6pp
Figure 18. Driver output on 60 Ω load, speed selected @20 MHz 3V6pp
Figure 19. Eye diagram 20 Mbps short line
DS12713 - Rev 5 page 15/26
7
STR485
Equivalent input and output schematic diagrams
Equivalent input and output schematic diagrams
Figure 20. D and RE inputs
VCC
Figure 21. DE and SLR inputs
VCC
REn
7V
300
7V
2.5M
SLR
7V
300
7V
2.5M
GND GND
Figure 22. R output
VCC
7V
7V
R
GND
Figure 23. Driver output
VCC
A
B
13V 13V
GND
DS12713 - Rev 5 page 16/26
STR485
Equivalent input and output schematic diagrams
A
B
R1
R1
Figure 24. Receiver inputs
VCC
ST BY ST BY
R2 R2 inn inp
-
+
7V out
R
R3
GND
R3
DS12713 - Rev 5 page 17/26
8
8.1
STR485
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DFN10 package information
Figure 25. DFN10 package outline (top and side view)
DS12713 - Rev 5 page 18/26
Figure 26. DFN10 package outline (bottom view)
STR485
DFN10 package information
DS12713 - Rev 5
Symbol e
K
L aaa bbb ccc ddd eee
D
D2
E
E2
E3
E4
E5
A
A1
A3 b
Table 11. DFN10 package mechanical data
Min.
0.80
0.00
0.20
2.85
2.284
2.85
1.546
0.130
0.265
0.170
mm
Typ.
0.90
0.02
0.20
0.25
3.00 BSC
2.384
3.00 BSC
1.646
0.230
0.365
0.270
0.50 BSC
0.20
0.30
0.40
0.05
0.10
0.10
0.05
0.08
Max.
1.00
0.05
0.30
3.15
2.484
3.15
1.746
0.330
0.465
0.370
0.50
page 19/26
STR485
DFN10 package information
Note: VFDFPN stands for thermally enhanced very thin fine pitch dual flat packages. No lead. Very thin: 0.80 mm < A
≤ 1.00 mm / fine pitch: e < 1.00 mm
Figure 27. DFN10 recommended footprint
DS12713 - Rev 5 page 20/26
9
Ordering information
Order code
STR485LVQT
Temperature range
-40 °C to +105 °C
STR485
Ordering information
Package
DFN10
Marking
485L
DS12713 - Rev 5 page 21/26
STR485
Revision history
Date
20-Sep-2018
16-Oct-2018
15-Apr-2019
24-Oct-2019
02-Jul-2020
2
3
4
5
Table 12. Document revision history
Version
1
Changes
Initial release.
Updated Table 10. Supply current and protections: over recommended operating conditions (unless otherwise specified. Please, see "Operating conditions" table).
Updated Table 9. Driver: over recommended operating conditions (unless otherwise specified. Please, see "Operating conditions" table).
Updated Table 1. Pin description
and Section 7 Equivalent input and output schematic diagrams
.
Updated Section 8.1 DFN10 package information
Updated Section 9 Ordering information .
DS12713 - Rev 5 page 22/26
STR485
Contents
Contents
DS12713 - Rev 5 page 23/26
STR485
List of tables
List of tables
DS12713 - Rev 5 page 24/26
STR485
List of figures
List of figures
versus temperature 60 Ω load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DS12713 - Rev 5 page 25/26
STR485
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS12713 - Rev 5 page 26/26
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